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src.c
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1 /*
2  * Adaptec AAC series RAID controller driver
3  * (c) Copyright 2001 Red Hat Inc.
4  *
5  * based on the old aacraid driver that is..
6  * Adaptec aacraid device driver for Linux.
7  *
8  * Copyright (c) 2000-2010 Adaptec, Inc.
9  * 2010 PMC-Sierra, Inc. ([email protected])
10  *
11  * This program is free software; you can redistribute it and/or modify
12  * it under the terms of the GNU General Public License as published by
13  * the Free Software Foundation; either version 2, or (at your option)
14  * any later version.
15  *
16  * This program is distributed in the hope that it will be useful,
17  * but WITHOUT ANY WARRANTY; without even the implied warranty of
18  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19  * GNU General Public License for more details.
20  *
21  * You should have received a copy of the GNU General Public License
22  * along with this program; see the file COPYING. If not, write to
23  * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
24  *
25  * Module Name:
26  * src.c
27  *
28  * Abstract: Hardware Device Interface for PMC SRC based controllers
29  *
30  */
31 
32 #include <linux/kernel.h>
33 #include <linux/init.h>
34 #include <linux/types.h>
35 #include <linux/pci.h>
36 #include <linux/spinlock.h>
37 #include <linux/slab.h>
38 #include <linux/blkdev.h>
39 #include <linux/delay.h>
40 #include <linux/completion.h>
41 #include <linux/time.h>
42 #include <linux/interrupt.h>
43 #include <scsi/scsi_host.h>
44 
45 #include "aacraid.h"
46 
47 static irqreturn_t aac_src_intr_message(int irq, void *dev_id)
48 {
49  struct aac_dev *dev = dev_id;
50  unsigned long bellbits, bellbits_shifted;
51  int our_interrupt = 0;
52  int isFastResponse;
53  u32 index, handle;
54 
55  bellbits = src_readl(dev, MUnit.ODR_R);
56  if (bellbits & PmDoorBellResponseSent) {
57  bellbits = PmDoorBellResponseSent;
58  /* handle async. status */
59  src_writel(dev, MUnit.ODR_C, bellbits);
60  src_readl(dev, MUnit.ODR_C);
61  our_interrupt = 1;
62  index = dev->host_rrq_idx;
63  for (;;) {
64  isFastResponse = 0;
65  /* remove toggle bit (31) */
66  handle = le32_to_cpu(dev->host_rrq[index]) & 0x7fffffff;
67  /* check fast response bit (30) */
68  if (handle & 0x40000000)
69  isFastResponse = 1;
70  handle &= 0x0000ffff;
71  if (handle == 0)
72  break;
73 
74  aac_intr_normal(dev, handle-1, 0, isFastResponse, NULL);
75 
76  dev->host_rrq[index++] = 0;
77  if (index == dev->scsi_host_ptr->can_queue +
79  index = 0;
80  dev->host_rrq_idx = index;
81  }
82  } else {
83  bellbits_shifted = (bellbits >> SRC_ODR_SHIFT);
84  if (bellbits_shifted & DoorBellAifPending) {
85  src_writel(dev, MUnit.ODR_C, bellbits);
86  src_readl(dev, MUnit.ODR_C);
87  our_interrupt = 1;
88  /* handle AIF */
89  aac_intr_normal(dev, 0, 2, 0, NULL);
90  } else if (bellbits_shifted & OUTBOUNDDOORBELL_0) {
91  unsigned long sflags;
92  struct list_head *entry;
93  int send_it = 0;
94  extern int aac_sync_mode;
95 
96  if (!aac_sync_mode) {
97  src_writel(dev, MUnit.ODR_C, bellbits);
98  src_readl(dev, MUnit.ODR_C);
99  our_interrupt = 1;
100  }
101 
102  if (dev->sync_fib) {
103  our_interrupt = 1;
104  if (dev->sync_fib->callback)
105  dev->sync_fib->callback(dev->sync_fib->callback_data,
106  dev->sync_fib);
107  spin_lock_irqsave(&dev->sync_fib->event_lock, sflags);
108  if (dev->sync_fib->flags & FIB_CONTEXT_FLAG_WAIT) {
109  dev->management_fib_count--;
110  up(&dev->sync_fib->event_wait);
111  }
112  spin_unlock_irqrestore(&dev->sync_fib->event_lock, sflags);
113  spin_lock_irqsave(&dev->sync_lock, sflags);
114  if (!list_empty(&dev->sync_fib_list)) {
115  entry = dev->sync_fib_list.next;
116  dev->sync_fib = list_entry(entry, struct fib, fiblink);
117  list_del(entry);
118  send_it = 1;
119  } else {
120  dev->sync_fib = NULL;
121  }
122  spin_unlock_irqrestore(&dev->sync_lock, sflags);
123  if (send_it) {
125  (u32)dev->sync_fib->hw_fib_pa, 0, 0, 0, 0, 0,
126  NULL, NULL, NULL, NULL, NULL);
127  }
128  }
129  }
130  }
131 
132  if (our_interrupt) {
133  return IRQ_HANDLED;
134  }
135  return IRQ_NONE;
136 }
137 
143 static void aac_src_disable_interrupt(struct aac_dev *dev)
144 {
145  src_writel(dev, MUnit.OIMR, dev->OIMR = 0xffffffff);
146 }
147 
153 static void aac_src_enable_interrupt_message(struct aac_dev *dev)
154 {
155  src_writel(dev, MUnit.OIMR, dev->OIMR = 0xfffffff8);
156 }
157 
169 static int src_sync_cmd(struct aac_dev *dev, u32 command,
170  u32 p1, u32 p2, u32 p3, u32 p4, u32 p5, u32 p6,
171  u32 *status, u32 * r1, u32 * r2, u32 * r3, u32 * r4)
172 {
173  unsigned long start;
174  int ok;
175 
176  /*
177  * Write the command into Mailbox 0
178  */
179  writel(command, &dev->IndexRegs->Mailbox[0]);
180  /*
181  * Write the parameters into Mailboxes 1 - 6
182  */
183  writel(p1, &dev->IndexRegs->Mailbox[1]);
184  writel(p2, &dev->IndexRegs->Mailbox[2]);
185  writel(p3, &dev->IndexRegs->Mailbox[3]);
186  writel(p4, &dev->IndexRegs->Mailbox[4]);
187 
188  /*
189  * Clear the synch command doorbell to start on a clean slate.
190  */
191  src_writel(dev, MUnit.ODR_C, OUTBOUNDDOORBELL_0 << SRC_ODR_SHIFT);
192 
193  /*
194  * Disable doorbell interrupts
195  */
196  src_writel(dev, MUnit.OIMR, dev->OIMR = 0xffffffff);
197 
198  /*
199  * Force the completion of the mask register write before issuing
200  * the interrupt.
201  */
202  src_readl(dev, MUnit.OIMR);
203 
204  /*
205  * Signal that there is a new synch command
206  */
207  src_writel(dev, MUnit.IDR, INBOUNDDOORBELL_0 << SRC_IDR_SHIFT);
208 
209  if (!dev->sync_mode || command != SEND_SYNCHRONOUS_FIB) {
210  ok = 0;
211  start = jiffies;
212 
213  /*
214  * Wait up to 5 minutes
215  */
216  while (time_before(jiffies, start+300*HZ)) {
217  udelay(5); /* Delay 5 microseconds to let Mon960 get info. */
218  /*
219  * Mon960 will set doorbell0 bit when it has completed the command.
220  */
221  if ((src_readl(dev, MUnit.ODR_R) >> SRC_ODR_SHIFT) & OUTBOUNDDOORBELL_0) {
222  /*
223  * Clear the doorbell.
224  */
225  src_writel(dev, MUnit.ODR_C, OUTBOUNDDOORBELL_0 << SRC_ODR_SHIFT);
226  ok = 1;
227  break;
228  }
229  /*
230  * Yield the processor in case we are slow
231  */
232  msleep(1);
233  }
234  if (unlikely(ok != 1)) {
235  /*
236  * Restore interrupt mask even though we timed out
237  */
239  return -ETIMEDOUT;
240  }
241  /*
242  * Pull the synch status from Mailbox 0.
243  */
244  if (status)
245  *status = readl(&dev->IndexRegs->Mailbox[0]);
246  if (r1)
247  *r1 = readl(&dev->IndexRegs->Mailbox[1]);
248  if (r2)
249  *r2 = readl(&dev->IndexRegs->Mailbox[2]);
250  if (r3)
251  *r3 = readl(&dev->IndexRegs->Mailbox[3]);
252  if (r4)
253  *r4 = readl(&dev->IndexRegs->Mailbox[4]);
254 
255  /*
256  * Clear the synch command doorbell.
257  */
258  src_writel(dev, MUnit.ODR_C, OUTBOUNDDOORBELL_0 << SRC_ODR_SHIFT);
259  }
260 
261  /*
262  * Restore interrupt mask
263  */
265  return 0;
266 }
267 
275 static void aac_src_interrupt_adapter(struct aac_dev *dev)
276 {
277  src_sync_cmd(dev, BREAKPOINT_REQUEST,
278  0, 0, 0, 0, 0, 0,
279  NULL, NULL, NULL, NULL, NULL);
280 }
281 
291 static void aac_src_notify_adapter(struct aac_dev *dev, u32 event)
292 {
293  switch (event) {
294 
295  case AdapNormCmdQue:
296  src_writel(dev, MUnit.ODR_C,
298  break;
299  case HostNormRespNotFull:
300  src_writel(dev, MUnit.ODR_C,
302  break;
303  case AdapNormRespQue:
304  src_writel(dev, MUnit.ODR_C,
306  break;
307  case HostNormCmdNotFull:
308  src_writel(dev, MUnit.ODR_C,
310  break;
311  case FastIo:
312  src_writel(dev, MUnit.ODR_C,
314  break;
315  case AdapPrintfDone:
316  src_writel(dev, MUnit.ODR_C,
318  break;
319  default:
320  BUG();
321  break;
322  }
323 }
324 
332 static void aac_src_start_adapter(struct aac_dev *dev)
333 {
334  struct aac_init *init;
335 
336  /* reset host_rrq_idx first */
337  dev->host_rrq_idx = 0;
338 
339  init = dev->init;
341 
342  /* We can only use a 32 bit address here */
343  src_sync_cmd(dev, INIT_STRUCT_BASE_ADDRESS, (u32)(ulong)dev->init_pa,
344  0, 0, 0, 0, 0, NULL, NULL, NULL, NULL, NULL);
345 }
346 
354 static int aac_src_check_health(struct aac_dev *dev)
355 {
356  u32 status = src_readl(dev, MUnit.OMR);
357 
358  /*
359  * Check to see if the board failed any self tests.
360  */
361  if (unlikely(status & SELF_TEST_FAILED))
362  return -1;
363 
364  /*
365  * Check to see if the board panic'd.
366  */
367  if (unlikely(status & KERNEL_PANIC))
368  return (status >> 16) & 0xFF;
369  /*
370  * Wait for the adapter to be up and running.
371  */
372  if (unlikely(!(status & KERNEL_UP_AND_RUNNING)))
373  return -3;
374  /*
375  * Everything is OK
376  */
377  return 0;
378 }
379 
386 static int aac_src_deliver_message(struct fib *fib)
387 {
388  struct aac_dev *dev = fib->dev;
389  struct aac_queue *q = &dev->queues->queue[AdapNormCmdQueue];
390  unsigned long qflags;
391  u32 fibsize;
393  struct aac_fib_xporthdr *pFibX;
394  u16 hdr_size = le16_to_cpu(fib->hw_fib_va->header.Size);
395 
396  spin_lock_irqsave(q->lock, qflags);
397  q->numpending++;
398  spin_unlock_irqrestore(q->lock, qflags);
399 
401  /* Calculate the amount to the fibsize bits */
402  fibsize = (hdr_size + 127) / 128 - 1;
403  if (fibsize > (ALIGN32 - 1))
404  return -EMSGSIZE;
405  /* New FIB header, 32-bit */
406  address = fib->hw_fib_pa;
407  fib->hw_fib_va->header.StructType = FIB_MAGIC2;
408  fib->hw_fib_va->header.SenderFibAddress = (u32)address;
409  fib->hw_fib_va->header.u.TimeStamp = 0;
410  BUG_ON((u32)(address >> 32) != 0L);
411  address |= fibsize;
412  } else {
413  /* Calculate the amount to the fibsize bits */
414  fibsize = (sizeof(struct aac_fib_xporthdr) + hdr_size + 127) / 128 - 1;
415  if (fibsize > (ALIGN32 - 1))
416  return -EMSGSIZE;
417 
418  /* Fill XPORT header */
419  pFibX = (void *)fib->hw_fib_va - sizeof(struct aac_fib_xporthdr);
420  pFibX->Handle = cpu_to_le32(fib->hw_fib_va->header.Handle);
421  pFibX->HostAddress = cpu_to_le64(fib->hw_fib_pa);
422  pFibX->Size = cpu_to_le32(hdr_size);
423 
424  /*
425  * The xport header has been 32-byte aligned for us so that fibsize
426  * can be masked out of this address by hardware. -- BenC
427  */
428  address = fib->hw_fib_pa - sizeof(struct aac_fib_xporthdr);
429  if (address & (ALIGN32 - 1))
430  return -EINVAL;
431  address |= fibsize;
432  }
433 
434  src_writel(dev, MUnit.IQ_H, (address >> 32) & 0xffffffff);
435  src_writel(dev, MUnit.IQ_L, address & 0xffffffff);
436 
437  return 0;
438 }
439 
445 static int aac_src_ioremap(struct aac_dev *dev, u32 size)
446 {
447  if (!size) {
448  iounmap(dev->regs.src.bar1);
449  dev->regs.src.bar1 = NULL;
450  iounmap(dev->regs.src.bar0);
451  dev->base = dev->regs.src.bar0 = NULL;
452  return 0;
453  }
454  dev->regs.src.bar1 = ioremap(pci_resource_start(dev->pdev, 2),
456  dev->base = NULL;
457  if (dev->regs.src.bar1 == NULL)
458  return -1;
459  dev->base = dev->regs.src.bar0 = ioremap(dev->base_start, size);
460  if (dev->base == NULL) {
461  iounmap(dev->regs.src.bar1);
462  dev->regs.src.bar1 = NULL;
463  return -1;
464  }
465  dev->IndexRegs = &((struct src_registers __iomem *)
466  dev->base)->u.tupelo.IndexRegs;
467  return 0;
468 }
469 
475 static int aac_srcv_ioremap(struct aac_dev *dev, u32 size)
476 {
477  if (!size) {
478  iounmap(dev->regs.src.bar0);
479  dev->base = dev->regs.src.bar0 = NULL;
480  return 0;
481  }
482  dev->base = dev->regs.src.bar0 = ioremap(dev->base_start, size);
483  if (dev->base == NULL)
484  return -1;
485  dev->IndexRegs = &((struct src_registers __iomem *)
486  dev->base)->u.denali.IndexRegs;
487  return 0;
488 }
489 
490 static int aac_src_restart_adapter(struct aac_dev *dev, int bled)
491 {
492  u32 var, reset_mask;
493 
494  if (bled >= 0) {
495  if (bled)
496  printk(KERN_ERR "%s%d: adapter kernel panic'd %x.\n",
497  dev->name, dev->id, bled);
499  0, 0, 0, 0, 0, 0, &var, &reset_mask, NULL, NULL, NULL);
500  if (bled || (var != 0x00000001))
501  return -EINVAL;
502  if (dev->supplement_adapter_info.SupportedOptions2 &
504  src_writel(dev, MUnit.IDR, reset_mask);
505  msleep(5000); /* Delay 5 seconds */
506  }
507  }
508 
509  if (src_readl(dev, MUnit.OMR) & KERNEL_PANIC)
510  return -ENODEV;
511 
512  if (startup_timeout < 300)
513  startup_timeout = 300;
514 
515  return 0;
516 }
517 
523 int aac_src_select_comm(struct aac_dev *dev, int comm)
524 {
525  switch (comm) {
526  case AAC_COMM_MESSAGE:
527  dev->a_ops.adapter_enable_int = aac_src_enable_interrupt_message;
528  dev->a_ops.adapter_intr = aac_src_intr_message;
529  dev->a_ops.adapter_deliver = aac_src_deliver_message;
530  break;
531  default:
532  return 1;
533  }
534  return 0;
535 }
536 
543 int aac_src_init(struct aac_dev *dev)
544 {
545  unsigned long start;
546  unsigned long status;
547  int restart = 0;
548  int instance = dev->id;
549  const char *name = dev->name;
550 
551  dev->a_ops.adapter_ioremap = aac_src_ioremap;
552  dev->a_ops.adapter_comm = aac_src_select_comm;
553 
555  if (aac_adapter_ioremap(dev, dev->base_size)) {
556  printk(KERN_WARNING "%s: unable to map adapter.\n", name);
557  goto error_iounmap;
558  }
559 
560  /* Failure to reset here is an option ... */
561  dev->a_ops.adapter_sync_cmd = src_sync_cmd;
562  dev->a_ops.adapter_enable_int = aac_src_disable_interrupt;
563  if ((aac_reset_devices || reset_devices) &&
564  !aac_src_restart_adapter(dev, 0))
565  ++restart;
566  /*
567  * Check to see if the board panic'd while booting.
568  */
569  status = src_readl(dev, MUnit.OMR);
570  if (status & KERNEL_PANIC) {
571  if (aac_src_restart_adapter(dev, aac_src_check_health(dev)))
572  goto error_iounmap;
573  ++restart;
574  }
575  /*
576  * Check to see if the board failed any self tests.
577  */
578  status = src_readl(dev, MUnit.OMR);
579  if (status & SELF_TEST_FAILED) {
580  printk(KERN_ERR "%s%d: adapter self-test failed.\n",
581  dev->name, instance);
582  goto error_iounmap;
583  }
584  /*
585  * Check to see if the monitor panic'd while booting.
586  */
587  if (status & MONITOR_PANIC) {
588  printk(KERN_ERR "%s%d: adapter monitor panic.\n",
589  dev->name, instance);
590  goto error_iounmap;
591  }
592  start = jiffies;
593  /*
594  * Wait for the adapter to be up and running. Wait up to 3 minutes
595  */
596  while (!((status = src_readl(dev, MUnit.OMR)) &
598  if ((restart &&
599  (status & (KERNEL_PANIC|SELF_TEST_FAILED|MONITOR_PANIC))) ||
601  printk(KERN_ERR "%s%d: adapter kernel failed to start, init status = %lx.\n",
602  dev->name, instance, status);
603  goto error_iounmap;
604  }
605  if (!restart &&
606  ((status & (KERNEL_PANIC|SELF_TEST_FAILED|MONITOR_PANIC)) ||
607  time_after(jiffies, start + HZ *
608  ((startup_timeout > 60)
609  ? (startup_timeout - 60)
610  : (startup_timeout / 2))))) {
611  if (likely(!aac_src_restart_adapter(dev,
612  aac_src_check_health(dev))))
613  start = jiffies;
614  ++restart;
615  }
616  msleep(1);
617  }
618  if (restart && aac_commit)
619  aac_commit = 1;
620  /*
621  * Fill in the common function dispatch table.
622  */
623  dev->a_ops.adapter_interrupt = aac_src_interrupt_adapter;
624  dev->a_ops.adapter_disable_int = aac_src_disable_interrupt;
625  dev->a_ops.adapter_notify = aac_src_notify_adapter;
626  dev->a_ops.adapter_sync_cmd = src_sync_cmd;
627  dev->a_ops.adapter_check_health = aac_src_check_health;
628  dev->a_ops.adapter_restart = aac_src_restart_adapter;
629 
630  /*
631  * First clear out all interrupts. Then enable the one's that we
632  * can handle.
633  */
636  src_writel(dev, MUnit.ODR_C, 0xffffffff);
638 
639  if (aac_init_adapter(dev) == NULL)
640  goto error_iounmap;
642  goto error_iounmap;
643 
644  dev->msi = aac_msi && !pci_enable_msi(dev->pdev);
645 
646  if (request_irq(dev->pdev->irq, dev->a_ops.adapter_intr,
647  IRQF_SHARED|IRQF_DISABLED, "aacraid", dev) < 0) {
648 
649  if (dev->msi)
650  pci_disable_msi(dev->pdev);
651 
652  printk(KERN_ERR "%s%d: Interrupt unavailable.\n",
653  name, instance);
654  goto error_iounmap;
655  }
656  dev->dbg_base = pci_resource_start(dev->pdev, 2);
657  dev->dbg_base_mapped = dev->regs.src.bar1;
659 
661 
662  if (!dev->sync_mode) {
663  /*
664  * Tell the adapter that all is configured, and it can
665  * start accepting requests
666  */
667  aac_src_start_adapter(dev);
668  }
669  return 0;
670 
671 error_iounmap:
672 
673  return -1;
674 }
675 
682 int aac_srcv_init(struct aac_dev *dev)
683 {
684  unsigned long start;
685  unsigned long status;
686  int restart = 0;
687  int instance = dev->id;
688  const char *name = dev->name;
689 
690  dev->a_ops.adapter_ioremap = aac_srcv_ioremap;
691  dev->a_ops.adapter_comm = aac_src_select_comm;
692 
694  if (aac_adapter_ioremap(dev, dev->base_size)) {
695  printk(KERN_WARNING "%s: unable to map adapter.\n", name);
696  goto error_iounmap;
697  }
698 
699  /* Failure to reset here is an option ... */
700  dev->a_ops.adapter_sync_cmd = src_sync_cmd;
701  dev->a_ops.adapter_enable_int = aac_src_disable_interrupt;
702  if ((aac_reset_devices || reset_devices) &&
703  !aac_src_restart_adapter(dev, 0))
704  ++restart;
705  /*
706  * Check to see if the board panic'd while booting.
707  */
708  status = src_readl(dev, MUnit.OMR);
709  if (status & KERNEL_PANIC) {
710  if (aac_src_restart_adapter(dev, aac_src_check_health(dev)))
711  goto error_iounmap;
712  ++restart;
713  }
714  /*
715  * Check to see if the board failed any self tests.
716  */
717  status = src_readl(dev, MUnit.OMR);
718  if (status & SELF_TEST_FAILED) {
719  printk(KERN_ERR "%s%d: adapter self-test failed.\n", dev->name, instance);
720  goto error_iounmap;
721  }
722  /*
723  * Check to see if the monitor panic'd while booting.
724  */
725  if (status & MONITOR_PANIC) {
726  printk(KERN_ERR "%s%d: adapter monitor panic.\n", dev->name, instance);
727  goto error_iounmap;
728  }
729  start = jiffies;
730  /*
731  * Wait for the adapter to be up and running. Wait up to 3 minutes
732  */
733  while (!((status = src_readl(dev, MUnit.OMR)) & KERNEL_UP_AND_RUNNING)) {
734  if ((restart &&
735  (status & (KERNEL_PANIC|SELF_TEST_FAILED|MONITOR_PANIC))) ||
737  printk(KERN_ERR "%s%d: adapter kernel failed to start, init status = %lx.\n",
738  dev->name, instance, status);
739  goto error_iounmap;
740  }
741  if (!restart &&
742  ((status & (KERNEL_PANIC|SELF_TEST_FAILED|MONITOR_PANIC)) ||
743  time_after(jiffies, start + HZ *
744  ((startup_timeout > 60)
745  ? (startup_timeout - 60)
746  : (startup_timeout / 2))))) {
747  if (likely(!aac_src_restart_adapter(dev, aac_src_check_health(dev))))
748  start = jiffies;
749  ++restart;
750  }
751  msleep(1);
752  }
753  if (restart && aac_commit)
754  aac_commit = 1;
755  /*
756  * Fill in the common function dispatch table.
757  */
758  dev->a_ops.adapter_interrupt = aac_src_interrupt_adapter;
759  dev->a_ops.adapter_disable_int = aac_src_disable_interrupt;
760  dev->a_ops.adapter_notify = aac_src_notify_adapter;
761  dev->a_ops.adapter_sync_cmd = src_sync_cmd;
762  dev->a_ops.adapter_check_health = aac_src_check_health;
763  dev->a_ops.adapter_restart = aac_src_restart_adapter;
764 
765  /*
766  * First clear out all interrupts. Then enable the one's that we
767  * can handle.
768  */
771  src_writel(dev, MUnit.ODR_C, 0xffffffff);
773 
774  if (aac_init_adapter(dev) == NULL)
775  goto error_iounmap;
777  goto error_iounmap;
778  dev->msi = aac_msi && !pci_enable_msi(dev->pdev);
779  if (request_irq(dev->pdev->irq, dev->a_ops.adapter_intr,
780  IRQF_SHARED|IRQF_DISABLED, "aacraid", dev) < 0) {
781  if (dev->msi)
782  pci_disable_msi(dev->pdev);
783  printk(KERN_ERR "%s%d: Interrupt unavailable.\n",
784  name, instance);
785  goto error_iounmap;
786  }
787  dev->dbg_base = dev->base_start;
788  dev->dbg_base_mapped = dev->base;
789  dev->dbg_size = dev->base_size;
790 
792 
793  if (!dev->sync_mode) {
794  /*
795  * Tell the adapter that all is configured, and it can
796  * start accepting requests
797  */
798  aac_src_start_adapter(dev);
799  }
800  return 0;
801 
802 error_iounmap:
803 
804  return -1;
805 }
806