Macros
#define	LCD_SPU_DMA_START_ADDR_Y0 0x00C0

#define	LCD_SPU_DMA_START_ADDR_U0 0x00C4

#define	LCD_SPU_DMA_START_ADDR_V0 0x00C8

#define	LCD_CFG_DMA_START_ADDR_0 0x00CC /* Cmd address */

#define	LCD_SPU_DMA_START_ADDR_Y1 0x00D0

#define	LCD_SPU_DMA_START_ADDR_U1 0x00D4

#define	LCD_SPU_DMA_START_ADDR_V1 0x00D8

#define	LCD_CFG_DMA_START_ADDR_1 0x00DC /* Cmd address */

#define	LCD_SPU_DMA_PITCH_YC 0x00E0

#define	SPU_DMA_PITCH_C(c) ((c) << 16)

#define	SPU_DMA_PITCH_Y(y) (y)

#define	LCD_SPU_DMA_PITCH_UV 0x00E4

#define	SPU_DMA_PITCH_V(v) ((v) << 16)

#define	SPU_DMA_PITCH_U(u) (u)

#define	LCD_SPUT_DMA_OVSA_HPXL_VLN 0x00E8

#define	CFG_DMA_OVSA_VLN(y) ((y) << 16) /* 0~0xfff */

#define	CFG_DMA_OVSA_HPXL(x) (x) /* 0~0xfff */

#define	LCD_SPU_DMA_HPXL_VLN 0x00EC

#define	CFG_DMA_VLN(y) ((y) << 16)

#define	CFG_DMA_HPXL(x) (x)

#define	LCD_SPU_DZM_HPXL_VLN 0x00F0

#define	CFG_DZM_VLN(y) ((y) << 16)

#define	CFG_DZM_HPXL(x) (x)

#define	LCD_CFG_GRA_START_ADDR0 0x00F4

#define	LCD_CFG_GRA_START_ADDR1 0x00F8

#define	LCD_CFG_GRA_PITCH 0x00FC

#define	LCD_SPU_GRA_OVSA_HPXL_VLN 0x0100

#define	CFG_GRA_OVSA_VLN(y) ((y) << 16)

#define	CFG_GRA_OVSA_HPXL(x) (x)

#define	LCD_SPU_GRA_HPXL_VLN 0x0104

#define	CFG_GRA_VLN(y) ((y) << 16)

#define	CFG_GRA_HPXL(x) (x)

#define	LCD_SPU_GZM_HPXL_VLN 0x0108

#define	CFG_GZM_VLN(y) ((y) << 16)

#define	CFG_GZM_HPXL(x) (x)

#define	LCD_SPU_HWC_OVSA_HPXL_VLN 0x010C

#define	CFG_HWC_OVSA_VLN(y) ((y) << 16)

#define	CFG_HWC_OVSA_HPXL(x) (x)

#define	LCD_SPU_HWC_HPXL_VLN 0x0110

#define	CFG_HWC_VLN(y) ((y) << 16)

#define	CFG_HWC_HPXL(x) (x)

#define	LCD_SPUT_V_H_TOTAL 0x0114

#define	CFG_V_TOTAL(y) ((y) << 16)

#define	CFG_H_TOTAL(x) (x)

#define	LCD_SPU_V_H_ACTIVE 0x0118

#define	CFG_V_ACTIVE(y) ((y) << 16)

#define	CFG_H_ACTIVE(x) (x)

#define	LCD_SPU_H_PORCH 0x011C

#define	CFG_H_BACK_PORCH(b) ((b) << 16)

#define	CFG_H_FRONT_PORCH(f) (f)

#define	LCD_SPU_V_PORCH 0x0120

#define	CFG_V_BACK_PORCH(b) ((b) << 16)

#define	CFG_V_FRONT_PORCH(f) (f)

#define	LCD_SPU_BLANKCOLOR 0x0124

#define	CFG_BLANKCOLOR_MASK 0x00FFFFFF

#define	CFG_BLANKCOLOR_R_MASK 0x000000FF

#define	CFG_BLANKCOLOR_G_MASK 0x0000FF00

#define	CFG_BLANKCOLOR_B_MASK 0x00FF0000

#define	LCD_SPU_ALPHA_COLOR1 0x0128

#define	CFG_HWC_COLOR1 0x00FFFFFF

#define	CFG_HWC_COLOR1_R(red) ((red) << 16)

#define	CFG_HWC_COLOR1_G(green) ((green) << 8)

#define	CFG_HWC_COLOR1_B(blue) (blue)

#define	CFG_HWC_COLOR1_R_MASK 0x000000FF

#define	CFG_HWC_COLOR1_G_MASK 0x0000FF00

#define	CFG_HWC_COLOR1_B_MASK 0x00FF0000

#define	LCD_SPU_ALPHA_COLOR2 0x012C

#define	CFG_HWC_COLOR2 0x00FFFFFF

#define	CFG_HWC_COLOR2_R_MASK 0x000000FF

#define	CFG_HWC_COLOR2_G_MASK 0x0000FF00

#define	CFG_HWC_COLOR2_B_MASK 0x00FF0000

#define	LCD_SPU_COLORKEY_Y 0x0130

#define	CFG_CKEY_Y2(y2) ((y2) << 24)

#define	CFG_CKEY_Y2_MASK 0xFF000000

#define	CFG_CKEY_Y1(y1) ((y1) << 16)

#define	CFG_CKEY_Y1_MASK 0x00FF0000

#define	CFG_CKEY_Y(y) ((y) << 8)

#define	CFG_CKEY_Y_MASK 0x0000FF00

#define	CFG_ALPHA_Y(y) (y)

#define	CFG_ALPHA_Y_MASK 0x000000FF

#define	LCD_SPU_COLORKEY_U 0x0134

#define	CFG_CKEY_U2(u2) ((u2) << 24)

#define	CFG_CKEY_U2_MASK 0xFF000000

#define	CFG_CKEY_U1(u1) ((u1) << 16)

#define	CFG_CKEY_U1_MASK 0x00FF0000

#define	CFG_CKEY_U(u) ((u) << 8)

#define	CFG_CKEY_U_MASK 0x0000FF00

#define	CFG_ALPHA_U(u) (u)

#define	CFG_ALPHA_U_MASK 0x000000FF

#define	LCD_SPU_COLORKEY_V 0x0138

#define	CFG_CKEY_V2(v2) ((v2) << 24)

#define	CFG_CKEY_V2_MASK 0xFF000000

#define	CFG_CKEY_V1(v1) ((v1) << 16)

#define	CFG_CKEY_V1_MASK 0x00FF0000

#define	CFG_CKEY_V(v) ((v) << 8)

#define	CFG_CKEY_V_MASK 0x0000FF00

#define	CFG_ALPHA_V(v) (v)

#define	CFG_ALPHA_V_MASK 0x000000FF

#define	LCD_SPU_SPI_RXDATA 0x0140

#define	LCD_SPU_ISA_RSDATA 0x0144

#define	ISA_RXDATA_16BIT_1_DATA_MASK 0x000000FF

#define	ISA_RXDATA_16BIT_2_DATA_MASK 0x0000FF00

#define	ISA_RXDATA_16BIT_3_DATA_MASK 0x00FF0000

#define	ISA_RXDATA_16BIT_4_DATA_MASK 0xFF000000

#define	ISA_RXDATA_32BIT_1_DATA_MASK 0x00FFFFFF

#define	LCD_SPU_HWC_RDDAT 0x0158

#define	LCD_SPU_GAMMA_RDDAT 0x015c

#define	CFG_GAMMA_RDDAT_MASK 0x000000FF

#define	LCD_SPU_PALETTE_RDDAT 0x0160

#define	CFG_PALETTE_RDDAT_MASK 0x00FFFFFF

#define	LCD_SPU_IOPAD_IN 0x0178

#define	CFG_IOPAD_IN_MASK 0x0FFFFFFF

#define	LCD_CFG_RDREG5F 0x017C

#define	IRE_FRAME_CNT_MASK 0x000000C0

#define	IPE_FRAME_CNT_MASK 0x00000030

#define	GRA_FRAME_CNT_MASK 0x0000000C /* Graphic */

#define	DMA_FRAME_CNT_MASK 0x00000003 /* Video */

#define	LCD_SPU_SPI_CTRL 0x0180

#define	CFG_SCLKCNT(div) ((div) << 24) /* 0xFF~0x2 */

#define	CFG_SCLKCNT_MASK 0xFF000000

#define	CFG_RXBITS(rx) ((rx) << 16) /* 0x1F~0x1 */

#define	CFG_RXBITS_MASK 0x00FF0000

#define	CFG_TXBITS(tx) ((tx) << 8) /* 0x1F~0x1 */

#define	CFG_TXBITS_MASK 0x0000FF00

#define	CFG_CLKINV(clk) ((clk) << 7)

#define	CFG_CLKINV_MASK 0x00000080

#define	CFG_KEEPXFER(transfer) ((transfer) << 6)

#define	CFG_KEEPXFER_MASK 0x00000040

#define	CFG_RXBITSTO0(rx) ((rx) << 5)

#define	CFG_RXBITSTO0_MASK 0x00000020

#define	CFG_TXBITSTO0(tx) ((tx) << 4)

#define	CFG_TXBITSTO0_MASK 0x00000010

#define	CFG_SPI_ENA(spi) ((spi) << 3)

#define	CFG_SPI_ENA_MASK 0x00000008

#define	CFG_SPI_SEL(spi) ((spi) << 2)

#define	CFG_SPI_SEL_MASK 0x00000004

#define	CFG_SPI_3W4WB(wire) ((wire) << 1)

#define	CFG_SPI_3W4WB_MASK 0x00000002

#define	CFG_SPI_START(start) (start)

#define	CFG_SPI_START_MASK 0x00000001

#define	LCD_SPU_SPI_TXDATA 0x0184

#define	LCD_SPU_SMPN_CTRL 0x0188

#define	LCD_SPU_DMA_CTRL0 0x0190

#define	CFG_NOBLENDING(nb) ((nb) << 31)

#define	CFG_NOBLENDING_MASK 0x80000000

#define	CFG_GAMMA_ENA(gn) ((gn) << 30)

#define	CFG_GAMMA_ENA_MASK 0x40000000

#define	CFG_CBSH_ENA(cn) ((cn) << 29)

#define	CFG_CBSH_ENA_MASK 0x20000000

#define	CFG_PALETTE_ENA(pn) ((pn) << 28)

#define	CFG_PALETTE_ENA_MASK 0x10000000

#define	CFG_ARBFAST_ENA(an) ((an) << 27)

#define	CFG_ARBFAST_ENA_MASK 0x08000000

#define	CFG_HWC_1BITMOD(mode) ((mode) << 26)

#define	CFG_HWC_1BITMOD_MASK 0x04000000

#define	CFG_HWC_1BITENA(mn) ((mn) << 25)

#define	CFG_HWC_1BITENA_MASK 0x02000000

#define	CFG_HWC_ENA(cn) ((cn) << 24)

#define	CFG_HWC_ENA_MASK 0x01000000

#define	CFG_DMAFORMAT(dmaformat) ((dmaformat) << 20)

#define	CFG_DMAFORMAT_MASK 0x00F00000

#define	CFG_GRAFORMAT(graformat) ((graformat) << 16)

#define	CFG_GRAFORMAT_MASK 0x000F0000

#define	CFG_GRA_FTOGGLE(toggle) ((toggle) << 15)

#define	CFG_GRA_FTOGGLE_MASK 0x00008000

#define	CFG_GRA_HSMOOTH(smooth) ((smooth) << 14)

#define	CFG_GRA_HSMOOTH_MASK 0x00004000

#define	CFG_GRA_TSTMODE(test) ((test) << 13)

#define	CFG_GRA_TSTMODE_MASK 0x00002000

#define	CFG_GRA_SWAPRB(swap) ((swap) << 12)

#define	CFG_GRA_SWAPRB_MASK 0x00001000

#define	CFG_GRA_SWAPUV(swap) ((swap) << 11)

#define	CFG_GRA_SWAPUV_MASK 0x00000800

#define	CFG_GRA_SWAPYU(swap) ((swap) << 10)

#define	CFG_GRA_SWAPYU_MASK 0x00000400

#define	CFG_YUV2RGB_GRA(cvrt) ((cvrt) << 9)

#define	CFG_YUV2RGB_GRA_MASK 0x00000200

#define	CFG_GRA_ENA(gra) ((gra) << 8)

#define	CFG_GRA_ENA_MASK 0x00000100

#define	CFG_DMA_FTOGGLE(toggle) ((toggle) << 7)

#define	CFG_DMA_FTOGGLE_MASK 0x00000080

#define	CFG_DMA_HSMOOTH(smooth) ((smooth) << 6)

#define	CFG_DMA_HSMOOTH_MASK 0x00000040

#define	CFG_DMA_TSTMODE(test) ((test) << 5)

#define	CFG_DMA_TSTMODE_MASK 0x00000020

#define	CFG_DMA_SWAPRB(swap) ((swap) << 4)

#define	CFG_DMA_SWAPRB_MASK 0x00000010

#define	CFG_DMA_SWAPUV(swap) ((swap) << 3)

#define	CFG_DMA_SWAPUV_MASK 0x00000008

#define	CFG_DMA_SWAPYU(swap) ((swap) << 2)

#define	CFG_DMA_SWAPYU_MASK 0x00000004

#define	CFG_DMA_SWAP_MASK 0x0000001C

#define	CFG_YUV2RGB_DMA(cvrt) ((cvrt) << 1)

#define	CFG_YUV2RGB_DMA_MASK 0x00000002

#define	CFG_DMA_ENA(video) (video)

#define	CFG_DMA_ENA_MASK 0x00000001

#define	LCD_SPU_DMA_CTRL1 0x0194

#define	CFG_FRAME_TRIG(trig) ((trig) << 31)

#define	CFG_FRAME_TRIG_MASK 0x80000000

#define	CFG_VSYNC_TRIG(trig) ((trig) << 28)

#define	CFG_VSYNC_TRIG_MASK 0x70000000

#define	CFG_VSYNC_INV(inv) ((inv) << 27)

#define	CFG_VSYNC_INV_MASK 0x08000000

#define	CFG_COLOR_KEY_MODE(cmode) ((cmode) << 24)

#define	CFG_COLOR_KEY_MASK 0x07000000

#define	CFG_CARRY(carry) ((carry) << 23)

#define	CFG_CARRY_MASK 0x00800000

#define	CFG_LNBUF_ENA(lnbuf) ((lnbuf) << 22)

#define	CFG_LNBUF_ENA_MASK 0x00400000

#define	CFG_GATED_ENA(gated) ((gated) << 21)

#define	CFG_GATED_ENA_MASK 0x00200000

#define	CFG_PWRDN_ENA(power) ((power) << 20)

#define	CFG_PWRDN_ENA_MASK 0x00100000

#define	CFG_DSCALE(dscale) ((dscale) << 18)

#define	CFG_DSCALE_MASK 0x000C0000

#define	CFG_ALPHA_MODE(amode) ((amode) << 16)

#define	CFG_ALPHA_MODE_MASK 0x00030000

#define	CFG_ALPHA(alpha) ((alpha) << 8)

#define	CFG_ALPHA_MASK 0x0000FF00

#define	CFG_PXLCMD(pxlcmd) (pxlcmd)

#define	CFG_PXLCMD_MASK 0x000000FF

#define	LCD_SPU_SRAM_CTRL 0x0198

#define	CFG_SRAM_INIT_WR_RD(mode) ((mode) << 14)

#define	CFG_SRAM_INIT_WR_RD_MASK 0x0000C000

#define	CFG_SRAM_ADDR_LCDID(id) ((id) << 8)

#define	CFG_SRAM_ADDR_LCDID_MASK 0x00000F00

#define	CFG_SRAM_ADDR(addr) (addr)

#define	CFG_SRAM_ADDR_MASK 0x000000FF

#define	LCD_SPU_SRAM_WRDAT 0x019C

#define	LCD_SPU_SRAM_PARA0 0x01A0

#define	LCD_SPU_SRAM_PARA1 0x01A4

#define	CFG_CSB_256x32(hwc) ((hwc) << 15) /* HWC */

#define	CFG_CSB_256x32_MASK 0x00008000

#define	CFG_CSB_256x24(palette) ((palette) << 14) /* Palette */

#define	CFG_CSB_256x24_MASK 0x00004000

#define	CFG_CSB_256x8(gamma) ((gamma) << 13) /* Gamma */

#define	CFG_CSB_256x8_MASK 0x00002000

#define	CFG_PDWN256x32(pdwn) ((pdwn) << 7) /* HWC */

#define	CFG_PDWN256x32_MASK 0x00000080

#define	CFG_PDWN256x24(pdwn) ((pdwn) << 6) /* Palette */

#define	CFG_PDWN256x24_MASK 0x00000040

#define	CFG_PDWN256x8(pdwn) ((pdwn) << 5) /* Gamma */

#define	CFG_PDWN256x8_MASK 0x00000020

#define	CFG_PDWN32x32(pdwn) ((pdwn) << 3)

#define	CFG_PDWN32x32_MASK 0x00000008

#define	CFG_PDWN16x66(pdwn) ((pdwn) << 2)

#define	CFG_PDWN16x66_MASK 0x00000004

#define	CFG_PDWN32x66(pdwn) ((pdwn) << 1)

#define	CFG_PDWN32x66_MASK 0x00000002

#define	CFG_PDWN64x66(pdwn) (pdwn)

#define	CFG_PDWN64x66_MASK 0x00000001

#define	LCD_CFG_SCLK_DIV 0x01A8

#define	SCLK_SOURCE_SELECT(src) ((src) << 31)

#define	SCLK_SOURCE_SELECT_MASK 0x80000000

#define	CLK_FRACDIV(frac) ((frac) << 16)

#define	CLK_FRACDIV_MASK 0x0FFF0000

#define	CLK_INT_DIV(div) (div)

#define	CLK_INT_DIV_MASK 0x0000FFFF

#define	LCD_SPU_CONTRAST 0x01AC

#define	CFG_BRIGHTNESS(bright) ((bright) << 16)

#define	CFG_BRIGHTNESS_MASK 0xFFFF0000

#define	CFG_CONTRAST(contrast) (contrast)

#define	CFG_CONTRAST_MASK 0x0000FFFF

#define	LCD_SPU_SATURATION 0x01B0

#define	CFG_C_MULTS(mult) ((mult) << 16)

#define	CFG_C_MULTS_MASK 0xFFFF0000

#define	CFG_SATURATION(sat) (sat)

#define	CFG_SATURATION_MASK 0x0000FFFF

#define	LCD_SPU_CBSH_HUE 0x01B4

#define	CFG_SIN0(sin0) ((sin0) << 16)

#define	CFG_SIN0_MASK 0xFFFF0000

#define	CFG_COS0(con0) (con0)

#define	CFG_COS0_MASK 0x0000FFFF

#define	LCD_SPU_DUMB_CTRL 0x01B8

#define	CFG_DUMBMODE(mode) ((mode) << 28)

#define	CFG_DUMBMODE_MASK 0xF0000000

#define	CFG_LCDGPIO_O(data) ((data) << 20)

#define	CFG_LCDGPIO_O_MASK 0x0FF00000

#define	CFG_LCDGPIO_ENA(gpio) ((gpio) << 12)

#define	CFG_LCDGPIO_ENA_MASK 0x000FF000

#define	CFG_BIAS_OUT(bias) ((bias) << 8)

#define	CFG_BIAS_OUT_MASK 0x00000100

#define	CFG_REVERSE_RGB(rRGB) ((rRGB) << 7)

#define	CFG_REVERSE_RGB_MASK 0x00000080

#define	CFG_INV_COMPBLANK(blank) ((blank) << 6)

#define	CFG_INV_COMPBLANK_MASK 0x00000040

#define	CFG_INV_COMPSYNC(sync) ((sync) << 5)

#define	CFG_INV_COMPSYNC_MASK 0x00000020

#define	CFG_INV_HENA(hena) ((hena) << 4)

#define	CFG_INV_HENA_MASK 0x00000010

#define	CFG_INV_VSYNC(vsync) ((vsync) << 3)

#define	CFG_INV_VSYNC_MASK 0x00000008

#define	CFG_INV_HSYNC(hsync) ((hsync) << 2)

#define	CFG_INV_HSYNC_MASK 0x00000004

#define	CFG_INV_PCLK(pclk) ((pclk) << 1)

#define	CFG_INV_PCLK_MASK 0x00000002

#define	CFG_DUMB_ENA(dumb) (dumb)

#define	CFG_DUMB_ENA_MASK 0x00000001

#define	SPU_IOPAD_CONTROL 0x01BC

#define	CFG_GRA_VM_ENA(vm) ((vm) << 15) /* gfx */

#define	CFG_GRA_VM_ENA_MASK 0x00008000

#define	CFG_DMA_VM_ENA(vm) ((vm) << 13) /* video */

#define	CFG_DMA_VM_ENA_MASK 0x00002000

#define	CFG_CMD_VM_ENA(vm) ((vm) << 13)

#define	CFG_CMD_VM_ENA_MASK 0x00000800

#define	CFG_CSC(csc) ((csc) << 8) /* csc */

#define	CFG_CSC_MASK 0x00000300

#define	CFG_AXICTRL(axi) ((axi) << 4)

#define	CFG_AXICTRL_MASK 0x000000F0

#define	CFG_IOPADMODE(iopad) (iopad)

#define	CFG_IOPADMODE_MASK 0x0000000F

#define	SPU_IRQ_ENA 0x01C0

#define	DMA_FRAME_IRQ0_ENA(irq) ((irq) << 31)

#define	DMA_FRAME_IRQ0_ENA_MASK 0x80000000

#define	DMA_FRAME_IRQ1_ENA(irq) ((irq) << 30)

#define	DMA_FRAME_IRQ1_ENA_MASK 0x40000000

#define	DMA_FF_UNDERFLOW_ENA(ff) ((ff) << 29)

#define	DMA_FF_UNDERFLOW_ENA_MASK 0x20000000

#define	GRA_FRAME_IRQ0_ENA(irq) ((irq) << 27)

#define	GRA_FRAME_IRQ0_ENA_MASK 0x08000000

#define	GRA_FRAME_IRQ1_ENA(irq) ((irq) << 26)

#define	GRA_FRAME_IRQ1_ENA_MASK 0x04000000

#define	GRA_FF_UNDERFLOW_ENA(ff) ((ff) << 25)

#define	GRA_FF_UNDERFLOW_ENA_MASK 0x02000000

#define	VSYNC_IRQ_ENA(vsync_irq) ((vsync_irq) << 23)

#define	VSYNC_IRQ_ENA_MASK 0x00800000

#define	DUMB_FRAMEDONE_ENA(fdone) ((fdone) << 22)

#define	DUMB_FRAMEDONE_ENA_MASK 0x00400000

#define	TWC_FRAMEDONE_ENA(fdone) ((fdone) << 21)

#define	TWC_FRAMEDONE_ENA_MASK 0x00200000

#define	HWC_FRAMEDONE_ENA(fdone) ((fdone) << 20)

#define	HWC_FRAMEDONE_ENA_MASK 0x00100000

#define	SLV_IRQ_ENA(irq) ((irq) << 19)

#define	SLV_IRQ_ENA_MASK 0x00080000

#define	SPI_IRQ_ENA(irq) ((irq) << 18)

#define	SPI_IRQ_ENA_MASK 0x00040000

#define	PWRDN_IRQ_ENA(irq) ((irq) << 17)

#define	PWRDN_IRQ_ENA_MASK 0x00020000

#define	ERR_IRQ_ENA(irq) ((irq) << 16)

#define	ERR_IRQ_ENA_MASK 0x00010000

#define	CLEAN_SPU_IRQ_ISR(irq) (irq)

#define	CLEAN_SPU_IRQ_ISR_MASK 0x0000FFFF

#define	SPU_IRQ_ISR 0x01C4

#define	DMA_FRAME_IRQ0(irq) ((irq) << 31)

#define	DMA_FRAME_IRQ0_MASK 0x80000000

#define	DMA_FRAME_IRQ1(irq) ((irq) << 30)

#define	DMA_FRAME_IRQ1_MASK 0x40000000

#define	DMA_FF_UNDERFLOW(ff) ((ff) << 29)

#define	DMA_FF_UNDERFLOW_MASK 0x20000000

#define	GRA_FRAME_IRQ0(irq) ((irq) << 27)

#define	GRA_FRAME_IRQ0_MASK 0x08000000

#define	GRA_FRAME_IRQ1(irq) ((irq) << 26)

#define	GRA_FRAME_IRQ1_MASK 0x04000000

#define	GRA_FF_UNDERFLOW(ff) ((ff) << 25)

#define	GRA_FF_UNDERFLOW_MASK 0x02000000

#define	VSYNC_IRQ(vsync_irq) ((vsync_irq) << 23)

#define	VSYNC_IRQ_MASK 0x00800000

#define	DUMB_FRAMEDONE(fdone) ((fdone) << 22)

#define	DUMB_FRAMEDONE_MASK 0x00400000

#define	TWC_FRAMEDONE(fdone) ((fdone) << 21)

#define	TWC_FRAMEDONE_MASK 0x00200000

#define	HWC_FRAMEDONE(fdone) ((fdone) << 20)

#define	HWC_FRAMEDONE_MASK 0x00100000

#define	SLV_IRQ(irq) ((irq) << 19)

#define	SLV_IRQ_MASK 0x00080000

#define	SPI_IRQ(irq) ((irq) << 18)

#define	SPI_IRQ_MASK 0x00040000

#define	PWRDN_IRQ(irq) ((irq) << 17)

#define	PWRDN_IRQ_MASK 0x00020000

#define	ERR_IRQ(irq) ((irq) << 16)

#define	ERR_IRQ_MASK 0x00010000

#define	DMA_FRAME_IRQ0_LEVEL_MASK 0x00008000

#define	DMA_FRAME_IRQ1_LEVEL_MASK 0x00004000

#define	DMA_FRAME_CNT_ISR_MASK 0x00003000

#define	GRA_FRAME_IRQ0_LEVEL_MASK 0x00000800

#define	GRA_FRAME_IRQ1_LEVEL_MASK 0x00000400

#define	GRA_FRAME_CNT_ISR_MASK 0x00000300

#define	VSYNC_IRQ_LEVEL_MASK 0x00000080

#define	DUMB_FRAMEDONE_LEVEL_MASK 0x00000040

#define	TWC_FRAMEDONE_LEVEL_MASK 0x00000020

#define	HWC_FRAMEDONE_LEVEL_MASK 0x00000010

#define	SLV_FF_EMPTY_MASK 0x00000008

#define	DMA_FF_ALLEMPTY_MASK 0x00000004

#define	GRA_FF_ALLEMPTY_MASK 0x00000002

#define	PWRDN_IRQ_LEVEL_MASK 0x00000001

#define	VMODE_RGB565 0x0

#define	VMODE_RGB1555 0x1

#define	VMODE_RGB888PACKED 0x2

#define	VMODE_RGB888UNPACKED 0x3

#define	VMODE_RGBA888 0x4

#define	VMODE_YUV422PACKED 0x5

#define	VMODE_YUV422PLANAR 0x6

#define	VMODE_YUV420PLANAR 0x7

#define	VMODE_SMPNCMD 0x8

#define	VMODE_PALETTE4BIT 0x9

#define	VMODE_PALETTE8BIT 0xa

#define	VMODE_RESERVED 0xb

#define	GMODE_RGB565 0x0

#define	GMODE_RGB1555 0x1

#define	GMODE_RGB888PACKED 0x2

#define	GMODE_RGB888UNPACKED 0x3

#define	GMODE_RGBA888 0x4

#define	GMODE_YUV422PACKED 0x5

#define	GMODE_YUV422PLANAR 0x6

#define	GMODE_YUV420PLANAR 0x7

#define	GMODE_SMPNCMD 0x8

#define	GMODE_PALETTE4BIT 0x9

#define	GMODE_PALETTE8BIT 0xa

#define	GMODE_RESERVED 0xb

#define	DMA1_FRAME_TRIG 31 /* bit location */

#define	DMA1_VSYNC_MODE 28

#define	DMA1_VSYNC_INV 27

#define	DMA1_CKEY 24

#define	DMA1_CARRY 23

#define	DMA1_LNBUF_ENA 22

#define	DMA1_GATED_ENA 21

#define	DMA1_PWRDN_ENA 20

#define	DMA1_DSCALE 18

#define	DMA1_ALPHA_MODE 16

#define	DMA1_ALPHA 08

#define	DMA1_PXLCMD 00

#define	DUMB16_RGB565_0 0x0

#define	DUMB16_RGB565_1 0x1

#define	DUMB18_RGB666_0 0x2

#define	DUMB18_RGB666_1 0x3

#define	DUMB12_RGB444_0 0x4

#define	DUMB12_RGB444_1 0x5

#define	DUMB24_RGB888_0 0x6

#define	DUMB_BLANK 0x7

#define	IOPAD_DUMB24 0x0

#define	IOPAD_DUMB18SPI 0x1

#define	IOPAD_DUMB18GPIO 0x2

#define	IOPAD_DUMB16SPI 0x3

#define	IOPAD_DUMB16GPIO 0x4

#define	IOPAD_DUMB12 0x5

#define	IOPAD_SMART18SPI 0x6

#define	IOPAD_SMART16SPI 0x7

#define	IOPAD_SMART8BOTH 0x8

Macro Definition Documentation

#define CFG_ALPHA ( alpha ) ((alpha) << 8)

Definition at line 286 of file pxa168fb.h.

#define CFG_ALPHA_MASK 0x0000FF00

Definition at line 287 of file pxa168fb.h.

#define CFG_ALPHA_MODE ( amode ) ((amode) << 16)

Definition at line 284 of file pxa168fb.h.

#define CFG_ALPHA_MODE_MASK 0x00030000

Definition at line 285 of file pxa168fb.h.

#define CFG_ALPHA_U ( u ) (u)

Definition at line 127 of file pxa168fb.h.

#define CFG_ALPHA_U_MASK 0x000000FF

Definition at line 128 of file pxa168fb.h.

#define CFG_ALPHA_V ( v ) (v)

Definition at line 136 of file pxa168fb.h.

#define CFG_ALPHA_V_MASK 0x000000FF

Definition at line 137 of file pxa168fb.h.

#define CFG_ALPHA_Y ( y ) (y)

Definition at line 118 of file pxa168fb.h.

#define CFG_ALPHA_Y_MASK 0x000000FF

Definition at line 119 of file pxa168fb.h.

#define CFG_ARBFAST_ENA ( an ) ((an) << 27)

Definition at line 216 of file pxa168fb.h.

#define CFG_ARBFAST_ENA_MASK 0x08000000

Definition at line 217 of file pxa168fb.h.

#define CFG_AXICTRL ( axi ) ((axi) << 4)

Definition at line 396 of file pxa168fb.h.

#define CFG_AXICTRL_MASK 0x000000F0

Definition at line 397 of file pxa168fb.h.

#define CFG_BIAS_OUT ( bias ) ((bias) << 8)

Definition at line 367 of file pxa168fb.h.

#define CFG_BIAS_OUT_MASK 0x00000100

Definition at line 368 of file pxa168fb.h.

#define CFG_BLANKCOLOR_B_MASK 0x00FF0000

Definition at line 93 of file pxa168fb.h.

#define CFG_BLANKCOLOR_G_MASK 0x0000FF00

Definition at line 92 of file pxa168fb.h.

#define CFG_BLANKCOLOR_MASK 0x00FFFFFF

Definition at line 90 of file pxa168fb.h.

#define CFG_BLANKCOLOR_R_MASK 0x000000FF

Definition at line 91 of file pxa168fb.h.

#define CFG_BRIGHTNESS ( bright ) ((bright) << 16)

Definition at line 340 of file pxa168fb.h.

#define CFG_BRIGHTNESS_MASK 0xFFFF0000

Definition at line 341 of file pxa168fb.h.

#define CFG_C_MULTS ( mult ) ((mult) << 16)

Definition at line 347 of file pxa168fb.h.

#define CFG_C_MULTS_MASK 0xFFFF0000

Definition at line 348 of file pxa168fb.h.

#define CFG_CARRY ( carry ) ((carry) << 23)

Definition at line 274 of file pxa168fb.h.

#define CFG_CARRY_MASK 0x00800000

Definition at line 275 of file pxa168fb.h.

#define CFG_CBSH_ENA ( cn ) ((cn) << 29)

Definition at line 212 of file pxa168fb.h.

#define CFG_CBSH_ENA_MASK 0x20000000

Definition at line 213 of file pxa168fb.h.

#define CFG_CKEY_U ( u ) ((u) << 8)

Definition at line 125 of file pxa168fb.h.

#define CFG_CKEY_U1 ( u1 ) ((u1) << 16)

Definition at line 123 of file pxa168fb.h.

#define CFG_CKEY_U1_MASK 0x00FF0000

Definition at line 124 of file pxa168fb.h.

#define CFG_CKEY_U2 ( u2 ) ((u2) << 24)

Definition at line 121 of file pxa168fb.h.

#define CFG_CKEY_U2_MASK 0xFF000000

Definition at line 122 of file pxa168fb.h.

#define CFG_CKEY_U_MASK 0x0000FF00

Definition at line 126 of file pxa168fb.h.

#define CFG_CKEY_V ( v ) ((v) << 8)

Definition at line 134 of file pxa168fb.h.

#define CFG_CKEY_V1 ( v1 ) ((v1) << 16)

Definition at line 132 of file pxa168fb.h.

#define CFG_CKEY_V1_MASK 0x00FF0000

Definition at line 133 of file pxa168fb.h.

#define CFG_CKEY_V2 ( v2 ) ((v2) << 24)

Definition at line 130 of file pxa168fb.h.

#define CFG_CKEY_V2_MASK 0xFF000000

Definition at line 131 of file pxa168fb.h.

#define CFG_CKEY_V_MASK 0x0000FF00

Definition at line 135 of file pxa168fb.h.

#define CFG_CKEY_Y ( y ) ((y) << 8)

Definition at line 116 of file pxa168fb.h.

#define CFG_CKEY_Y1 ( y1 ) ((y1) << 16)

Definition at line 114 of file pxa168fb.h.

#define CFG_CKEY_Y1_MASK 0x00FF0000

Definition at line 115 of file pxa168fb.h.

#define CFG_CKEY_Y2 ( y2 ) ((y2) << 24)

Definition at line 112 of file pxa168fb.h.

#define CFG_CKEY_Y2_MASK 0xFF000000

Definition at line 113 of file pxa168fb.h.

#define CFG_CKEY_Y_MASK 0x0000FF00

Definition at line 117 of file pxa168fb.h.

#define CFG_CLKINV ( clk ) ((clk) << 7)

Definition at line 180 of file pxa168fb.h.

#define CFG_CLKINV_MASK 0x00000080

Definition at line 181 of file pxa168fb.h.

#define CFG_CMD_VM_ENA ( vm ) ((vm) << 13)

Definition at line 392 of file pxa168fb.h.

#define CFG_CMD_VM_ENA_MASK 0x00000800

Definition at line 393 of file pxa168fb.h.

#define CFG_COLOR_KEY_MASK 0x07000000

Definition at line 273 of file pxa168fb.h.

#define CFG_COLOR_KEY_MODE ( cmode ) ((cmode) << 24)

Definition at line 272 of file pxa168fb.h.

#define CFG_CONTRAST ( contrast ) (contrast)

Definition at line 342 of file pxa168fb.h.

#define CFG_CONTRAST_MASK 0x0000FFFF

Definition at line 343 of file pxa168fb.h.

#define CFG_COS0 ( con0 ) (con0)

Definition at line 356 of file pxa168fb.h.

#define CFG_COS0_MASK 0x0000FFFF

Definition at line 357 of file pxa168fb.h.

#define CFG_CSB_256x24 ( palette ) ((palette) << 14) /* Palette */

Definition at line 310 of file pxa168fb.h.

#define CFG_CSB_256x24_MASK 0x00004000

Definition at line 311 of file pxa168fb.h.

#define CFG_CSB_256x32 ( hwc ) ((hwc) << 15) /* HWC */

Definition at line 308 of file pxa168fb.h.

#define CFG_CSB_256x32_MASK 0x00008000

Definition at line 309 of file pxa168fb.h.

#define CFG_CSB_256x8 ( gamma ) ((gamma) << 13) /* Gamma */

Definition at line 312 of file pxa168fb.h.

#define CFG_CSB_256x8_MASK 0x00002000

Definition at line 313 of file pxa168fb.h.

#define CFG_CSC ( csc ) ((csc) << 8) /* csc */

Definition at line 394 of file pxa168fb.h.

#define CFG_CSC_MASK 0x00000300

Definition at line 395 of file pxa168fb.h.

#define CFG_DMA_ENA ( video ) (video)

Definition at line 261 of file pxa168fb.h.

#define CFG_DMA_ENA_MASK 0x00000001

Definition at line 262 of file pxa168fb.h.

#define CFG_DMA_FTOGGLE ( toggle ) ((toggle) << 7)

Definition at line 246 of file pxa168fb.h.

#define CFG_DMA_FTOGGLE_MASK 0x00000080

Definition at line 247 of file pxa168fb.h.

#define CFG_DMA_HPXL ( x ) (x)

Definition at line 31 of file pxa168fb.h.

#define CFG_DMA_HSMOOTH ( smooth ) ((smooth) << 6)

Definition at line 248 of file pxa168fb.h.

#define CFG_DMA_HSMOOTH_MASK 0x00000040

Definition at line 249 of file pxa168fb.h.

#define CFG_DMA_OVSA_HPXL ( x ) (x) /* 0~0xfff */

Definition at line 26 of file pxa168fb.h.

#define CFG_DMA_OVSA_VLN ( y ) ((y) << 16) /* 0~0xfff */

Definition at line 25 of file pxa168fb.h.

#define CFG_DMA_SWAP_MASK 0x0000001C

Definition at line 258 of file pxa168fb.h.

#define CFG_DMA_SWAPRB ( swap ) ((swap) << 4)

Definition at line 252 of file pxa168fb.h.

#define CFG_DMA_SWAPRB_MASK 0x00000010

Definition at line 253 of file pxa168fb.h.

#define CFG_DMA_SWAPUV ( swap ) ((swap) << 3)

Definition at line 254 of file pxa168fb.h.

#define CFG_DMA_SWAPUV_MASK 0x00000008

Definition at line 255 of file pxa168fb.h.

#define CFG_DMA_SWAPYU ( swap ) ((swap) << 2)

Definition at line 256 of file pxa168fb.h.

#define CFG_DMA_SWAPYU_MASK 0x00000004

Definition at line 257 of file pxa168fb.h.

#define CFG_DMA_TSTMODE ( test ) ((test) << 5)

Definition at line 250 of file pxa168fb.h.

#define CFG_DMA_TSTMODE_MASK 0x00000020

Definition at line 251 of file pxa168fb.h.

#define CFG_DMA_VLN ( y ) ((y) << 16)

Definition at line 30 of file pxa168fb.h.

#define CFG_DMA_VM_ENA ( vm ) ((vm) << 13) /* video */

Definition at line 390 of file pxa168fb.h.

#define CFG_DMA_VM_ENA_MASK 0x00002000

Definition at line 391 of file pxa168fb.h.

#define CFG_DMAFORMAT ( dmaformat ) ((dmaformat) << 20)

Definition at line 224 of file pxa168fb.h.

#define CFG_DMAFORMAT_MASK 0x00F00000

Definition at line 225 of file pxa168fb.h.

#define CFG_DSCALE ( dscale ) ((dscale) << 18)

Definition at line 282 of file pxa168fb.h.

#define CFG_DSCALE_MASK 0x000C0000

Definition at line 283 of file pxa168fb.h.

#define CFG_DUMB_ENA ( dumb ) (dumb)

Definition at line 383 of file pxa168fb.h.

#define CFG_DUMB_ENA_MASK 0x00000001

Definition at line 384 of file pxa168fb.h.

#define CFG_DUMBMODE ( mode ) ((mode) << 28)

Definition at line 361 of file pxa168fb.h.

#define CFG_DUMBMODE_MASK 0xF0000000

Definition at line 362 of file pxa168fb.h.

#define CFG_DZM_HPXL ( x ) (x)

Definition at line 36 of file pxa168fb.h.

#define CFG_DZM_VLN ( y ) ((y) << 16)

Definition at line 35 of file pxa168fb.h.

#define CFG_FRAME_TRIG ( trig ) ((trig) << 31)

Definition at line 266 of file pxa168fb.h.

#define CFG_FRAME_TRIG_MASK 0x80000000

Definition at line 267 of file pxa168fb.h.

#define CFG_GAMMA_ENA ( gn ) ((gn) << 30)

Definition at line 210 of file pxa168fb.h.

#define CFG_GAMMA_ENA_MASK 0x40000000

Definition at line 211 of file pxa168fb.h.

#define CFG_GAMMA_RDDAT_MASK 0x000000FF

Definition at line 155 of file pxa168fb.h.

#define CFG_GATED_ENA ( gated ) ((gated) << 21)

Definition at line 278 of file pxa168fb.h.

#define CFG_GATED_ENA_MASK 0x00200000

Definition at line 279 of file pxa168fb.h.

#define CFG_GRA_ENA ( gra ) ((gra) << 8)

Definition at line 243 of file pxa168fb.h.

#define CFG_GRA_ENA_MASK 0x00000100

Definition at line 244 of file pxa168fb.h.

#define CFG_GRA_FTOGGLE ( toggle ) ((toggle) << 15)

Definition at line 229 of file pxa168fb.h.

#define CFG_GRA_FTOGGLE_MASK 0x00008000

Definition at line 230 of file pxa168fb.h.

#define CFG_GRA_HPXL ( x ) (x)

Definition at line 53 of file pxa168fb.h.

#define CFG_GRA_HSMOOTH ( smooth ) ((smooth) << 14)

Definition at line 231 of file pxa168fb.h.

#define CFG_GRA_HSMOOTH_MASK 0x00004000

Definition at line 232 of file pxa168fb.h.

#define CFG_GRA_OVSA_HPXL ( x ) (x)

Definition at line 48 of file pxa168fb.h.

#define CFG_GRA_OVSA_VLN ( y ) ((y) << 16)

Definition at line 47 of file pxa168fb.h.

#define CFG_GRA_SWAPRB ( swap ) ((swap) << 12)

Definition at line 235 of file pxa168fb.h.

#define CFG_GRA_SWAPRB_MASK 0x00001000

Definition at line 236 of file pxa168fb.h.

#define CFG_GRA_SWAPUV ( swap ) ((swap) << 11)

Definition at line 237 of file pxa168fb.h.

#define CFG_GRA_SWAPUV_MASK 0x00000800

Definition at line 238 of file pxa168fb.h.

#define CFG_GRA_SWAPYU ( swap ) ((swap) << 10)

Definition at line 239 of file pxa168fb.h.

#define CFG_GRA_SWAPYU_MASK 0x00000400

Definition at line 240 of file pxa168fb.h.

#define CFG_GRA_TSTMODE ( test ) ((test) << 13)

Definition at line 233 of file pxa168fb.h.

#define CFG_GRA_TSTMODE_MASK 0x00002000

Definition at line 234 of file pxa168fb.h.

#define CFG_GRA_VLN ( y ) ((y) << 16)

Definition at line 52 of file pxa168fb.h.

#define CFG_GRA_VM_ENA ( vm ) ((vm) << 15) /* gfx */

Definition at line 388 of file pxa168fb.h.

#define CFG_GRA_VM_ENA_MASK 0x00008000

Definition at line 389 of file pxa168fb.h.

#define CFG_GRAFORMAT ( graformat ) ((graformat) << 16)

Definition at line 226 of file pxa168fb.h.

#define CFG_GRAFORMAT_MASK 0x000F0000

Definition at line 227 of file pxa168fb.h.

#define CFG_GZM_HPXL ( x ) (x)

Definition at line 58 of file pxa168fb.h.

#define CFG_GZM_VLN ( y ) ((y) << 16)

Definition at line 57 of file pxa168fb.h.

#define CFG_H_ACTIVE ( x ) (x)

Definition at line 78 of file pxa168fb.h.

#define CFG_H_BACK_PORCH ( b ) ((b) << 16)

Definition at line 82 of file pxa168fb.h.

#define CFG_H_FRONT_PORCH ( f ) (f)

Definition at line 83 of file pxa168fb.h.

#define CFG_H_TOTAL ( x ) (x)

Definition at line 73 of file pxa168fb.h.

#define CFG_HWC_1BITENA ( mn ) ((mn) << 25)

Definition at line 220 of file pxa168fb.h.

#define CFG_HWC_1BITENA_MASK 0x02000000

Definition at line 221 of file pxa168fb.h.

#define CFG_HWC_1BITMOD ( mode ) ((mode) << 26)

Definition at line 218 of file pxa168fb.h.

#define CFG_HWC_1BITMOD_MASK 0x04000000

Definition at line 219 of file pxa168fb.h.

#define CFG_HWC_COLOR1 0x00FFFFFF

Definition at line 97 of file pxa168fb.h.

#define CFG_HWC_COLOR1_B ( blue ) (blue)

Definition at line 100 of file pxa168fb.h.

#define CFG_HWC_COLOR1_B_MASK 0x00FF0000

Definition at line 103 of file pxa168fb.h.

#define CFG_HWC_COLOR1_G ( green ) ((green) << 8)

Definition at line 99 of file pxa168fb.h.

#define CFG_HWC_COLOR1_G_MASK 0x0000FF00

Definition at line 102 of file pxa168fb.h.

#define CFG_HWC_COLOR1_R ( red ) ((red) << 16)

Definition at line 98 of file pxa168fb.h.

#define CFG_HWC_COLOR1_R_MASK 0x000000FF

Definition at line 101 of file pxa168fb.h.

#define CFG_HWC_COLOR2 0x00FFFFFF

Definition at line 105 of file pxa168fb.h.

#define CFG_HWC_COLOR2_B_MASK 0x00FF0000

Definition at line 108 of file pxa168fb.h.

#define CFG_HWC_COLOR2_G_MASK 0x0000FF00

Definition at line 107 of file pxa168fb.h.

#define CFG_HWC_COLOR2_R_MASK 0x000000FF

Definition at line 106 of file pxa168fb.h.

#define CFG_HWC_ENA ( cn ) ((cn) << 24)

Definition at line 222 of file pxa168fb.h.

#define CFG_HWC_ENA_MASK 0x01000000

Definition at line 223 of file pxa168fb.h.

#define CFG_HWC_HPXL ( x ) (x)

Definition at line 68 of file pxa168fb.h.

#define CFG_HWC_OVSA_HPXL ( x ) (x)

Definition at line 63 of file pxa168fb.h.

#define CFG_HWC_OVSA_VLN ( y ) ((y) << 16)

Definition at line 62 of file pxa168fb.h.

#define CFG_HWC_VLN ( y ) ((y) << 16)

Definition at line 67 of file pxa168fb.h.

#define CFG_INV_COMPBLANK ( blank ) ((blank) << 6)

Definition at line 371 of file pxa168fb.h.

#define CFG_INV_COMPBLANK_MASK 0x00000040

Definition at line 372 of file pxa168fb.h.

#define CFG_INV_COMPSYNC ( sync ) ((sync) << 5)

Definition at line 373 of file pxa168fb.h.

#define CFG_INV_COMPSYNC_MASK 0x00000020

Definition at line 374 of file pxa168fb.h.

#define CFG_INV_HENA ( hena ) ((hena) << 4)

Definition at line 375 of file pxa168fb.h.

#define CFG_INV_HENA_MASK 0x00000010

Definition at line 376 of file pxa168fb.h.

#define CFG_INV_HSYNC ( hsync ) ((hsync) << 2)

Definition at line 379 of file pxa168fb.h.

#define CFG_INV_HSYNC_MASK 0x00000004

Definition at line 380 of file pxa168fb.h.

#define CFG_INV_PCLK ( pclk ) ((pclk) << 1)

Definition at line 381 of file pxa168fb.h.

#define CFG_INV_PCLK_MASK 0x00000002

Definition at line 382 of file pxa168fb.h.

#define CFG_INV_VSYNC ( vsync ) ((vsync) << 3)

Definition at line 377 of file pxa168fb.h.

#define CFG_INV_VSYNC_MASK 0x00000008

Definition at line 378 of file pxa168fb.h.

#define CFG_IOPAD_IN_MASK 0x0FFFFFFF

Definition at line 163 of file pxa168fb.h.

#define CFG_IOPADMODE ( iopad ) (iopad)

Definition at line 398 of file pxa168fb.h.

#define CFG_IOPADMODE_MASK 0x0000000F

Definition at line 399 of file pxa168fb.h.

#define CFG_KEEPXFER ( transfer ) ((transfer) << 6)

Definition at line 182 of file pxa168fb.h.

#define CFG_KEEPXFER_MASK 0x00000040

Definition at line 183 of file pxa168fb.h.

#define CFG_LCDGPIO_ENA ( gpio ) ((gpio) << 12)

Definition at line 365 of file pxa168fb.h.

#define CFG_LCDGPIO_ENA_MASK 0x000FF000

Definition at line 366 of file pxa168fb.h.

#define CFG_LCDGPIO_O ( data ) ((data) << 20)

Definition at line 363 of file pxa168fb.h.

#define CFG_LCDGPIO_O_MASK 0x0FF00000

Definition at line 364 of file pxa168fb.h.

#define CFG_LNBUF_ENA ( lnbuf ) ((lnbuf) << 22)

Definition at line 276 of file pxa168fb.h.

#define CFG_LNBUF_ENA_MASK 0x00400000

Definition at line 277 of file pxa168fb.h.

#define CFG_NOBLENDING ( nb ) ((nb) << 31)

Definition at line 208 of file pxa168fb.h.

#define CFG_NOBLENDING_MASK 0x80000000

Definition at line 209 of file pxa168fb.h.

#define CFG_PALETTE_ENA ( pn ) ((pn) << 28)

Definition at line 214 of file pxa168fb.h.

#define CFG_PALETTE_ENA_MASK 0x10000000

Definition at line 215 of file pxa168fb.h.

#define CFG_PALETTE_RDDAT_MASK 0x00FFFFFF

Definition at line 159 of file pxa168fb.h.

#define CFG_PDWN16x66 ( pdwn ) ((pdwn) << 2)

Definition at line 322 of file pxa168fb.h.

#define CFG_PDWN16x66_MASK 0x00000004

Definition at line 323 of file pxa168fb.h.

#define CFG_PDWN256x24 ( pdwn ) ((pdwn) << 6) /* Palette */

Definition at line 316 of file pxa168fb.h.

#define CFG_PDWN256x24_MASK 0x00000040

Definition at line 317 of file pxa168fb.h.

#define CFG_PDWN256x32 ( pdwn ) ((pdwn) << 7) /* HWC */

Definition at line 314 of file pxa168fb.h.

#define CFG_PDWN256x32_MASK 0x00000080

Definition at line 315 of file pxa168fb.h.

#define CFG_PDWN256x8 ( pdwn ) ((pdwn) << 5) /* Gamma */

Definition at line 318 of file pxa168fb.h.

#define CFG_PDWN256x8_MASK 0x00000020

Definition at line 319 of file pxa168fb.h.

#define CFG_PDWN32x32 ( pdwn ) ((pdwn) << 3)

Definition at line 320 of file pxa168fb.h.

#define CFG_PDWN32x32_MASK 0x00000008

Definition at line 321 of file pxa168fb.h.

#define CFG_PDWN32x66 ( pdwn ) ((pdwn) << 1)

Definition at line 324 of file pxa168fb.h.

#define CFG_PDWN32x66_MASK 0x00000002

Definition at line 325 of file pxa168fb.h.

#define CFG_PDWN64x66 ( pdwn ) (pdwn)

Definition at line 326 of file pxa168fb.h.

#define CFG_PDWN64x66_MASK 0x00000001

Definition at line 327 of file pxa168fb.h.

#define CFG_PWRDN_ENA ( power ) ((power) << 20)

Definition at line 280 of file pxa168fb.h.

#define CFG_PWRDN_ENA_MASK 0x00100000

Definition at line 281 of file pxa168fb.h.

#define CFG_PXLCMD ( pxlcmd ) (pxlcmd)

Definition at line 288 of file pxa168fb.h.

#define CFG_PXLCMD_MASK 0x000000FF

Definition at line 289 of file pxa168fb.h.

#define CFG_REVERSE_RGB ( rRGB ) ((rRGB) << 7)

Definition at line 369 of file pxa168fb.h.

#define CFG_REVERSE_RGB_MASK 0x00000080

Definition at line 370 of file pxa168fb.h.

#define CFG_RXBITS ( rx ) ((rx) << 16) /* 0x1F~0x1 */

Definition at line 176 of file pxa168fb.h.

#define CFG_RXBITS_MASK 0x00FF0000

Definition at line 177 of file pxa168fb.h.

#define CFG_RXBITSTO0 ( rx ) ((rx) << 5)

Definition at line 184 of file pxa168fb.h.

#define CFG_RXBITSTO0_MASK 0x00000020

Definition at line 185 of file pxa168fb.h.

#define CFG_SATURATION ( sat ) (sat)

Definition at line 349 of file pxa168fb.h.

#define CFG_SATURATION_MASK 0x0000FFFF

Definition at line 350 of file pxa168fb.h.

#define CFG_SCLKCNT ( div ) ((div) << 24) /* 0xFF~0x2 */

Definition at line 174 of file pxa168fb.h.

#define CFG_SCLKCNT_MASK 0xFF000000

Definition at line 175 of file pxa168fb.h.

#define CFG_SIN0 ( sin0 ) ((sin0) << 16)

Definition at line 354 of file pxa168fb.h.

#define CFG_SIN0_MASK 0xFFFF0000

Definition at line 355 of file pxa168fb.h.

#define CFG_SPI_3W4WB ( wire ) ((wire) << 1)

Definition at line 192 of file pxa168fb.h.

#define CFG_SPI_3W4WB_MASK 0x00000002

Definition at line 193 of file pxa168fb.h.

#define CFG_SPI_ENA ( spi ) ((spi) << 3)

Definition at line 188 of file pxa168fb.h.

#define CFG_SPI_ENA_MASK 0x00000008

Definition at line 189 of file pxa168fb.h.

#define CFG_SPI_SEL ( spi ) ((spi) << 2)

Definition at line 190 of file pxa168fb.h.

#define CFG_SPI_SEL_MASK 0x00000004

Definition at line 191 of file pxa168fb.h.

#define CFG_SPI_START ( start ) (start)

Definition at line 194 of file pxa168fb.h.

#define CFG_SPI_START_MASK 0x00000001

Definition at line 195 of file pxa168fb.h.

#define CFG_SRAM_ADDR ( addr ) (addr)

Definition at line 297 of file pxa168fb.h.

#define CFG_SRAM_ADDR_LCDID ( id ) ((id) << 8)

Definition at line 295 of file pxa168fb.h.

#define CFG_SRAM_ADDR_LCDID_MASK 0x00000F00

Definition at line 296 of file pxa168fb.h.

#define CFG_SRAM_ADDR_MASK 0x000000FF

Definition at line 298 of file pxa168fb.h.

#define CFG_SRAM_INIT_WR_RD ( mode ) ((mode) << 14)

Definition at line 293 of file pxa168fb.h.

#define CFG_SRAM_INIT_WR_RD_MASK 0x0000C000

Definition at line 294 of file pxa168fb.h.

#define CFG_TXBITS ( tx ) ((tx) << 8) /* 0x1F~0x1 */

Definition at line 178 of file pxa168fb.h.

#define CFG_TXBITS_MASK 0x0000FF00

Definition at line 179 of file pxa168fb.h.

#define CFG_TXBITSTO0 ( tx ) ((tx) << 4)

Definition at line 186 of file pxa168fb.h.

#define CFG_TXBITSTO0_MASK 0x00000010

Definition at line 187 of file pxa168fb.h.

#define CFG_V_ACTIVE ( y ) ((y) << 16)

Definition at line 77 of file pxa168fb.h.

#define CFG_V_BACK_PORCH ( b ) ((b) << 16)

Definition at line 85 of file pxa168fb.h.

#define CFG_V_FRONT_PORCH ( f ) (f)

Definition at line 86 of file pxa168fb.h.

#define CFG_V_TOTAL ( y ) ((y) << 16)

Definition at line 72 of file pxa168fb.h.

#define CFG_VSYNC_INV ( inv ) ((inv) << 27)

Definition at line 270 of file pxa168fb.h.

#define CFG_VSYNC_INV_MASK 0x08000000

Definition at line 271 of file pxa168fb.h.

#define CFG_VSYNC_TRIG ( trig ) ((trig) << 28)

Definition at line 268 of file pxa168fb.h.

#define CFG_VSYNC_TRIG_MASK 0x70000000

Definition at line 269 of file pxa168fb.h.

#define CFG_YUV2RGB_DMA ( cvrt ) ((cvrt) << 1)

Definition at line 259 of file pxa168fb.h.

#define CFG_YUV2RGB_DMA_MASK 0x00000002

Definition at line 260 of file pxa168fb.h.

#define CFG_YUV2RGB_GRA ( cvrt ) ((cvrt) << 9)

Definition at line 241 of file pxa168fb.h.

#define CFG_YUV2RGB_GRA_MASK 0x00000200

Definition at line 242 of file pxa168fb.h.

#define CLEAN_SPU_IRQ_ISR ( irq ) (irq)

Definition at line 431 of file pxa168fb.h.

#define CLEAN_SPU_IRQ_ISR_MASK 0x0000FFFF

Definition at line 432 of file pxa168fb.h.

#define CLK_FRACDIV ( frac ) ((frac) << 16)

Definition at line 333 of file pxa168fb.h.

#define CLK_FRACDIV_MASK 0x0FFF0000

Definition at line 334 of file pxa168fb.h.

#define CLK_INT_DIV ( div ) (div)

Definition at line 335 of file pxa168fb.h.

#define CLK_INT_DIV_MASK 0x0000FFFF

Definition at line 336 of file pxa168fb.h.

#define DMA1_ALPHA 08

Definition at line 528 of file pxa168fb.h.

#define DMA1_ALPHA_MODE 16

Definition at line 527 of file pxa168fb.h.

#define DMA1_CARRY 23

Definition at line 522 of file pxa168fb.h.

#define DMA1_CKEY 24

Definition at line 521 of file pxa168fb.h.

#define DMA1_DSCALE 18

Definition at line 526 of file pxa168fb.h.

#define DMA1_FRAME_TRIG 31 /* bit location */

Definition at line 518 of file pxa168fb.h.

#define DMA1_GATED_ENA 21

Definition at line 524 of file pxa168fb.h.

#define DMA1_LNBUF_ENA 22

Definition at line 523 of file pxa168fb.h.

#define DMA1_PWRDN_ENA 20

Definition at line 525 of file pxa168fb.h.

#define DMA1_PXLCMD 00

Definition at line 529 of file pxa168fb.h.

#define DMA1_VSYNC_INV 27

Definition at line 520 of file pxa168fb.h.

#define DMA1_VSYNC_MODE 28

Definition at line 519 of file pxa168fb.h.

#define DMA_FF_ALLEMPTY_MASK 0x00000004

Definition at line 476 of file pxa168fb.h.

#define DMA_FF_UNDERFLOW ( ff ) ((ff) << 29)

Definition at line 440 of file pxa168fb.h.

#define DMA_FF_UNDERFLOW_ENA ( ff ) ((ff) << 29)

Definition at line 407 of file pxa168fb.h.

#define DMA_FF_UNDERFLOW_ENA_MASK 0x20000000

Definition at line 408 of file pxa168fb.h.

#define DMA_FF_UNDERFLOW_MASK 0x20000000

Definition at line 441 of file pxa168fb.h.

#define DMA_FRAME_CNT_ISR_MASK 0x00003000

Definition at line 467 of file pxa168fb.h.

#define DMA_FRAME_CNT_MASK 0x00000003 /* Video */

Definition at line 170 of file pxa168fb.h.

#define DMA_FRAME_IRQ0 ( irq ) ((irq) << 31)

Definition at line 436 of file pxa168fb.h.

#define DMA_FRAME_IRQ0_ENA ( irq ) ((irq) << 31)

Definition at line 403 of file pxa168fb.h.

#define DMA_FRAME_IRQ0_ENA_MASK 0x80000000

Definition at line 404 of file pxa168fb.h.

#define DMA_FRAME_IRQ0_LEVEL_MASK 0x00008000

Definition at line 465 of file pxa168fb.h.

#define DMA_FRAME_IRQ0_MASK 0x80000000

Definition at line 437 of file pxa168fb.h.

#define DMA_FRAME_IRQ1 ( irq ) ((irq) << 30)

Definition at line 438 of file pxa168fb.h.

#define DMA_FRAME_IRQ1_ENA ( irq ) ((irq) << 30)

Definition at line 405 of file pxa168fb.h.

#define DMA_FRAME_IRQ1_ENA_MASK 0x40000000

Definition at line 406 of file pxa168fb.h.

#define DMA_FRAME_IRQ1_LEVEL_MASK 0x00004000

Definition at line 466 of file pxa168fb.h.

#define DMA_FRAME_IRQ1_MASK 0x40000000

Definition at line 439 of file pxa168fb.h.

#define DUMB12_RGB444_0 0x4

Definition at line 539 of file pxa168fb.h.

#define DUMB12_RGB444_1 0x5

Definition at line 540 of file pxa168fb.h.

#define DUMB16_RGB565_0 0x0

Definition at line 535 of file pxa168fb.h.

#define DUMB16_RGB565_1 0x1

Definition at line 536 of file pxa168fb.h.

#define DUMB18_RGB666_0 0x2

Definition at line 537 of file pxa168fb.h.

#define DUMB18_RGB666_1 0x3

Definition at line 538 of file pxa168fb.h.

#define DUMB24_RGB888_0 0x6

Definition at line 541 of file pxa168fb.h.

#define DUMB_BLANK 0x7

Definition at line 542 of file pxa168fb.h.

#define DUMB_FRAMEDONE ( fdone ) ((fdone) << 22)

Definition at line 450 of file pxa168fb.h.

#define DUMB_FRAMEDONE_ENA ( fdone ) ((fdone) << 22)

Definition at line 417 of file pxa168fb.h.

#define DUMB_FRAMEDONE_ENA_MASK 0x00400000

Definition at line 418 of file pxa168fb.h.

#define DUMB_FRAMEDONE_LEVEL_MASK 0x00000040

Definition at line 472 of file pxa168fb.h.

#define DUMB_FRAMEDONE_MASK 0x00400000

Definition at line 451 of file pxa168fb.h.

#define ERR_IRQ ( irq ) ((irq) << 16)

Definition at line 462 of file pxa168fb.h.

#define ERR_IRQ_ENA ( irq ) ((irq) << 16)

Definition at line 429 of file pxa168fb.h.

#define ERR_IRQ_ENA_MASK 0x00010000

Definition at line 430 of file pxa168fb.h.

#define ERR_IRQ_MASK 0x00010000

Definition at line 463 of file pxa168fb.h.

#define GMODE_PALETTE4BIT 0x9

Definition at line 511 of file pxa168fb.h.

#define GMODE_PALETTE8BIT 0xa

Definition at line 512 of file pxa168fb.h.

#define GMODE_RESERVED 0xb

Definition at line 513 of file pxa168fb.h.

#define GMODE_RGB1555 0x1

Definition at line 503 of file pxa168fb.h.

#define GMODE_RGB565 0x0

Definition at line 502 of file pxa168fb.h.

#define GMODE_RGB888PACKED 0x2

Definition at line 504 of file pxa168fb.h.

#define GMODE_RGB888UNPACKED 0x3

Definition at line 505 of file pxa168fb.h.

#define GMODE_RGBA888 0x4

Definition at line 506 of file pxa168fb.h.

#define GMODE_SMPNCMD 0x8

Definition at line 510 of file pxa168fb.h.

#define GMODE_YUV420PLANAR 0x7

Definition at line 509 of file pxa168fb.h.

#define GMODE_YUV422PACKED 0x5

Definition at line 507 of file pxa168fb.h.

#define GMODE_YUV422PLANAR 0x6

Definition at line 508 of file pxa168fb.h.

#define GRA_FF_ALLEMPTY_MASK 0x00000002

Definition at line 477 of file pxa168fb.h.

#define GRA_FF_UNDERFLOW ( ff ) ((ff) << 25)

Definition at line 446 of file pxa168fb.h.

#define GRA_FF_UNDERFLOW_ENA ( ff ) ((ff) << 25)

Definition at line 413 of file pxa168fb.h.

#define GRA_FF_UNDERFLOW_ENA_MASK 0x02000000

Definition at line 414 of file pxa168fb.h.

#define GRA_FF_UNDERFLOW_MASK 0x02000000

Definition at line 447 of file pxa168fb.h.

#define GRA_FRAME_CNT_ISR_MASK 0x00000300

Definition at line 470 of file pxa168fb.h.

#define GRA_FRAME_CNT_MASK 0x0000000C /* Graphic */

Definition at line 169 of file pxa168fb.h.

#define GRA_FRAME_IRQ0 ( irq ) ((irq) << 27)

Definition at line 442 of file pxa168fb.h.

#define GRA_FRAME_IRQ0_ENA ( irq ) ((irq) << 27)

Definition at line 409 of file pxa168fb.h.

#define GRA_FRAME_IRQ0_ENA_MASK 0x08000000

Definition at line 410 of file pxa168fb.h.

#define GRA_FRAME_IRQ0_LEVEL_MASK 0x00000800

Definition at line 468 of file pxa168fb.h.

#define GRA_FRAME_IRQ0_MASK 0x08000000

Definition at line 443 of file pxa168fb.h.

#define GRA_FRAME_IRQ1 ( irq ) ((irq) << 26)

Definition at line 444 of file pxa168fb.h.

#define GRA_FRAME_IRQ1_ENA ( irq ) ((irq) << 26)

Definition at line 411 of file pxa168fb.h.

#define GRA_FRAME_IRQ1_ENA_MASK 0x04000000

Definition at line 412 of file pxa168fb.h.

#define GRA_FRAME_IRQ1_LEVEL_MASK 0x00000400

Definition at line 469 of file pxa168fb.h.

#define GRA_FRAME_IRQ1_MASK 0x04000000

Definition at line 445 of file pxa168fb.h.

#define HWC_FRAMEDONE ( fdone ) ((fdone) << 20)

Definition at line 454 of file pxa168fb.h.

#define HWC_FRAMEDONE_ENA ( fdone ) ((fdone) << 20)

Definition at line 421 of file pxa168fb.h.

#define HWC_FRAMEDONE_ENA_MASK 0x00100000

Definition at line 422 of file pxa168fb.h.

#define HWC_FRAMEDONE_LEVEL_MASK 0x00000010

Definition at line 474 of file pxa168fb.h.

#define HWC_FRAMEDONE_MASK 0x00100000

Definition at line 455 of file pxa168fb.h.

#define IOPAD_DUMB12 0x5

Definition at line 553 of file pxa168fb.h.

#define IOPAD_DUMB16GPIO 0x4

Definition at line 552 of file pxa168fb.h.

#define IOPAD_DUMB16SPI 0x3

Definition at line 551 of file pxa168fb.h.

#define IOPAD_DUMB18GPIO 0x2

Definition at line 550 of file pxa168fb.h.

#define IOPAD_DUMB18SPI 0x1

Definition at line 549 of file pxa168fb.h.

#define IOPAD_DUMB24 0x0

Definition at line 548 of file pxa168fb.h.

#define IOPAD_SMART16SPI 0x7

Definition at line 555 of file pxa168fb.h.

#define IOPAD_SMART18SPI 0x6

Definition at line 554 of file pxa168fb.h.

#define IOPAD_SMART8BOTH 0x8

Definition at line 556 of file pxa168fb.h.

#define IPE_FRAME_CNT_MASK 0x00000030

Definition at line 168 of file pxa168fb.h.

#define IRE_FRAME_CNT_MASK 0x000000C0

Definition at line 167 of file pxa168fb.h.

#define ISA_RXDATA_16BIT_1_DATA_MASK 0x000000FF

Definition at line 144 of file pxa168fb.h.

#define ISA_RXDATA_16BIT_2_DATA_MASK 0x0000FF00

Definition at line 145 of file pxa168fb.h.

#define ISA_RXDATA_16BIT_3_DATA_MASK 0x00FF0000

Definition at line 146 of file pxa168fb.h.

#define ISA_RXDATA_16BIT_4_DATA_MASK 0xFF000000

Definition at line 147 of file pxa168fb.h.

#define ISA_RXDATA_32BIT_1_DATA_MASK 0x00FFFFFF

Definition at line 148 of file pxa168fb.h.

#define LCD_CFG_DMA_START_ADDR_0 0x00CC /* Cmd address */

Definition at line 9 of file pxa168fb.h.

#define LCD_CFG_DMA_START_ADDR_1 0x00DC /* Cmd address */

Definition at line 13 of file pxa168fb.h.

#define LCD_CFG_GRA_PITCH 0x00FC

Definition at line 43 of file pxa168fb.h.

#define LCD_CFG_GRA_START_ADDR0 0x00F4

Definition at line 39 of file pxa168fb.h.

#define LCD_CFG_GRA_START_ADDR1 0x00F8

Definition at line 40 of file pxa168fb.h.

#define LCD_CFG_RDREG5F 0x017C

Definition at line 166 of file pxa168fb.h.

#define LCD_CFG_SCLK_DIV 0x01A8

Definition at line 330 of file pxa168fb.h.

#define LCD_SPU_ALPHA_COLOR1 0x0128

Definition at line 96 of file pxa168fb.h.

#define LCD_SPU_ALPHA_COLOR2 0x012C

Definition at line 104 of file pxa168fb.h.

#define LCD_SPU_BLANKCOLOR 0x0124

Definition at line 89 of file pxa168fb.h.

#define LCD_SPU_CBSH_HUE 0x01B4

Definition at line 353 of file pxa168fb.h.

#define LCD_SPU_COLORKEY_U 0x0134

Definition at line 120 of file pxa168fb.h.

#define LCD_SPU_COLORKEY_V 0x0138

Definition at line 129 of file pxa168fb.h.

#define LCD_SPU_COLORKEY_Y 0x0130

Definition at line 111 of file pxa168fb.h.

#define LCD_SPU_CONTRAST 0x01AC

Definition at line 339 of file pxa168fb.h.

#define LCD_SPU_DMA_CTRL0 0x0190

Definition at line 207 of file pxa168fb.h.

#define LCD_SPU_DMA_CTRL1 0x0194

Definition at line 265 of file pxa168fb.h.

#define LCD_SPU_DMA_HPXL_VLN 0x00EC

Definition at line 29 of file pxa168fb.h.

#define LCD_SPU_DMA_PITCH_UV 0x00E4

Definition at line 19 of file pxa168fb.h.

#define LCD_SPU_DMA_PITCH_YC 0x00E0

Definition at line 16 of file pxa168fb.h.

#define LCD_SPU_DMA_START_ADDR_U0 0x00C4

Definition at line 7 of file pxa168fb.h.

#define LCD_SPU_DMA_START_ADDR_U1 0x00D4

Definition at line 11 of file pxa168fb.h.

#define LCD_SPU_DMA_START_ADDR_V0 0x00C8

Definition at line 8 of file pxa168fb.h.

#define LCD_SPU_DMA_START_ADDR_V1 0x00D8

Definition at line 12 of file pxa168fb.h.

#define LCD_SPU_DMA_START_ADDR_Y0 0x00C0

Definition at line 6 of file pxa168fb.h.

#define LCD_SPU_DMA_START_ADDR_Y1 0x00D0

Definition at line 10 of file pxa168fb.h.

#define LCD_SPU_DUMB_CTRL 0x01B8

Definition at line 360 of file pxa168fb.h.

#define LCD_SPU_DZM_HPXL_VLN 0x00F0

Definition at line 34 of file pxa168fb.h.

#define LCD_SPU_GAMMA_RDDAT 0x015c

Definition at line 154 of file pxa168fb.h.

#define LCD_SPU_GRA_HPXL_VLN 0x0104

Definition at line 51 of file pxa168fb.h.

#define LCD_SPU_GRA_OVSA_HPXL_VLN 0x0100

Definition at line 46 of file pxa168fb.h.

#define LCD_SPU_GZM_HPXL_VLN 0x0108

Definition at line 56 of file pxa168fb.h.

#define LCD_SPU_H_PORCH 0x011C

Definition at line 81 of file pxa168fb.h.

#define LCD_SPU_HWC_HPXL_VLN 0x0110

Definition at line 66 of file pxa168fb.h.

#define LCD_SPU_HWC_OVSA_HPXL_VLN 0x010C

Definition at line 61 of file pxa168fb.h.

#define LCD_SPU_HWC_RDDAT 0x0158

Definition at line 151 of file pxa168fb.h.

#define LCD_SPU_IOPAD_IN 0x0178

Definition at line 162 of file pxa168fb.h.

#define LCD_SPU_ISA_RSDATA 0x0144

Definition at line 143 of file pxa168fb.h.

#define LCD_SPU_PALETTE_RDDAT 0x0160

Definition at line 158 of file pxa168fb.h.

#define LCD_SPU_SATURATION 0x01B0

Definition at line 346 of file pxa168fb.h.

#define LCD_SPU_SMPN_CTRL 0x0188

Definition at line 204 of file pxa168fb.h.

#define LCD_SPU_SPI_CTRL 0x0180

Definition at line 173 of file pxa168fb.h.

#define LCD_SPU_SPI_RXDATA 0x0140

Definition at line 140 of file pxa168fb.h.

#define LCD_SPU_SPI_TXDATA 0x0184

Definition at line 198 of file pxa168fb.h.

#define LCD_SPU_SRAM_CTRL 0x0198

Definition at line 292 of file pxa168fb.h.

#define LCD_SPU_SRAM_PARA0 0x01A0

Definition at line 304 of file pxa168fb.h.

#define LCD_SPU_SRAM_PARA1 0x01A4

Definition at line 307 of file pxa168fb.h.

#define LCD_SPU_SRAM_WRDAT 0x019C

Definition at line 301 of file pxa168fb.h.

#define LCD_SPU_V_H_ACTIVE 0x0118

Definition at line 76 of file pxa168fb.h.

#define LCD_SPU_V_PORCH 0x0120

Definition at line 84 of file pxa168fb.h.

#define LCD_SPUT_DMA_OVSA_HPXL_VLN 0x00E8

Definition at line 24 of file pxa168fb.h.

#define LCD_SPUT_V_H_TOTAL 0x0114

Definition at line 71 of file pxa168fb.h.

#define PWRDN_IRQ ( irq ) ((irq) << 17)

Definition at line 460 of file pxa168fb.h.

#define PWRDN_IRQ_ENA ( irq ) ((irq) << 17)

Definition at line 427 of file pxa168fb.h.

#define PWRDN_IRQ_ENA_MASK 0x00020000

Definition at line 428 of file pxa168fb.h.

#define PWRDN_IRQ_LEVEL_MASK 0x00000001

Definition at line 478 of file pxa168fb.h.

#define PWRDN_IRQ_MASK 0x00020000

Definition at line 461 of file pxa168fb.h.

#define SCLK_SOURCE_SELECT ( src ) ((src) << 31)

Definition at line 331 of file pxa168fb.h.

#define SCLK_SOURCE_SELECT_MASK 0x80000000

Definition at line 332 of file pxa168fb.h.

#define SLV_FF_EMPTY_MASK 0x00000008

Definition at line 475 of file pxa168fb.h.

#define SLV_IRQ ( irq ) ((irq) << 19)

Definition at line 456 of file pxa168fb.h.

#define SLV_IRQ_ENA ( irq ) ((irq) << 19)

Definition at line 423 of file pxa168fb.h.

#define SLV_IRQ_ENA_MASK 0x00080000

Definition at line 424 of file pxa168fb.h.

#define SLV_IRQ_MASK 0x00080000

Definition at line 457 of file pxa168fb.h.

#define SPI_IRQ ( irq ) ((irq) << 18)

Definition at line 458 of file pxa168fb.h.

#define SPI_IRQ_ENA ( irq ) ((irq) << 18)

Definition at line 425 of file pxa168fb.h.

#define SPI_IRQ_ENA_MASK 0x00040000

Definition at line 426 of file pxa168fb.h.

#define SPI_IRQ_MASK 0x00040000

Definition at line 459 of file pxa168fb.h.

#define SPU_DMA_PITCH_C ( c ) ((c) << 16)

Definition at line 17 of file pxa168fb.h.

#define SPU_DMA_PITCH_U ( u ) (u)

Definition at line 21 of file pxa168fb.h.

#define SPU_DMA_PITCH_V ( v ) ((v) << 16)

Definition at line 20 of file pxa168fb.h.

#define SPU_DMA_PITCH_Y ( y ) (y)

Definition at line 18 of file pxa168fb.h.

#define SPU_IOPAD_CONTROL 0x01BC

Definition at line 387 of file pxa168fb.h.

#define SPU_IRQ_ENA 0x01C0

Definition at line 402 of file pxa168fb.h.

#define SPU_IRQ_ISR 0x01C4

Definition at line 435 of file pxa168fb.h.

#define TWC_FRAMEDONE ( fdone ) ((fdone) << 21)

Definition at line 452 of file pxa168fb.h.

#define TWC_FRAMEDONE_ENA ( fdone ) ((fdone) << 21)

Definition at line 419 of file pxa168fb.h.

#define TWC_FRAMEDONE_ENA_MASK 0x00200000

Definition at line 420 of file pxa168fb.h.

#define TWC_FRAMEDONE_LEVEL_MASK 0x00000020

Definition at line 473 of file pxa168fb.h.

#define TWC_FRAMEDONE_MASK 0x00200000

Definition at line 453 of file pxa168fb.h.

#define VMODE_PALETTE4BIT 0x9

Definition at line 494 of file pxa168fb.h.

#define VMODE_PALETTE8BIT 0xa

Definition at line 495 of file pxa168fb.h.

#define VMODE_RESERVED 0xb

Definition at line 496 of file pxa168fb.h.

#define VMODE_RGB1555 0x1

Definition at line 486 of file pxa168fb.h.

#define VMODE_RGB565 0x0

Definition at line 485 of file pxa168fb.h.

#define VMODE_RGB888PACKED 0x2

Definition at line 487 of file pxa168fb.h.

#define VMODE_RGB888UNPACKED 0x3

Definition at line 488 of file pxa168fb.h.

#define VMODE_RGBA888 0x4

Definition at line 489 of file pxa168fb.h.

#define VMODE_SMPNCMD 0x8

Definition at line 493 of file pxa168fb.h.

#define VMODE_YUV420PLANAR 0x7

Definition at line 492 of file pxa168fb.h.

#define VMODE_YUV422PACKED 0x5

Definition at line 490 of file pxa168fb.h.

#define VMODE_YUV422PLANAR 0x6

Definition at line 491 of file pxa168fb.h.

#define VSYNC_IRQ ( vsync_irq ) ((vsync_irq) << 23)

Definition at line 448 of file pxa168fb.h.

#define VSYNC_IRQ_ENA ( vsync_irq ) ((vsync_irq) << 23)

Definition at line 415 of file pxa168fb.h.

#define VSYNC_IRQ_ENA_MASK 0x00800000

Definition at line 416 of file pxa168fb.h.

#define VSYNC_IRQ_LEVEL_MASK 0x00000080

Definition at line 471 of file pxa168fb.h.

#define VSYNC_IRQ_MASK 0x00800000

Definition at line 449 of file pxa168fb.h.

Macros

Macro Definition Documentation