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dss.h
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1 /*
2  * linux/drivers/video/omap2/dss/dss.h
3  *
4  * Copyright (C) 2009 Nokia Corporation
5  * Author: Tomi Valkeinen <[email protected]>
6  *
7  * Some code and ideas taken from drivers/video/omap/ driver
8  * by Imre Deak.
9  *
10  * This program is free software; you can redistribute it and/or modify it
11  * under the terms of the GNU General Public License version 2 as published by
12  * the Free Software Foundation.
13  *
14  * This program is distributed in the hope that it will be useful, but WITHOUT
15  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
16  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
17  * more details.
18  *
19  * You should have received a copy of the GNU General Public License along with
20  * this program. If not, see <http://www.gnu.org/licenses/>.
21  */
22 
23 #ifndef __OMAP2_DSS_H
24 #define __OMAP2_DSS_H
25 
26 #ifdef CONFIG_OMAP2_DSS_DEBUG_SUPPORT
27 #define DEBUG
28 #endif
29 
30 #ifdef DEBUG
31 extern bool dss_debug;
32 #ifdef DSS_SUBSYS_NAME
33 #define DSSDBG(format, ...) \
34  if (dss_debug) \
35  printk(KERN_DEBUG "omapdss " DSS_SUBSYS_NAME ": " format, \
36  ## __VA_ARGS__)
37 #else
38 #define DSSDBG(format, ...) \
39  if (dss_debug) \
40  printk(KERN_DEBUG "omapdss: " format, ## __VA_ARGS__)
41 #endif
42 
43 #ifdef DSS_SUBSYS_NAME
44 #define DSSDBGF(format, ...) \
45  if (dss_debug) \
46  printk(KERN_DEBUG "omapdss " DSS_SUBSYS_NAME \
47  ": %s(" format ")\n", \
48  __func__, \
49  ## __VA_ARGS__)
50 #else
51 #define DSSDBGF(format, ...) \
52  if (dss_debug) \
53  printk(KERN_DEBUG "omapdss: " \
54  ": %s(" format ")\n", \
55  __func__, \
56  ## __VA_ARGS__)
57 #endif
58 
59 #else /* DEBUG */
60 #define DSSDBG(format, ...)
61 #define DSSDBGF(format, ...)
62 #endif
63 
64 
65 #ifdef DSS_SUBSYS_NAME
66 #define DSSERR(format, ...) \
67  printk(KERN_ERR "omapdss " DSS_SUBSYS_NAME " error: " format, \
68  ## __VA_ARGS__)
69 #else
70 #define DSSERR(format, ...) \
71  printk(KERN_ERR "omapdss error: " format, ## __VA_ARGS__)
72 #endif
73 
74 #ifdef DSS_SUBSYS_NAME
75 #define DSSINFO(format, ...) \
76  printk(KERN_INFO "omapdss " DSS_SUBSYS_NAME ": " format, \
77  ## __VA_ARGS__)
78 #else
79 #define DSSINFO(format, ...) \
80  printk(KERN_INFO "omapdss: " format, ## __VA_ARGS__)
81 #endif
82 
83 #ifdef DSS_SUBSYS_NAME
84 #define DSSWARN(format, ...) \
85  printk(KERN_WARNING "omapdss " DSS_SUBSYS_NAME ": " format, \
86  ## __VA_ARGS__)
87 #else
88 #define DSSWARN(format, ...) \
89  printk(KERN_WARNING "omapdss: " format, ## __VA_ARGS__)
90 #endif
91 
92 /* OMAP TRM gives bitfields as start:end, where start is the higher bit
93  number. For example 7:0 */
94 #define FLD_MASK(start, end) (((1 << ((start) - (end) + 1)) - 1) << (end))
95 #define FLD_VAL(val, start, end) (((val) << (end)) & FLD_MASK(start, end))
96 #define FLD_GET(val, start, end) (((val) & FLD_MASK(start, end)) >> (end))
97 #define FLD_MOD(orig, val, start, end) \
98  (((orig) & ~FLD_MASK(start, end)) | FLD_VAL(val, start, end))
99 
104 };
105 
109 };
110 
114 };
115 
125 };
126 
128  /* rates that we get with dividers below */
129  unsigned long fck;
130 
131  /* dividers */
133 };
134 
136  /* rates that we get with dividers below */
137  unsigned long lck;
138  unsigned long pck;
139 
140  /* dividers */
143 };
144 
146  /* rates that we get with dividers below */
147  unsigned long fint;
148  unsigned long clkin4ddr;
149  unsigned long clkin;
150  unsigned long dsi_pll_hsdiv_dispc_clk; /* OMAP3: DSI1_PLL_CLK
151  * OMAP4: PLLx_CLK1 */
152  unsigned long dsi_pll_hsdiv_dsi_clk; /* OMAP3: DSI2_PLL_CLK
153  * OMAP4: PLLx_CLK2 */
154  unsigned long lp_clk;
155 
156  /* dividers */
159  u16 regm_dispc; /* OMAP3: REGM3
160  * OMAP4: REGM4 */
161  u16 regm_dsi; /* OMAP3: REGM4
162  * OMAP4: REGM5 */
164 };
165 
166 struct reg_field {
170 };
171 
174 
175  bool stallmode;
177 
179 
181 
183 };
184 
185 struct seq_file;
186 struct platform_device;
187 
188 /* core */
189 const char *dss_get_default_display_name(void);
190 struct bus_type *dss_get_bus(void);
191 struct regulator *dss_get_vdds_dsi(void);
192 struct regulator *dss_get_vdds_sdi(void);
193 int dss_get_ctx_loss_count(struct device *dev);
194 int dss_dsi_enable_pads(int dsi_id, unsigned lane_mask);
195 void dss_dsi_disable_pads(int dsi_id, unsigned lane_mask);
196 int dss_set_min_bus_tput(struct device *dev, unsigned long tput);
197 int dss_debugfs_create_file(const char *name, void (*write)(struct seq_file *));
198 
199 struct omap_dss_device *dss_alloc_and_init_device(struct device *parent);
202 void dss_unregister_child_devices(struct device *parent);
205  const struct omap_dss_device *src);
206 
207 /* apply */
208 void dss_apply_init(void);
210 int dss_mgr_wait_for_go_ovl(struct omap_overlay *ovl);
213 
214 int dss_mgr_enable(struct omap_overlay_manager *mgr);
215 void dss_mgr_disable(struct omap_overlay_manager *mgr);
216 int dss_mgr_set_info(struct omap_overlay_manager *mgr,
218 void dss_mgr_get_info(struct omap_overlay_manager *mgr,
221  struct omap_dss_device *dssdev);
224  struct omap_dss_output *output);
227  const struct omap_video_timings *timings);
229  const struct dss_lcd_mgr_config *config);
231 
232 bool dss_ovl_is_enabled(struct omap_overlay *ovl);
233 int dss_ovl_enable(struct omap_overlay *ovl);
234 int dss_ovl_disable(struct omap_overlay *ovl);
235 int dss_ovl_set_info(struct omap_overlay *ovl,
236  struct omap_overlay_info *info);
237 void dss_ovl_get_info(struct omap_overlay *ovl,
238  struct omap_overlay_info *info);
239 int dss_ovl_set_manager(struct omap_overlay *ovl,
240  struct omap_overlay_manager *mgr);
241 int dss_ovl_unset_manager(struct omap_overlay *ovl);
242 
243 /* output */
247 
248 /* display */
249 int dss_suspend_all_devices(void);
250 int dss_resume_all_devices(void);
251 void dss_disable_all_devices(void);
252 
254  struct omap_dss_device *dssdev);
256  struct omap_dss_device *dssdev);
257 
258 /* manager */
262  const struct omap_overlay_manager_info *info);
264  const struct omap_video_timings *timings);
265 int dss_mgr_check(struct omap_overlay_manager *mgr,
267  const struct omap_video_timings *mgr_timings,
268  const struct dss_lcd_mgr_config *config,
269  struct omap_overlay_info **overlay_infos);
270 
271 static inline bool dss_mgr_is_lcd(enum omap_channel id)
272 {
273  if (id == OMAP_DSS_CHANNEL_LCD || id == OMAP_DSS_CHANNEL_LCD2 ||
274  id == OMAP_DSS_CHANNEL_LCD3)
275  return true;
276  else
277  return false;
278 }
279 
281  struct platform_device *pdev);
283 
284 /* overlay */
288 int dss_ovl_simple_check(struct omap_overlay *ovl,
289  const struct omap_overlay_info *info);
290 int dss_ovl_check(struct omap_overlay *ovl, struct omap_overlay_info *info,
291  const struct omap_video_timings *mgr_timings);
293  enum omap_color_mode mode);
294 int dss_overlay_kobj_init(struct omap_overlay *ovl,
295  struct platform_device *pdev);
296 void dss_overlay_kobj_uninit(struct omap_overlay *ovl);
297 
298 /* DSS */
300 void dss_uninit_platform_driver(void);
301 
304 enum dss_hdmi_venc_clk_source_select dss_get_hdmi_venc_clk_source(void);
307 
308 #if defined(CONFIG_DEBUG_FS) && defined(CONFIG_OMAP2_DSS_DEBUG_SUPPORT)
309 void dss_debug_dump_clocks(struct seq_file *s);
310 #endif
311 
312 void dss_sdi_init(int datapairs);
313 int dss_sdi_enable(void);
314 void dss_sdi_disable(void);
315 
317 void dss_select_dsi_clk_source(int dsi_module,
318  enum omap_dss_clk_source clk_src);
319 void dss_select_lcd_clk_source(enum omap_channel channel,
320  enum omap_dss_clk_source clk_src);
322 enum omap_dss_clk_source dss_get_dsi_clk_source(int dsi_module);
324 
326 void dss_set_dac_pwrdn_bgz(bool enable);
327 
328 unsigned long dss_get_dpll4_rate(void);
329 int dss_set_clock_div(struct dss_clock_info *cinfo);
330 int dss_calc_clock_div(unsigned long req_pck, struct dss_clock_info *dss_cinfo,
331  struct dispc_clock_info *dispc_cinfo);
332 
333 /* SDI */
334 int sdi_init_platform_driver(void) __init;
336 
337 /* DSI */
338 #ifdef CONFIG_OMAP2_DSS_DSI
339 
340 struct dentry;
341 struct file_operations;
342 
343 int dsi_init_platform_driver(void) __init;
344 void dsi_uninit_platform_driver(void) __exit;
345 
348 
350 
351 void dsi_irq_handler(void);
353 
356  struct dsi_clock_info *cinfo);
358  unsigned long req_pck, struct dsi_clock_info *cinfo,
359  struct dispc_clock_info *dispc_cinfo);
360 int dsi_pll_init(struct platform_device *dsidev, bool enable_hsclk,
361  bool enable_hsdiv);
362 void dsi_pll_uninit(struct platform_device *dsidev, bool disconnect_lanes);
366 #else
367 static inline int dsi_runtime_get(struct platform_device *dsidev)
368 {
369  return 0;
370 }
371 static inline void dsi_runtime_put(struct platform_device *dsidev)
372 {
373 }
374 static inline u8 dsi_get_pixel_size(enum omap_dss_dsi_pixel_format fmt)
375 {
376  WARN("%s: DSI not compiled in, returning pixel_size as 0\n", __func__);
377  return 0;
378 }
379 static inline unsigned long dsi_get_pll_hsdiv_dispc_rate(struct platform_device *dsidev)
380 {
381  WARN("%s: DSI not compiled in, returning rate as 0\n", __func__);
382  return 0;
383 }
384 static inline int dsi_pll_set_clock_div(struct platform_device *dsidev,
385  struct dsi_clock_info *cinfo)
386 {
387  WARN("%s: DSI not compiled in\n", __func__);
388  return -ENODEV;
389 }
390 static inline int dsi_pll_calc_clock_div_pck(struct platform_device *dsidev,
391  unsigned long req_pck,
392  struct dsi_clock_info *dsi_cinfo,
393  struct dispc_clock_info *dispc_cinfo)
394 {
395  WARN("%s: DSI not compiled in\n", __func__);
396  return -ENODEV;
397 }
398 static inline int dsi_pll_init(struct platform_device *dsidev,
399  bool enable_hsclk, bool enable_hsdiv)
400 {
401  WARN("%s: DSI not compiled in\n", __func__);
402  return -ENODEV;
403 }
404 static inline void dsi_pll_uninit(struct platform_device *dsidev,
405  bool disconnect_lanes)
406 {
407 }
408 static inline void dsi_wait_pll_hsdiv_dispc_active(struct platform_device *dsidev)
409 {
410 }
411 static inline void dsi_wait_pll_hsdiv_dsi_active(struct platform_device *dsidev)
412 {
413 }
414 static inline struct platform_device *dsi_get_dsidev_from_id(int module)
415 {
416  WARN("%s: DSI not compiled in, returning platform device as NULL\n",
417  __func__);
418  return NULL;
419 }
420 #endif
421 
422 /* DPI */
423 int dpi_init_platform_driver(void) __init;
424 void dpi_uninit_platform_driver(void) __exit;
425 
426 /* DISPC */
427 int dispc_init_platform_driver(void) __init;
428 void dispc_uninit_platform_driver(void) __exit;
430 void dispc_irq_handler(void);
431 
432 int dispc_runtime_get(void);
433 void dispc_runtime_put(void);
434 
435 void dispc_enable_sidle(void);
436 void dispc_disable_sidle(void);
437 
438 void dispc_lcd_enable_signal_polarity(bool act_high);
440 void dispc_pck_free_enable(bool enable);
441 void dispc_enable_fifomerge(bool enable);
442 void dispc_enable_gamma_table(bool enable);
444 
445 bool dispc_mgr_timings_ok(enum omap_channel channel,
446  const struct omap_video_timings *timings);
447 unsigned long dispc_fclk_rate(void);
448 void dispc_find_clk_divs(unsigned long req_pck, unsigned long fck,
449  struct dispc_clock_info *cinfo);
450 int dispc_calc_clock_rates(unsigned long dispc_fclk_rate,
451  struct dispc_clock_info *cinfo);
452 
453 
456  u32 *fifo_low, u32 *fifo_high, bool use_fifomerge,
457  bool manual_update);
459  bool replication, const struct omap_video_timings *mgr_timings,
460  bool mem_to_mem);
461 int dispc_ovl_enable(enum omap_plane plane, bool enable);
462 void dispc_ovl_set_channel_out(enum omap_plane plane,
463  enum omap_channel channel);
464 
465 void dispc_mgr_enable_fifohandcheck(enum omap_channel channel, bool enable);
468 bool dispc_mgr_go_busy(enum omap_channel channel);
469 void dispc_mgr_go(enum omap_channel channel);
470 bool dispc_mgr_is_enabled(enum omap_channel channel);
471 void dispc_mgr_enable(enum omap_channel channel, bool enable);
472 bool dispc_mgr_is_channel_enabled(enum omap_channel channel);
474 void dispc_mgr_enable_stallmode(enum omap_channel channel, bool enable);
476 void dispc_mgr_set_lcd_type_tft(enum omap_channel channel);
477 void dispc_mgr_set_timings(enum omap_channel channel,
478  struct omap_video_timings *timings);
479 unsigned long dispc_mgr_lclk_rate(enum omap_channel channel);
480 unsigned long dispc_mgr_pclk_rate(enum omap_channel channel);
481 unsigned long dispc_core_clk_rate(void);
482 void dispc_mgr_set_clock_div(enum omap_channel channel,
483  struct dispc_clock_info *cinfo);
484 int dispc_mgr_get_clock_div(enum omap_channel channel,
485  struct dispc_clock_info *cinfo);
486 void dispc_mgr_setup(enum omap_channel channel,
488 
490 bool dispc_wb_go_busy(void);
491 void dispc_wb_go(void);
492 void dispc_wb_enable(bool enable);
493 bool dispc_wb_is_enabled(void);
496  bool mem_to_mem, const struct omap_video_timings *timings);
497 
498 /* VENC */
499 #ifdef CONFIG_OMAP2_DSS_VENC
500 int venc_init_platform_driver(void) __init;
501 void venc_uninit_platform_driver(void) __exit;
502 unsigned long venc_get_pixel_clock(void);
503 #else
504 static inline unsigned long venc_get_pixel_clock(void)
505 {
506  WARN("%s: VENC not compiled in, returning pclk as 0\n", __func__);
507  return 0;
508 }
509 #endif
513  struct omap_video_timings *timings);
515  struct omap_video_timings *timings);
519  enum omap_dss_venc_type type);
521  bool invert_polarity);
522 int venc_panel_init(void);
523 void venc_panel_exit(void);
524 
525 /* HDMI */
526 #ifdef CONFIG_OMAP4_DSS_HDMI
527 int hdmi_init_platform_driver(void) __init;
528 void hdmi_uninit_platform_driver(void) __exit;
529 unsigned long hdmi_get_pixel_clock(void);
530 #else
531 static inline unsigned long hdmi_get_pixel_clock(void)
532 {
533  WARN("%s: HDMI not compiled in, returning pclk as 0\n", __func__);
534  return 0;
535 }
536 #endif
540  struct omap_video_timings *timings);
542  struct omap_video_timings *timings);
543 int omapdss_hdmi_read_edid(u8 *buf, int len);
544 bool omapdss_hdmi_detect(void);
545 int hdmi_panel_init(void);
546 void hdmi_panel_exit(void);
547 #ifdef CONFIG_OMAP4_DSS_HDMI_AUDIO
548 int hdmi_audio_enable(void);
549 void hdmi_audio_disable(void);
550 int hdmi_audio_start(void);
551 void hdmi_audio_stop(void);
552 bool hdmi_mode_has_audio(void);
553 int hdmi_audio_config(struct omap_dss_audio *audio);
554 #endif
555 
556 /* RFBI */
557 int rfbi_init_platform_driver(void) __init;
558 void rfbi_uninit_platform_driver(void) __exit;
559 
560 
561 #ifdef CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS
562 static inline void dss_collect_irq_stats(u32 irqstatus, unsigned *irq_arr)
563 {
564  int b;
565  for (b = 0; b < 32; ++b) {
566  if (irqstatus & (1 << b))
567  irq_arr[b]++;
568  }
569 }
570 #endif
571 
572 #endif