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dvma.h File Reference

Go to the source code of this file.

Data Structures

struct  sparc_dma_registers
 
struct  Linux_SBus_DMA
 

Macros

#define DVMA_PAGE_SHIFT   13
 
#define DVMA_PAGE_SIZE   (1UL << DVMA_PAGE_SHIFT)
 
#define DVMA_PAGE_MASK   (~(DVMA_PAGE_SIZE-1))
 
#define DVMA_PAGE_ALIGN(addr)   ALIGN(addr, DVMA_PAGE_SIZE)
 
#define dvma_malloc(x)   dvma_malloc_align(x, 0)
 
#define dvma_map(x, y)   dvma_map_align(x, y, 0)
 
#define dvma_map_vme(x, y)   (dvma_map(x, y) & 0xfffff)
 
#define dvma_map_align_vme(x, y, z)   (dvma_map_align (x, y, z) & 0xfffff)
 
#define DVMA_START   0x0
 
#define DVMA_END   0xf00000
 
#define DVMA_SIZE   (DVMA_END-DVMA_START)
 
#define IOMMU_TOTAL_ENTRIES   2048
 
#define IOMMU_ENTRIES   (IOMMU_TOTAL_ENTRIES - 0x80)
 
#define dvma_vtob(x)   ((unsigned long)(x) & 0x00ffffff)
 
#define dvma_btov(x)   ((unsigned long)(x) | 0xff000000)
 
#define DMA_HASCOUNT(rev)   ((rev)==dvmaesc1)
 
#define DMA_ISBROKEN(dma)   ((dma)->revision == dvmarev1)
 
#define DMA_ISESC1(dma)   ((dma)->revision == dvmaesc1)
 
#define DMA_DEVICE_ID   0xf0000000 /* Device identification bits */
 
#define DMA_VERS0   0x00000000 /* Sunray DMA version */
 
#define DMA_ESCV1   0x40000000 /* DMA ESC Version 1 */
 
#define DMA_VERS1   0x80000000 /* DMA rev 1 */
 
#define DMA_VERS2   0xa0000000 /* DMA rev 2 */
 
#define DMA_VERHME   0xb0000000 /* DMA hme gate array */
 
#define DMA_VERSPLUS   0x90000000 /* DMA rev 1 PLUS */
 
#define DMA_HNDL_INTR   0x00000001 /* An IRQ needs to be handled */
 
#define DMA_HNDL_ERROR   0x00000002 /* We need to take an error */
 
#define DMA_FIFO_ISDRAIN   0x0000000c /* The DMA FIFO is draining */
 
#define DMA_INT_ENAB   0x00000010 /* Turn on interrupts */
 
#define DMA_FIFO_INV   0x00000020 /* Invalidate the FIFO */
 
#define DMA_ACC_SZ_ERR   0x00000040 /* The access size was bad */
 
#define DMA_FIFO_STDRAIN   0x00000040 /* DMA_VERS1 Drain the FIFO */
 
#define DMA_RST_SCSI   0x00000080 /* Reset the SCSI controller */
 
#define DMA_RST_ENET   DMA_RST_SCSI /* Reset the ENET controller */
 
#define DMA_ST_WRITE   0x00000100 /* write from device to memory */
 
#define DMA_ENABLE   0x00000200 /* Fire up DMA, handle requests */
 
#define DMA_PEND_READ   0x00000400 /* DMA_VERS1/0/PLUS Pending Read */
 
#define DMA_ESC_BURST   0x00000800 /* 1=16byte 0=32byte */
 
#define DMA_READ_AHEAD   0x00001800 /* DMA read ahead partial longword */
 
#define DMA_DSBL_RD_DRN   0x00001000 /* No EC drain on slave reads */
 
#define DMA_BCNT_ENAB   0x00002000 /* If on, use the byte counter */
 
#define DMA_TERM_CNTR   0x00004000 /* Terminal counter */
 
#define DMA_CSR_DISAB   0x00010000 /* No FIFO drains during csr */
 
#define DMA_SCSI_DISAB   0x00020000 /* No FIFO drains during reg */
 
#define DMA_DSBL_WR_INV   0x00020000 /* No EC inval. on slave writes */
 
#define DMA_ADD_ENABLE   0x00040000 /* Special ESC DVMA optimization */
 
#define DMA_E_BURST8   0x00040000 /* ENET: SBUS r/w burst size */
 
#define DMA_BRST_SZ   0x000c0000 /* SCSI: SBUS r/w burst size */
 
#define DMA_BRST64   0x00080000 /* SCSI: 64byte bursts (HME on UltraSparc only) */
 
#define DMA_BRST32   0x00040000 /* SCSI: 32byte bursts */
 
#define DMA_BRST16   0x00000000 /* SCSI: 16byte bursts */
 
#define DMA_BRST0   0x00080000 /* SCSI: no bursts (non-HME gate arrays) */
 
#define DMA_ADDR_DISAB   0x00100000 /* No FIFO drains during addr */
 
#define DMA_2CLKS   0x00200000 /* Each transfer = 2 clock ticks */
 
#define DMA_3CLKS   0x00400000 /* Each transfer = 3 clock ticks */
 
#define DMA_EN_ENETAUI   DMA_3CLKS /* Put lance into AUI-cable mode */
 
#define DMA_CNTR_DISAB   0x00800000 /* No IRQ when DMA_TERM_CNTR set */
 
#define DMA_AUTO_NADDR   0x01000000 /* Use "auto nxt addr" feature */
 
#define DMA_SCSI_ON   0x02000000 /* Enable SCSI dma */
 
#define DMA_PARITY_OFF   0x02000000 /* HME: disable parity checking */
 
#define DMA_LOADED_ADDR   0x04000000 /* Address has been loaded */
 
#define DMA_LOADED_NADDR   0x08000000 /* Next address has been loaded */
 
#define DMA_BURST1   0x01
 
#define DMA_BURST2   0x02
 
#define DMA_BURST4   0x04
 
#define DMA_BURST8   0x08
 
#define DMA_BURST16   0x10
 
#define DMA_BURST32   0x20
 
#define DMA_BURST64   0x40
 
#define DMA_BURSTBITS   0x7f
 
#define DMA_MAXEND(addr)   (0x01000000UL-(((unsigned long)(addr))&0x00ffffffUL))
 
#define DMA_ERROR_P(regs)   ((((regs)->cond_reg) & DMA_HNDL_ERROR))
 
#define DMA_IRQ_P(regs)   ((((regs)->cond_reg) & (DMA_HNDL_INTR | DMA_HNDL_ERROR)))
 
#define DMA_WRITE_P(regs)   ((((regs)->cond_reg) & DMA_ST_WRITE))
 
#define DMA_OFF(regs)   ((((regs)->cond_reg) &= (~DMA_ENABLE)))
 
#define DMA_INTSOFF(regs)   ((((regs)->cond_reg) &= (~DMA_INT_ENAB)))
 
#define DMA_INTSON(regs)   ((((regs)->cond_reg) |= (DMA_INT_ENAB)))
 
#define DMA_PUNTFIFO(regs)   ((((regs)->cond_reg) |= DMA_FIFO_INV))
 
#define DMA_SETSTART(regs, addr)   ((((regs)->st_addr) = (char *) addr))
 
#define DMA_BEGINDMA_W(regs)   ((((regs)->cond_reg |= (DMA_ST_WRITE|DMA_ENABLE|DMA_INT_ENAB))))
 
#define DMA_BEGINDMA_R(regs)   ((((regs)->cond_reg |= ((DMA_ENABLE|DMA_INT_ENAB)&(~DMA_ST_WRITE)))))
 
#define DMA_IRQ_ENTRY(dma, dregs)
 
#define DMA_IRQ_EXIT(dma, dregs)
 
#define DMA_RESET(dma)
 

Enumerations

enum  dvma_rev {
  dvmarev0, dvmaesc1, dvmarev1, dvmarev2,
  dvmarev3, dvmarevplus, dvmahme, dvmarev0,
  dvmaesc1, dvmarev1, dvmarev2, dvmarev3,
  dvmarevplus, dvmahme
}
 

Functions

void dvma_init (void)
 
int dvma_map_iommu (unsigned long kaddr, unsigned long baddr, int len)
 
unsigned long dvma_map_align (unsigned long kaddr, int len, int align)
 
voiddvma_malloc_align (unsigned long len, unsigned long align)
 
void dvma_unmap (void *baddr)
 
void dvma_free (void *vaddr)
 
int dvma_map_cpu (unsigned long kaddr, unsigned long vaddr, int len)
 

Variables

struct Linux_SBus_DMAdma_chain
 

Macro Definition Documentation

#define DMA_2CLKS   0x00200000 /* Each transfer = 2 clock ticks */

Definition at line 172 of file dvma.h.

#define DMA_3CLKS   0x00400000 /* Each transfer = 3 clock ticks */

Definition at line 173 of file dvma.h.

#define DMA_ACC_SZ_ERR   0x00000040 /* The access size was bad */

Definition at line 149 of file dvma.h.

#define DMA_ADD_ENABLE   0x00040000 /* Special ESC DVMA optimization */

Definition at line 164 of file dvma.h.

#define DMA_ADDR_DISAB   0x00100000 /* No FIFO drains during addr */

Definition at line 171 of file dvma.h.

#define DMA_AUTO_NADDR   0x01000000 /* Use "auto nxt addr" feature */

Definition at line 176 of file dvma.h.

#define DMA_BCNT_ENAB   0x00002000 /* If on, use the byte counter */

Definition at line 159 of file dvma.h.

#define DMA_BEGINDMA_R (   regs)    ((((regs)->cond_reg |= ((DMA_ENABLE|DMA_INT_ENAB)&(~DMA_ST_WRITE)))))

Definition at line 206 of file dvma.h.

#define DMA_BEGINDMA_W (   regs)    ((((regs)->cond_reg |= (DMA_ST_WRITE|DMA_ENABLE|DMA_INT_ENAB))))

Definition at line 204 of file dvma.h.

#define DMA_BRST0   0x00080000 /* SCSI: no bursts (non-HME gate arrays) */

Definition at line 170 of file dvma.h.

#define DMA_BRST16   0x00000000 /* SCSI: 16byte bursts */

Definition at line 169 of file dvma.h.

#define DMA_BRST32   0x00040000 /* SCSI: 32byte bursts */

Definition at line 168 of file dvma.h.

#define DMA_BRST64   0x00080000 /* SCSI: 64byte bursts (HME on UltraSparc only) */

Definition at line 167 of file dvma.h.

#define DMA_BRST_SZ   0x000c0000 /* SCSI: SBUS r/w burst size */

Definition at line 166 of file dvma.h.

#define DMA_BURST1   0x01

Definition at line 183 of file dvma.h.

#define DMA_BURST16   0x10

Definition at line 187 of file dvma.h.

#define DMA_BURST2   0x02

Definition at line 184 of file dvma.h.

#define DMA_BURST32   0x20

Definition at line 188 of file dvma.h.

#define DMA_BURST4   0x04

Definition at line 185 of file dvma.h.

#define DMA_BURST64   0x40

Definition at line 189 of file dvma.h.

#define DMA_BURST8   0x08

Definition at line 186 of file dvma.h.

#define DMA_BURSTBITS   0x7f

Definition at line 190 of file dvma.h.

#define DMA_CNTR_DISAB   0x00800000 /* No IRQ when DMA_TERM_CNTR set */

Definition at line 175 of file dvma.h.

#define DMA_CSR_DISAB   0x00010000 /* No FIFO drains during csr */

Definition at line 161 of file dvma.h.

#define DMA_DEVICE_ID   0xf0000000 /* Device identification bits */

Definition at line 136 of file dvma.h.

#define DMA_DSBL_RD_DRN   0x00001000 /* No EC drain on slave reads */

Definition at line 158 of file dvma.h.

#define DMA_DSBL_WR_INV   0x00020000 /* No EC inval. on slave writes */

Definition at line 163 of file dvma.h.

#define DMA_E_BURST8   0x00040000 /* ENET: SBUS r/w burst size */

Definition at line 165 of file dvma.h.

#define DMA_EN_ENETAUI   DMA_3CLKS /* Put lance into AUI-cable mode */

Definition at line 174 of file dvma.h.

#define DMA_ENABLE   0x00000200 /* Fire up DMA, handle requests */

Definition at line 154 of file dvma.h.

#define DMA_ERROR_P (   regs)    ((((regs)->cond_reg) & DMA_HNDL_ERROR))

Definition at line 196 of file dvma.h.

#define DMA_ESC_BURST   0x00000800 /* 1=16byte 0=32byte */

Definition at line 156 of file dvma.h.

#define DMA_ESCV1   0x40000000 /* DMA ESC Version 1 */

Definition at line 138 of file dvma.h.

#define DMA_FIFO_INV   0x00000020 /* Invalidate the FIFO */

Definition at line 148 of file dvma.h.

#define DMA_FIFO_ISDRAIN   0x0000000c /* The DMA FIFO is draining */

Definition at line 146 of file dvma.h.

#define DMA_FIFO_STDRAIN   0x00000040 /* DMA_VERS1 Drain the FIFO */

Definition at line 150 of file dvma.h.

#define DMA_HASCOUNT (   rev)    ((rev)==dvmaesc1)

Definition at line 106 of file dvma.h.

#define DMA_HNDL_ERROR   0x00000002 /* We need to take an error */

Definition at line 145 of file dvma.h.

#define DMA_HNDL_INTR   0x00000001 /* An IRQ needs to be handled */

Definition at line 144 of file dvma.h.

#define DMA_INT_ENAB   0x00000010 /* Turn on interrupts */

Definition at line 147 of file dvma.h.

#define DMA_INTSOFF (   regs)    ((((regs)->cond_reg) &= (~DMA_INT_ENAB)))

Definition at line 200 of file dvma.h.

#define DMA_INTSON (   regs)    ((((regs)->cond_reg) |= (DMA_INT_ENAB)))

Definition at line 201 of file dvma.h.

#define DMA_IRQ_ENTRY (   dma,
  dregs 
)
Value:
do { \
if(DMA_ISBROKEN(dma)) DMA_INTSOFF(dregs); \
} while (0)

Definition at line 214 of file dvma.h.

#define DMA_IRQ_EXIT (   dma,
  dregs 
)
Value:
do { \
if(DMA_ISBROKEN(dma)) DMA_INTSON(dregs); \
} while(0)

Definition at line 218 of file dvma.h.

#define DMA_IRQ_P (   regs)    ((((regs)->cond_reg) & (DMA_HNDL_INTR | DMA_HNDL_ERROR)))

Definition at line 197 of file dvma.h.

#define DMA_ISBROKEN (   dma)    ((dma)->revision == dvmarev1)

Definition at line 131 of file dvma.h.

#define DMA_ISESC1 (   dma)    ((dma)->revision == dvmaesc1)

Definition at line 132 of file dvma.h.

#define DMA_LOADED_ADDR   0x04000000 /* Address has been loaded */

Definition at line 179 of file dvma.h.

#define DMA_LOADED_NADDR   0x08000000 /* Next address has been loaded */

Definition at line 180 of file dvma.h.

#define DMA_MAXEND (   addr)    (0x01000000UL-(((unsigned long)(addr))&0x00ffffffUL))

Definition at line 193 of file dvma.h.

#define DMA_OFF (   regs)    ((((regs)->cond_reg) &= (~DMA_ENABLE)))

Definition at line 199 of file dvma.h.

#define DMA_PARITY_OFF   0x02000000 /* HME: disable parity checking */

Definition at line 178 of file dvma.h.

#define DMA_PEND_READ   0x00000400 /* DMA_VERS1/0/PLUS Pending Read */

Definition at line 155 of file dvma.h.

#define DMA_PUNTFIFO (   regs)    ((((regs)->cond_reg) |= DMA_FIFO_INV))

Definition at line 202 of file dvma.h.

#define DMA_READ_AHEAD   0x00001800 /* DMA read ahead partial longword */

Definition at line 157 of file dvma.h.

#define DMA_RESET (   dma)
Value:
do { \
/* Let the current FIFO drain itself */ \
sparc_dma_pause(regs, (DMA_FIFO_ISDRAIN)); \
/* Reset the logic */ \
regs->cond_reg |= (DMA_RST_SCSI); /* assert */ \
__delay(400); /* let the bits set ;) */ \
regs->cond_reg &= ~(DMA_RST_SCSI); /* de-assert */ \
sparc_dma_enable_interrupts(regs); /* Re-enable interrupts */ \
/* Enable FAST transfers if available */ \
if(dma->revision>dvmarev1) regs->cond_reg |= DMA_3CLKS; \
dma->running = 0; \
} while(0)

Definition at line 223 of file dvma.h.

#define DMA_RST_ENET   DMA_RST_SCSI /* Reset the ENET controller */

Definition at line 152 of file dvma.h.

#define DMA_RST_SCSI   0x00000080 /* Reset the SCSI controller */

Definition at line 151 of file dvma.h.

#define DMA_SCSI_DISAB   0x00020000 /* No FIFO drains during reg */

Definition at line 162 of file dvma.h.

#define DMA_SCSI_ON   0x02000000 /* Enable SCSI dma */

Definition at line 177 of file dvma.h.

#define DMA_SETSTART (   regs,
  addr 
)    ((((regs)->st_addr) = (char *) addr))

Definition at line 203 of file dvma.h.

#define DMA_ST_WRITE   0x00000100 /* write from device to memory */

Definition at line 153 of file dvma.h.

#define DMA_TERM_CNTR   0x00004000 /* Terminal counter */

Definition at line 160 of file dvma.h.

#define DMA_VERHME   0xb0000000 /* DMA hme gate array */

Definition at line 141 of file dvma.h.

#define DMA_VERS0   0x00000000 /* Sunray DMA version */

Definition at line 137 of file dvma.h.

#define DMA_VERS1   0x80000000 /* DMA rev 1 */

Definition at line 139 of file dvma.h.

#define DMA_VERS2   0xa0000000 /* DMA rev 2 */

Definition at line 140 of file dvma.h.

#define DMA_VERSPLUS   0x90000000 /* DMA rev 1 PLUS */

Definition at line 142 of file dvma.h.

#define DMA_WRITE_P (   regs)    ((((regs)->cond_reg) & DMA_ST_WRITE))

Definition at line 198 of file dvma.h.

#define dvma_btov (   x)    ((unsigned long)(x) | 0xff000000)

Definition at line 78 of file dvma.h.

#define DVMA_END   0xf00000

Definition at line 71 of file dvma.h.

#define dvma_malloc (   x)    dvma_malloc_align(x, 0)

Definition at line 22 of file dvma.h.

#define dvma_map (   x,
  y 
)    dvma_map_align(x, y, 0)

Definition at line 23 of file dvma.h.

#define dvma_map_align_vme (   x,
  y,
 
)    (dvma_map_align (x, y, z) & 0xfffff)

Definition at line 25 of file dvma.h.

#define dvma_map_vme (   x,
  y 
)    (dvma_map(x, y) & 0xfffff)

Definition at line 24 of file dvma.h.

#define DVMA_PAGE_ALIGN (   addr)    ALIGN(addr, DVMA_PAGE_SIZE)

Definition at line 16 of file dvma.h.

#define DVMA_PAGE_MASK   (~(DVMA_PAGE_SIZE-1))

Definition at line 15 of file dvma.h.

#define DVMA_PAGE_SHIFT   13

Definition at line 13 of file dvma.h.

#define DVMA_PAGE_SIZE   (1UL << DVMA_PAGE_SHIFT)

Definition at line 14 of file dvma.h.

#define DVMA_SIZE   (DVMA_END-DVMA_START)

Definition at line 72 of file dvma.h.

#define DVMA_START   0x0

Definition at line 70 of file dvma.h.

#define dvma_vtob (   x)    ((unsigned long)(x) & 0x00ffffff)

Definition at line 77 of file dvma.h.

#define IOMMU_ENTRIES   (IOMMU_TOTAL_ENTRIES - 0x80)

Definition at line 75 of file dvma.h.

#define IOMMU_TOTAL_ENTRIES   2048

Definition at line 73 of file dvma.h.

Enumeration Type Documentation

enum dvma_rev
Enumerator:
dvmarev0 
dvmaesc1 
dvmarev1 
dvmarev2 
dvmarev3 
dvmarevplus 
dvmahme 
dvmarev0 
dvmaesc1 
dvmarev1 
dvmarev2 
dvmarev3 
dvmarevplus 
dvmahme 

Definition at line 96 of file dvma.h.

Function Documentation

void dvma_free ( void vaddr)

Definition at line 375 of file sun3dvma.c.

void dvma_init ( void  )

Definition at line 248 of file sun3dvma.c.

void* dvma_malloc_align ( unsigned long  len,
unsigned long  align 
)

Definition at line 335 of file sun3dvma.c.

unsigned long dvma_map_align ( unsigned long  kaddr,
int  len,
int  align 
)
inline

Definition at line 278 of file sun3dvma.c.

int dvma_map_cpu ( unsigned long  kaddr,
unsigned long  vaddr,
int  len 
)
inline

Definition at line 82 of file dvma.c.

int dvma_map_iommu ( unsigned long  kaddr,
unsigned long  baddr,
int  len 
)
inline

Definition at line 44 of file dvma.c.

void dvma_unmap ( void baddr)

Definition at line 319 of file sun3dvma.c.

Variable Documentation

struct Linux_SBus_DMA* dma_chain