Macros
#define	IGP01E1000_PHY_PORT_CONFIG 0x10 /* Port Config */

#define	IGP01E1000_PHY_PORT_STATUS 0x11 /* Status */

#define	IGP01E1000_PHY_PORT_CTRL 0x12 /* Control */

#define	IGP01E1000_PHY_LINK_HEALTH 0x13 /* PHY Link Health */

#define	IGP02E1000_PHY_POWER_MGMT 0x19 /* Power Management */

#define	IGP01E1000_PHY_PAGE_SELECT 0x1F /* Page Select */

#define	IGP01E1000_PHY_PCS_INIT_REG 0x00B4

#define	IGP01E1000_PHY_POLARITY_MASK 0x0078

#define	IGP01E1000_PSCR_AUTO_MDIX 0x1000

#define	IGP01E1000_PSCR_FORCE_MDI_MDIX 0x2000 /* 0=MDI, 1=MDIX */

#define	IGP01E1000_PSCFR_SMART_SPEED 0x0080

#define	I82580_ADDR_REG 16

#define	I82580_CFG_REG 22

#define	I82580_CFG_ASSERT_CRS_ON_TX (1 << 15)

#define	I82580_CFG_ENABLE_DOWNSHIFT (3 << 10) /* auto downshift 100/10 */

#define	I82580_CTRL_REG 23

#define	I82580_CTRL_DOWNSHIFT_MASK (7 << 10)

#define	I82580_PHY_CTRL_2 18

#define	I82580_PHY_LBK_CTRL 19

#define	I82580_PHY_STATUS_2 26

#define	I82580_PHY_DIAG_STATUS 31

#define	I82580_PHY_STATUS2_REV_POLARITY 0x0400

#define	I82580_PHY_STATUS2_MDIX 0x0800

#define	I82580_PHY_STATUS2_SPEED_MASK 0x0300

#define	I82580_PHY_STATUS2_SPEED_1000MBPS 0x0200

#define	I82580_PHY_STATUS2_SPEED_100MBPS 0x0100

#define	I82580_PHY_CTRL2_MANUAL_MDIX 0x0200

#define	I82580_PHY_CTRL2_AUTO_MDI_MDIX 0x0400

#define	I82580_PHY_CTRL2_MDIX_CFG_MASK 0x0600

#define	I82580_DSTATUS_CABLE_LENGTH 0x03FC

#define	I82580_DSTATUS_CABLE_LENGTH_SHIFT 2

#define	E1000_82580_PHY_POWER_MGMT 0xE14

#define	E1000_82580_PM_SPD 0x0001 /* Smart Power Down */

#define	E1000_82580_PM_D0_LPLU 0x0002 /* For D0a states */

#define	E1000_82580_PM_D3_LPLU 0x0004 /* For all other states */

#define	IGP02E1000_PM_D0_LPLU 0x0002 /* For D0a states */

#define	IGP02E1000_PM_D3_LPLU 0x0004 /* For all other states */

#define	IGP01E1000_PLHR_SS_DOWNGRADE 0x8000

#define	IGP01E1000_PSSR_POLARITY_REVERSED 0x0002

#define	IGP01E1000_PSSR_MDIX 0x0800

#define	IGP01E1000_PSSR_SPEED_MASK 0xC000

#define	IGP01E1000_PSSR_SPEED_1000MBPS 0xC000

#define	IGP02E1000_PHY_CHANNEL_NUM 4

#define	IGP02E1000_PHY_AGC_A 0x11B1

#define	IGP02E1000_PHY_AGC_B 0x12B1

#define	IGP02E1000_PHY_AGC_C 0x14B1

#define	IGP02E1000_PHY_AGC_D 0x18B1

#define	IGP02E1000_AGC_LENGTH_SHIFT 9 /* Course - 15:13, Fine - 12:9 */

#define	IGP02E1000_AGC_LENGTH_MASK 0x7F

#define	IGP02E1000_AGC_RANGE 15

#define	E1000_CABLE_LENGTH_UNDEFINED 0xFF

#define	GS40G_PAGE_SELECT 0x16

#define	GS40G_PAGE_SHIFT 16

#define	GS40G_OFFSET_MASK 0xFFFF

#define	GS40G_PAGE_2 0x20000

#define	GS40G_MAC_REG2 0x15

#define	GS40G_MAC_LB 0x4140

#define	GS40G_MAC_SPEED_1G 0X0006

#define	GS40G_COPPER_SPEC 0x0010

#define	GS40G_CS_POWER_DOWN 0x0002

#define	GS40G_LINE_LB 0x4000

Functions
s32	igb_check_downshift (struct e1000_hw *hw)

s32	igb_check_reset_block (struct e1000_hw *hw)

s32	igb_copper_link_setup_igp (struct e1000_hw *hw)

s32	igb_copper_link_setup_m88 (struct e1000_hw *hw)

s32	igb_copper_link_setup_m88_gen2 (struct e1000_hw *hw)

s32	igb_phy_force_speed_duplex_igp (struct e1000_hw *hw)

s32	igb_phy_force_speed_duplex_m88 (struct e1000_hw *hw)

s32	igb_get_cable_length_m88 (struct e1000_hw *hw)

s32	igb_get_cable_length_m88_gen2 (struct e1000_hw *hw)

s32	igb_get_cable_length_igp_2 (struct e1000_hw *hw)

s32	igb_get_phy_id (struct e1000_hw *hw)

s32	igb_get_phy_info_igp (struct e1000_hw *hw)

s32	igb_get_phy_info_m88 (struct e1000_hw *hw)

s32	igb_phy_sw_reset (struct e1000_hw *hw)

s32	igb_phy_hw_reset (struct e1000_hw *hw)

s32	igb_read_phy_reg_igp (struct e1000_hw hw, u32 offset, u16 data)

s32	igb_set_d3_lplu_state (struct e1000_hw *hw, bool active)

s32	igb_setup_copper_link (struct e1000_hw *hw)

s32	igb_write_phy_reg_igp (struct e1000_hw *hw, u32 offset, u16 data)

s32	igb_phy_has_link (struct e1000_hw hw, u32 iterations, u32 usec_interval, bool success)

void	igb_power_up_phy_copper (struct e1000_hw *hw)

void	igb_power_down_phy_copper (struct e1000_hw *hw)

s32	igb_phy_init_script_igp3 (struct e1000_hw *hw)

s32	igb_read_phy_reg_mdic (struct e1000_hw hw, u32 offset, u16 data)

s32	igb_write_phy_reg_mdic (struct e1000_hw *hw, u32 offset, u16 data)

s32	igb_read_phy_reg_i2c (struct e1000_hw hw, u32 offset, u16 data)

s32	igb_write_phy_reg_i2c (struct e1000_hw *hw, u32 offset, u16 data)

s32	igb_copper_link_setup_82580 (struct e1000_hw *hw)

s32	igb_get_phy_info_82580 (struct e1000_hw *hw)

s32	igb_phy_force_speed_duplex_82580 (struct e1000_hw *hw)

s32	igb_get_cable_length_82580 (struct e1000_hw *hw)

s32	igb_read_phy_reg_gs40g (struct e1000_hw hw, u32 offset, u16 data)

s32	igb_write_phy_reg_gs40g (struct e1000_hw *hw, u32 offset, u16 data)

s32	igb_check_polarity_m88 (struct e1000_hw *hw)

Macro Definition Documentation

#define E1000_82580_PHY_POWER_MGMT 0xE14

Definition at line 123 of file e1000_phy.h.

#define E1000_82580_PM_D0_LPLU 0x0002 /* For D0a states */

Definition at line 125 of file e1000_phy.h.

#define E1000_82580_PM_D3_LPLU 0x0004 /* For all other states */

Definition at line 126 of file e1000_phy.h.

#define E1000_82580_PM_SPD 0x0001 /* Smart Power Down */

Definition at line 124 of file e1000_phy.h.

#define E1000_CABLE_LENGTH_UNDEFINED 0xFF

Definition at line 145 of file e1000_phy.h.

#define GS40G_COPPER_SPEC 0x0010

Definition at line 155 of file e1000_phy.h.

#define GS40G_CS_POWER_DOWN 0x0002

Definition at line 156 of file e1000_phy.h.

#define GS40G_LINE_LB 0x4000

Definition at line 157 of file e1000_phy.h.

#define GS40G_MAC_LB 0x4140

Definition at line 153 of file e1000_phy.h.

#define GS40G_MAC_REG2 0x15

Definition at line 152 of file e1000_phy.h.

#define GS40G_MAC_SPEED_1G 0X0006

Definition at line 154 of file e1000_phy.h.

#define GS40G_OFFSET_MASK 0xFFFF

Definition at line 150 of file e1000_phy.h.

#define GS40G_PAGE_2 0x20000

Definition at line 151 of file e1000_phy.h.

#define GS40G_PAGE_SELECT 0x16

Definition at line 148 of file e1000_phy.h.

#define GS40G_PAGE_SHIFT 16

Definition at line 149 of file e1000_phy.h.

#define I82580_ADDR_REG 16

Definition at line 93 of file e1000_phy.h.

#define I82580_CFG_ASSERT_CRS_ON_TX (1 << 15)

Definition at line 95 of file e1000_phy.h.

#define I82580_CFG_ENABLE_DOWNSHIFT (3 << 10) /* auto downshift 100/10 */

Definition at line 96 of file e1000_phy.h.

#define I82580_CFG_REG 22

Definition at line 94 of file e1000_phy.h.

#define I82580_CTRL_DOWNSHIFT_MASK (7 << 10)

Definition at line 98 of file e1000_phy.h.

#define I82580_CTRL_REG 23

Definition at line 97 of file e1000_phy.h.

#define I82580_DSTATUS_CABLE_LENGTH 0x03FC

Definition at line 119 of file e1000_phy.h.

#define I82580_DSTATUS_CABLE_LENGTH_SHIFT 2

Definition at line 120 of file e1000_phy.h.

#define I82580_PHY_CTRL2_AUTO_MDI_MDIX 0x0400

Definition at line 115 of file e1000_phy.h.

#define I82580_PHY_CTRL2_MANUAL_MDIX 0x0200

Definition at line 114 of file e1000_phy.h.

#define I82580_PHY_CTRL2_MDIX_CFG_MASK 0x0600

Definition at line 116 of file e1000_phy.h.

#define I82580_PHY_CTRL_2 18

Definition at line 101 of file e1000_phy.h.

#define I82580_PHY_DIAG_STATUS 31

Definition at line 104 of file e1000_phy.h.

#define I82580_PHY_LBK_CTRL 19

Definition at line 102 of file e1000_phy.h.

#define I82580_PHY_STATUS2_MDIX 0x0800

Definition at line 108 of file e1000_phy.h.

#define I82580_PHY_STATUS2_REV_POLARITY 0x0400

Definition at line 107 of file e1000_phy.h.

#define I82580_PHY_STATUS2_SPEED_1000MBPS 0x0200

Definition at line 110 of file e1000_phy.h.

#define I82580_PHY_STATUS2_SPEED_100MBPS 0x0100

Definition at line 111 of file e1000_phy.h.

#define I82580_PHY_STATUS2_SPEED_MASK 0x0300

Definition at line 109 of file e1000_phy.h.

#define I82580_PHY_STATUS_2 26

Definition at line 103 of file e1000_phy.h.

#define IGP01E1000_PHY_LINK_HEALTH 0x13 /* PHY Link Health */

Definition at line 84 of file e1000_phy.h.

#define IGP01E1000_PHY_PAGE_SELECT 0x1F /* Page Select */

Definition at line 86 of file e1000_phy.h.

#define IGP01E1000_PHY_PCS_INIT_REG 0x00B4

Definition at line 87 of file e1000_phy.h.

#define IGP01E1000_PHY_POLARITY_MASK 0x0078

Definition at line 88 of file e1000_phy.h.

#define IGP01E1000_PHY_PORT_CONFIG 0x10 /* Port Config */

Definition at line 81 of file e1000_phy.h.

#define IGP01E1000_PHY_PORT_CTRL 0x12 /* Control */

Definition at line 83 of file e1000_phy.h.

#define IGP01E1000_PHY_PORT_STATUS 0x11 /* Status */

Definition at line 82 of file e1000_phy.h.

#define IGP01E1000_PLHR_SS_DOWNGRADE 0x8000

Definition at line 131 of file e1000_phy.h.

#define IGP01E1000_PSCFR_SMART_SPEED 0x0080

Definition at line 91 of file e1000_phy.h.

#define IGP01E1000_PSCR_AUTO_MDIX 0x1000

Definition at line 89 of file e1000_phy.h.

#define IGP01E1000_PSCR_FORCE_MDI_MDIX 0x2000 /* 0=MDI, 1=MDIX */

Definition at line 90 of file e1000_phy.h.

#define IGP01E1000_PSSR_MDIX 0x0800

Definition at line 133 of file e1000_phy.h.

#define IGP01E1000_PSSR_POLARITY_REVERSED 0x0002

Definition at line 132 of file e1000_phy.h.

#define IGP01E1000_PSSR_SPEED_1000MBPS 0xC000

Definition at line 135 of file e1000_phy.h.

#define IGP01E1000_PSSR_SPEED_MASK 0xC000

Definition at line 134 of file e1000_phy.h.

#define IGP02E1000_AGC_LENGTH_MASK 0x7F

Definition at line 142 of file e1000_phy.h.

#define IGP02E1000_AGC_LENGTH_SHIFT 9 /* Course - 15:13, Fine - 12:9 */

Definition at line 141 of file e1000_phy.h.

#define IGP02E1000_AGC_RANGE 15

Definition at line 143 of file e1000_phy.h.

#define IGP02E1000_PHY_AGC_A 0x11B1

Definition at line 137 of file e1000_phy.h.

#define IGP02E1000_PHY_AGC_B 0x12B1

Definition at line 138 of file e1000_phy.h.

#define IGP02E1000_PHY_AGC_C 0x14B1

Definition at line 139 of file e1000_phy.h.

#define IGP02E1000_PHY_AGC_D 0x18B1

Definition at line 140 of file e1000_phy.h.

#define IGP02E1000_PHY_CHANNEL_NUM 4

Definition at line 136 of file e1000_phy.h.

#define IGP02E1000_PHY_POWER_MGMT 0x19 /* Power Management */

Definition at line 85 of file e1000_phy.h.

#define IGP02E1000_PM_D0_LPLU 0x0002 /* For D0a states */

Definition at line 129 of file e1000_phy.h.

#define IGP02E1000_PM_D3_LPLU 0x0004 /* For all other states */

Definition at line 130 of file e1000_phy.h.

Enumeration Type Documentation

enum e1000_ms_type

Enumerator:

e1000_ms_hw_default
e1000_ms_force_master
e1000_ms_force_slave
e1000_ms_auto
e1000_ms_hw_default
e1000_ms_force_master
e1000_ms_force_slave
e1000_ms_auto
e1000_ms_hw_default
e1000_ms_force_master
e1000_ms_force_slave
e1000_ms_auto

Definition at line 31 of file e1000_phy.h.

enum e1000_smart_speed

Enumerator:

e1000_smart_speed_default
e1000_smart_speed_on
e1000_smart_speed_off
e1000_smart_speed_default
e1000_smart_speed_on
e1000_smart_speed_off
e1000_smart_speed_default
e1000_smart_speed_on
e1000_smart_speed_off

Definition at line 38 of file e1000_phy.h.

Function Documentation

s32 igb_check_downshift ( struct e1000_hw * hw )

igb_check_downshift - Checks whether a downshift in speed occurred : pointer to the HW structure

Success returns 0, Failure returns 1

A downshift is detected by querying the PHY link health.

Definition at line 1480 of file e1000_phy.c.

s32 igb_check_polarity_m88 ( struct e1000_hw * hw )

igb_check_polarity_m88 - Checks the polarity. : pointer to the HW structure

Success returns 0, Failure returns -E1000_ERR_PHY (-2)

Polarity is determined based on the PHY specific status register.

Definition at line 1523 of file e1000_phy.c.

s32 igb_check_reset_block ( struct e1000_hw * hw )

igb_check_reset_block - Check if PHY reset is blocked : pointer to the HW structure

Read the PHY management control register and check whether a PHY reset is blocked. If a reset is not blocked return 0, otherwise return E1000_BLK_PHY_RESET (12).

Definition at line 68 of file e1000_phy.c.

s32 igb_copper_link_setup_82580 ( struct e1000_hw * hw )

igb_copper_link_setup_82580 - Setup 82580 PHY for copper link : pointer to the HW structure

Sets up Carrier-sense on Transmit and downshift values.

Definition at line 436 of file e1000_phy.c.

s32 igb_copper_link_setup_igp ( struct e1000_hw * hw )

igb_copper_link_setup_igp - Setup igp PHY's for copper link : pointer to the HW structure

Sets up LPLU, MDI/MDI-X, polarity, Smartspeed and Master/Slave config for igp PHY's.

Definition at line 700 of file e1000_phy.c.

s32 igb_copper_link_setup_m88 ( struct e1000_hw * hw )

igb_copper_link_setup_m88 - Setup m88 PHY's for copper link : pointer to the HW structure

Sets up MDI/MDI-X and polarity for m88 PHY's. If necessary, transmit clock and downshift values are set also.

Definition at line 505 of file e1000_phy.c.

s32 igb_copper_link_setup_m88_gen2 ( struct e1000_hw * hw )

igb_copper_link_setup_m88_gen2 - Setup m88 PHY's for copper link : pointer to the HW structure

Sets up MDI/MDI-X and polarity for i347-AT4, m88e1322 and m88e1112 PHY's. Also enables and sets the downshift parameters.

Definition at line 617 of file e1000_phy.c.

s32 igb_get_cable_length_82580 ( struct e1000_hw * hw )

igb_get_cable_length_82580 - Determine cable length for 82580 PHY : pointer to the HW structure

Reads the diagnostic status register and verifies result is valid before placing it in the phy_cable_length field.

Definition at line 2384 of file e1000_phy.c.

s32 igb_get_cable_length_igp_2 ( struct e1000_hw * hw )

igb_get_cable_length_igp_2 - Determine cable length for igp2 PHY : pointer to the HW structure

The automatic gain control (agc) normalizes the amplitude of the received signal, adjusting for the attenuation produced by the cable. By reading the AGC registers, which represent the combination of coarse and fine gain value, the value can be put into a lookup table to obtain the approximate cable length for each channel.

Definition at line 1804 of file e1000_phy.c.

s32 igb_get_cable_length_m88 ( struct e1000_hw * hw )

igb_get_cable_length_m88 - Determine cable length for m88 PHY : pointer to the HW structure

Reads the PHY specific status register to retrieve the cable length information. The cable length is determined by averaging the minimum and maximum values to get the "average" cable length. The m88 PHY has four possible cable length values, which are: Register Value Cable Length 0 < 50 meters 1 50 - 80 meters 2 80 - 110 meters 3 110 - 140 meters 4 > 140 meters

Definition at line 1679 of file e1000_phy.c.

s32 igb_get_cable_length_m88_gen2 ( struct e1000_hw * hw )

Definition at line 1705 of file e1000_phy.c.

s32 igb_get_phy_id ( struct e1000_hw * hw )

igb_get_phy_id - Retrieve the PHY ID and revision : pointer to the HW structure

Reads the PHY registers and stores the PHY ID and possibly the PHY revision in the hardware structure.

Definition at line 85 of file e1000_phy.c.

s32 igb_get_phy_info_82580 ( struct e1000_hw * hw )

igb_get_phy_info_82580 - Retrieve I82580 PHY information : pointer to the HW structure

Read PHY status to determine if link is up. If link is up, then set/determine 10base-T extended distance and polarity correction. Read PHY port status to determine MDI/MDIx and speed. Based on the speed, determine on the cable length, local and remote receiver.

Definition at line 2320 of file e1000_phy.c.

s32 igb_get_phy_info_igp ( struct e1000_hw * hw )

igb_get_phy_info_igp - Retrieve igp PHY information : pointer to the HW structure

Read PHY status to determine if link is up. If link is up, then set/determine 10base-T extended distance and polarity correction. Read PHY port status to determine MDI/MDIx and speed. Based on the speed, determine on the cable length, local and remote receiver.

Definition at line 1952 of file e1000_phy.c.

s32 igb_get_phy_info_m88 ( struct e1000_hw * hw )

igb_get_phy_info_m88 - Retrieve PHY information : pointer to the HW structure

Valid for only copper links. Read the PHY status register (sticky read) to verify that link is up. Read the PHY special control register to determine the polarity and 10base-T extended distance. Read the PHY special status register to determine MDI/MDIx and current speed. If speed is 1000, then determine cable length, local and remote receiver.

Definition at line 1876 of file e1000_phy.c.

s32 igb_phy_force_speed_duplex_82580 ( struct e1000_hw * hw )

igb_phy_force_speed_duplex_82580 - Force speed/duplex for I82580 PHY : pointer to the HW structure

Calls the PHY setup function to force speed and duplex. Clears the auto-crossover to force MDI manually. Waits for link and returns successful if link up is successful, else -E1000_ERR_PHY (-2).

Definition at line 2249 of file e1000_phy.c.

s32 igb_phy_force_speed_duplex_igp ( struct e1000_hw * hw )

igb_phy_force_speed_duplex_igp - Force speed/duplex for igp PHY : pointer to the HW structure

Calls the PHY setup function to force speed and duplex. Clears the auto-crossover to force MDI manually. Waits for link and returns successful if link up is successful, else -E1000_ERR_PHY (-2).

Definition at line 1131 of file e1000_phy.c.

s32 igb_phy_force_speed_duplex_m88 ( struct e1000_hw * hw )

igb_phy_force_speed_duplex_m88 - Force speed/duplex for m88 PHY : pointer to the HW structure

Calls the PHY setup function to force speed and duplex. Clears the auto-crossover to force MDI manually. Resets the PHY to commit the changes. If time expires while waiting for link up, we reset the DSP. After reset, TX_CLK and CRS on TX must be set. Return successful upon successful completion, else return corresponding error code.

Definition at line 1203 of file e1000_phy.c.

s32 igb_phy_has_link	(	struct e1000_hw *	hw,
		u32	iterations,
		u32	usec_interval,
		bool *	success
	)

igb_phy_has_link - Polls PHY for link : pointer to the HW structure : number of times to poll for link : delay between polling attempts : pointer to whether polling was successful or not

Polls the PHY status register for link, 'iterations' number of times.

Definition at line 1627 of file e1000_phy.c.

s32 igb_phy_hw_reset ( struct e1000_hw * hw )

igb_phy_hw_reset - PHY hardware reset : pointer to the HW structure

Verify the reset block is not blocking us from resetting. Acquire semaphore (if necessary) and read/set/write the device control reset bit in the PHY. Wait the appropriate delay time for the device to reset and relase the semaphore (if necessary).

Definition at line 2047 of file e1000_phy.c.

s32 igb_phy_init_script_igp3 ( struct e1000_hw * hw )

igb_phy_init_script_igp3 - Inits the IGP3 PHY : pointer to the HW structure

Initializes a Intel Gigabit PHY3 when an EEPROM is not present.

Definition at line 2088 of file e1000_phy.c.

s32 igb_phy_sw_reset ( struct e1000_hw * hw )

igb_phy_sw_reset - PHY software reset : pointer to the HW structure

Does a software reset of the PHY by reading the PHY control register and setting/write the control register reset bit to the PHY.

Definition at line 2015 of file e1000_phy.c.

void igb_power_down_phy_copper ( struct e1000_hw * hw )

igb_power_down_phy_copper - Power down copper PHY : pointer to the HW structure

Power down PHY to save power when interface is down and wake on lan is not enabled.

Definition at line 2197 of file e1000_phy.c.

void igb_power_up_phy_copper ( struct e1000_hw * hw )

igb_power_up_phy_copper - Restore copper link in case of PHY power down : pointer to the HW structure

In the case of a PHY power down to save power, or to turn off link during a driver unload, restore the link to previous settings.

Definition at line 2174 of file e1000_phy.c.

s32 igb_read_phy_reg_gs40g	(	struct e1000_hw *	hw,
		u32	offset,
		u16 *	data
	)

igb_read_phy_reg_gs40g - Read GS40G PHY register : pointer to the HW structure : lower half is register offset to read to upper half is page to use. : data to read at register offset

Acquires semaphore, if necessary, then reads the data in the PHY register at the offset. Release any acquired semaphores before exiting.

Definition at line 2447 of file e1000_phy.c.

s32 igb_read_phy_reg_i2c	(	struct e1000_hw *	hw,
		u32	offset,
		u16 *	data
	)

igb_read_phy_reg_i2c - Read PHY register using i2c : pointer to the HW structure : register offset to be read : pointer to the read data

Reads the PHY register at offset using the i2c interface and stores the retrieved information in data.

Definition at line 257 of file e1000_phy.c.

s32 igb_read_phy_reg_igp	(	struct e1000_hw *	hw,
		u32	offset,
		u16 *	data
	)

igb_read_phy_reg_igp - Read igp PHY register : pointer to the HW structure : register offset to be read : pointer to the read data

Acquires semaphore, if necessary, then reads the PHY register at offset and storing the retrieved information in data. Release any acquired semaphores before exiting.

Definition at line 361 of file e1000_phy.c.

s32 igb_read_phy_reg_mdic	(	struct e1000_hw *	hw,
		u32	offset,
		u16 *	data
	)

igb_read_phy_reg_mdic - Read MDI control register : pointer to the HW structure : register offset to be read : pointer to the read data

Reads the MDI control regsiter in the PHY at offset and stores the information read to data.

Definition at line 140 of file e1000_phy.c.

s32 igb_set_d3_lplu_state	(	struct e1000_hw *	hw,
		bool	active
	)

igb_set_d3_lplu_state - Sets low power link up state for D3 : pointer to the HW structure : boolean used to enable/disable lplu

Success returns 0, Failure returns 1

The low power link up (lplu) state is set to the power management level D3 and SmartSpeed is disabled when active is true, else clear lplu for D3 and enable Smartspeed. LPLU and Smartspeed are mutually exclusive. LPLU is used during Dx states where the power conservation is most important. During driver activity, SmartSpeed should be enabled so performance is maintained.

Definition at line 1396 of file e1000_phy.c.

s32 igb_setup_copper_link ( struct e1000_hw * hw )

igb_setup_copper_link - Configure copper link settings : pointer to the HW structure

Calls the appropriate function to configure the link for auto-neg or forced speed and duplex. Then we check for link, once link is established calls to configure collision distance and flow control are called. If link is not established, we return -E1000_ERR_PHY (-2).

Definition at line 1073 of file e1000_phy.c.

s32 igb_write_phy_reg_gs40g	(	struct e1000_hw *	hw,
		u32	offset,
		u16	data
	)

igb_write_phy_reg_gs40g - Write GS40G PHY register : pointer to the HW structure : lower half is register offset to write to upper half is page to use. : data to write at register offset

Acquires semaphore, if necessary, then writes the data to PHY register at the offset. Release any acquired semaphores before exiting.

Definition at line 2417 of file e1000_phy.c.

s32 igb_write_phy_reg_i2c	(	struct e1000_hw *	hw,
		u32	offset,
		u16	data
	)

igb_write_phy_reg_i2c - Write PHY register using i2c : pointer to the HW structure : register offset to write to : data to write at register offset

Writes the data to PHY register at the offset using the i2c interface.

Definition at line 304 of file e1000_phy.c.

s32 igb_write_phy_reg_igp	(	struct e1000_hw *	hw,
		u32	offset,
		u16	data
	)

igb_write_phy_reg_igp - Write igp PHY register : pointer to the HW structure : register offset to write to : data to write at register offset

Acquires semaphore, if necessary, then writes the data to PHY register at the offset. Release any acquired semaphores before exiting.

Definition at line 400 of file e1000_phy.c.

s32 igb_write_phy_reg_mdic	(	struct e1000_hw *	hw,
		u32	offset,
		u16	data
	)

igb_write_phy_reg_mdic - Write MDI control register : pointer to the HW structure : register offset to write to : data to write to register at offset

Writes data to MDI control register in the PHY at offset.

Definition at line 198 of file e1000_phy.c.

Enumerations
enum	e1000_ms_type { e1000_ms_hw_default = 0, e1000_ms_force_master, e1000_ms_force_slave, e1000_ms_auto, e1000_ms_hw_default = 0, e1000_ms_force_master, e1000_ms_force_slave, e1000_ms_auto, e1000_ms_hw_default = 0, e1000_ms_force_master, e1000_ms_force_slave, e1000_ms_auto }

enum	e1000_smart_speed { e1000_smart_speed_default = 0, e1000_smart_speed_on, e1000_smart_speed_off, e1000_smart_speed_default = 0, e1000_smart_speed_on, e1000_smart_speed_off, e1000_smart_speed_default = 0, e1000_smart_speed_on, e1000_smart_speed_off }

Macros

Enumerations

Functions

Macro Definition Documentation

Enumeration Type Documentation

Function Documentation