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e752x_edac.c File Reference
#include <linux/module.h>
#include <linux/init.h>
#include <linux/pci.h>
#include <linux/pci_ids.h>
#include <linux/edac.h>
#include "edac_core.h"

Go to the source code of this file.

Data Structures

struct  e752x_pvt
 
struct  e752x_dev_info
 
struct  e752x_error_info
 
struct  scrubrate
 

Macros

#define E752X_REVISION   " Ver: 2.0.2"
 
#define EDAC_MOD_STR   "e752x_edac"
 
#define e752x_printk(level, fmt, arg...)   edac_printk(level, "e752x", fmt, ##arg)
 
#define e752x_mc_printk(mci, level, fmt, arg...)   edac_mc_chipset_printk(mci, level, "e752x", fmt, ##arg)
 
#define PCI_DEVICE_ID_INTEL_7520_0   0x3590
 
#define PCI_DEVICE_ID_INTEL_7520_1_ERR   0x3591
 
#define PCI_DEVICE_ID_INTEL_7525_0   0x359E
 
#define PCI_DEVICE_ID_INTEL_7525_1_ERR   0x3593
 
#define PCI_DEVICE_ID_INTEL_7320_0   0x3592
 
#define PCI_DEVICE_ID_INTEL_7320_1_ERR   0x3593
 
#define PCI_DEVICE_ID_INTEL_3100_0   0x35B0
 
#define PCI_DEVICE_ID_INTEL_3100_1_ERR   0x35B1
 
#define E752X_NR_CSROWS   8 /* number of csrows */
 
#define E752X_MCHSCRB   0x52 /* Memory Scrub register (16b) */
 
#define E752X_DRB   0x60 /* DRAM row boundary register (8b) */
 
#define E752X_DRA   0x70 /* DRAM row attribute register (8b) */
 
#define E752X_DRC   0x7C /* DRAM controller mode reg (32b) */
 
#define E752X_DRM   0x80 /* Dimm mapping register */
 
#define E752X_DDRCSR   0x9A /* DDR control and status reg (16b) */
 
#define E752X_TOLM   0xC4 /* DRAM top of low memory reg (16b) */
 
#define E752X_REMAPBASE   0xC6 /* DRAM remap base address reg (16b) */
 
#define E752X_REMAPLIMIT   0xC8 /* DRAM remap limit address reg (16b) */
 
#define E752X_REMAPOFFSET   0xCA /* DRAM remap limit offset reg (16b) */
 
#define E752X_FERR_GLOBAL   0x40 /* Global first error register (32b) */
 
#define E752X_NERR_GLOBAL   0x44 /* Global next error register (32b) */
 
#define E752X_HI_FERR   0x50 /* Hub interface first error reg (8b) */
 
#define E752X_HI_NERR   0x52 /* Hub interface next error reg (8b) */
 
#define E752X_HI_ERRMASK   0x54 /* Hub interface error mask reg (8b) */
 
#define E752X_HI_SMICMD   0x5A /* Hub interface SMI command reg (8b) */
 
#define E752X_SYSBUS_FERR   0x60 /* System buss first error reg (16b) */
 
#define E752X_SYSBUS_NERR   0x62 /* System buss next error reg (16b) */
 
#define E752X_SYSBUS_ERRMASK   0x64 /* System buss error mask reg (16b) */
 
#define E752X_SYSBUS_SMICMD   0x6A /* System buss SMI command reg (16b) */
 
#define E752X_BUF_FERR   0x70 /* Memory buffer first error reg (8b) */
 
#define E752X_BUF_NERR   0x72 /* Memory buffer next error reg (8b) */
 
#define E752X_BUF_ERRMASK   0x74 /* Memory buffer error mask reg (8b) */
 
#define E752X_BUF_SMICMD   0x7A /* Memory buffer SMI cmd reg (8b) */
 
#define E752X_DRAM_FERR   0x80 /* DRAM first error register (16b) */
 
#define E752X_DRAM_NERR   0x82 /* DRAM next error register (16b) */
 
#define E752X_DRAM_ERRMASK   0x84 /* DRAM error mask register (8b) */
 
#define E752X_DRAM_SMICMD   0x8A /* DRAM SMI command register (8b) */
 
#define E752X_DRAM_RETR_ADD   0xAC /* DRAM Retry address register (32b) */
 
#define E752X_DRAM_SEC1_ADD   0xA0 /* DRAM first correctable memory */
 
#define E752X_DRAM_SEC2_ADD   0xC8 /* DRAM first correctable memory */
 
#define E752X_DRAM_DED_ADD   0xA4 /* DRAM first uncorrectable memory */
 
#define E752X_DRAM_SCRB_ADD   0xA8 /* DRAM 1st uncorrectable scrub mem */
 
#define E752X_DRAM_SEC1_SYNDROME   0xC4 /* DRAM first correctable memory */
 
#define E752X_DRAM_SEC2_SYNDROME   0xC6 /* DRAM second correctable memory */
 
#define E752X_DEVPRES1   0xF4 /* Device Present 1 register (8b) */
 
#define I3100_NSI_FERR   0x48 /* NSI first error reg (32b) */
 
#define I3100_NSI_NERR   0x4C /* NSI next error reg (32b) */
 
#define I3100_NSI_SMICMD   0x54 /* NSI SMI command register (32b) */
 
#define I3100_NSI_EMASK   0x90 /* NSI error mask register (32b) */
 
#define ICH5R_PCI_STAT   0x06 /* PCI status register (16b) */
 
#define ICH5R_PCI_2ND_STAT   0x1E /* PCI status secondary reg (16b) */
 
#define ICH5R_PCI_BRIDGE_CTL   0x3E /* PCI bridge control register (16b) */
 
#define SDRATE_EOT   0xFFFFFFFF
 
#define DRAM_ENTRY   9
 
#define NSI_FATAL_MASK   0x0c080081
 
#define NSI_NON_FATAL_MASK   0x23a0ba64
 
#define NSI_ERR_MASK   (NSI_FATAL_MASK | NSI_NON_FATAL_MASK)
 

Enumerations

enum  e752x_chips { E7520 = 0, E7525 = 1, E7320 = 2, I3100 = 3 }
 

Functions

 MODULE_DEVICE_TABLE (pci, e752x_pci_tbl)
 
 module_init (e752x_init)
 
 module_exit (e752x_exit)
 
 MODULE_LICENSE ("GPL")
 
 MODULE_AUTHOR ("Linux Networx (http://lnxi.com) Tom Zimmerman\n")
 
 MODULE_DESCRIPTION ("MC support for Intel e752x/3100 memory controllers")
 
 module_param (force_function_unhide, int, 0444)
 
 MODULE_PARM_DESC (force_function_unhide,"if BIOS sets Dev0:Fun1 up as hidden:"" 1=force unhide and hope BIOS doesn't fight driver for ""Dev0:Fun1 access")
 
 module_param (edac_op_state, int, 0444)
 
 MODULE_PARM_DESC (edac_op_state,"EDAC Error Reporting state: 0=Poll,1=NMI")
 
 module_param (sysbus_parity, int, 0444)
 
 MODULE_PARM_DESC (sysbus_parity,"0=disable system bus parity checking,"" 1=enable system bus parity checking, default=auto-detect")
 
 module_param (report_non_memory_errors, int, 0644)
 
 MODULE_PARM_DESC (report_non_memory_errors,"0=disable non-memory error ""reporting, 1=enable non-memory error reporting")
 

Macro Definition Documentation

#define DRAM_ENTRY   9

Definition at line 514 of file e752x_edac.c.

#define E752X_BUF_ERRMASK   0x74 /* Memory buffer error mask reg (8b) */

Definition at line 129 of file e752x_edac.c.

#define E752X_BUF_FERR   0x70 /* Memory buffer first error reg (8b) */

Definition at line 127 of file e752x_edac.c.

#define E752X_BUF_NERR   0x72 /* Memory buffer next error reg (8b) */

Definition at line 128 of file e752x_edac.c.

#define E752X_BUF_SMICMD   0x7A /* Memory buffer SMI cmd reg (8b) */

Definition at line 130 of file e752x_edac.c.

#define E752X_DDRCSR   0x9A /* DDR control and status reg (16b) */

Definition at line 107 of file e752x_edac.c.

#define E752X_DEVPRES1   0xF4 /* Device Present 1 register (8b) */

Definition at line 172 of file e752x_edac.c.

#define E752X_DRA   0x70 /* DRAM row attribute register (8b) */

Definition at line 88 of file e752x_edac.c.

#define E752X_DRAM_DED_ADD   0xA4 /* DRAM first uncorrectable memory */

Definition at line 152 of file e752x_edac.c.

#define E752X_DRAM_ERRMASK   0x84 /* DRAM error mask register (8b) */

Definition at line 133 of file e752x_edac.c.

#define E752X_DRAM_FERR   0x80 /* DRAM first error register (16b) */

Definition at line 131 of file e752x_edac.c.

#define E752X_DRAM_NERR   0x82 /* DRAM next error register (16b) */

Definition at line 132 of file e752x_edac.c.

#define E752X_DRAM_RETR_ADD   0xAC /* DRAM Retry address register (32b) */

Definition at line 135 of file e752x_edac.c.

#define E752X_DRAM_SCRB_ADD   0xA8 /* DRAM 1st uncorrectable scrub mem */

Definition at line 160 of file e752x_edac.c.

#define E752X_DRAM_SEC1_ADD   0xA0 /* DRAM first correctable memory */

Definition at line 136 of file e752x_edac.c.

#define E752X_DRAM_SEC1_SYNDROME   0xC4 /* DRAM first correctable memory */

Definition at line 168 of file e752x_edac.c.

#define E752X_DRAM_SEC2_ADD   0xC8 /* DRAM first correctable memory */

Definition at line 144 of file e752x_edac.c.

#define E752X_DRAM_SEC2_SYNDROME   0xC6 /* DRAM second correctable memory */

Definition at line 170 of file e752x_edac.c.

#define E752X_DRAM_SMICMD   0x8A /* DRAM SMI command register (8b) */

Definition at line 134 of file e752x_edac.c.

#define E752X_DRB   0x60 /* DRAM row boundary register (8b) */

Definition at line 87 of file e752x_edac.c.

#define E752X_DRC   0x7C /* DRAM controller mode reg (32b) */

Definition at line 100 of file e752x_edac.c.

#define E752X_DRM   0x80 /* Dimm mapping register */

Definition at line 106 of file e752x_edac.c.

#define E752X_FERR_GLOBAL   0x40 /* Global first error register (32b) */

Definition at line 117 of file e752x_edac.c.

#define E752X_HI_ERRMASK   0x54 /* Hub interface error mask reg (8b) */

Definition at line 121 of file e752x_edac.c.

#define E752X_HI_FERR   0x50 /* Hub interface first error reg (8b) */

Definition at line 119 of file e752x_edac.c.

#define E752X_HI_NERR   0x52 /* Hub interface next error reg (8b) */

Definition at line 120 of file e752x_edac.c.

#define E752X_HI_SMICMD   0x5A /* Hub interface SMI command reg (8b) */

Definition at line 122 of file e752x_edac.c.

#define e752x_mc_printk (   mci,
  level,
  fmt,
  arg... 
)    edac_mc_chipset_printk(mci, level, "e752x", fmt, ##arg)

Definition at line 41 of file e752x_edac.c.

#define E752X_MCHSCRB   0x52 /* Memory Scrub register (16b) */

Definition at line 79 of file e752x_edac.c.

#define E752X_NERR_GLOBAL   0x44 /* Global next error register (32b) */

Definition at line 118 of file e752x_edac.c.

#define E752X_NR_CSROWS   8 /* number of csrows */

Definition at line 76 of file e752x_edac.c.

#define e752x_printk (   level,
  fmt,
  arg... 
)    edac_printk(level, "e752x", fmt, ##arg)

Definition at line 38 of file e752x_edac.c.

#define E752X_REMAPBASE   0xC6 /* DRAM remap base address reg (16b) */

Definition at line 112 of file e752x_edac.c.

#define E752X_REMAPLIMIT   0xC8 /* DRAM remap limit address reg (16b) */

Definition at line 113 of file e752x_edac.c.

#define E752X_REMAPOFFSET   0xCA /* DRAM remap limit offset reg (16b) */

Definition at line 114 of file e752x_edac.c.

#define E752X_REVISION   " Ver: 2.0.2"

Definition at line 29 of file e752x_edac.c.

#define E752X_SYSBUS_ERRMASK   0x64 /* System buss error mask reg (16b) */

Definition at line 125 of file e752x_edac.c.

#define E752X_SYSBUS_FERR   0x60 /* System buss first error reg (16b) */

Definition at line 123 of file e752x_edac.c.

#define E752X_SYSBUS_NERR   0x62 /* System buss next error reg (16b) */

Definition at line 124 of file e752x_edac.c.

#define E752X_SYSBUS_SMICMD   0x6A /* System buss SMI command reg (16b) */

Definition at line 126 of file e752x_edac.c.

#define E752X_TOLM   0xC4 /* DRAM top of low memory reg (16b) */

Definition at line 111 of file e752x_edac.c.

#define EDAC_MOD_STR   "e752x_edac"

Definition at line 30 of file e752x_edac.c.

#define I3100_NSI_EMASK   0x90 /* NSI error mask register (32b) */

Definition at line 178 of file e752x_edac.c.

#define I3100_NSI_FERR   0x48 /* NSI first error reg (32b) */

Definition at line 175 of file e752x_edac.c.

#define I3100_NSI_NERR   0x4C /* NSI next error reg (32b) */

Definition at line 176 of file e752x_edac.c.

#define I3100_NSI_SMICMD   0x54 /* NSI SMI command register (32b) */

Definition at line 177 of file e752x_edac.c.

#define ICH5R_PCI_2ND_STAT   0x1E /* PCI status secondary reg (16b) */

Definition at line 182 of file e752x_edac.c.

#define ICH5R_PCI_BRIDGE_CTL   0x3E /* PCI bridge control register (16b) */

Definition at line 183 of file e752x_edac.c.

#define ICH5R_PCI_STAT   0x06 /* PCI status register (16b) */

Definition at line 181 of file e752x_edac.c.

#define NSI_ERR_MASK   (NSI_FATAL_MASK | NSI_NON_FATAL_MASK)

Definition at line 574 of file e752x_edac.c.

#define NSI_FATAL_MASK   0x0c080081

Definition at line 572 of file e752x_edac.c.

#define NSI_NON_FATAL_MASK   0x23a0ba64

Definition at line 573 of file e752x_edac.c.

#define PCI_DEVICE_ID_INTEL_3100_0   0x35B0

Definition at line 69 of file e752x_edac.c.

#define PCI_DEVICE_ID_INTEL_3100_1_ERR   0x35B1

Definition at line 73 of file e752x_edac.c.

#define PCI_DEVICE_ID_INTEL_7320_0   0x3592

Definition at line 61 of file e752x_edac.c.

#define PCI_DEVICE_ID_INTEL_7320_1_ERR   0x3593

Definition at line 65 of file e752x_edac.c.

#define PCI_DEVICE_ID_INTEL_7520_0   0x3590

Definition at line 45 of file e752x_edac.c.

#define PCI_DEVICE_ID_INTEL_7520_1_ERR   0x3591

Definition at line 49 of file e752x_edac.c.

#define PCI_DEVICE_ID_INTEL_7525_0   0x359E

Definition at line 53 of file e752x_edac.c.

#define PCI_DEVICE_ID_INTEL_7525_1_ERR   0x3593

Definition at line 57 of file e752x_edac.c.

#define SDRATE_EOT   0xFFFFFFFF

Definition at line 278 of file e752x_edac.c.

Enumeration Type Documentation

enum e752x_chips
Enumerator:
E7520 
E7525 
E7320 
I3100 

Definition at line 185 of file e752x_edac.c.

Function Documentation

MODULE_AUTHOR ( "Linux Networx (http://lnxi.com) Tom Zimmerman\n"  )
MODULE_DESCRIPTION ( "MC support for Intel e752x/3100 memory controllers"  )
MODULE_DEVICE_TABLE ( pci  ,
e752x_pci_tbl   
)
module_exit ( e752x_exit  )
module_init ( e752x_init  )
MODULE_LICENSE ( "GPL"  )
module_param ( force_function_unhide  ,
int  ,
0444   
)
module_param ( edac_op_state  ,
int  ,
0444   
)
module_param ( sysbus_parity  ,
int  ,
0444   
)
module_param ( report_non_memory_errors  ,
int  ,
0644   
)
MODULE_PARM_DESC ( force_function_unhide  )
MODULE_PARM_DESC ( edac_op_state  ,
"EDAC Error Reporting state:  0 = Poll 
)
MODULE_PARM_DESC ( sysbus_parity  ,
"  0 = disable system bus parity checking,
""  1 = enable system bus parity checking 
)
MODULE_PARM_DESC ( report_non_memory_errors  ,
"  0 = disable non-memory error ""reporting 
)
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