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f71882fg.c
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1 /***************************************************************************
2  * Copyright (C) 2006 by Hans Edgington <[email protected]> *
3  * Copyright (C) 2007-2011 Hans de Goede <[email protected]> *
4  * *
5  * This program is free software; you can redistribute it and/or modify *
6  * it under the terms of the GNU General Public License as published by *
7  * the Free Software Foundation; either version 2 of the License, or *
8  * (at your option) any later version. *
9  * *
10  * This program is distributed in the hope that it will be useful, *
11  * but WITHOUT ANY WARRANTY; without even the implied warranty of *
12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
13  * GNU General Public License for more details. *
14  * *
15  * You should have received a copy of the GNU General Public License *
16  * along with this program; if not, write to the *
17  * Free Software Foundation, Inc., *
18  * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
19  ***************************************************************************/
20 
21 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
22 
23 #include <linux/module.h>
24 #include <linux/init.h>
25 #include <linux/slab.h>
26 #include <linux/jiffies.h>
27 #include <linux/platform_device.h>
28 #include <linux/hwmon.h>
29 #include <linux/hwmon-sysfs.h>
30 #include <linux/err.h>
31 #include <linux/mutex.h>
32 #include <linux/io.h>
33 #include <linux/acpi.h>
34 
35 #define DRVNAME "f71882fg"
36 
37 #define SIO_F71858FG_LD_HWM 0x02 /* Hardware monitor logical device */
38 #define SIO_F71882FG_LD_HWM 0x04 /* Hardware monitor logical device */
39 #define SIO_UNLOCK_KEY 0x87 /* Key to enable Super-I/O */
40 #define SIO_LOCK_KEY 0xAA /* Key to disable Super-I/O */
41 
42 #define SIO_REG_LDSEL 0x07 /* Logical device select */
43 #define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */
44 #define SIO_REG_DEVREV 0x22 /* Device revision */
45 #define SIO_REG_MANID 0x23 /* Fintek ID (2 bytes) */
46 #define SIO_REG_ENABLE 0x30 /* Logical device enable */
47 #define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */
48 
49 #define SIO_FINTEK_ID 0x1934 /* Manufacturers ID */
50 #define SIO_F71808E_ID 0x0901 /* Chipset ID */
51 #define SIO_F71808A_ID 0x1001 /* Chipset ID */
52 #define SIO_F71858_ID 0x0507 /* Chipset ID */
53 #define SIO_F71862_ID 0x0601 /* Chipset ID */
54 #define SIO_F71869_ID 0x0814 /* Chipset ID */
55 #define SIO_F71869A_ID 0x1007 /* Chipset ID */
56 #define SIO_F71882_ID 0x0541 /* Chipset ID */
57 #define SIO_F71889_ID 0x0723 /* Chipset ID */
58 #define SIO_F71889E_ID 0x0909 /* Chipset ID */
59 #define SIO_F71889A_ID 0x1005 /* Chipset ID */
60 #define SIO_F8000_ID 0x0581 /* Chipset ID */
61 #define SIO_F81865_ID 0x0704 /* Chipset ID */
62 
63 #define REGION_LENGTH 8
64 #define ADDR_REG_OFFSET 5
65 #define DATA_REG_OFFSET 6
66 
67 #define F71882FG_REG_IN_STATUS 0x12 /* f7188x only */
68 #define F71882FG_REG_IN_BEEP 0x13 /* f7188x only */
69 #define F71882FG_REG_IN(nr) (0x20 + (nr))
70 #define F71882FG_REG_IN1_HIGH 0x32 /* f7188x only */
71 
72 #define F71882FG_REG_FAN(nr) (0xA0 + (16 * (nr)))
73 #define F71882FG_REG_FAN_TARGET(nr) (0xA2 + (16 * (nr)))
74 #define F71882FG_REG_FAN_FULL_SPEED(nr) (0xA4 + (16 * (nr)))
75 #define F71882FG_REG_FAN_STATUS 0x92
76 #define F71882FG_REG_FAN_BEEP 0x93
77 
78 #define F71882FG_REG_TEMP(nr) (0x70 + 2 * (nr))
79 #define F71882FG_REG_TEMP_OVT(nr) (0x80 + 2 * (nr))
80 #define F71882FG_REG_TEMP_HIGH(nr) (0x81 + 2 * (nr))
81 #define F71882FG_REG_TEMP_STATUS 0x62
82 #define F71882FG_REG_TEMP_BEEP 0x63
83 #define F71882FG_REG_TEMP_CONFIG 0x69
84 #define F71882FG_REG_TEMP_HYST(nr) (0x6C + (nr))
85 #define F71882FG_REG_TEMP_TYPE 0x6B
86 #define F71882FG_REG_TEMP_DIODE_OPEN 0x6F
87 
88 #define F71882FG_REG_PWM(nr) (0xA3 + (16 * (nr)))
89 #define F71882FG_REG_PWM_TYPE 0x94
90 #define F71882FG_REG_PWM_ENABLE 0x96
91 
92 #define F71882FG_REG_FAN_HYST(nr) (0x98 + (nr))
93 
94 #define F71882FG_REG_FAN_FAULT_T 0x9F
95 #define F71882FG_FAN_NEG_TEMP_EN 0x20
96 #define F71882FG_FAN_PROG_SEL 0x80
97 
98 #define F71882FG_REG_POINT_PWM(pwm, point) (0xAA + (point) + (16 * (pwm)))
99 #define F71882FG_REG_POINT_TEMP(pwm, point) (0xA6 + (point) + (16 * (pwm)))
100 #define F71882FG_REG_POINT_MAPPING(nr) (0xAF + 16 * (nr))
101 
102 #define F71882FG_REG_START 0x01
103 
104 #define F71882FG_MAX_INS 9
105 
106 #define FAN_MIN_DETECT 366 /* Lowest detectable fanspeed */
107 
108 static unsigned short force_id;
109 module_param(force_id, ushort, 0);
110 MODULE_PARM_DESC(force_id, "Override the detected device ID");
111 
112 enum chips { f71808e, f71808a, f71858fg, f71862fg, f71869, f71869a, f71882fg,
113  f71889fg, f71889ed, f71889a, f8000, f81865f };
114 
115 static const char *const f71882fg_names[] = {
116  "f71808e",
117  "f71808a",
118  "f71858fg",
119  "f71862fg",
120  "f71869", /* Both f71869f and f71869e, reg. compatible and same id */
121  "f71869a",
122  "f71882fg",
123  "f71889fg", /* f81801u too, same id */
124  "f71889ed",
125  "f71889a",
126  "f8000",
127  "f81865f",
128 };
129 
130 static const char f71882fg_has_in[][F71882FG_MAX_INS] = {
131  [f71808e] = { 1, 1, 1, 1, 1, 1, 0, 1, 1 },
132  [f71808a] = { 1, 1, 1, 1, 0, 0, 0, 1, 1 },
133  [f71858fg] = { 1, 1, 1, 0, 0, 0, 0, 0, 0 },
134  [f71862fg] = { 1, 1, 1, 1, 1, 1, 1, 1, 1 },
135  [f71869] = { 1, 1, 1, 1, 1, 1, 1, 1, 1 },
136  [f71869a] = { 1, 1, 1, 1, 1, 1, 1, 1, 1 },
137  [f71882fg] = { 1, 1, 1, 1, 1, 1, 1, 1, 1 },
138  [f71889fg] = { 1, 1, 1, 1, 1, 1, 1, 1, 1 },
139  [f71889ed] = { 1, 1, 1, 1, 1, 1, 1, 1, 1 },
140  [f71889a] = { 1, 1, 1, 1, 1, 1, 1, 1, 1 },
141  [f8000] = { 1, 1, 1, 0, 0, 0, 0, 0, 0 },
142  [f81865f] = { 1, 1, 1, 1, 1, 1, 1, 0, 0 },
143 };
144 
145 static const char f71882fg_has_in1_alarm[] = {
146  [f71808e] = 0,
147  [f71808a] = 0,
148  [f71858fg] = 0,
149  [f71862fg] = 0,
150  [f71869] = 0,
151  [f71869a] = 0,
152  [f71882fg] = 1,
153  [f71889fg] = 1,
154  [f71889ed] = 1,
155  [f71889a] = 1,
156  [f8000] = 0,
157  [f81865f] = 1,
158 };
159 
160 static const char f71882fg_fan_has_beep[] = {
161  [f71808e] = 0,
162  [f71808a] = 0,
163  [f71858fg] = 0,
164  [f71862fg] = 1,
165  [f71869] = 1,
166  [f71869a] = 1,
167  [f71882fg] = 1,
168  [f71889fg] = 1,
169  [f71889ed] = 1,
170  [f71889a] = 1,
171  [f8000] = 0,
172  [f81865f] = 1,
173 };
174 
175 static const char f71882fg_nr_fans[] = {
176  [f71808e] = 3,
177  [f71808a] = 2, /* +1 fan which is monitor + simple pwm only */
178  [f71858fg] = 3,
179  [f71862fg] = 3,
180  [f71869] = 3,
181  [f71869a] = 3,
182  [f71882fg] = 4,
183  [f71889fg] = 3,
184  [f71889ed] = 3,
185  [f71889a] = 3,
186  [f8000] = 3, /* +1 fan which is monitor only */
187  [f81865f] = 2,
188 };
189 
190 static const char f71882fg_temp_has_beep[] = {
191  [f71808e] = 0,
192  [f71808a] = 1,
193  [f71858fg] = 0,
194  [f71862fg] = 1,
195  [f71869] = 1,
196  [f71869a] = 1,
197  [f71882fg] = 1,
198  [f71889fg] = 1,
199  [f71889ed] = 1,
200  [f71889a] = 1,
201  [f8000] = 0,
202  [f81865f] = 1,
203 };
204 
205 static const char f71882fg_nr_temps[] = {
206  [f71808e] = 2,
207  [f71808a] = 2,
208  [f71858fg] = 3,
209  [f71862fg] = 3,
210  [f71869] = 3,
211  [f71869a] = 3,
212  [f71882fg] = 3,
213  [f71889fg] = 3,
214  [f71889ed] = 3,
215  [f71889a] = 3,
216  [f8000] = 3,
217  [f81865f] = 2,
218 };
219 
220 static struct platform_device *f71882fg_pdev;
221 
222 /* Super-I/O Function prototypes */
223 static inline int superio_inb(int base, int reg);
224 static inline int superio_inw(int base, int reg);
225 static inline int superio_enter(int base);
226 static inline void superio_select(int base, int ld);
227 static inline void superio_exit(int base);
228 
229 struct f71882fg_sio_data {
230  enum chips type;
231 };
232 
233 struct f71882fg_data {
234  unsigned short addr;
235  enum chips type;
236  struct device *hwmon_dev;
237 
238  struct mutex update_lock;
239  int temp_start; /* temp numbering start (0 or 1) */
240  char valid; /* !=0 if following fields are valid */
241  char auto_point_temp_signed;
242  unsigned long last_updated; /* In jiffies */
243  unsigned long last_limits; /* In jiffies */
244 
245  /* Register Values */
246  u8 in[F71882FG_MAX_INS];
247  u8 in1_max;
248  u8 in_status;
249  u8 in_beep;
250  u16 fan[4];
251  u16 fan_target[4];
252  u16 fan_full_speed[4];
253  u8 fan_status;
254  u8 fan_beep;
255  /*
256  * Note: all models have max 3 temperature channels, but on some
257  * they are addressed as 0-2 and on others as 1-3, so for coding
258  * convenience we reserve space for 4 channels
259  */
260  u16 temp[4];
261  u8 temp_ovt[4];
262  u8 temp_high[4];
263  u8 temp_hyst[2]; /* 2 hysts stored per reg */
264  u8 temp_type[4];
265  u8 temp_status;
266  u8 temp_beep;
267  u8 temp_diode_open;
268  u8 temp_config;
269  u8 pwm[4];
270  u8 pwm_enable;
271  u8 pwm_auto_point_hyst[2];
272  u8 pwm_auto_point_mapping[4];
273  u8 pwm_auto_point_pwm[4][5];
274  s8 pwm_auto_point_temp[4][4];
275 };
276 
277 /* Sysfs in */
278 static ssize_t show_in(struct device *dev, struct device_attribute *devattr,
279  char *buf);
280 static ssize_t show_in_max(struct device *dev, struct device_attribute
281  *devattr, char *buf);
282 static ssize_t store_in_max(struct device *dev, struct device_attribute
283  *devattr, const char *buf, size_t count);
284 static ssize_t show_in_beep(struct device *dev, struct device_attribute
285  *devattr, char *buf);
286 static ssize_t store_in_beep(struct device *dev, struct device_attribute
287  *devattr, const char *buf, size_t count);
288 static ssize_t show_in_alarm(struct device *dev, struct device_attribute
289  *devattr, char *buf);
290 /* Sysfs Fan */
291 static ssize_t show_fan(struct device *dev, struct device_attribute *devattr,
292  char *buf);
293 static ssize_t show_fan_full_speed(struct device *dev,
294  struct device_attribute *devattr, char *buf);
295 static ssize_t store_fan_full_speed(struct device *dev,
296  struct device_attribute *devattr, const char *buf, size_t count);
297 static ssize_t show_fan_beep(struct device *dev, struct device_attribute
298  *devattr, char *buf);
299 static ssize_t store_fan_beep(struct device *dev, struct device_attribute
300  *devattr, const char *buf, size_t count);
301 static ssize_t show_fan_alarm(struct device *dev, struct device_attribute
302  *devattr, char *buf);
303 /* Sysfs Temp */
304 static ssize_t show_temp(struct device *dev, struct device_attribute
305  *devattr, char *buf);
306 static ssize_t show_temp_max(struct device *dev, struct device_attribute
307  *devattr, char *buf);
308 static ssize_t store_temp_max(struct device *dev, struct device_attribute
309  *devattr, const char *buf, size_t count);
310 static ssize_t show_temp_max_hyst(struct device *dev, struct device_attribute
311  *devattr, char *buf);
312 static ssize_t store_temp_max_hyst(struct device *dev, struct device_attribute
313  *devattr, const char *buf, size_t count);
314 static ssize_t show_temp_crit(struct device *dev, struct device_attribute
315  *devattr, char *buf);
316 static ssize_t store_temp_crit(struct device *dev, struct device_attribute
317  *devattr, const char *buf, size_t count);
318 static ssize_t show_temp_crit_hyst(struct device *dev, struct device_attribute
319  *devattr, char *buf);
320 static ssize_t show_temp_type(struct device *dev, struct device_attribute
321  *devattr, char *buf);
322 static ssize_t show_temp_beep(struct device *dev, struct device_attribute
323  *devattr, char *buf);
324 static ssize_t store_temp_beep(struct device *dev, struct device_attribute
325  *devattr, const char *buf, size_t count);
326 static ssize_t show_temp_alarm(struct device *dev, struct device_attribute
327  *devattr, char *buf);
328 static ssize_t show_temp_fault(struct device *dev, struct device_attribute
329  *devattr, char *buf);
330 /* PWM and Auto point control */
331 static ssize_t show_pwm(struct device *dev, struct device_attribute *devattr,
332  char *buf);
333 static ssize_t store_pwm(struct device *dev, struct device_attribute *devattr,
334  const char *buf, size_t count);
335 static ssize_t show_simple_pwm(struct device *dev,
336  struct device_attribute *devattr, char *buf);
337 static ssize_t store_simple_pwm(struct device *dev,
338  struct device_attribute *devattr, const char *buf, size_t count);
339 static ssize_t show_pwm_enable(struct device *dev,
340  struct device_attribute *devattr, char *buf);
341 static ssize_t store_pwm_enable(struct device *dev,
342  struct device_attribute *devattr, const char *buf, size_t count);
343 static ssize_t show_pwm_interpolate(struct device *dev,
344  struct device_attribute *devattr, char *buf);
345 static ssize_t store_pwm_interpolate(struct device *dev,
346  struct device_attribute *devattr, const char *buf, size_t count);
347 static ssize_t show_pwm_auto_point_channel(struct device *dev,
348  struct device_attribute *devattr, char *buf);
349 static ssize_t store_pwm_auto_point_channel(struct device *dev,
350  struct device_attribute *devattr, const char *buf, size_t count);
351 static ssize_t show_pwm_auto_point_temp_hyst(struct device *dev,
352  struct device_attribute *devattr, char *buf);
353 static ssize_t store_pwm_auto_point_temp_hyst(struct device *dev,
354  struct device_attribute *devattr, const char *buf, size_t count);
355 static ssize_t show_pwm_auto_point_pwm(struct device *dev,
356  struct device_attribute *devattr, char *buf);
357 static ssize_t store_pwm_auto_point_pwm(struct device *dev,
358  struct device_attribute *devattr, const char *buf, size_t count);
359 static ssize_t show_pwm_auto_point_temp(struct device *dev,
360  struct device_attribute *devattr, char *buf);
361 static ssize_t store_pwm_auto_point_temp(struct device *dev,
362  struct device_attribute *devattr, const char *buf, size_t count);
363 /* Sysfs misc */
364 static ssize_t show_name(struct device *dev, struct device_attribute *devattr,
365  char *buf);
366 
367 static int __devinit f71882fg_probe(struct platform_device *pdev);
368 static int f71882fg_remove(struct platform_device *pdev);
369 
370 static struct platform_driver f71882fg_driver = {
371  .driver = {
372  .owner = THIS_MODULE,
373  .name = DRVNAME,
374  },
375  .probe = f71882fg_probe,
376  .remove = f71882fg_remove,
377 };
378 
379 static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
380 
381 /*
382  * Temp attr for the f71858fg, the f71858fg is special as it has its
383  * temperature indexes start at 0 (the others start at 1)
384  */
385 static struct sensor_device_attribute_2 f71858fg_temp_attr[] = {
386  SENSOR_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 0),
387  SENSOR_ATTR_2(temp1_max, S_IRUGO|S_IWUSR, show_temp_max,
388  store_temp_max, 0, 0),
389  SENSOR_ATTR_2(temp1_max_hyst, S_IRUGO|S_IWUSR, show_temp_max_hyst,
390  store_temp_max_hyst, 0, 0),
391  SENSOR_ATTR_2(temp1_max_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 0),
392  SENSOR_ATTR_2(temp1_crit, S_IRUGO|S_IWUSR, show_temp_crit,
393  store_temp_crit, 0, 0),
394  SENSOR_ATTR_2(temp1_crit_hyst, S_IRUGO, show_temp_crit_hyst, NULL,
395  0, 0),
396  SENSOR_ATTR_2(temp1_crit_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 4),
397  SENSOR_ATTR_2(temp1_fault, S_IRUGO, show_temp_fault, NULL, 0, 0),
398  SENSOR_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 0, 1),
399  SENSOR_ATTR_2(temp2_max, S_IRUGO|S_IWUSR, show_temp_max,
400  store_temp_max, 0, 1),
401  SENSOR_ATTR_2(temp2_max_hyst, S_IRUGO|S_IWUSR, show_temp_max_hyst,
402  store_temp_max_hyst, 0, 1),
403  SENSOR_ATTR_2(temp2_max_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 1),
404  SENSOR_ATTR_2(temp2_crit, S_IRUGO|S_IWUSR, show_temp_crit,
405  store_temp_crit, 0, 1),
406  SENSOR_ATTR_2(temp2_crit_hyst, S_IRUGO, show_temp_crit_hyst, NULL,
407  0, 1),
408  SENSOR_ATTR_2(temp2_crit_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 5),
409  SENSOR_ATTR_2(temp2_fault, S_IRUGO, show_temp_fault, NULL, 0, 1),
410  SENSOR_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 0, 2),
411  SENSOR_ATTR_2(temp3_max, S_IRUGO|S_IWUSR, show_temp_max,
412  store_temp_max, 0, 2),
413  SENSOR_ATTR_2(temp3_max_hyst, S_IRUGO|S_IWUSR, show_temp_max_hyst,
414  store_temp_max_hyst, 0, 2),
415  SENSOR_ATTR_2(temp3_max_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 2),
416  SENSOR_ATTR_2(temp3_crit, S_IRUGO|S_IWUSR, show_temp_crit,
417  store_temp_crit, 0, 2),
418  SENSOR_ATTR_2(temp3_crit_hyst, S_IRUGO, show_temp_crit_hyst, NULL,
419  0, 2),
420  SENSOR_ATTR_2(temp3_crit_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 6),
421  SENSOR_ATTR_2(temp3_fault, S_IRUGO, show_temp_fault, NULL, 0, 2),
422 };
423 
424 /* Temp attr for the standard models */
425 static struct sensor_device_attribute_2 fxxxx_temp_attr[3][9] = { {
426  SENSOR_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 1),
427  SENSOR_ATTR_2(temp1_max, S_IRUGO|S_IWUSR, show_temp_max,
428  store_temp_max, 0, 1),
429  SENSOR_ATTR_2(temp1_max_hyst, S_IRUGO|S_IWUSR, show_temp_max_hyst,
430  store_temp_max_hyst, 0, 1),
431  /*
432  * Should really be temp1_max_alarm, but older versions did not handle
433  * the max and crit alarms separately and lm_sensors v2 depends on the
434  * presence of temp#_alarm files. The same goes for temp2/3 _alarm.
435  */
436  SENSOR_ATTR_2(temp1_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 1),
437  SENSOR_ATTR_2(temp1_crit, S_IRUGO|S_IWUSR, show_temp_crit,
438  store_temp_crit, 0, 1),
439  SENSOR_ATTR_2(temp1_crit_hyst, S_IRUGO, show_temp_crit_hyst, NULL,
440  0, 1),
441  SENSOR_ATTR_2(temp1_crit_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 5),
442  SENSOR_ATTR_2(temp1_type, S_IRUGO, show_temp_type, NULL, 0, 1),
443  SENSOR_ATTR_2(temp1_fault, S_IRUGO, show_temp_fault, NULL, 0, 1),
444 }, {
445  SENSOR_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 0, 2),
446  SENSOR_ATTR_2(temp2_max, S_IRUGO|S_IWUSR, show_temp_max,
447  store_temp_max, 0, 2),
448  SENSOR_ATTR_2(temp2_max_hyst, S_IRUGO|S_IWUSR, show_temp_max_hyst,
449  store_temp_max_hyst, 0, 2),
450  /* Should be temp2_max_alarm, see temp1_alarm note */
451  SENSOR_ATTR_2(temp2_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 2),
452  SENSOR_ATTR_2(temp2_crit, S_IRUGO|S_IWUSR, show_temp_crit,
453  store_temp_crit, 0, 2),
454  SENSOR_ATTR_2(temp2_crit_hyst, S_IRUGO, show_temp_crit_hyst, NULL,
455  0, 2),
456  SENSOR_ATTR_2(temp2_crit_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 6),
457  SENSOR_ATTR_2(temp2_type, S_IRUGO, show_temp_type, NULL, 0, 2),
458  SENSOR_ATTR_2(temp2_fault, S_IRUGO, show_temp_fault, NULL, 0, 2),
459 }, {
460  SENSOR_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 0, 3),
461  SENSOR_ATTR_2(temp3_max, S_IRUGO|S_IWUSR, show_temp_max,
462  store_temp_max, 0, 3),
463  SENSOR_ATTR_2(temp3_max_hyst, S_IRUGO|S_IWUSR, show_temp_max_hyst,
464  store_temp_max_hyst, 0, 3),
465  /* Should be temp3_max_alarm, see temp1_alarm note */
466  SENSOR_ATTR_2(temp3_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 3),
467  SENSOR_ATTR_2(temp3_crit, S_IRUGO|S_IWUSR, show_temp_crit,
468  store_temp_crit, 0, 3),
469  SENSOR_ATTR_2(temp3_crit_hyst, S_IRUGO, show_temp_crit_hyst, NULL,
470  0, 3),
471  SENSOR_ATTR_2(temp3_crit_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 7),
472  SENSOR_ATTR_2(temp3_type, S_IRUGO, show_temp_type, NULL, 0, 3),
473  SENSOR_ATTR_2(temp3_fault, S_IRUGO, show_temp_fault, NULL, 0, 3),
474 } };
475 
476 /* Temp attr for models which can beep on temp alarm */
477 static struct sensor_device_attribute_2 fxxxx_temp_beep_attr[3][2] = { {
478  SENSOR_ATTR_2(temp1_max_beep, S_IRUGO|S_IWUSR, show_temp_beep,
479  store_temp_beep, 0, 1),
480  SENSOR_ATTR_2(temp1_crit_beep, S_IRUGO|S_IWUSR, show_temp_beep,
481  store_temp_beep, 0, 5),
482 }, {
483  SENSOR_ATTR_2(temp2_max_beep, S_IRUGO|S_IWUSR, show_temp_beep,
484  store_temp_beep, 0, 2),
485  SENSOR_ATTR_2(temp2_crit_beep, S_IRUGO|S_IWUSR, show_temp_beep,
486  store_temp_beep, 0, 6),
487 }, {
488  SENSOR_ATTR_2(temp3_max_beep, S_IRUGO|S_IWUSR, show_temp_beep,
489  store_temp_beep, 0, 3),
490  SENSOR_ATTR_2(temp3_crit_beep, S_IRUGO|S_IWUSR, show_temp_beep,
491  store_temp_beep, 0, 7),
492 } };
493 
494 /*
495  * Temp attr for the f8000
496  * Note on the f8000 temp_ovt (crit) is used as max, and temp_high (max)
497  * is used as hysteresis value to clear alarms
498  * Also like the f71858fg its temperature indexes start at 0
499  */
500 static struct sensor_device_attribute_2 f8000_temp_attr[] = {
501  SENSOR_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 0),
502  SENSOR_ATTR_2(temp1_max, S_IRUGO|S_IWUSR, show_temp_crit,
503  store_temp_crit, 0, 0),
504  SENSOR_ATTR_2(temp1_max_hyst, S_IRUGO|S_IWUSR, show_temp_max,
505  store_temp_max, 0, 0),
506  SENSOR_ATTR_2(temp1_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 4),
507  SENSOR_ATTR_2(temp1_fault, S_IRUGO, show_temp_fault, NULL, 0, 0),
508  SENSOR_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 0, 1),
509  SENSOR_ATTR_2(temp2_max, S_IRUGO|S_IWUSR, show_temp_crit,
510  store_temp_crit, 0, 1),
511  SENSOR_ATTR_2(temp2_max_hyst, S_IRUGO|S_IWUSR, show_temp_max,
512  store_temp_max, 0, 1),
513  SENSOR_ATTR_2(temp2_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 5),
514  SENSOR_ATTR_2(temp2_fault, S_IRUGO, show_temp_fault, NULL, 0, 1),
515  SENSOR_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 0, 2),
516  SENSOR_ATTR_2(temp3_max, S_IRUGO|S_IWUSR, show_temp_crit,
517  store_temp_crit, 0, 2),
518  SENSOR_ATTR_2(temp3_max_hyst, S_IRUGO|S_IWUSR, show_temp_max,
519  store_temp_max, 0, 2),
520  SENSOR_ATTR_2(temp3_alarm, S_IRUGO, show_temp_alarm, NULL, 0, 6),
521  SENSOR_ATTR_2(temp3_fault, S_IRUGO, show_temp_fault, NULL, 0, 2),
522 };
523 
524 /* in attr for all models */
525 static struct sensor_device_attribute_2 fxxxx_in_attr[] = {
526  SENSOR_ATTR_2(in0_input, S_IRUGO, show_in, NULL, 0, 0),
527  SENSOR_ATTR_2(in1_input, S_IRUGO, show_in, NULL, 0, 1),
528  SENSOR_ATTR_2(in2_input, S_IRUGO, show_in, NULL, 0, 2),
529  SENSOR_ATTR_2(in3_input, S_IRUGO, show_in, NULL, 0, 3),
530  SENSOR_ATTR_2(in4_input, S_IRUGO, show_in, NULL, 0, 4),
531  SENSOR_ATTR_2(in5_input, S_IRUGO, show_in, NULL, 0, 5),
532  SENSOR_ATTR_2(in6_input, S_IRUGO, show_in, NULL, 0, 6),
533  SENSOR_ATTR_2(in7_input, S_IRUGO, show_in, NULL, 0, 7),
534  SENSOR_ATTR_2(in8_input, S_IRUGO, show_in, NULL, 0, 8),
535 };
536 
537 /* For models with in1 alarm capability */
538 static struct sensor_device_attribute_2 fxxxx_in1_alarm_attr[] = {
539  SENSOR_ATTR_2(in1_max, S_IRUGO|S_IWUSR, show_in_max, store_in_max,
540  0, 1),
541  SENSOR_ATTR_2(in1_beep, S_IRUGO|S_IWUSR, show_in_beep, store_in_beep,
542  0, 1),
543  SENSOR_ATTR_2(in1_alarm, S_IRUGO, show_in_alarm, NULL, 0, 1),
544 };
545 
546 /* Fan / PWM attr common to all models */
547 static struct sensor_device_attribute_2 fxxxx_fan_attr[4][6] = { {
548  SENSOR_ATTR_2(fan1_input, S_IRUGO, show_fan, NULL, 0, 0),
549  SENSOR_ATTR_2(fan1_full_speed, S_IRUGO|S_IWUSR,
550  show_fan_full_speed,
551  store_fan_full_speed, 0, 0),
552  SENSOR_ATTR_2(fan1_alarm, S_IRUGO, show_fan_alarm, NULL, 0, 0),
553  SENSOR_ATTR_2(pwm1, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 0, 0),
554  SENSOR_ATTR_2(pwm1_enable, S_IRUGO|S_IWUSR, show_pwm_enable,
555  store_pwm_enable, 0, 0),
556  SENSOR_ATTR_2(pwm1_interpolate, S_IRUGO|S_IWUSR,
557  show_pwm_interpolate, store_pwm_interpolate, 0, 0),
558 }, {
559  SENSOR_ATTR_2(fan2_input, S_IRUGO, show_fan, NULL, 0, 1),
560  SENSOR_ATTR_2(fan2_full_speed, S_IRUGO|S_IWUSR,
561  show_fan_full_speed,
562  store_fan_full_speed, 0, 1),
563  SENSOR_ATTR_2(fan2_alarm, S_IRUGO, show_fan_alarm, NULL, 0, 1),
564  SENSOR_ATTR_2(pwm2, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 0, 1),
565  SENSOR_ATTR_2(pwm2_enable, S_IRUGO|S_IWUSR, show_pwm_enable,
566  store_pwm_enable, 0, 1),
567  SENSOR_ATTR_2(pwm2_interpolate, S_IRUGO|S_IWUSR,
568  show_pwm_interpolate, store_pwm_interpolate, 0, 1),
569 }, {
570  SENSOR_ATTR_2(fan3_input, S_IRUGO, show_fan, NULL, 0, 2),
571  SENSOR_ATTR_2(fan3_full_speed, S_IRUGO|S_IWUSR,
572  show_fan_full_speed,
573  store_fan_full_speed, 0, 2),
574  SENSOR_ATTR_2(fan3_alarm, S_IRUGO, show_fan_alarm, NULL, 0, 2),
575  SENSOR_ATTR_2(pwm3, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 0, 2),
576  SENSOR_ATTR_2(pwm3_enable, S_IRUGO|S_IWUSR, show_pwm_enable,
577  store_pwm_enable, 0, 2),
578  SENSOR_ATTR_2(pwm3_interpolate, S_IRUGO|S_IWUSR,
579  show_pwm_interpolate, store_pwm_interpolate, 0, 2),
580 }, {
581  SENSOR_ATTR_2(fan4_input, S_IRUGO, show_fan, NULL, 0, 3),
582  SENSOR_ATTR_2(fan4_full_speed, S_IRUGO|S_IWUSR,
583  show_fan_full_speed,
584  store_fan_full_speed, 0, 3),
585  SENSOR_ATTR_2(fan4_alarm, S_IRUGO, show_fan_alarm, NULL, 0, 3),
586  SENSOR_ATTR_2(pwm4, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 0, 3),
587  SENSOR_ATTR_2(pwm4_enable, S_IRUGO|S_IWUSR, show_pwm_enable,
588  store_pwm_enable, 0, 3),
589  SENSOR_ATTR_2(pwm4_interpolate, S_IRUGO|S_IWUSR,
590  show_pwm_interpolate, store_pwm_interpolate, 0, 3),
591 } };
592 
593 /* Attr for the third fan of the f71808a, which only has manual pwm */
594 static struct sensor_device_attribute_2 f71808a_fan3_attr[] = {
595  SENSOR_ATTR_2(fan3_input, S_IRUGO, show_fan, NULL, 0, 2),
596  SENSOR_ATTR_2(fan3_alarm, S_IRUGO, show_fan_alarm, NULL, 0, 2),
597  SENSOR_ATTR_2(pwm3, S_IRUGO|S_IWUSR,
598  show_simple_pwm, store_simple_pwm, 0, 2),
599 };
600 
601 /* Attr for models which can beep on Fan alarm */
602 static struct sensor_device_attribute_2 fxxxx_fan_beep_attr[] = {
603  SENSOR_ATTR_2(fan1_beep, S_IRUGO|S_IWUSR, show_fan_beep,
604  store_fan_beep, 0, 0),
605  SENSOR_ATTR_2(fan2_beep, S_IRUGO|S_IWUSR, show_fan_beep,
606  store_fan_beep, 0, 1),
607  SENSOR_ATTR_2(fan3_beep, S_IRUGO|S_IWUSR, show_fan_beep,
608  store_fan_beep, 0, 2),
609  SENSOR_ATTR_2(fan4_beep, S_IRUGO|S_IWUSR, show_fan_beep,
610  store_fan_beep, 0, 3),
611 };
612 
613 /*
614  * PWM attr for the f71862fg, fewer pwms and fewer zones per pwm than the
615  * standard models
616  */
617 static struct sensor_device_attribute_2 f71862fg_auto_pwm_attr[3][7] = { {
618  SENSOR_ATTR_2(pwm1_auto_channels_temp, S_IRUGO|S_IWUSR,
619  show_pwm_auto_point_channel,
620  store_pwm_auto_point_channel, 0, 0),
621  SENSOR_ATTR_2(pwm1_auto_point1_pwm, S_IRUGO|S_IWUSR,
622  show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
623  1, 0),
624  SENSOR_ATTR_2(pwm1_auto_point2_pwm, S_IRUGO|S_IWUSR,
625  show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
626  4, 0),
627  SENSOR_ATTR_2(pwm1_auto_point1_temp, S_IRUGO|S_IWUSR,
628  show_pwm_auto_point_temp, store_pwm_auto_point_temp,
629  0, 0),
630  SENSOR_ATTR_2(pwm1_auto_point2_temp, S_IRUGO|S_IWUSR,
631  show_pwm_auto_point_temp, store_pwm_auto_point_temp,
632  3, 0),
633  SENSOR_ATTR_2(pwm1_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
634  show_pwm_auto_point_temp_hyst,
635  store_pwm_auto_point_temp_hyst,
636  0, 0),
637  SENSOR_ATTR_2(pwm1_auto_point2_temp_hyst, S_IRUGO,
638  show_pwm_auto_point_temp_hyst, NULL, 3, 0),
639 }, {
640  SENSOR_ATTR_2(pwm2_auto_channels_temp, S_IRUGO|S_IWUSR,
641  show_pwm_auto_point_channel,
642  store_pwm_auto_point_channel, 0, 1),
643  SENSOR_ATTR_2(pwm2_auto_point1_pwm, S_IRUGO|S_IWUSR,
644  show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
645  1, 1),
646  SENSOR_ATTR_2(pwm2_auto_point2_pwm, S_IRUGO|S_IWUSR,
647  show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
648  4, 1),
649  SENSOR_ATTR_2(pwm2_auto_point1_temp, S_IRUGO|S_IWUSR,
650  show_pwm_auto_point_temp, store_pwm_auto_point_temp,
651  0, 1),
652  SENSOR_ATTR_2(pwm2_auto_point2_temp, S_IRUGO|S_IWUSR,
653  show_pwm_auto_point_temp, store_pwm_auto_point_temp,
654  3, 1),
655  SENSOR_ATTR_2(pwm2_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
656  show_pwm_auto_point_temp_hyst,
657  store_pwm_auto_point_temp_hyst,
658  0, 1),
659  SENSOR_ATTR_2(pwm2_auto_point2_temp_hyst, S_IRUGO,
660  show_pwm_auto_point_temp_hyst, NULL, 3, 1),
661 }, {
662  SENSOR_ATTR_2(pwm3_auto_channels_temp, S_IRUGO|S_IWUSR,
663  show_pwm_auto_point_channel,
664  store_pwm_auto_point_channel, 0, 2),
665  SENSOR_ATTR_2(pwm3_auto_point1_pwm, S_IRUGO|S_IWUSR,
666  show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
667  1, 2),
668  SENSOR_ATTR_2(pwm3_auto_point2_pwm, S_IRUGO|S_IWUSR,
669  show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
670  4, 2),
671  SENSOR_ATTR_2(pwm3_auto_point1_temp, S_IRUGO|S_IWUSR,
672  show_pwm_auto_point_temp, store_pwm_auto_point_temp,
673  0, 2),
674  SENSOR_ATTR_2(pwm3_auto_point2_temp, S_IRUGO|S_IWUSR,
675  show_pwm_auto_point_temp, store_pwm_auto_point_temp,
676  3, 2),
677  SENSOR_ATTR_2(pwm3_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
678  show_pwm_auto_point_temp_hyst,
679  store_pwm_auto_point_temp_hyst,
680  0, 2),
681  SENSOR_ATTR_2(pwm3_auto_point2_temp_hyst, S_IRUGO,
682  show_pwm_auto_point_temp_hyst, NULL, 3, 2),
683 } };
684 
685 /*
686  * PWM attr for the f71808e/f71869, almost identical to the f71862fg, but the
687  * pwm setting when the temperature is above the pwmX_auto_point1_temp can be
688  * programmed instead of being hardcoded to 0xff
689  */
690 static struct sensor_device_attribute_2 f71869_auto_pwm_attr[3][8] = { {
691  SENSOR_ATTR_2(pwm1_auto_channels_temp, S_IRUGO|S_IWUSR,
692  show_pwm_auto_point_channel,
693  store_pwm_auto_point_channel, 0, 0),
694  SENSOR_ATTR_2(pwm1_auto_point1_pwm, S_IRUGO|S_IWUSR,
695  show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
696  0, 0),
697  SENSOR_ATTR_2(pwm1_auto_point2_pwm, S_IRUGO|S_IWUSR,
698  show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
699  1, 0),
700  SENSOR_ATTR_2(pwm1_auto_point3_pwm, S_IRUGO|S_IWUSR,
701  show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
702  4, 0),
703  SENSOR_ATTR_2(pwm1_auto_point1_temp, S_IRUGO|S_IWUSR,
704  show_pwm_auto_point_temp, store_pwm_auto_point_temp,
705  0, 0),
706  SENSOR_ATTR_2(pwm1_auto_point2_temp, S_IRUGO|S_IWUSR,
707  show_pwm_auto_point_temp, store_pwm_auto_point_temp,
708  3, 0),
709  SENSOR_ATTR_2(pwm1_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
710  show_pwm_auto_point_temp_hyst,
711  store_pwm_auto_point_temp_hyst,
712  0, 0),
713  SENSOR_ATTR_2(pwm1_auto_point2_temp_hyst, S_IRUGO,
714  show_pwm_auto_point_temp_hyst, NULL, 3, 0),
715 }, {
716  SENSOR_ATTR_2(pwm2_auto_channels_temp, S_IRUGO|S_IWUSR,
717  show_pwm_auto_point_channel,
718  store_pwm_auto_point_channel, 0, 1),
719  SENSOR_ATTR_2(pwm2_auto_point1_pwm, S_IRUGO|S_IWUSR,
720  show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
721  0, 1),
722  SENSOR_ATTR_2(pwm2_auto_point2_pwm, S_IRUGO|S_IWUSR,
723  show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
724  1, 1),
725  SENSOR_ATTR_2(pwm2_auto_point3_pwm, S_IRUGO|S_IWUSR,
726  show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
727  4, 1),
728  SENSOR_ATTR_2(pwm2_auto_point1_temp, S_IRUGO|S_IWUSR,
729  show_pwm_auto_point_temp, store_pwm_auto_point_temp,
730  0, 1),
731  SENSOR_ATTR_2(pwm2_auto_point2_temp, S_IRUGO|S_IWUSR,
732  show_pwm_auto_point_temp, store_pwm_auto_point_temp,
733  3, 1),
734  SENSOR_ATTR_2(pwm2_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
735  show_pwm_auto_point_temp_hyst,
736  store_pwm_auto_point_temp_hyst,
737  0, 1),
738  SENSOR_ATTR_2(pwm2_auto_point2_temp_hyst, S_IRUGO,
739  show_pwm_auto_point_temp_hyst, NULL, 3, 1),
740 }, {
741  SENSOR_ATTR_2(pwm3_auto_channels_temp, S_IRUGO|S_IWUSR,
742  show_pwm_auto_point_channel,
743  store_pwm_auto_point_channel, 0, 2),
744  SENSOR_ATTR_2(pwm3_auto_point1_pwm, S_IRUGO|S_IWUSR,
745  show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
746  0, 2),
747  SENSOR_ATTR_2(pwm3_auto_point2_pwm, S_IRUGO|S_IWUSR,
748  show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
749  1, 2),
750  SENSOR_ATTR_2(pwm3_auto_point3_pwm, S_IRUGO|S_IWUSR,
751  show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
752  4, 2),
753  SENSOR_ATTR_2(pwm3_auto_point1_temp, S_IRUGO|S_IWUSR,
754  show_pwm_auto_point_temp, store_pwm_auto_point_temp,
755  0, 2),
756  SENSOR_ATTR_2(pwm3_auto_point2_temp, S_IRUGO|S_IWUSR,
757  show_pwm_auto_point_temp, store_pwm_auto_point_temp,
758  3, 2),
759  SENSOR_ATTR_2(pwm3_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
760  show_pwm_auto_point_temp_hyst,
761  store_pwm_auto_point_temp_hyst,
762  0, 2),
763  SENSOR_ATTR_2(pwm3_auto_point2_temp_hyst, S_IRUGO,
764  show_pwm_auto_point_temp_hyst, NULL, 3, 2),
765 } };
766 
767 /* PWM attr for the standard models */
768 static struct sensor_device_attribute_2 fxxxx_auto_pwm_attr[4][14] = { {
769  SENSOR_ATTR_2(pwm1_auto_channels_temp, S_IRUGO|S_IWUSR,
770  show_pwm_auto_point_channel,
771  store_pwm_auto_point_channel, 0, 0),
772  SENSOR_ATTR_2(pwm1_auto_point1_pwm, S_IRUGO|S_IWUSR,
773  show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
774  0, 0),
775  SENSOR_ATTR_2(pwm1_auto_point2_pwm, S_IRUGO|S_IWUSR,
776  show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
777  1, 0),
778  SENSOR_ATTR_2(pwm1_auto_point3_pwm, S_IRUGO|S_IWUSR,
779  show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
780  2, 0),
781  SENSOR_ATTR_2(pwm1_auto_point4_pwm, S_IRUGO|S_IWUSR,
782  show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
783  3, 0),
784  SENSOR_ATTR_2(pwm1_auto_point5_pwm, S_IRUGO|S_IWUSR,
785  show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
786  4, 0),
787  SENSOR_ATTR_2(pwm1_auto_point1_temp, S_IRUGO|S_IWUSR,
788  show_pwm_auto_point_temp, store_pwm_auto_point_temp,
789  0, 0),
790  SENSOR_ATTR_2(pwm1_auto_point2_temp, S_IRUGO|S_IWUSR,
791  show_pwm_auto_point_temp, store_pwm_auto_point_temp,
792  1, 0),
793  SENSOR_ATTR_2(pwm1_auto_point3_temp, S_IRUGO|S_IWUSR,
794  show_pwm_auto_point_temp, store_pwm_auto_point_temp,
795  2, 0),
796  SENSOR_ATTR_2(pwm1_auto_point4_temp, S_IRUGO|S_IWUSR,
797  show_pwm_auto_point_temp, store_pwm_auto_point_temp,
798  3, 0),
799  SENSOR_ATTR_2(pwm1_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
800  show_pwm_auto_point_temp_hyst,
801  store_pwm_auto_point_temp_hyst,
802  0, 0),
803  SENSOR_ATTR_2(pwm1_auto_point2_temp_hyst, S_IRUGO,
804  show_pwm_auto_point_temp_hyst, NULL, 1, 0),
805  SENSOR_ATTR_2(pwm1_auto_point3_temp_hyst, S_IRUGO,
806  show_pwm_auto_point_temp_hyst, NULL, 2, 0),
807  SENSOR_ATTR_2(pwm1_auto_point4_temp_hyst, S_IRUGO,
808  show_pwm_auto_point_temp_hyst, NULL, 3, 0),
809 }, {
810  SENSOR_ATTR_2(pwm2_auto_channels_temp, S_IRUGO|S_IWUSR,
811  show_pwm_auto_point_channel,
812  store_pwm_auto_point_channel, 0, 1),
813  SENSOR_ATTR_2(pwm2_auto_point1_pwm, S_IRUGO|S_IWUSR,
814  show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
815  0, 1),
816  SENSOR_ATTR_2(pwm2_auto_point2_pwm, S_IRUGO|S_IWUSR,
817  show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
818  1, 1),
819  SENSOR_ATTR_2(pwm2_auto_point3_pwm, S_IRUGO|S_IWUSR,
820  show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
821  2, 1),
822  SENSOR_ATTR_2(pwm2_auto_point4_pwm, S_IRUGO|S_IWUSR,
823  show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
824  3, 1),
825  SENSOR_ATTR_2(pwm2_auto_point5_pwm, S_IRUGO|S_IWUSR,
826  show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
827  4, 1),
828  SENSOR_ATTR_2(pwm2_auto_point1_temp, S_IRUGO|S_IWUSR,
829  show_pwm_auto_point_temp, store_pwm_auto_point_temp,
830  0, 1),
831  SENSOR_ATTR_2(pwm2_auto_point2_temp, S_IRUGO|S_IWUSR,
832  show_pwm_auto_point_temp, store_pwm_auto_point_temp,
833  1, 1),
834  SENSOR_ATTR_2(pwm2_auto_point3_temp, S_IRUGO|S_IWUSR,
835  show_pwm_auto_point_temp, store_pwm_auto_point_temp,
836  2, 1),
837  SENSOR_ATTR_2(pwm2_auto_point4_temp, S_IRUGO|S_IWUSR,
838  show_pwm_auto_point_temp, store_pwm_auto_point_temp,
839  3, 1),
840  SENSOR_ATTR_2(pwm2_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
841  show_pwm_auto_point_temp_hyst,
842  store_pwm_auto_point_temp_hyst,
843  0, 1),
844  SENSOR_ATTR_2(pwm2_auto_point2_temp_hyst, S_IRUGO,
845  show_pwm_auto_point_temp_hyst, NULL, 1, 1),
846  SENSOR_ATTR_2(pwm2_auto_point3_temp_hyst, S_IRUGO,
847  show_pwm_auto_point_temp_hyst, NULL, 2, 1),
848  SENSOR_ATTR_2(pwm2_auto_point4_temp_hyst, S_IRUGO,
849  show_pwm_auto_point_temp_hyst, NULL, 3, 1),
850 }, {
851  SENSOR_ATTR_2(pwm3_auto_channels_temp, S_IRUGO|S_IWUSR,
852  show_pwm_auto_point_channel,
853  store_pwm_auto_point_channel, 0, 2),
854  SENSOR_ATTR_2(pwm3_auto_point1_pwm, S_IRUGO|S_IWUSR,
855  show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
856  0, 2),
857  SENSOR_ATTR_2(pwm3_auto_point2_pwm, S_IRUGO|S_IWUSR,
858  show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
859  1, 2),
860  SENSOR_ATTR_2(pwm3_auto_point3_pwm, S_IRUGO|S_IWUSR,
861  show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
862  2, 2),
863  SENSOR_ATTR_2(pwm3_auto_point4_pwm, S_IRUGO|S_IWUSR,
864  show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
865  3, 2),
866  SENSOR_ATTR_2(pwm3_auto_point5_pwm, S_IRUGO|S_IWUSR,
867  show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
868  4, 2),
869  SENSOR_ATTR_2(pwm3_auto_point1_temp, S_IRUGO|S_IWUSR,
870  show_pwm_auto_point_temp, store_pwm_auto_point_temp,
871  0, 2),
872  SENSOR_ATTR_2(pwm3_auto_point2_temp, S_IRUGO|S_IWUSR,
873  show_pwm_auto_point_temp, store_pwm_auto_point_temp,
874  1, 2),
875  SENSOR_ATTR_2(pwm3_auto_point3_temp, S_IRUGO|S_IWUSR,
876  show_pwm_auto_point_temp, store_pwm_auto_point_temp,
877  2, 2),
878  SENSOR_ATTR_2(pwm3_auto_point4_temp, S_IRUGO|S_IWUSR,
879  show_pwm_auto_point_temp, store_pwm_auto_point_temp,
880  3, 2),
881  SENSOR_ATTR_2(pwm3_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
882  show_pwm_auto_point_temp_hyst,
883  store_pwm_auto_point_temp_hyst,
884  0, 2),
885  SENSOR_ATTR_2(pwm3_auto_point2_temp_hyst, S_IRUGO,
886  show_pwm_auto_point_temp_hyst, NULL, 1, 2),
887  SENSOR_ATTR_2(pwm3_auto_point3_temp_hyst, S_IRUGO,
888  show_pwm_auto_point_temp_hyst, NULL, 2, 2),
889  SENSOR_ATTR_2(pwm3_auto_point4_temp_hyst, S_IRUGO,
890  show_pwm_auto_point_temp_hyst, NULL, 3, 2),
891 }, {
892  SENSOR_ATTR_2(pwm4_auto_channels_temp, S_IRUGO|S_IWUSR,
893  show_pwm_auto_point_channel,
894  store_pwm_auto_point_channel, 0, 3),
895  SENSOR_ATTR_2(pwm4_auto_point1_pwm, S_IRUGO|S_IWUSR,
896  show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
897  0, 3),
898  SENSOR_ATTR_2(pwm4_auto_point2_pwm, S_IRUGO|S_IWUSR,
899  show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
900  1, 3),
901  SENSOR_ATTR_2(pwm4_auto_point3_pwm, S_IRUGO|S_IWUSR,
902  show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
903  2, 3),
904  SENSOR_ATTR_2(pwm4_auto_point4_pwm, S_IRUGO|S_IWUSR,
905  show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
906  3, 3),
907  SENSOR_ATTR_2(pwm4_auto_point5_pwm, S_IRUGO|S_IWUSR,
908  show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
909  4, 3),
910  SENSOR_ATTR_2(pwm4_auto_point1_temp, S_IRUGO|S_IWUSR,
911  show_pwm_auto_point_temp, store_pwm_auto_point_temp,
912  0, 3),
913  SENSOR_ATTR_2(pwm4_auto_point2_temp, S_IRUGO|S_IWUSR,
914  show_pwm_auto_point_temp, store_pwm_auto_point_temp,
915  1, 3),
916  SENSOR_ATTR_2(pwm4_auto_point3_temp, S_IRUGO|S_IWUSR,
917  show_pwm_auto_point_temp, store_pwm_auto_point_temp,
918  2, 3),
919  SENSOR_ATTR_2(pwm4_auto_point4_temp, S_IRUGO|S_IWUSR,
920  show_pwm_auto_point_temp, store_pwm_auto_point_temp,
921  3, 3),
922  SENSOR_ATTR_2(pwm4_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
923  show_pwm_auto_point_temp_hyst,
924  store_pwm_auto_point_temp_hyst,
925  0, 3),
926  SENSOR_ATTR_2(pwm4_auto_point2_temp_hyst, S_IRUGO,
927  show_pwm_auto_point_temp_hyst, NULL, 1, 3),
928  SENSOR_ATTR_2(pwm4_auto_point3_temp_hyst, S_IRUGO,
929  show_pwm_auto_point_temp_hyst, NULL, 2, 3),
930  SENSOR_ATTR_2(pwm4_auto_point4_temp_hyst, S_IRUGO,
931  show_pwm_auto_point_temp_hyst, NULL, 3, 3),
932 } };
933 
934 /* Fan attr specific to the f8000 (4th fan input can only measure speed) */
935 static struct sensor_device_attribute_2 f8000_fan_attr[] = {
936  SENSOR_ATTR_2(fan4_input, S_IRUGO, show_fan, NULL, 0, 3),
937 };
938 
939 /*
940  * PWM attr for the f8000, zones mapped to temp instead of to pwm!
941  * Also the register block at offset A0 maps to TEMP1 (so our temp2, as the
942  * F8000 starts counting temps at 0), B0 maps the TEMP2 and C0 maps to TEMP0
943  */
944 static struct sensor_device_attribute_2 f8000_auto_pwm_attr[3][14] = { {
945  SENSOR_ATTR_2(pwm1_auto_channels_temp, S_IRUGO|S_IWUSR,
946  show_pwm_auto_point_channel,
947  store_pwm_auto_point_channel, 0, 0),
948  SENSOR_ATTR_2(temp1_auto_point1_pwm, S_IRUGO|S_IWUSR,
949  show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
950  0, 2),
951  SENSOR_ATTR_2(temp1_auto_point2_pwm, S_IRUGO|S_IWUSR,
952  show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
953  1, 2),
954  SENSOR_ATTR_2(temp1_auto_point3_pwm, S_IRUGO|S_IWUSR,
955  show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
956  2, 2),
957  SENSOR_ATTR_2(temp1_auto_point4_pwm, S_IRUGO|S_IWUSR,
958  show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
959  3, 2),
960  SENSOR_ATTR_2(temp1_auto_point5_pwm, S_IRUGO|S_IWUSR,
961  show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
962  4, 2),
963  SENSOR_ATTR_2(temp1_auto_point1_temp, S_IRUGO|S_IWUSR,
964  show_pwm_auto_point_temp, store_pwm_auto_point_temp,
965  0, 2),
966  SENSOR_ATTR_2(temp1_auto_point2_temp, S_IRUGO|S_IWUSR,
967  show_pwm_auto_point_temp, store_pwm_auto_point_temp,
968  1, 2),
969  SENSOR_ATTR_2(temp1_auto_point3_temp, S_IRUGO|S_IWUSR,
970  show_pwm_auto_point_temp, store_pwm_auto_point_temp,
971  2, 2),
972  SENSOR_ATTR_2(temp1_auto_point4_temp, S_IRUGO|S_IWUSR,
973  show_pwm_auto_point_temp, store_pwm_auto_point_temp,
974  3, 2),
975  SENSOR_ATTR_2(temp1_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
976  show_pwm_auto_point_temp_hyst,
977  store_pwm_auto_point_temp_hyst,
978  0, 2),
979  SENSOR_ATTR_2(temp1_auto_point2_temp_hyst, S_IRUGO,
980  show_pwm_auto_point_temp_hyst, NULL, 1, 2),
981  SENSOR_ATTR_2(temp1_auto_point3_temp_hyst, S_IRUGO,
982  show_pwm_auto_point_temp_hyst, NULL, 2, 2),
983  SENSOR_ATTR_2(temp1_auto_point4_temp_hyst, S_IRUGO,
984  show_pwm_auto_point_temp_hyst, NULL, 3, 2),
985 }, {
986  SENSOR_ATTR_2(pwm2_auto_channels_temp, S_IRUGO|S_IWUSR,
987  show_pwm_auto_point_channel,
988  store_pwm_auto_point_channel, 0, 1),
989  SENSOR_ATTR_2(temp2_auto_point1_pwm, S_IRUGO|S_IWUSR,
990  show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
991  0, 0),
992  SENSOR_ATTR_2(temp2_auto_point2_pwm, S_IRUGO|S_IWUSR,
993  show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
994  1, 0),
995  SENSOR_ATTR_2(temp2_auto_point3_pwm, S_IRUGO|S_IWUSR,
996  show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
997  2, 0),
998  SENSOR_ATTR_2(temp2_auto_point4_pwm, S_IRUGO|S_IWUSR,
999  show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1000  3, 0),
1001  SENSOR_ATTR_2(temp2_auto_point5_pwm, S_IRUGO|S_IWUSR,
1002  show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1003  4, 0),
1004  SENSOR_ATTR_2(temp2_auto_point1_temp, S_IRUGO|S_IWUSR,
1005  show_pwm_auto_point_temp, store_pwm_auto_point_temp,
1006  0, 0),
1007  SENSOR_ATTR_2(temp2_auto_point2_temp, S_IRUGO|S_IWUSR,
1008  show_pwm_auto_point_temp, store_pwm_auto_point_temp,
1009  1, 0),
1010  SENSOR_ATTR_2(temp2_auto_point3_temp, S_IRUGO|S_IWUSR,
1011  show_pwm_auto_point_temp, store_pwm_auto_point_temp,
1012  2, 0),
1013  SENSOR_ATTR_2(temp2_auto_point4_temp, S_IRUGO|S_IWUSR,
1014  show_pwm_auto_point_temp, store_pwm_auto_point_temp,
1015  3, 0),
1016  SENSOR_ATTR_2(temp2_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
1017  show_pwm_auto_point_temp_hyst,
1018  store_pwm_auto_point_temp_hyst,
1019  0, 0),
1020  SENSOR_ATTR_2(temp2_auto_point2_temp_hyst, S_IRUGO,
1021  show_pwm_auto_point_temp_hyst, NULL, 1, 0),
1022  SENSOR_ATTR_2(temp2_auto_point3_temp_hyst, S_IRUGO,
1023  show_pwm_auto_point_temp_hyst, NULL, 2, 0),
1024  SENSOR_ATTR_2(temp2_auto_point4_temp_hyst, S_IRUGO,
1025  show_pwm_auto_point_temp_hyst, NULL, 3, 0),
1026 }, {
1027  SENSOR_ATTR_2(pwm3_auto_channels_temp, S_IRUGO|S_IWUSR,
1028  show_pwm_auto_point_channel,
1029  store_pwm_auto_point_channel, 0, 2),
1030  SENSOR_ATTR_2(temp3_auto_point1_pwm, S_IRUGO|S_IWUSR,
1031  show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1032  0, 1),
1033  SENSOR_ATTR_2(temp3_auto_point2_pwm, S_IRUGO|S_IWUSR,
1034  show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1035  1, 1),
1036  SENSOR_ATTR_2(temp3_auto_point3_pwm, S_IRUGO|S_IWUSR,
1037  show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1038  2, 1),
1039  SENSOR_ATTR_2(temp3_auto_point4_pwm, S_IRUGO|S_IWUSR,
1040  show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1041  3, 1),
1042  SENSOR_ATTR_2(temp3_auto_point5_pwm, S_IRUGO|S_IWUSR,
1043  show_pwm_auto_point_pwm, store_pwm_auto_point_pwm,
1044  4, 1),
1045  SENSOR_ATTR_2(temp3_auto_point1_temp, S_IRUGO|S_IWUSR,
1046  show_pwm_auto_point_temp, store_pwm_auto_point_temp,
1047  0, 1),
1048  SENSOR_ATTR_2(temp3_auto_point2_temp, S_IRUGO|S_IWUSR,
1049  show_pwm_auto_point_temp, store_pwm_auto_point_temp,
1050  1, 1),
1051  SENSOR_ATTR_2(temp3_auto_point3_temp, S_IRUGO|S_IWUSR,
1052  show_pwm_auto_point_temp, store_pwm_auto_point_temp,
1053  2, 1),
1054  SENSOR_ATTR_2(temp3_auto_point4_temp, S_IRUGO|S_IWUSR,
1055  show_pwm_auto_point_temp, store_pwm_auto_point_temp,
1056  3, 1),
1057  SENSOR_ATTR_2(temp3_auto_point1_temp_hyst, S_IRUGO|S_IWUSR,
1058  show_pwm_auto_point_temp_hyst,
1059  store_pwm_auto_point_temp_hyst,
1060  0, 1),
1061  SENSOR_ATTR_2(temp3_auto_point2_temp_hyst, S_IRUGO,
1062  show_pwm_auto_point_temp_hyst, NULL, 1, 1),
1063  SENSOR_ATTR_2(temp3_auto_point3_temp_hyst, S_IRUGO,
1064  show_pwm_auto_point_temp_hyst, NULL, 2, 1),
1065  SENSOR_ATTR_2(temp3_auto_point4_temp_hyst, S_IRUGO,
1066  show_pwm_auto_point_temp_hyst, NULL, 3, 1),
1067 } };
1068 
1069 /* Super I/O functions */
1070 static inline int superio_inb(int base, int reg)
1071 {
1072  outb(reg, base);
1073  return inb(base + 1);
1074 }
1075 
1076 static int superio_inw(int base, int reg)
1077 {
1078  int val;
1079  val = superio_inb(base, reg) << 8;
1080  val |= superio_inb(base, reg + 1);
1081  return val;
1082 }
1083 
1084 static inline int superio_enter(int base)
1085 {
1086  /* Don't step on other drivers' I/O space by accident */
1087  if (!request_muxed_region(base, 2, DRVNAME)) {
1088  pr_err("I/O address 0x%04x already in use\n", base);
1089  return -EBUSY;
1090  }
1091 
1092  /* according to the datasheet the key must be send twice! */
1093  outb(SIO_UNLOCK_KEY, base);
1094  outb(SIO_UNLOCK_KEY, base);
1095 
1096  return 0;
1097 }
1098 
1099 static inline void superio_select(int base, int ld)
1100 {
1101  outb(SIO_REG_LDSEL, base);
1102  outb(ld, base + 1);
1103 }
1104 
1105 static inline void superio_exit(int base)
1106 {
1107  outb(SIO_LOCK_KEY, base);
1108  release_region(base, 2);
1109 }
1110 
1111 static inline int fan_from_reg(u16 reg)
1112 {
1113  return reg ? (1500000 / reg) : 0;
1114 }
1115 
1116 static inline u16 fan_to_reg(int fan)
1117 {
1118  return fan ? (1500000 / fan) : 0;
1119 }
1120 
1121 static u8 f71882fg_read8(struct f71882fg_data *data, u8 reg)
1122 {
1123  u8 val;
1124 
1125  outb(reg, data->addr + ADDR_REG_OFFSET);
1126  val = inb(data->addr + DATA_REG_OFFSET);
1127 
1128  return val;
1129 }
1130 
1131 static u16 f71882fg_read16(struct f71882fg_data *data, u8 reg)
1132 {
1133  u16 val;
1134 
1135  val = f71882fg_read8(data, reg) << 8;
1136  val |= f71882fg_read8(data, reg + 1);
1137 
1138  return val;
1139 }
1140 
1141 static void f71882fg_write8(struct f71882fg_data *data, u8 reg, u8 val)
1142 {
1143  outb(reg, data->addr + ADDR_REG_OFFSET);
1144  outb(val, data->addr + DATA_REG_OFFSET);
1145 }
1146 
1147 static void f71882fg_write16(struct f71882fg_data *data, u8 reg, u16 val)
1148 {
1149  f71882fg_write8(data, reg, val >> 8);
1150  f71882fg_write8(data, reg + 1, val & 0xff);
1151 }
1152 
1153 static u16 f71882fg_read_temp(struct f71882fg_data *data, int nr)
1154 {
1155  if (data->type == f71858fg)
1156  return f71882fg_read16(data, F71882FG_REG_TEMP(nr));
1157  else
1158  return f71882fg_read8(data, F71882FG_REG_TEMP(nr));
1159 }
1160 
1161 static struct f71882fg_data *f71882fg_update_device(struct device *dev)
1162 {
1163  struct f71882fg_data *data = dev_get_drvdata(dev);
1164  int nr_fans = f71882fg_nr_fans[data->type];
1165  int nr_temps = f71882fg_nr_temps[data->type];
1166  int nr, reg, point;
1167 
1168  mutex_lock(&data->update_lock);
1169 
1170  /* Update once every 60 seconds */
1171  if (time_after(jiffies, data->last_limits + 60 * HZ) ||
1172  !data->valid) {
1173  if (f71882fg_has_in1_alarm[data->type]) {
1174  data->in1_max =
1175  f71882fg_read8(data, F71882FG_REG_IN1_HIGH);
1176  data->in_beep =
1177  f71882fg_read8(data, F71882FG_REG_IN_BEEP);
1178  }
1179 
1180  /* Get High & boundary temps*/
1181  for (nr = data->temp_start; nr < nr_temps + data->temp_start;
1182  nr++) {
1183  data->temp_ovt[nr] = f71882fg_read8(data,
1184  F71882FG_REG_TEMP_OVT(nr));
1185  data->temp_high[nr] = f71882fg_read8(data,
1186  F71882FG_REG_TEMP_HIGH(nr));
1187  }
1188 
1189  if (data->type != f8000) {
1190  data->temp_hyst[0] = f71882fg_read8(data,
1191  F71882FG_REG_TEMP_HYST(0));
1192  data->temp_hyst[1] = f71882fg_read8(data,
1193  F71882FG_REG_TEMP_HYST(1));
1194  }
1195  /* All but the f71858fg / f8000 have this register */
1196  if ((data->type != f71858fg) && (data->type != f8000)) {
1197  reg = f71882fg_read8(data, F71882FG_REG_TEMP_TYPE);
1198  data->temp_type[1] = (reg & 0x02) ? 2 : 4;
1199  data->temp_type[2] = (reg & 0x04) ? 2 : 4;
1200  data->temp_type[3] = (reg & 0x08) ? 2 : 4;
1201  }
1202 
1203  if (f71882fg_fan_has_beep[data->type])
1204  data->fan_beep = f71882fg_read8(data,
1205  F71882FG_REG_FAN_BEEP);
1206 
1207  if (f71882fg_temp_has_beep[data->type])
1208  data->temp_beep = f71882fg_read8(data,
1209  F71882FG_REG_TEMP_BEEP);
1210 
1211  data->pwm_enable = f71882fg_read8(data,
1212  F71882FG_REG_PWM_ENABLE);
1213  data->pwm_auto_point_hyst[0] =
1214  f71882fg_read8(data, F71882FG_REG_FAN_HYST(0));
1215  data->pwm_auto_point_hyst[1] =
1216  f71882fg_read8(data, F71882FG_REG_FAN_HYST(1));
1217 
1218  for (nr = 0; nr < nr_fans; nr++) {
1219  data->pwm_auto_point_mapping[nr] =
1220  f71882fg_read8(data,
1221  F71882FG_REG_POINT_MAPPING(nr));
1222 
1223  switch (data->type) {
1224  default:
1225  for (point = 0; point < 5; point++) {
1226  data->pwm_auto_point_pwm[nr][point] =
1227  f71882fg_read8(data,
1228  F71882FG_REG_POINT_PWM
1229  (nr, point));
1230  }
1231  for (point = 0; point < 4; point++) {
1232  data->pwm_auto_point_temp[nr][point] =
1233  f71882fg_read8(data,
1234  F71882FG_REG_POINT_TEMP
1235  (nr, point));
1236  }
1237  break;
1238  case f71808e:
1239  case f71869:
1240  data->pwm_auto_point_pwm[nr][0] =
1241  f71882fg_read8(data,
1242  F71882FG_REG_POINT_PWM(nr, 0));
1243  /* Fall through */
1244  case f71862fg:
1245  data->pwm_auto_point_pwm[nr][1] =
1246  f71882fg_read8(data,
1247  F71882FG_REG_POINT_PWM
1248  (nr, 1));
1249  data->pwm_auto_point_pwm[nr][4] =
1250  f71882fg_read8(data,
1251  F71882FG_REG_POINT_PWM
1252  (nr, 4));
1253  data->pwm_auto_point_temp[nr][0] =
1254  f71882fg_read8(data,
1255  F71882FG_REG_POINT_TEMP
1256  (nr, 0));
1257  data->pwm_auto_point_temp[nr][3] =
1258  f71882fg_read8(data,
1259  F71882FG_REG_POINT_TEMP
1260  (nr, 3));
1261  break;
1262  }
1263  }
1264  data->last_limits = jiffies;
1265  }
1266 
1267  /* Update every second */
1268  if (time_after(jiffies, data->last_updated + HZ) || !data->valid) {
1269  data->temp_status = f71882fg_read8(data,
1270  F71882FG_REG_TEMP_STATUS);
1271  data->temp_diode_open = f71882fg_read8(data,
1272  F71882FG_REG_TEMP_DIODE_OPEN);
1273  for (nr = data->temp_start; nr < nr_temps + data->temp_start;
1274  nr++)
1275  data->temp[nr] = f71882fg_read_temp(data, nr);
1276 
1277  data->fan_status = f71882fg_read8(data,
1278  F71882FG_REG_FAN_STATUS);
1279  for (nr = 0; nr < nr_fans; nr++) {
1280  data->fan[nr] = f71882fg_read16(data,
1281  F71882FG_REG_FAN(nr));
1282  data->fan_target[nr] =
1283  f71882fg_read16(data, F71882FG_REG_FAN_TARGET(nr));
1284  data->fan_full_speed[nr] =
1285  f71882fg_read16(data,
1286  F71882FG_REG_FAN_FULL_SPEED(nr));
1287  data->pwm[nr] =
1288  f71882fg_read8(data, F71882FG_REG_PWM(nr));
1289  }
1290  /* Some models have 1 more fan with limited capabilities */
1291  if (data->type == f71808a) {
1292  data->fan[2] = f71882fg_read16(data,
1293  F71882FG_REG_FAN(2));
1294  data->pwm[2] = f71882fg_read8(data,
1295  F71882FG_REG_PWM(2));
1296  }
1297  if (data->type == f8000)
1298  data->fan[3] = f71882fg_read16(data,
1299  F71882FG_REG_FAN(3));
1300 
1301  if (f71882fg_has_in1_alarm[data->type])
1302  data->in_status = f71882fg_read8(data,
1303  F71882FG_REG_IN_STATUS);
1304  for (nr = 0; nr < F71882FG_MAX_INS; nr++)
1305  if (f71882fg_has_in[data->type][nr])
1306  data->in[nr] = f71882fg_read8(data,
1307  F71882FG_REG_IN(nr));
1308 
1309  data->last_updated = jiffies;
1310  data->valid = 1;
1311  }
1312 
1313  mutex_unlock(&data->update_lock);
1314 
1315  return data;
1316 }
1317 
1318 /* Sysfs Interface */
1319 static ssize_t show_fan(struct device *dev, struct device_attribute *devattr,
1320  char *buf)
1321 {
1322  struct f71882fg_data *data = f71882fg_update_device(dev);
1323  int nr = to_sensor_dev_attr_2(devattr)->index;
1324  int speed = fan_from_reg(data->fan[nr]);
1325 
1326  if (speed == FAN_MIN_DETECT)
1327  speed = 0;
1328 
1329  return sprintf(buf, "%d\n", speed);
1330 }
1331 
1332 static ssize_t show_fan_full_speed(struct device *dev,
1333  struct device_attribute *devattr, char *buf)
1334 {
1335  struct f71882fg_data *data = f71882fg_update_device(dev);
1336  int nr = to_sensor_dev_attr_2(devattr)->index;
1337  int speed = fan_from_reg(data->fan_full_speed[nr]);
1338  return sprintf(buf, "%d\n", speed);
1339 }
1340 
1341 static ssize_t store_fan_full_speed(struct device *dev,
1342  struct device_attribute *devattr,
1343  const char *buf, size_t count)
1344 {
1345  struct f71882fg_data *data = dev_get_drvdata(dev);
1346  int err, nr = to_sensor_dev_attr_2(devattr)->index;
1347  long val;
1348 
1349  err = kstrtol(buf, 10, &val);
1350  if (err)
1351  return err;
1352 
1353  val = SENSORS_LIMIT(val, 23, 1500000);
1354  val = fan_to_reg(val);
1355 
1356  mutex_lock(&data->update_lock);
1357  f71882fg_write16(data, F71882FG_REG_FAN_FULL_SPEED(nr), val);
1358  data->fan_full_speed[nr] = val;
1359  mutex_unlock(&data->update_lock);
1360 
1361  return count;
1362 }
1363 
1364 static ssize_t show_fan_beep(struct device *dev, struct device_attribute
1365  *devattr, char *buf)
1366 {
1367  struct f71882fg_data *data = f71882fg_update_device(dev);
1368  int nr = to_sensor_dev_attr_2(devattr)->index;
1369 
1370  if (data->fan_beep & (1 << nr))
1371  return sprintf(buf, "1\n");
1372  else
1373  return sprintf(buf, "0\n");
1374 }
1375 
1376 static ssize_t store_fan_beep(struct device *dev, struct device_attribute
1377  *devattr, const char *buf, size_t count)
1378 {
1379  struct f71882fg_data *data = dev_get_drvdata(dev);
1380  int err, nr = to_sensor_dev_attr_2(devattr)->index;
1381  unsigned long val;
1382 
1383  err = kstrtoul(buf, 10, &val);
1384  if (err)
1385  return err;
1386 
1387  mutex_lock(&data->update_lock);
1388  data->fan_beep = f71882fg_read8(data, F71882FG_REG_FAN_BEEP);
1389  if (val)
1390  data->fan_beep |= 1 << nr;
1391  else
1392  data->fan_beep &= ~(1 << nr);
1393 
1394  f71882fg_write8(data, F71882FG_REG_FAN_BEEP, data->fan_beep);
1395  mutex_unlock(&data->update_lock);
1396 
1397  return count;
1398 }
1399 
1400 static ssize_t show_fan_alarm(struct device *dev, struct device_attribute
1401  *devattr, char *buf)
1402 {
1403  struct f71882fg_data *data = f71882fg_update_device(dev);
1404  int nr = to_sensor_dev_attr_2(devattr)->index;
1405 
1406  if (data->fan_status & (1 << nr))
1407  return sprintf(buf, "1\n");
1408  else
1409  return sprintf(buf, "0\n");
1410 }
1411 
1412 static ssize_t show_in(struct device *dev, struct device_attribute *devattr,
1413  char *buf)
1414 {
1415  struct f71882fg_data *data = f71882fg_update_device(dev);
1416  int nr = to_sensor_dev_attr_2(devattr)->index;
1417 
1418  return sprintf(buf, "%d\n", data->in[nr] * 8);
1419 }
1420 
1421 static ssize_t show_in_max(struct device *dev, struct device_attribute
1422  *devattr, char *buf)
1423 {
1424  struct f71882fg_data *data = f71882fg_update_device(dev);
1425 
1426  return sprintf(buf, "%d\n", data->in1_max * 8);
1427 }
1428 
1429 static ssize_t store_in_max(struct device *dev, struct device_attribute
1430  *devattr, const char *buf, size_t count)
1431 {
1432  struct f71882fg_data *data = dev_get_drvdata(dev);
1433  int err;
1434  long val;
1435 
1436  err = kstrtol(buf, 10, &val);
1437  if (err)
1438  return err;
1439 
1440  val /= 8;
1441  val = SENSORS_LIMIT(val, 0, 255);
1442 
1443  mutex_lock(&data->update_lock);
1444  f71882fg_write8(data, F71882FG_REG_IN1_HIGH, val);
1445  data->in1_max = val;
1446  mutex_unlock(&data->update_lock);
1447 
1448  return count;
1449 }
1450 
1451 static ssize_t show_in_beep(struct device *dev, struct device_attribute
1452  *devattr, char *buf)
1453 {
1454  struct f71882fg_data *data = f71882fg_update_device(dev);
1455  int nr = to_sensor_dev_attr_2(devattr)->index;
1456 
1457  if (data->in_beep & (1 << nr))
1458  return sprintf(buf, "1\n");
1459  else
1460  return sprintf(buf, "0\n");
1461 }
1462 
1463 static ssize_t store_in_beep(struct device *dev, struct device_attribute
1464  *devattr, const char *buf, size_t count)
1465 {
1466  struct f71882fg_data *data = dev_get_drvdata(dev);
1467  int err, nr = to_sensor_dev_attr_2(devattr)->index;
1468  unsigned long val;
1469 
1470  err = kstrtoul(buf, 10, &val);
1471  if (err)
1472  return err;
1473 
1474  mutex_lock(&data->update_lock);
1475  data->in_beep = f71882fg_read8(data, F71882FG_REG_IN_BEEP);
1476  if (val)
1477  data->in_beep |= 1 << nr;
1478  else
1479  data->in_beep &= ~(1 << nr);
1480 
1481  f71882fg_write8(data, F71882FG_REG_IN_BEEP, data->in_beep);
1482  mutex_unlock(&data->update_lock);
1483 
1484  return count;
1485 }
1486 
1487 static ssize_t show_in_alarm(struct device *dev, struct device_attribute
1488  *devattr, char *buf)
1489 {
1490  struct f71882fg_data *data = f71882fg_update_device(dev);
1491  int nr = to_sensor_dev_attr_2(devattr)->index;
1492 
1493  if (data->in_status & (1 << nr))
1494  return sprintf(buf, "1\n");
1495  else
1496  return sprintf(buf, "0\n");
1497 }
1498 
1499 static ssize_t show_temp(struct device *dev, struct device_attribute *devattr,
1500  char *buf)
1501 {
1502  struct f71882fg_data *data = f71882fg_update_device(dev);
1503  int nr = to_sensor_dev_attr_2(devattr)->index;
1504  int sign, temp;
1505 
1506  if (data->type == f71858fg) {
1507  /* TEMP_TABLE_SEL 1 or 3 ? */
1508  if (data->temp_config & 1) {
1509  sign = data->temp[nr] & 0x0001;
1510  temp = (data->temp[nr] >> 5) & 0x7ff;
1511  } else {
1512  sign = data->temp[nr] & 0x8000;
1513  temp = (data->temp[nr] >> 5) & 0x3ff;
1514  }
1515  temp *= 125;
1516  if (sign)
1517  temp -= 128000;
1518  } else
1519  temp = data->temp[nr] * 1000;
1520 
1521  return sprintf(buf, "%d\n", temp);
1522 }
1523 
1524 static ssize_t show_temp_max(struct device *dev, struct device_attribute
1525  *devattr, char *buf)
1526 {
1527  struct f71882fg_data *data = f71882fg_update_device(dev);
1528  int nr = to_sensor_dev_attr_2(devattr)->index;
1529 
1530  return sprintf(buf, "%d\n", data->temp_high[nr] * 1000);
1531 }
1532 
1533 static ssize_t store_temp_max(struct device *dev, struct device_attribute
1534  *devattr, const char *buf, size_t count)
1535 {
1536  struct f71882fg_data *data = dev_get_drvdata(dev);
1537  int err, nr = to_sensor_dev_attr_2(devattr)->index;
1538  long val;
1539 
1540  err = kstrtol(buf, 10, &val);
1541  if (err)
1542  return err;
1543 
1544  val /= 1000;
1545  val = SENSORS_LIMIT(val, 0, 255);
1546 
1547  mutex_lock(&data->update_lock);
1548  f71882fg_write8(data, F71882FG_REG_TEMP_HIGH(nr), val);
1549  data->temp_high[nr] = val;
1550  mutex_unlock(&data->update_lock);
1551 
1552  return count;
1553 }
1554 
1555 static ssize_t show_temp_max_hyst(struct device *dev, struct device_attribute
1556  *devattr, char *buf)
1557 {
1558  struct f71882fg_data *data = f71882fg_update_device(dev);
1559  int nr = to_sensor_dev_attr_2(devattr)->index;
1560  int temp_max_hyst;
1561 
1562  mutex_lock(&data->update_lock);
1563  if (nr & 1)
1564  temp_max_hyst = data->temp_hyst[nr / 2] >> 4;
1565  else
1566  temp_max_hyst = data->temp_hyst[nr / 2] & 0x0f;
1567  temp_max_hyst = (data->temp_high[nr] - temp_max_hyst) * 1000;
1568  mutex_unlock(&data->update_lock);
1569 
1570  return sprintf(buf, "%d\n", temp_max_hyst);
1571 }
1572 
1573 static ssize_t store_temp_max_hyst(struct device *dev, struct device_attribute
1574  *devattr, const char *buf, size_t count)
1575 {
1576  struct f71882fg_data *data = dev_get_drvdata(dev);
1577  int err, nr = to_sensor_dev_attr_2(devattr)->index;
1578  ssize_t ret = count;
1579  u8 reg;
1580  long val;
1581 
1582  err = kstrtol(buf, 10, &val);
1583  if (err)
1584  return err;
1585 
1586  val /= 1000;
1587 
1588  mutex_lock(&data->update_lock);
1589 
1590  /* convert abs to relative and check */
1591  data->temp_high[nr] = f71882fg_read8(data, F71882FG_REG_TEMP_HIGH(nr));
1592  val = SENSORS_LIMIT(val, data->temp_high[nr] - 15,
1593  data->temp_high[nr]);
1594  val = data->temp_high[nr] - val;
1595 
1596  /* convert value to register contents */
1597  reg = f71882fg_read8(data, F71882FG_REG_TEMP_HYST(nr / 2));
1598  if (nr & 1)
1599  reg = (reg & 0x0f) | (val << 4);
1600  else
1601  reg = (reg & 0xf0) | val;
1602  f71882fg_write8(data, F71882FG_REG_TEMP_HYST(nr / 2), reg);
1603  data->temp_hyst[nr / 2] = reg;
1604 
1605  mutex_unlock(&data->update_lock);
1606  return ret;
1607 }
1608 
1609 static ssize_t show_temp_crit(struct device *dev, struct device_attribute
1610  *devattr, char *buf)
1611 {
1612  struct f71882fg_data *data = f71882fg_update_device(dev);
1613  int nr = to_sensor_dev_attr_2(devattr)->index;
1614 
1615  return sprintf(buf, "%d\n", data->temp_ovt[nr] * 1000);
1616 }
1617 
1618 static ssize_t store_temp_crit(struct device *dev, struct device_attribute
1619  *devattr, const char *buf, size_t count)
1620 {
1621  struct f71882fg_data *data = dev_get_drvdata(dev);
1622  int err, nr = to_sensor_dev_attr_2(devattr)->index;
1623  long val;
1624 
1625  err = kstrtol(buf, 10, &val);
1626  if (err)
1627  return err;
1628 
1629  val /= 1000;
1630  val = SENSORS_LIMIT(val, 0, 255);
1631 
1632  mutex_lock(&data->update_lock);
1633  f71882fg_write8(data, F71882FG_REG_TEMP_OVT(nr), val);
1634  data->temp_ovt[nr] = val;
1635  mutex_unlock(&data->update_lock);
1636 
1637  return count;
1638 }
1639 
1640 static ssize_t show_temp_crit_hyst(struct device *dev, struct device_attribute
1641  *devattr, char *buf)
1642 {
1643  struct f71882fg_data *data = f71882fg_update_device(dev);
1644  int nr = to_sensor_dev_attr_2(devattr)->index;
1645  int temp_crit_hyst;
1646 
1647  mutex_lock(&data->update_lock);
1648  if (nr & 1)
1649  temp_crit_hyst = data->temp_hyst[nr / 2] >> 4;
1650  else
1651  temp_crit_hyst = data->temp_hyst[nr / 2] & 0x0f;
1652  temp_crit_hyst = (data->temp_ovt[nr] - temp_crit_hyst) * 1000;
1653  mutex_unlock(&data->update_lock);
1654 
1655  return sprintf(buf, "%d\n", temp_crit_hyst);
1656 }
1657 
1658 static ssize_t show_temp_type(struct device *dev, struct device_attribute
1659  *devattr, char *buf)
1660 {
1661  struct f71882fg_data *data = f71882fg_update_device(dev);
1662  int nr = to_sensor_dev_attr_2(devattr)->index;
1663 
1664  return sprintf(buf, "%d\n", data->temp_type[nr]);
1665 }
1666 
1667 static ssize_t show_temp_beep(struct device *dev, struct device_attribute
1668  *devattr, char *buf)
1669 {
1670  struct f71882fg_data *data = f71882fg_update_device(dev);
1671  int nr = to_sensor_dev_attr_2(devattr)->index;
1672 
1673  if (data->temp_beep & (1 << nr))
1674  return sprintf(buf, "1\n");
1675  else
1676  return sprintf(buf, "0\n");
1677 }
1678 
1679 static ssize_t store_temp_beep(struct device *dev, struct device_attribute
1680  *devattr, const char *buf, size_t count)
1681 {
1682  struct f71882fg_data *data = dev_get_drvdata(dev);
1683  int err, nr = to_sensor_dev_attr_2(devattr)->index;
1684  unsigned long val;
1685 
1686  err = kstrtoul(buf, 10, &val);
1687  if (err)
1688  return err;
1689 
1690  mutex_lock(&data->update_lock);
1691  data->temp_beep = f71882fg_read8(data, F71882FG_REG_TEMP_BEEP);
1692  if (val)
1693  data->temp_beep |= 1 << nr;
1694  else
1695  data->temp_beep &= ~(1 << nr);
1696 
1697  f71882fg_write8(data, F71882FG_REG_TEMP_BEEP, data->temp_beep);
1698  mutex_unlock(&data->update_lock);
1699 
1700  return count;
1701 }
1702 
1703 static ssize_t show_temp_alarm(struct device *dev, struct device_attribute
1704  *devattr, char *buf)
1705 {
1706  struct f71882fg_data *data = f71882fg_update_device(dev);
1707  int nr = to_sensor_dev_attr_2(devattr)->index;
1708 
1709  if (data->temp_status & (1 << nr))
1710  return sprintf(buf, "1\n");
1711  else
1712  return sprintf(buf, "0\n");
1713 }
1714 
1715 static ssize_t show_temp_fault(struct device *dev, struct device_attribute
1716  *devattr, char *buf)
1717 {
1718  struct f71882fg_data *data = f71882fg_update_device(dev);
1719  int nr = to_sensor_dev_attr_2(devattr)->index;
1720 
1721  if (data->temp_diode_open & (1 << nr))
1722  return sprintf(buf, "1\n");
1723  else
1724  return sprintf(buf, "0\n");
1725 }
1726 
1727 static ssize_t show_pwm(struct device *dev,
1728  struct device_attribute *devattr, char *buf)
1729 {
1730  struct f71882fg_data *data = f71882fg_update_device(dev);
1731  int val, nr = to_sensor_dev_attr_2(devattr)->index;
1732  mutex_lock(&data->update_lock);
1733  if (data->pwm_enable & (1 << (2 * nr)))
1734  /* PWM mode */
1735  val = data->pwm[nr];
1736  else {
1737  /* RPM mode */
1738  val = 255 * fan_from_reg(data->fan_target[nr])
1739  / fan_from_reg(data->fan_full_speed[nr]);
1740  }
1741  mutex_unlock(&data->update_lock);
1742  return sprintf(buf, "%d\n", val);
1743 }
1744 
1745 static ssize_t store_pwm(struct device *dev,
1746  struct device_attribute *devattr, const char *buf,
1747  size_t count)
1748 {
1749  struct f71882fg_data *data = dev_get_drvdata(dev);
1750  int err, nr = to_sensor_dev_attr_2(devattr)->index;
1751  long val;
1752 
1753  err = kstrtol(buf, 10, &val);
1754  if (err)
1755  return err;
1756 
1757  val = SENSORS_LIMIT(val, 0, 255);
1758 
1759  mutex_lock(&data->update_lock);
1760  data->pwm_enable = f71882fg_read8(data, F71882FG_REG_PWM_ENABLE);
1761  if ((data->type == f8000 && ((data->pwm_enable >> 2 * nr) & 3) != 2) ||
1762  (data->type != f8000 && !((data->pwm_enable >> 2 * nr) & 2))) {
1763  count = -EROFS;
1764  goto leave;
1765  }
1766  if (data->pwm_enable & (1 << (2 * nr))) {
1767  /* PWM mode */
1768  f71882fg_write8(data, F71882FG_REG_PWM(nr), val);
1769  data->pwm[nr] = val;
1770  } else {
1771  /* RPM mode */
1772  int target, full_speed;
1773  full_speed = f71882fg_read16(data,
1774  F71882FG_REG_FAN_FULL_SPEED(nr));
1775  target = fan_to_reg(val * fan_from_reg(full_speed) / 255);
1776  f71882fg_write16(data, F71882FG_REG_FAN_TARGET(nr), target);
1777  data->fan_target[nr] = target;
1778  data->fan_full_speed[nr] = full_speed;
1779  }
1780 leave:
1781  mutex_unlock(&data->update_lock);
1782 
1783  return count;
1784 }
1785 
1786 static ssize_t show_simple_pwm(struct device *dev,
1787  struct device_attribute *devattr, char *buf)
1788 {
1789  struct f71882fg_data *data = f71882fg_update_device(dev);
1790  int val, nr = to_sensor_dev_attr_2(devattr)->index;
1791 
1792  val = data->pwm[nr];
1793  return sprintf(buf, "%d\n", val);
1794 }
1795 
1796 static ssize_t store_simple_pwm(struct device *dev,
1797  struct device_attribute *devattr,
1798  const char *buf, size_t count)
1799 {
1800  struct f71882fg_data *data = dev_get_drvdata(dev);
1801  int err, nr = to_sensor_dev_attr_2(devattr)->index;
1802  long val;
1803 
1804  err = kstrtol(buf, 10, &val);
1805  if (err)
1806  return err;
1807 
1808  val = SENSORS_LIMIT(val, 0, 255);
1809 
1810  mutex_lock(&data->update_lock);
1811  f71882fg_write8(data, F71882FG_REG_PWM(nr), val);
1812  data->pwm[nr] = val;
1813  mutex_unlock(&data->update_lock);
1814 
1815  return count;
1816 }
1817 
1818 static ssize_t show_pwm_enable(struct device *dev,
1819  struct device_attribute *devattr, char *buf)
1820 {
1821  int result = 0;
1822  struct f71882fg_data *data = f71882fg_update_device(dev);
1823  int nr = to_sensor_dev_attr_2(devattr)->index;
1824 
1825  switch ((data->pwm_enable >> 2 * nr) & 3) {
1826  case 0:
1827  case 1:
1828  result = 2; /* Normal auto mode */
1829  break;
1830  case 2:
1831  result = 1; /* Manual mode */
1832  break;
1833  case 3:
1834  if (data->type == f8000)
1835  result = 3; /* Thermostat mode */
1836  else
1837  result = 1; /* Manual mode */
1838  break;
1839  }
1840 
1841  return sprintf(buf, "%d\n", result);
1842 }
1843 
1844 static ssize_t store_pwm_enable(struct device *dev, struct device_attribute
1845  *devattr, const char *buf, size_t count)
1846 {
1847  struct f71882fg_data *data = dev_get_drvdata(dev);
1848  int err, nr = to_sensor_dev_attr_2(devattr)->index;
1849  long val;
1850 
1851  err = kstrtol(buf, 10, &val);
1852  if (err)
1853  return err;
1854 
1855  /* Special case for F8000 pwm channel 3 which only does auto mode */
1856  if (data->type == f8000 && nr == 2 && val != 2)
1857  return -EINVAL;
1858 
1859  mutex_lock(&data->update_lock);
1860  data->pwm_enable = f71882fg_read8(data, F71882FG_REG_PWM_ENABLE);
1861  /* Special case for F8000 auto PWM mode / Thermostat mode */
1862  if (data->type == f8000 && ((data->pwm_enable >> 2 * nr) & 1)) {
1863  switch (val) {
1864  case 2:
1865  data->pwm_enable &= ~(2 << (2 * nr));
1866  break; /* Normal auto mode */
1867  case 3:
1868  data->pwm_enable |= 2 << (2 * nr);
1869  break; /* Thermostat mode */
1870  default:
1871  count = -EINVAL;
1872  goto leave;
1873  }
1874  } else {
1875  switch (val) {
1876  case 1:
1877  /* The f71858fg does not support manual RPM mode */
1878  if (data->type == f71858fg &&
1879  ((data->pwm_enable >> (2 * nr)) & 1)) {
1880  count = -EINVAL;
1881  goto leave;
1882  }
1883  data->pwm_enable |= 2 << (2 * nr);
1884  break; /* Manual */
1885  case 2:
1886  data->pwm_enable &= ~(2 << (2 * nr));
1887  break; /* Normal auto mode */
1888  default:
1889  count = -EINVAL;
1890  goto leave;
1891  }
1892  }
1893  f71882fg_write8(data, F71882FG_REG_PWM_ENABLE, data->pwm_enable);
1894 leave:
1895  mutex_unlock(&data->update_lock);
1896 
1897  return count;
1898 }
1899 
1900 static ssize_t show_pwm_auto_point_pwm(struct device *dev,
1901  struct device_attribute *devattr,
1902  char *buf)
1903 {
1904  int result;
1905  struct f71882fg_data *data = f71882fg_update_device(dev);
1906  int pwm = to_sensor_dev_attr_2(devattr)->index;
1907  int point = to_sensor_dev_attr_2(devattr)->nr;
1908 
1909  mutex_lock(&data->update_lock);
1910  if (data->pwm_enable & (1 << (2 * pwm))) {
1911  /* PWM mode */
1912  result = data->pwm_auto_point_pwm[pwm][point];
1913  } else {
1914  /* RPM mode */
1915  result = 32 * 255 / (32 + data->pwm_auto_point_pwm[pwm][point]);
1916  }
1917  mutex_unlock(&data->update_lock);
1918 
1919  return sprintf(buf, "%d\n", result);
1920 }
1921 
1922 static ssize_t store_pwm_auto_point_pwm(struct device *dev,
1923  struct device_attribute *devattr,
1924  const char *buf, size_t count)
1925 {
1926  struct f71882fg_data *data = dev_get_drvdata(dev);
1927  int err, pwm = to_sensor_dev_attr_2(devattr)->index;
1928  int point = to_sensor_dev_attr_2(devattr)->nr;
1929  long val;
1930 
1931  err = kstrtol(buf, 10, &val);
1932  if (err)
1933  return err;
1934 
1935  val = SENSORS_LIMIT(val, 0, 255);
1936 
1937  mutex_lock(&data->update_lock);
1938  data->pwm_enable = f71882fg_read8(data, F71882FG_REG_PWM_ENABLE);
1939  if (data->pwm_enable & (1 << (2 * pwm))) {
1940  /* PWM mode */
1941  } else {
1942  /* RPM mode */
1943  if (val < 29) /* Prevent negative numbers */
1944  val = 255;
1945  else
1946  val = (255 - val) * 32 / val;
1947  }
1948  f71882fg_write8(data, F71882FG_REG_POINT_PWM(pwm, point), val);
1949  data->pwm_auto_point_pwm[pwm][point] = val;
1950  mutex_unlock(&data->update_lock);
1951 
1952  return count;
1953 }
1954 
1955 static ssize_t show_pwm_auto_point_temp_hyst(struct device *dev,
1956  struct device_attribute *devattr,
1957  char *buf)
1958 {
1959  int result = 0;
1960  struct f71882fg_data *data = f71882fg_update_device(dev);
1961  int nr = to_sensor_dev_attr_2(devattr)->index;
1962  int point = to_sensor_dev_attr_2(devattr)->nr;
1963 
1964  mutex_lock(&data->update_lock);
1965  if (nr & 1)
1966  result = data->pwm_auto_point_hyst[nr / 2] >> 4;
1967  else
1968  result = data->pwm_auto_point_hyst[nr / 2] & 0x0f;
1969  result = 1000 * (data->pwm_auto_point_temp[nr][point] - result);
1970  mutex_unlock(&data->update_lock);
1971 
1972  return sprintf(buf, "%d\n", result);
1973 }
1974 
1975 static ssize_t store_pwm_auto_point_temp_hyst(struct device *dev,
1976  struct device_attribute *devattr,
1977  const char *buf, size_t count)
1978 {
1979  struct f71882fg_data *data = dev_get_drvdata(dev);
1980  int err, nr = to_sensor_dev_attr_2(devattr)->index;
1981  int point = to_sensor_dev_attr_2(devattr)->nr;
1982  u8 reg;
1983  long val;
1984 
1985  err = kstrtol(buf, 10, &val);
1986  if (err)
1987  return err;
1988 
1989  val /= 1000;
1990 
1991  mutex_lock(&data->update_lock);
1992  data->pwm_auto_point_temp[nr][point] =
1993  f71882fg_read8(data, F71882FG_REG_POINT_TEMP(nr, point));
1994  val = SENSORS_LIMIT(val, data->pwm_auto_point_temp[nr][point] - 15,
1995  data->pwm_auto_point_temp[nr][point]);
1996  val = data->pwm_auto_point_temp[nr][point] - val;
1997 
1998  reg = f71882fg_read8(data, F71882FG_REG_FAN_HYST(nr / 2));
1999  if (nr & 1)
2000  reg = (reg & 0x0f) | (val << 4);
2001  else
2002  reg = (reg & 0xf0) | val;
2003 
2004  f71882fg_write8(data, F71882FG_REG_FAN_HYST(nr / 2), reg);
2005  data->pwm_auto_point_hyst[nr / 2] = reg;
2006  mutex_unlock(&data->update_lock);
2007 
2008  return count;
2009 }
2010 
2011 static ssize_t show_pwm_interpolate(struct device *dev,
2012  struct device_attribute *devattr, char *buf)
2013 {
2014  int result;
2015  struct f71882fg_data *data = f71882fg_update_device(dev);
2016  int nr = to_sensor_dev_attr_2(devattr)->index;
2017 
2018  result = (data->pwm_auto_point_mapping[nr] >> 4) & 1;
2019 
2020  return sprintf(buf, "%d\n", result);
2021 }
2022 
2023 static ssize_t store_pwm_interpolate(struct device *dev,
2024  struct device_attribute *devattr,
2025  const char *buf, size_t count)
2026 {
2027  struct f71882fg_data *data = dev_get_drvdata(dev);
2028  int err, nr = to_sensor_dev_attr_2(devattr)->index;
2029  unsigned long val;
2030 
2031  err = kstrtoul(buf, 10, &val);
2032  if (err)
2033  return err;
2034 
2035  mutex_lock(&data->update_lock);
2036  data->pwm_auto_point_mapping[nr] =
2037  f71882fg_read8(data, F71882FG_REG_POINT_MAPPING(nr));
2038  if (val)
2039  val = data->pwm_auto_point_mapping[nr] | (1 << 4);
2040  else
2041  val = data->pwm_auto_point_mapping[nr] & (~(1 << 4));
2042  f71882fg_write8(data, F71882FG_REG_POINT_MAPPING(nr), val);
2043  data->pwm_auto_point_mapping[nr] = val;
2044  mutex_unlock(&data->update_lock);
2045 
2046  return count;
2047 }
2048 
2049 static ssize_t show_pwm_auto_point_channel(struct device *dev,
2050  struct device_attribute *devattr,
2051  char *buf)
2052 {
2053  int result;
2054  struct f71882fg_data *data = f71882fg_update_device(dev);
2055  int nr = to_sensor_dev_attr_2(devattr)->index;
2056 
2057  result = 1 << ((data->pwm_auto_point_mapping[nr] & 3) -
2058  data->temp_start);
2059 
2060  return sprintf(buf, "%d\n", result);
2061 }
2062 
2063 static ssize_t store_pwm_auto_point_channel(struct device *dev,
2064  struct device_attribute *devattr,
2065  const char *buf, size_t count)
2066 {
2067  struct f71882fg_data *data = dev_get_drvdata(dev);
2068  int err, nr = to_sensor_dev_attr_2(devattr)->index;
2069  long val;
2070 
2071  err = kstrtol(buf, 10, &val);
2072  if (err)
2073  return err;
2074 
2075  switch (val) {
2076  case 1:
2077  val = 0;
2078  break;
2079  case 2:
2080  val = 1;
2081  break;
2082  case 4:
2083  val = 2;
2084  break;
2085  default:
2086  return -EINVAL;
2087  }
2088  val += data->temp_start;
2089  mutex_lock(&data->update_lock);
2090  data->pwm_auto_point_mapping[nr] =
2091  f71882fg_read8(data, F71882FG_REG_POINT_MAPPING(nr));
2092  val = (data->pwm_auto_point_mapping[nr] & 0xfc) | val;
2093  f71882fg_write8(data, F71882FG_REG_POINT_MAPPING(nr), val);
2094  data->pwm_auto_point_mapping[nr] = val;
2095  mutex_unlock(&data->update_lock);
2096 
2097  return count;
2098 }
2099 
2100 static ssize_t show_pwm_auto_point_temp(struct device *dev,
2101  struct device_attribute *devattr,
2102  char *buf)
2103 {
2104  int result;
2105  struct f71882fg_data *data = f71882fg_update_device(dev);
2106  int pwm = to_sensor_dev_attr_2(devattr)->index;
2107  int point = to_sensor_dev_attr_2(devattr)->nr;
2108 
2109  result = data->pwm_auto_point_temp[pwm][point];
2110  return sprintf(buf, "%d\n", 1000 * result);
2111 }
2112 
2113 static ssize_t store_pwm_auto_point_temp(struct device *dev,
2114  struct device_attribute *devattr,
2115  const char *buf, size_t count)
2116 {
2117  struct f71882fg_data *data = dev_get_drvdata(dev);
2118  int err, pwm = to_sensor_dev_attr_2(devattr)->index;
2119  int point = to_sensor_dev_attr_2(devattr)->nr;
2120  long val;
2121 
2122  err = kstrtol(buf, 10, &val);
2123  if (err)
2124  return err;
2125 
2126  val /= 1000;
2127 
2128  if (data->auto_point_temp_signed)
2129  val = SENSORS_LIMIT(val, -128, 127);
2130  else
2131  val = SENSORS_LIMIT(val, 0, 127);
2132 
2133  mutex_lock(&data->update_lock);
2134  f71882fg_write8(data, F71882FG_REG_POINT_TEMP(pwm, point), val);
2135  data->pwm_auto_point_temp[pwm][point] = val;
2136  mutex_unlock(&data->update_lock);
2137 
2138  return count;
2139 }
2140 
2141 static ssize_t show_name(struct device *dev, struct device_attribute *devattr,
2142  char *buf)
2143 {
2144  struct f71882fg_data *data = dev_get_drvdata(dev);
2145  return sprintf(buf, "%s\n", f71882fg_names[data->type]);
2146 }
2147 
2148 static int __devinit f71882fg_create_sysfs_files(struct platform_device *pdev,
2149  struct sensor_device_attribute_2 *attr, int count)
2150 {
2151  int err, i;
2152 
2153  for (i = 0; i < count; i++) {
2154  err = device_create_file(&pdev->dev, &attr[i].dev_attr);
2155  if (err)
2156  return err;
2157  }
2158  return 0;
2159 }
2160 
2161 static void f71882fg_remove_sysfs_files(struct platform_device *pdev,
2162  struct sensor_device_attribute_2 *attr, int count)
2163 {
2164  int i;
2165 
2166  for (i = 0; i < count; i++)
2167  device_remove_file(&pdev->dev, &attr[i].dev_attr);
2168 }
2169 
2170 static int __devinit f71882fg_create_fan_sysfs_files(
2171  struct platform_device *pdev, int idx)
2172 {
2173  struct f71882fg_data *data = platform_get_drvdata(pdev);
2174  int err;
2175 
2176  /* Sanity check the pwm setting */
2177  err = 0;
2178  switch (data->type) {
2179  case f71858fg:
2180  if (((data->pwm_enable >> (idx * 2)) & 3) == 3)
2181  err = 1;
2182  break;
2183  case f71862fg:
2184  if (((data->pwm_enable >> (idx * 2)) & 1) != 1)
2185  err = 1;
2186  break;
2187  case f8000:
2188  if (idx == 2)
2189  err = data->pwm_enable & 0x20;
2190  break;
2191  default:
2192  break;
2193  }
2194  if (err) {
2195  dev_err(&pdev->dev,
2196  "Invalid (reserved) pwm settings: 0x%02x, "
2197  "skipping fan %d\n",
2198  (data->pwm_enable >> (idx * 2)) & 3, idx + 1);
2199  return 0; /* This is a non fatal condition */
2200  }
2201 
2202  err = f71882fg_create_sysfs_files(pdev, &fxxxx_fan_attr[idx][0],
2203  ARRAY_SIZE(fxxxx_fan_attr[0]));
2204  if (err)
2205  return err;
2206 
2207  if (f71882fg_fan_has_beep[data->type]) {
2208  err = f71882fg_create_sysfs_files(pdev,
2209  &fxxxx_fan_beep_attr[idx],
2210  1);
2211  if (err)
2212  return err;
2213  }
2214 
2215  dev_info(&pdev->dev, "Fan: %d is in %s mode\n", idx + 1,
2216  (data->pwm_enable & (1 << (2 * idx))) ? "duty-cycle" : "RPM");
2217 
2218  /* Check for unsupported auto pwm settings */
2219  switch (data->type) {
2220  case f71808e:
2221  case f71808a:
2222  case f71869:
2223  case f71869a:
2224  case f71889fg:
2225  case f71889ed:
2226  case f71889a:
2227  data->pwm_auto_point_mapping[idx] =
2228  f71882fg_read8(data, F71882FG_REG_POINT_MAPPING(idx));
2229  if ((data->pwm_auto_point_mapping[idx] & 0x80) ||
2230  (data->pwm_auto_point_mapping[idx] & 3) == 0) {
2231  dev_warn(&pdev->dev,
2232  "Auto pwm controlled by raw digital "
2233  "data, disabling pwm auto_point "
2234  "sysfs attributes for fan %d\n", idx + 1);
2235  return 0; /* This is a non fatal condition */
2236  }
2237  break;
2238  default:
2239  break;
2240  }
2241 
2242  switch (data->type) {
2243  case f71862fg:
2244  err = f71882fg_create_sysfs_files(pdev,
2245  &f71862fg_auto_pwm_attr[idx][0],
2246  ARRAY_SIZE(f71862fg_auto_pwm_attr[0]));
2247  break;
2248  case f71808e:
2249  case f71869:
2250  err = f71882fg_create_sysfs_files(pdev,
2251  &f71869_auto_pwm_attr[idx][0],
2252  ARRAY_SIZE(f71869_auto_pwm_attr[0]));
2253  break;
2254  case f8000:
2255  err = f71882fg_create_sysfs_files(pdev,
2256  &f8000_auto_pwm_attr[idx][0],
2257  ARRAY_SIZE(f8000_auto_pwm_attr[0]));
2258  break;
2259  default:
2260  err = f71882fg_create_sysfs_files(pdev,
2261  &fxxxx_auto_pwm_attr[idx][0],
2262  ARRAY_SIZE(fxxxx_auto_pwm_attr[0]));
2263  }
2264 
2265  return err;
2266 }
2267 
2268 static int __devinit f71882fg_probe(struct platform_device *pdev)
2269 {
2270  struct f71882fg_data *data;
2271  struct f71882fg_sio_data *sio_data = pdev->dev.platform_data;
2272  int nr_fans = f71882fg_nr_fans[sio_data->type];
2273  int nr_temps = f71882fg_nr_temps[sio_data->type];
2274  int err, i;
2275  u8 start_reg, reg;
2276 
2277  data = devm_kzalloc(&pdev->dev, sizeof(struct f71882fg_data),
2278  GFP_KERNEL);
2279  if (!data)
2280  return -ENOMEM;
2281 
2282  data->addr = platform_get_resource(pdev, IORESOURCE_IO, 0)->start;
2283  data->type = sio_data->type;
2284  data->temp_start =
2285  (data->type == f71858fg || data->type == f8000) ? 0 : 1;
2286  mutex_init(&data->update_lock);
2287  platform_set_drvdata(pdev, data);
2288 
2289  start_reg = f71882fg_read8(data, F71882FG_REG_START);
2290  if (start_reg & 0x04) {
2291  dev_warn(&pdev->dev, "Hardware monitor is powered down\n");
2292  return -ENODEV;
2293  }
2294  if (!(start_reg & 0x03)) {
2295  dev_warn(&pdev->dev, "Hardware monitoring not activated\n");
2296  return -ENODEV;
2297  }
2298 
2299  /* Register sysfs interface files */
2300  err = device_create_file(&pdev->dev, &dev_attr_name);
2301  if (err)
2302  goto exit_unregister_sysfs;
2303 
2304  if (start_reg & 0x01) {
2305  switch (data->type) {
2306  case f71858fg:
2307  data->temp_config =
2308  f71882fg_read8(data, F71882FG_REG_TEMP_CONFIG);
2309  if (data->temp_config & 0x10)
2310  /*
2311  * The f71858fg temperature alarms behave as
2312  * the f8000 alarms in this mode
2313  */
2314  err = f71882fg_create_sysfs_files(pdev,
2315  f8000_temp_attr,
2316  ARRAY_SIZE(f8000_temp_attr));
2317  else
2318  err = f71882fg_create_sysfs_files(pdev,
2319  f71858fg_temp_attr,
2320  ARRAY_SIZE(f71858fg_temp_attr));
2321  break;
2322  case f8000:
2323  err = f71882fg_create_sysfs_files(pdev,
2324  f8000_temp_attr,
2325  ARRAY_SIZE(f8000_temp_attr));
2326  break;
2327  default:
2328  err = f71882fg_create_sysfs_files(pdev,
2329  &fxxxx_temp_attr[0][0],
2330  ARRAY_SIZE(fxxxx_temp_attr[0]) * nr_temps);
2331  }
2332  if (err)
2333  goto exit_unregister_sysfs;
2334 
2335  if (f71882fg_temp_has_beep[data->type]) {
2336  err = f71882fg_create_sysfs_files(pdev,
2337  &fxxxx_temp_beep_attr[0][0],
2338  ARRAY_SIZE(fxxxx_temp_beep_attr[0])
2339  * nr_temps);
2340  if (err)
2341  goto exit_unregister_sysfs;
2342  }
2343 
2344  for (i = 0; i < F71882FG_MAX_INS; i++) {
2345  if (f71882fg_has_in[data->type][i]) {
2346  err = device_create_file(&pdev->dev,
2347  &fxxxx_in_attr[i].dev_attr);
2348  if (err)
2349  goto exit_unregister_sysfs;
2350  }
2351  }
2352  if (f71882fg_has_in1_alarm[data->type]) {
2353  err = f71882fg_create_sysfs_files(pdev,
2354  fxxxx_in1_alarm_attr,
2355  ARRAY_SIZE(fxxxx_in1_alarm_attr));
2356  if (err)
2357  goto exit_unregister_sysfs;
2358  }
2359  }
2360 
2361  if (start_reg & 0x02) {
2362  switch (data->type) {
2363  case f71808e:
2364  case f71808a:
2365  case f71869:
2366  case f71869a:
2367  /* These always have signed auto point temps */
2368  data->auto_point_temp_signed = 1;
2369  /* Fall through to select correct fan/pwm reg bank! */
2370  case f71889fg:
2371  case f71889ed:
2372  case f71889a:
2373  reg = f71882fg_read8(data, F71882FG_REG_FAN_FAULT_T);
2374  if (reg & F71882FG_FAN_NEG_TEMP_EN)
2375  data->auto_point_temp_signed = 1;
2376  /* Ensure banked pwm registers point to right bank */
2377  reg &= ~F71882FG_FAN_PROG_SEL;
2378  f71882fg_write8(data, F71882FG_REG_FAN_FAULT_T, reg);
2379  break;
2380  default:
2381  break;
2382  }
2383 
2384  data->pwm_enable =
2385  f71882fg_read8(data, F71882FG_REG_PWM_ENABLE);
2386 
2387  for (i = 0; i < nr_fans; i++) {
2388  err = f71882fg_create_fan_sysfs_files(pdev, i);
2389  if (err)
2390  goto exit_unregister_sysfs;
2391  }
2392 
2393  /* Some types have 1 extra fan with limited functionality */
2394  switch (data->type) {
2395  case f71808a:
2396  err = f71882fg_create_sysfs_files(pdev,
2397  f71808a_fan3_attr,
2398  ARRAY_SIZE(f71808a_fan3_attr));
2399  break;
2400  case f8000:
2401  err = f71882fg_create_sysfs_files(pdev,
2402  f8000_fan_attr,
2403  ARRAY_SIZE(f8000_fan_attr));
2404  break;
2405  default:
2406  break;
2407  }
2408  if (err)
2409  goto exit_unregister_sysfs;
2410  }
2411 
2412  data->hwmon_dev = hwmon_device_register(&pdev->dev);
2413  if (IS_ERR(data->hwmon_dev)) {
2414  err = PTR_ERR(data->hwmon_dev);
2415  data->hwmon_dev = NULL;
2416  goto exit_unregister_sysfs;
2417  }
2418 
2419  return 0;
2420 
2421 exit_unregister_sysfs:
2422  f71882fg_remove(pdev); /* Will unregister the sysfs files for us */
2423  return err; /* f71882fg_remove() also frees our data */
2424  return err;
2425 }
2426 
2427 static int f71882fg_remove(struct platform_device *pdev)
2428 {
2429  struct f71882fg_data *data = platform_get_drvdata(pdev);
2430  int nr_fans = f71882fg_nr_fans[data->type];
2431  int nr_temps = f71882fg_nr_temps[data->type];
2432  int i;
2433  u8 start_reg = f71882fg_read8(data, F71882FG_REG_START);
2434 
2435  if (data->hwmon_dev)
2436  hwmon_device_unregister(data->hwmon_dev);
2437 
2438  device_remove_file(&pdev->dev, &dev_attr_name);
2439 
2440  if (start_reg & 0x01) {
2441  switch (data->type) {
2442  case f71858fg:
2443  if (data->temp_config & 0x10)
2444  f71882fg_remove_sysfs_files(pdev,
2445  f8000_temp_attr,
2446  ARRAY_SIZE(f8000_temp_attr));
2447  else
2448  f71882fg_remove_sysfs_files(pdev,
2449  f71858fg_temp_attr,
2450  ARRAY_SIZE(f71858fg_temp_attr));
2451  break;
2452  case f8000:
2453  f71882fg_remove_sysfs_files(pdev,
2454  f8000_temp_attr,
2455  ARRAY_SIZE(f8000_temp_attr));
2456  break;
2457  default:
2458  f71882fg_remove_sysfs_files(pdev,
2459  &fxxxx_temp_attr[0][0],
2460  ARRAY_SIZE(fxxxx_temp_attr[0]) * nr_temps);
2461  }
2462  if (f71882fg_temp_has_beep[data->type]) {
2463  f71882fg_remove_sysfs_files(pdev,
2464  &fxxxx_temp_beep_attr[0][0],
2465  ARRAY_SIZE(fxxxx_temp_beep_attr[0]) * nr_temps);
2466  }
2467 
2468  for (i = 0; i < F71882FG_MAX_INS; i++) {
2469  if (f71882fg_has_in[data->type][i]) {
2470  device_remove_file(&pdev->dev,
2471  &fxxxx_in_attr[i].dev_attr);
2472  }
2473  }
2474  if (f71882fg_has_in1_alarm[data->type]) {
2475  f71882fg_remove_sysfs_files(pdev,
2476  fxxxx_in1_alarm_attr,
2477  ARRAY_SIZE(fxxxx_in1_alarm_attr));
2478  }
2479  }
2480 
2481  if (start_reg & 0x02) {
2482  f71882fg_remove_sysfs_files(pdev, &fxxxx_fan_attr[0][0],
2483  ARRAY_SIZE(fxxxx_fan_attr[0]) * nr_fans);
2484 
2485  if (f71882fg_fan_has_beep[data->type]) {
2486  f71882fg_remove_sysfs_files(pdev,
2487  fxxxx_fan_beep_attr, nr_fans);
2488  }
2489 
2490  switch (data->type) {
2491  case f71808a:
2492  f71882fg_remove_sysfs_files(pdev,
2493  &fxxxx_auto_pwm_attr[0][0],
2494  ARRAY_SIZE(fxxxx_auto_pwm_attr[0]) * nr_fans);
2495  f71882fg_remove_sysfs_files(pdev,
2496  f71808a_fan3_attr,
2497  ARRAY_SIZE(f71808a_fan3_attr));
2498  break;
2499  case f71862fg:
2500  f71882fg_remove_sysfs_files(pdev,
2501  &f71862fg_auto_pwm_attr[0][0],
2502  ARRAY_SIZE(f71862fg_auto_pwm_attr[0]) *
2503  nr_fans);
2504  break;
2505  case f71808e:
2506  case f71869:
2507  f71882fg_remove_sysfs_files(pdev,
2508  &f71869_auto_pwm_attr[0][0],
2509  ARRAY_SIZE(f71869_auto_pwm_attr[0]) * nr_fans);
2510  break;
2511  case f8000:
2512  f71882fg_remove_sysfs_files(pdev,
2513  f8000_fan_attr,
2514  ARRAY_SIZE(f8000_fan_attr));
2515  f71882fg_remove_sysfs_files(pdev,
2516  &f8000_auto_pwm_attr[0][0],
2517  ARRAY_SIZE(f8000_auto_pwm_attr[0]) * nr_fans);
2518  break;
2519  default:
2520  f71882fg_remove_sysfs_files(pdev,
2521  &fxxxx_auto_pwm_attr[0][0],
2522  ARRAY_SIZE(fxxxx_auto_pwm_attr[0]) * nr_fans);
2523  }
2524  }
2525  return 0;
2526 }
2527 
2528 static int __init f71882fg_find(int sioaddr, struct f71882fg_sio_data *sio_data)
2529 {
2530  u16 devid;
2531  unsigned short address;
2532  int err = superio_enter(sioaddr);
2533  if (err)
2534  return err;
2535 
2536  devid = superio_inw(sioaddr, SIO_REG_MANID);
2537  if (devid != SIO_FINTEK_ID) {
2538  pr_debug("Not a Fintek device\n");
2539  err = -ENODEV;
2540  goto exit;
2541  }
2542 
2543  devid = force_id ? force_id : superio_inw(sioaddr, SIO_REG_DEVID);
2544  switch (devid) {
2545  case SIO_F71808E_ID:
2546  sio_data->type = f71808e;
2547  break;
2548  case SIO_F71808A_ID:
2549  sio_data->type = f71808a;
2550  break;
2551  case SIO_F71858_ID:
2552  sio_data->type = f71858fg;
2553  break;
2554  case SIO_F71862_ID:
2555  sio_data->type = f71862fg;
2556  break;
2557  case SIO_F71869_ID:
2558  sio_data->type = f71869;
2559  break;
2560  case SIO_F71869A_ID:
2561  sio_data->type = f71869a;
2562  break;
2563  case SIO_F71882_ID:
2564  sio_data->type = f71882fg;
2565  break;
2566  case SIO_F71889_ID:
2567  sio_data->type = f71889fg;
2568  break;
2569  case SIO_F71889E_ID:
2570  sio_data->type = f71889ed;
2571  break;
2572  case SIO_F71889A_ID:
2573  sio_data->type = f71889a;
2574  break;
2575  case SIO_F8000_ID:
2576  sio_data->type = f8000;
2577  break;
2578  case SIO_F81865_ID:
2579  sio_data->type = f81865f;
2580  break;
2581  default:
2582  pr_info("Unsupported Fintek device: %04x\n",
2583  (unsigned int)devid);
2584  err = -ENODEV;
2585  goto exit;
2586  }
2587 
2588  if (sio_data->type == f71858fg)
2589  superio_select(sioaddr, SIO_F71858FG_LD_HWM);
2590  else
2591  superio_select(sioaddr, SIO_F71882FG_LD_HWM);
2592 
2593  if (!(superio_inb(sioaddr, SIO_REG_ENABLE) & 0x01)) {
2594  pr_warn("Device not activated\n");
2595  err = -ENODEV;
2596  goto exit;
2597  }
2598 
2599  address = superio_inw(sioaddr, SIO_REG_ADDR);
2600  if (address == 0) {
2601  pr_warn("Base address not set\n");
2602  err = -ENODEV;
2603  goto exit;
2604  }
2605  address &= ~(REGION_LENGTH - 1); /* Ignore 3 LSB */
2606 
2607  err = address;
2608  pr_info("Found %s chip at %#x, revision %d\n",
2609  f71882fg_names[sio_data->type], (unsigned int)address,
2610  (int)superio_inb(sioaddr, SIO_REG_DEVREV));
2611 exit:
2612  superio_exit(sioaddr);
2613  return err;
2614 }
2615 
2616 static int __init f71882fg_device_add(int address,
2617  const struct f71882fg_sio_data *sio_data)
2618 {
2619  struct resource res = {
2620  .start = address,
2621  .end = address + REGION_LENGTH - 1,
2622  .flags = IORESOURCE_IO,
2623  };
2624  int err;
2625 
2626  f71882fg_pdev = platform_device_alloc(DRVNAME, address);
2627  if (!f71882fg_pdev)
2628  return -ENOMEM;
2629 
2630  res.name = f71882fg_pdev->name;
2631  err = acpi_check_resource_conflict(&res);
2632  if (err)
2633  goto exit_device_put;
2634 
2635  err = platform_device_add_resources(f71882fg_pdev, &res, 1);
2636  if (err) {
2637  pr_err("Device resource addition failed\n");
2638  goto exit_device_put;
2639  }
2640 
2641  err = platform_device_add_data(f71882fg_pdev, sio_data,
2642  sizeof(struct f71882fg_sio_data));
2643  if (err) {
2644  pr_err("Platform data allocation failed\n");
2645  goto exit_device_put;
2646  }
2647 
2648  err = platform_device_add(f71882fg_pdev);
2649  if (err) {
2650  pr_err("Device addition failed\n");
2651  goto exit_device_put;
2652  }
2653 
2654  return 0;
2655 
2656 exit_device_put:
2657  platform_device_put(f71882fg_pdev);
2658 
2659  return err;
2660 }
2661 
2662 static int __init f71882fg_init(void)
2663 {
2664  int err;
2665  int address;
2666  struct f71882fg_sio_data sio_data;
2667 
2668  memset(&sio_data, 0, sizeof(sio_data));
2669 
2670  address = f71882fg_find(0x2e, &sio_data);
2671  if (address < 0)
2672  address = f71882fg_find(0x4e, &sio_data);
2673  if (address < 0)
2674  return address;
2675 
2676  err = platform_driver_register(&f71882fg_driver);
2677  if (err)
2678  return err;
2679 
2680  err = f71882fg_device_add(address, &sio_data);
2681  if (err)
2682  goto exit_driver;
2683 
2684  return 0;
2685 
2686 exit_driver:
2687  platform_driver_unregister(&f71882fg_driver);
2688  return err;
2689 }
2690 
2691 static void __exit f71882fg_exit(void)
2692 {
2693  platform_device_unregister(f71882fg_pdev);
2694  platform_driver_unregister(&f71882fg_driver);
2695 }
2696 
2697 MODULE_DESCRIPTION("F71882FG Hardware Monitoring Driver");
2698 MODULE_AUTHOR("Hans Edgington, Hans de Goede <[email protected]>");
2699 MODULE_LICENSE("GPL");
2700 
2701 module_init(f71882fg_init);
2702 module_exit(f71882fg_exit);
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