Linux Kernel  3.7.1
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flipper-pic.c
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1 /*
2  * arch/powerpc/platforms/embedded6xx/flipper-pic.c
3  *
4  * Nintendo GameCube/Wii "Flipper" interrupt controller support.
5  * Copyright (C) 2004-2009 The GameCube Linux Team
6  * Copyright (C) 2007,2008,2009 Albert Herranz
7  *
8  * This program is free software; you can redistribute it and/or
9  * modify it under the terms of the GNU General Public License
10  * as published by the Free Software Foundation; either version 2
11  * of the License, or (at your option) any later version.
12  *
13  */
14 #define DRV_MODULE_NAME "flipper-pic"
15 #define pr_fmt(fmt) DRV_MODULE_NAME ": " fmt
16 
17 #include <linux/kernel.h>
18 #include <linux/init.h>
19 #include <linux/irq.h>
20 #include <linux/of.h>
21 #include <asm/io.h>
22 
23 #include "flipper-pic.h"
24 
25 #define FLIPPER_NR_IRQS 32
26 
27 /*
28  * Each interrupt has a corresponding bit in both
29  * the Interrupt Cause (ICR) and Interrupt Mask (IMR) registers.
30  *
31  * Enabling/disabling an interrupt line involves setting/clearing
32  * the corresponding bit in IMR.
33  * Except for the RSW interrupt, all interrupts get deasserted automatically
34  * when the source deasserts the interrupt.
35  */
36 #define FLIPPER_ICR 0x00
37 #define FLIPPER_ICR_RSS (1<<16) /* reset switch state */
38 
39 #define FLIPPER_IMR 0x04
40 
41 #define FLIPPER_RESET 0x24
42 
43 
44 /*
45  * IRQ chip hooks.
46  *
47  */
48 
49 static void flipper_pic_mask_and_ack(struct irq_data *d)
50 {
51  int irq = irqd_to_hwirq(d);
52  void __iomem *io_base = irq_data_get_irq_chip_data(d);
53  u32 mask = 1 << irq;
54 
55  clrbits32(io_base + FLIPPER_IMR, mask);
56  /* this is at least needed for RSW */
57  out_be32(io_base + FLIPPER_ICR, mask);
58 }
59 
60 static void flipper_pic_ack(struct irq_data *d)
61 {
62  int irq = irqd_to_hwirq(d);
63  void __iomem *io_base = irq_data_get_irq_chip_data(d);
64 
65  /* this is at least needed for RSW */
66  out_be32(io_base + FLIPPER_ICR, 1 << irq);
67 }
68 
69 static void flipper_pic_mask(struct irq_data *d)
70 {
71  int irq = irqd_to_hwirq(d);
72  void __iomem *io_base = irq_data_get_irq_chip_data(d);
73 
74  clrbits32(io_base + FLIPPER_IMR, 1 << irq);
75 }
76 
77 static void flipper_pic_unmask(struct irq_data *d)
78 {
79  int irq = irqd_to_hwirq(d);
80  void __iomem *io_base = irq_data_get_irq_chip_data(d);
81 
82  setbits32(io_base + FLIPPER_IMR, 1 << irq);
83 }
84 
85 
86 static struct irq_chip flipper_pic = {
87  .name = "flipper-pic",
88  .irq_ack = flipper_pic_ack,
89  .irq_mask_ack = flipper_pic_mask_and_ack,
90  .irq_mask = flipper_pic_mask,
91  .irq_unmask = flipper_pic_unmask,
92 };
93 
94 /*
95  * IRQ host hooks.
96  *
97  */
98 
99 static struct irq_domain *flipper_irq_host;
100 
101 static int flipper_pic_map(struct irq_domain *h, unsigned int virq,
102  irq_hw_number_t hwirq)
103 {
104  irq_set_chip_data(virq, h->host_data);
105  irq_set_status_flags(virq, IRQ_LEVEL);
106  irq_set_chip_and_handler(virq, &flipper_pic, handle_level_irq);
107  return 0;
108 }
109 
110 static int flipper_pic_match(struct irq_domain *h, struct device_node *np)
111 {
112  return 1;
113 }
114 
115 
116 static const struct irq_domain_ops flipper_irq_domain_ops = {
117  .map = flipper_pic_map,
118  .match = flipper_pic_match,
119 };
120 
121 /*
122  * Platform hooks.
123  *
124  */
125 
126 static void __flipper_quiesce(void __iomem *io_base)
127 {
128  /* mask and ack all IRQs */
129  out_be32(io_base + FLIPPER_IMR, 0x00000000);
130  out_be32(io_base + FLIPPER_ICR, 0xffffffff);
131 }
132 
134 {
135  struct device_node *pi;
136  struct irq_domain *irq_domain = NULL;
137  struct resource res;
138  void __iomem *io_base;
139  int retval;
140 
141  pi = of_get_parent(np);
142  if (!pi) {
143  pr_err("no parent found\n");
144  goto out;
145  }
146  if (!of_device_is_compatible(pi, "nintendo,flipper-pi")) {
147  pr_err("unexpected parent compatible\n");
148  goto out;
149  }
150 
151  retval = of_address_to_resource(pi, 0, &res);
152  if (retval) {
153  pr_err("no io memory range found\n");
154  goto out;
155  }
156  io_base = ioremap(res.start, resource_size(&res));
157 
158  pr_info("controller at 0x%08x mapped to 0x%p\n", res.start, io_base);
159 
160  __flipper_quiesce(io_base);
161 
162  irq_domain = irq_domain_add_linear(np, FLIPPER_NR_IRQS,
163  &flipper_irq_domain_ops, io_base);
164  if (!irq_domain) {
165  pr_err("failed to allocate irq_domain\n");
166  return NULL;
167  }
168 
169 out:
170  return irq_domain;
171 }
172 
173 unsigned int flipper_pic_get_irq(void)
174 {
175  void __iomem *io_base = flipper_irq_host->host_data;
176  int irq;
177  u32 irq_status;
178 
179  irq_status = in_be32(io_base + FLIPPER_ICR) &
180  in_be32(io_base + FLIPPER_IMR);
181  if (irq_status == 0)
182  return NO_IRQ; /* no more IRQs pending */
183 
184  irq = __ffs(irq_status);
185  return irq_linear_revmap(flipper_irq_host, irq);
186 }
187 
188 /*
189  * Probe function.
190  *
191  */
192 
194 {
195  struct device_node *np;
196 
197  np = of_find_compatible_node(NULL, NULL, "nintendo,flipper-pic");
198  BUG_ON(!np);
199 
200  flipper_irq_host = flipper_pic_init(np);
201  BUG_ON(!flipper_irq_host);
202 
203  irq_set_default_host(flipper_irq_host);
204 
205  of_node_put(np);
206 }
207 
208 /*
209  * Misc functions related to the flipper chipset.
210  *
211  */
212 
219 void flipper_quiesce(void)
220 {
221  void __iomem *io_base = flipper_irq_host->host_data;
222 
223  __flipper_quiesce(io_base);
224 }
225 
226 /*
227  * Resets the platform.
228  */
230 {
231  void __iomem *io_base;
232 
233  if (flipper_irq_host && flipper_irq_host->host_data) {
234  io_base = flipper_irq_host->host_data;
235  out_8(io_base + FLIPPER_RESET, 0x00);
236  }
237 }
238 
239 /*
240  * Returns non-zero if the reset button is pressed.
241  */
243 {
244  void __iomem *io_base;
245  u32 icr;
246 
247  if (flipper_irq_host && flipper_irq_host->host_data) {
248  io_base = flipper_irq_host->host_data;
249  icr = in_be32(io_base + FLIPPER_ICR);
250  return !(icr & FLIPPER_ICR_RSS);
251  }
252  return 0;
253 }
254