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Data Structures | Macros | Functions | Variables
fsl_lbc.h File Reference
#include <linux/compiler.h>
#include <linux/types.h>
#include <linux/io.h>
#include <linux/device.h>
#include <linux/spinlock.h>

Go to the source code of this file.

Data Structures

struct  fsl_lbc_bank
 
struct  fsl_lbc_regs
 
struct  fsl_upm
 
struct  fsl_lbc_ctrl
 

Macros

#define BR_BA   0xFFFF8000
 
#define BR_BA_SHIFT   15
 
#define BR_PS   0x00001800
 
#define BR_PS_SHIFT   11
 
#define BR_PS_8   0x00000800 /* Port Size 8 bit */
 
#define BR_PS_16   0x00001000 /* Port Size 16 bit */
 
#define BR_PS_32   0x00001800 /* Port Size 32 bit */
 
#define BR_DECC   0x00000600
 
#define BR_DECC_SHIFT   9
 
#define BR_DECC_OFF   0x00000000 /* HW ECC checking and generation off */
 
#define BR_DECC_CHK   0x00000200 /* HW ECC checking on, generation off */
 
#define BR_DECC_CHK_GEN   0x00000400 /* HW ECC checking and generation on */
 
#define BR_WP   0x00000100
 
#define BR_WP_SHIFT   8
 
#define BR_MSEL   0x000000E0
 
#define BR_MSEL_SHIFT   5
 
#define BR_MS_GPCM   0x00000000 /* GPCM */
 
#define BR_MS_FCM   0x00000020 /* FCM */
 
#define BR_MS_SDRAM   0x00000060 /* SDRAM */
 
#define BR_MS_UPMA   0x00000080 /* UPMA */
 
#define BR_MS_UPMB   0x000000A0 /* UPMB */
 
#define BR_MS_UPMC   0x000000C0 /* UPMC */
 
#define BR_V   0x00000001
 
#define BR_V_SHIFT   0
 
#define BR_RES   ~(BR_BA|BR_PS|BR_DECC|BR_WP|BR_MSEL|BR_V)
 
#define OR0   0x5004
 
#define OR1   0x500C
 
#define OR2   0x5014
 
#define OR3   0x501C
 
#define OR4   0x5024
 
#define OR5   0x502C
 
#define OR6   0x5034
 
#define OR7   0x503C
 
#define OR_FCM_AM   0xFFFF8000
 
#define OR_FCM_AM_SHIFT   15
 
#define OR_FCM_BCTLD   0x00001000
 
#define OR_FCM_BCTLD_SHIFT   12
 
#define OR_FCM_PGS   0x00000400
 
#define OR_FCM_PGS_SHIFT   10
 
#define OR_FCM_CSCT   0x00000200
 
#define OR_FCM_CSCT_SHIFT   9
 
#define OR_FCM_CST   0x00000100
 
#define OR_FCM_CST_SHIFT   8
 
#define OR_FCM_CHT   0x00000080
 
#define OR_FCM_CHT_SHIFT   7
 
#define OR_FCM_SCY   0x00000070
 
#define OR_FCM_SCY_SHIFT   4
 
#define OR_FCM_SCY_1   0x00000010
 
#define OR_FCM_SCY_2   0x00000020
 
#define OR_FCM_SCY_3   0x00000030
 
#define OR_FCM_SCY_4   0x00000040
 
#define OR_FCM_SCY_5   0x00000050
 
#define OR_FCM_SCY_6   0x00000060
 
#define OR_FCM_SCY_7   0x00000070
 
#define OR_FCM_RST   0x00000008
 
#define OR_FCM_RST_SHIFT   3
 
#define OR_FCM_TRLX   0x00000004
 
#define OR_FCM_TRLX_SHIFT   2
 
#define OR_FCM_EHTR   0x00000002
 
#define OR_FCM_EHTR_SHIFT   1
 
#define MxMR_OP_NO   (0 << 28)
 
#define MxMR_OP_WA   (1 << 28)
 
#define MxMR_OP_RA   (2 << 28)
 
#define MxMR_OP_RP   (3 << 28)
 
#define MxMR_MAD   0x3f
 
#define LTESR_BM   0x80000000
 
#define LTESR_FCT   0x40000000
 
#define LTESR_PAR   0x20000000
 
#define LTESR_WP   0x04000000
 
#define LTESR_ATMW   0x00800000
 
#define LTESR_ATMR   0x00400000
 
#define LTESR_CS   0x00080000
 
#define LTESR_UPM   0x00000002
 
#define LTESR_CC   0x00000001
 
#define LTESR_NAND_MASK   (LTESR_FCT | LTESR_PAR | LTESR_CC)
 
#define LTESR_MASK
 
#define LTESR_CLEAR   0xFFFFFFFF
 
#define LTECCR_CLEAR   0xFFFFFFFF
 
#define LTESR_STATUS   LTESR_MASK
 
#define LTEIR_ENABLE   LTESR_MASK
 
#define LTEDR_ENABLE   0x00000000
 
#define LBCR_LDIS   0x80000000
 
#define LBCR_LDIS_SHIFT   31
 
#define LBCR_BCTLC   0x00C00000
 
#define LBCR_BCTLC_SHIFT   22
 
#define LBCR_AHD   0x00200000
 
#define LBCR_LPBSE   0x00020000
 
#define LBCR_LPBSE_SHIFT   17
 
#define LBCR_EPAR   0x00010000
 
#define LBCR_EPAR_SHIFT   16
 
#define LBCR_BMT   0x0000FF00
 
#define LBCR_BMT_SHIFT   8
 
#define LBCR_BMTPS   0x0000000F
 
#define LBCR_BMTPS_SHIFT   0
 
#define LBCR_INIT   0x00040000
 
#define LCRR_DBYP   0x80000000
 
#define LCRR_DBYP_SHIFT   31
 
#define LCRR_BUFCMDC   0x30000000
 
#define LCRR_BUFCMDC_SHIFT   28
 
#define LCRR_ECL   0x03000000
 
#define LCRR_ECL_SHIFT   24
 
#define LCRR_EADC   0x00030000
 
#define LCRR_EADC_SHIFT   16
 
#define LCRR_CLKDIV   0x0000000F
 
#define LCRR_CLKDIV_SHIFT   0
 
#define FMR_CWTO   0x0000F000
 
#define FMR_CWTO_SHIFT   12
 
#define FMR_BOOT   0x00000800
 
#define FMR_ECCM   0x00000100
 
#define FMR_AL   0x00000030
 
#define FMR_AL_SHIFT   4
 
#define FMR_OP   0x00000003
 
#define FMR_OP_SHIFT   0
 
#define FIR_OP0   0xF0000000
 
#define FIR_OP0_SHIFT   28
 
#define FIR_OP1   0x0F000000
 
#define FIR_OP1_SHIFT   24
 
#define FIR_OP2   0x00F00000
 
#define FIR_OP2_SHIFT   20
 
#define FIR_OP3   0x000F0000
 
#define FIR_OP3_SHIFT   16
 
#define FIR_OP4   0x0000F000
 
#define FIR_OP4_SHIFT   12
 
#define FIR_OP5   0x00000F00
 
#define FIR_OP5_SHIFT   8
 
#define FIR_OP6   0x000000F0
 
#define FIR_OP6_SHIFT   4
 
#define FIR_OP7   0x0000000F
 
#define FIR_OP7_SHIFT   0
 
#define FIR_OP_NOP   0x0 /* No operation and end of sequence */
 
#define FIR_OP_CA   0x1 /* Issue current column address */
 
#define FIR_OP_PA   0x2 /* Issue current block+page address */
 
#define FIR_OP_UA   0x3 /* Issue user defined address */
 
#define FIR_OP_CM0   0x4 /* Issue command from FCR[CMD0] */
 
#define FIR_OP_CM1   0x5 /* Issue command from FCR[CMD1] */
 
#define FIR_OP_CM2   0x6 /* Issue command from FCR[CMD2] */
 
#define FIR_OP_CM3   0x7 /* Issue command from FCR[CMD3] */
 
#define FIR_OP_WB   0x8 /* Write FBCR bytes from FCM buffer */
 
#define FIR_OP_WS   0x9 /* Write 1 or 2 bytes from MDR[AS] */
 
#define FIR_OP_RB   0xA /* Read FBCR bytes to FCM buffer */
 
#define FIR_OP_RS   0xB /* Read 1 or 2 bytes to MDR[AS] */
 
#define FIR_OP_CW0   0xC /* Wait then issue FCR[CMD0] */
 
#define FIR_OP_CW1   0xD /* Wait then issue FCR[CMD1] */
 
#define FIR_OP_RBW   0xE /* Wait then read FBCR bytes */
 
#define FIR_OP_RSW   0xE /* Wait then read 1 or 2 bytes */
 
#define FCR_CMD0   0xFF000000
 
#define FCR_CMD0_SHIFT   24
 
#define FCR_CMD1   0x00FF0000
 
#define FCR_CMD1_SHIFT   16
 
#define FCR_CMD2   0x0000FF00
 
#define FCR_CMD2_SHIFT   8
 
#define FCR_CMD3   0x000000FF
 
#define FCR_CMD3_SHIFT   0
 
#define FBAR_BLK   0x00FFFFFF
 
#define FPAR_SP_PI   0x00007C00
 
#define FPAR_SP_PI_SHIFT   10
 
#define FPAR_SP_MS   0x00000200
 
#define FPAR_SP_CI   0x000001FF
 
#define FPAR_SP_CI_SHIFT   0
 
#define FPAR_LP_PI   0x0003F000
 
#define FPAR_LP_PI_SHIFT   12
 
#define FPAR_LP_MS   0x00000800
 
#define FPAR_LP_CI   0x000007FF
 
#define FPAR_LP_CI_SHIFT   0
 
#define FBCR_BC   0x00000FFF
 

Functions

u32 fsl_lbc_addr (phys_addr_t addr_base)
 
int fsl_lbc_find (phys_addr_t addr_base)
 
int fsl_upm_find (phys_addr_t addr_base, struct fsl_upm *upm)
 
int fsl_upm_run_pattern (struct fsl_upm *upm, void __iomem *io_base, u32 mar)
 

Variables

struct fsl_lbc_ctrlfsl_lbc_ctrl_dev
 

Macro Definition Documentation

#define BR_BA   0xFFFF8000

Definition at line 35 of file fsl_lbc.h.

#define BR_BA_SHIFT   15

Definition at line 36 of file fsl_lbc.h.

#define BR_DECC   0x00000600

Definition at line 42 of file fsl_lbc.h.

#define BR_DECC_CHK   0x00000200 /* HW ECC checking on, generation off */

Definition at line 45 of file fsl_lbc.h.

#define BR_DECC_CHK_GEN   0x00000400 /* HW ECC checking and generation on */

Definition at line 46 of file fsl_lbc.h.

#define BR_DECC_OFF   0x00000000 /* HW ECC checking and generation off */

Definition at line 44 of file fsl_lbc.h.

#define BR_DECC_SHIFT   9

Definition at line 43 of file fsl_lbc.h.

#define BR_MS_FCM   0x00000020 /* FCM */

Definition at line 52 of file fsl_lbc.h.

#define BR_MS_GPCM   0x00000000 /* GPCM */

Definition at line 51 of file fsl_lbc.h.

#define BR_MS_SDRAM   0x00000060 /* SDRAM */

Definition at line 53 of file fsl_lbc.h.

#define BR_MS_UPMA   0x00000080 /* UPMA */

Definition at line 54 of file fsl_lbc.h.

#define BR_MS_UPMB   0x000000A0 /* UPMB */

Definition at line 55 of file fsl_lbc.h.

#define BR_MS_UPMC   0x000000C0 /* UPMC */

Definition at line 56 of file fsl_lbc.h.

#define BR_MSEL   0x000000E0

Definition at line 49 of file fsl_lbc.h.

#define BR_MSEL_SHIFT   5

Definition at line 50 of file fsl_lbc.h.

#define BR_PS   0x00001800

Definition at line 37 of file fsl_lbc.h.

#define BR_PS_16   0x00001000 /* Port Size 16 bit */

Definition at line 40 of file fsl_lbc.h.

#define BR_PS_32   0x00001800 /* Port Size 32 bit */

Definition at line 41 of file fsl_lbc.h.

#define BR_PS_8   0x00000800 /* Port Size 8 bit */

Definition at line 39 of file fsl_lbc.h.

#define BR_PS_SHIFT   11

Definition at line 38 of file fsl_lbc.h.

#define BR_RES   ~(BR_BA|BR_PS|BR_DECC|BR_WP|BR_MSEL|BR_V)

Definition at line 59 of file fsl_lbc.h.

#define BR_V   0x00000001

Definition at line 57 of file fsl_lbc.h.

#define BR_V_SHIFT   0

Definition at line 58 of file fsl_lbc.h.

#define BR_WP   0x00000100

Definition at line 47 of file fsl_lbc.h.

#define BR_WP_SHIFT   8

Definition at line 48 of file fsl_lbc.h.

#define FBAR_BLK   0x00FFFFFF

Definition at line 227 of file fsl_lbc.h.

#define FBCR_BC   0x00000FFF

Definition at line 240 of file fsl_lbc.h.

#define FCR_CMD0   0xFF000000

Definition at line 218 of file fsl_lbc.h.

#define FCR_CMD0_SHIFT   24

Definition at line 219 of file fsl_lbc.h.

#define FCR_CMD1   0x00FF0000

Definition at line 220 of file fsl_lbc.h.

#define FCR_CMD1_SHIFT   16

Definition at line 221 of file fsl_lbc.h.

#define FCR_CMD2   0x0000FF00

Definition at line 222 of file fsl_lbc.h.

#define FCR_CMD2_SHIFT   8

Definition at line 223 of file fsl_lbc.h.

#define FCR_CMD3   0x000000FF

Definition at line 224 of file fsl_lbc.h.

#define FCR_CMD3_SHIFT   0

Definition at line 225 of file fsl_lbc.h.

#define FIR_OP0   0xF0000000

Definition at line 185 of file fsl_lbc.h.

#define FIR_OP0_SHIFT   28

Definition at line 186 of file fsl_lbc.h.

#define FIR_OP1   0x0F000000

Definition at line 187 of file fsl_lbc.h.

#define FIR_OP1_SHIFT   24

Definition at line 188 of file fsl_lbc.h.

#define FIR_OP2   0x00F00000

Definition at line 189 of file fsl_lbc.h.

#define FIR_OP2_SHIFT   20

Definition at line 190 of file fsl_lbc.h.

#define FIR_OP3   0x000F0000

Definition at line 191 of file fsl_lbc.h.

#define FIR_OP3_SHIFT   16

Definition at line 192 of file fsl_lbc.h.

#define FIR_OP4   0x0000F000

Definition at line 193 of file fsl_lbc.h.

#define FIR_OP4_SHIFT   12

Definition at line 194 of file fsl_lbc.h.

#define FIR_OP5   0x00000F00

Definition at line 195 of file fsl_lbc.h.

#define FIR_OP5_SHIFT   8

Definition at line 196 of file fsl_lbc.h.

#define FIR_OP6   0x000000F0

Definition at line 197 of file fsl_lbc.h.

#define FIR_OP6_SHIFT   4

Definition at line 198 of file fsl_lbc.h.

#define FIR_OP7   0x0000000F

Definition at line 199 of file fsl_lbc.h.

#define FIR_OP7_SHIFT   0

Definition at line 200 of file fsl_lbc.h.

#define FIR_OP_CA   0x1 /* Issue current column address */

Definition at line 202 of file fsl_lbc.h.

#define FIR_OP_CM0   0x4 /* Issue command from FCR[CMD0] */

Definition at line 205 of file fsl_lbc.h.

#define FIR_OP_CM1   0x5 /* Issue command from FCR[CMD1] */

Definition at line 206 of file fsl_lbc.h.

#define FIR_OP_CM2   0x6 /* Issue command from FCR[CMD2] */

Definition at line 207 of file fsl_lbc.h.

#define FIR_OP_CM3   0x7 /* Issue command from FCR[CMD3] */

Definition at line 208 of file fsl_lbc.h.

#define FIR_OP_CW0   0xC /* Wait then issue FCR[CMD0] */

Definition at line 213 of file fsl_lbc.h.

#define FIR_OP_CW1   0xD /* Wait then issue FCR[CMD1] */

Definition at line 214 of file fsl_lbc.h.

#define FIR_OP_NOP   0x0 /* No operation and end of sequence */

Definition at line 201 of file fsl_lbc.h.

#define FIR_OP_PA   0x2 /* Issue current block+page address */

Definition at line 203 of file fsl_lbc.h.

#define FIR_OP_RB   0xA /* Read FBCR bytes to FCM buffer */

Definition at line 211 of file fsl_lbc.h.

#define FIR_OP_RBW   0xE /* Wait then read FBCR bytes */

Definition at line 215 of file fsl_lbc.h.

#define FIR_OP_RS   0xB /* Read 1 or 2 bytes to MDR[AS] */

Definition at line 212 of file fsl_lbc.h.

#define FIR_OP_RSW   0xE /* Wait then read 1 or 2 bytes */

Definition at line 216 of file fsl_lbc.h.

#define FIR_OP_UA   0x3 /* Issue user defined address */

Definition at line 204 of file fsl_lbc.h.

#define FIR_OP_WB   0x8 /* Write FBCR bytes from FCM buffer */

Definition at line 209 of file fsl_lbc.h.

#define FIR_OP_WS   0x9 /* Write 1 or 2 bytes from MDR[AS] */

Definition at line 210 of file fsl_lbc.h.

#define FMR_AL   0x00000030

Definition at line 180 of file fsl_lbc.h.

#define FMR_AL_SHIFT   4

Definition at line 181 of file fsl_lbc.h.

#define FMR_BOOT   0x00000800

Definition at line 178 of file fsl_lbc.h.

#define FMR_CWTO   0x0000F000

Definition at line 176 of file fsl_lbc.h.

#define FMR_CWTO_SHIFT   12

Definition at line 177 of file fsl_lbc.h.

#define FMR_ECCM   0x00000100

Definition at line 179 of file fsl_lbc.h.

#define FMR_OP   0x00000003

Definition at line 182 of file fsl_lbc.h.

#define FMR_OP_SHIFT   0

Definition at line 183 of file fsl_lbc.h.

#define FPAR_LP_CI   0x000007FF

Definition at line 237 of file fsl_lbc.h.

#define FPAR_LP_CI_SHIFT   0

Definition at line 238 of file fsl_lbc.h.

#define FPAR_LP_MS   0x00000800

Definition at line 236 of file fsl_lbc.h.

#define FPAR_LP_PI   0x0003F000

Definition at line 234 of file fsl_lbc.h.

#define FPAR_LP_PI_SHIFT   12

Definition at line 235 of file fsl_lbc.h.

#define FPAR_SP_CI   0x000001FF

Definition at line 232 of file fsl_lbc.h.

#define FPAR_SP_CI_SHIFT   0

Definition at line 233 of file fsl_lbc.h.

#define FPAR_SP_MS   0x00000200

Definition at line 231 of file fsl_lbc.h.

#define FPAR_SP_PI   0x00007C00

Definition at line 229 of file fsl_lbc.h.

#define FPAR_SP_PI_SHIFT   10

Definition at line 230 of file fsl_lbc.h.

#define LBCR_AHD   0x00200000

Definition at line 153 of file fsl_lbc.h.

#define LBCR_BCTLC   0x00C00000

Definition at line 151 of file fsl_lbc.h.

#define LBCR_BCTLC_SHIFT   22

Definition at line 152 of file fsl_lbc.h.

#define LBCR_BMT   0x0000FF00

Definition at line 158 of file fsl_lbc.h.

#define LBCR_BMT_SHIFT   8

Definition at line 159 of file fsl_lbc.h.

#define LBCR_BMTPS   0x0000000F

Definition at line 160 of file fsl_lbc.h.

#define LBCR_BMTPS_SHIFT   0

Definition at line 161 of file fsl_lbc.h.

#define LBCR_EPAR   0x00010000

Definition at line 156 of file fsl_lbc.h.

#define LBCR_EPAR_SHIFT   16

Definition at line 157 of file fsl_lbc.h.

#define LBCR_INIT   0x00040000

Definition at line 162 of file fsl_lbc.h.

#define LBCR_LDIS   0x80000000

Definition at line 149 of file fsl_lbc.h.

#define LBCR_LDIS_SHIFT   31

Definition at line 150 of file fsl_lbc.h.

#define LBCR_LPBSE   0x00020000

Definition at line 154 of file fsl_lbc.h.

#define LBCR_LPBSE_SHIFT   17

Definition at line 155 of file fsl_lbc.h.

#define LCRR_BUFCMDC   0x30000000

Definition at line 166 of file fsl_lbc.h.

#define LCRR_BUFCMDC_SHIFT   28

Definition at line 167 of file fsl_lbc.h.

#define LCRR_CLKDIV   0x0000000F

Definition at line 172 of file fsl_lbc.h.

#define LCRR_CLKDIV_SHIFT   0

Definition at line 173 of file fsl_lbc.h.

#define LCRR_DBYP   0x80000000

Definition at line 164 of file fsl_lbc.h.

#define LCRR_DBYP_SHIFT   31

Definition at line 165 of file fsl_lbc.h.

#define LCRR_EADC   0x00030000

Definition at line 170 of file fsl_lbc.h.

#define LCRR_EADC_SHIFT   16

Definition at line 171 of file fsl_lbc.h.

#define LCRR_ECL   0x03000000

Definition at line 168 of file fsl_lbc.h.

#define LCRR_ECL_SHIFT   24

Definition at line 169 of file fsl_lbc.h.

#define LTECCR_CLEAR   0xFFFFFFFF

Definition at line 138 of file fsl_lbc.h.

#define LTEDR_ENABLE   0x00000000

Definition at line 141 of file fsl_lbc.h.

#define LTEIR_ENABLE   LTESR_MASK

Definition at line 140 of file fsl_lbc.h.

#define LTESR_ATMR   0x00400000

Definition at line 129 of file fsl_lbc.h.

#define LTESR_ATMW   0x00800000

Definition at line 128 of file fsl_lbc.h.

#define LTESR_BM   0x80000000

Definition at line 124 of file fsl_lbc.h.

#define LTESR_CC   0x00000001

Definition at line 132 of file fsl_lbc.h.

#define LTESR_CLEAR   0xFFFFFFFF

Definition at line 137 of file fsl_lbc.h.

#define LTESR_CS   0x00080000

Definition at line 130 of file fsl_lbc.h.

#define LTESR_FCT   0x40000000

Definition at line 125 of file fsl_lbc.h.

#define LTESR_MASK
Value:

Definition at line 134 of file fsl_lbc.h.

#define LTESR_NAND_MASK   (LTESR_FCT | LTESR_PAR | LTESR_CC)

Definition at line 133 of file fsl_lbc.h.

#define LTESR_PAR   0x20000000

Definition at line 126 of file fsl_lbc.h.

#define LTESR_STATUS   LTESR_MASK

Definition at line 139 of file fsl_lbc.h.

#define LTESR_UPM   0x00000002

Definition at line 131 of file fsl_lbc.h.

#define LTESR_WP   0x04000000

Definition at line 127 of file fsl_lbc.h.

#define MxMR_MAD   0x3f

machine address

Definition at line 110 of file fsl_lbc.h.

#define MxMR_OP_NO   (0 << 28)

normal operation

Definition at line 106 of file fsl_lbc.h.

#define MxMR_OP_RA   (2 << 28)

read array

Definition at line 108 of file fsl_lbc.h.

#define MxMR_OP_RP   (3 << 28)

run pattern

Definition at line 109 of file fsl_lbc.h.

#define MxMR_OP_WA   (1 << 28)

write array

Definition at line 107 of file fsl_lbc.h.

#define OR0   0x5004

Definition at line 62 of file fsl_lbc.h.

#define OR1   0x500C

Definition at line 63 of file fsl_lbc.h.

#define OR2   0x5014

Definition at line 64 of file fsl_lbc.h.

#define OR3   0x501C

Definition at line 65 of file fsl_lbc.h.

#define OR4   0x5024

Definition at line 66 of file fsl_lbc.h.

#define OR5   0x502C

Definition at line 67 of file fsl_lbc.h.

#define OR6   0x5034

Definition at line 68 of file fsl_lbc.h.

#define OR7   0x503C

Definition at line 69 of file fsl_lbc.h.

#define OR_FCM_AM   0xFFFF8000

Definition at line 71 of file fsl_lbc.h.

#define OR_FCM_AM_SHIFT   15

Definition at line 72 of file fsl_lbc.h.

#define OR_FCM_BCTLD   0x00001000

Definition at line 73 of file fsl_lbc.h.

#define OR_FCM_BCTLD_SHIFT   12

Definition at line 74 of file fsl_lbc.h.

#define OR_FCM_CHT   0x00000080

Definition at line 81 of file fsl_lbc.h.

#define OR_FCM_CHT_SHIFT   7

Definition at line 82 of file fsl_lbc.h.

#define OR_FCM_CSCT   0x00000200

Definition at line 77 of file fsl_lbc.h.

#define OR_FCM_CSCT_SHIFT   9

Definition at line 78 of file fsl_lbc.h.

#define OR_FCM_CST   0x00000100

Definition at line 79 of file fsl_lbc.h.

#define OR_FCM_CST_SHIFT   8

Definition at line 80 of file fsl_lbc.h.

#define OR_FCM_EHTR   0x00000002

Definition at line 96 of file fsl_lbc.h.

#define OR_FCM_EHTR_SHIFT   1

Definition at line 97 of file fsl_lbc.h.

#define OR_FCM_PGS   0x00000400

Definition at line 75 of file fsl_lbc.h.

#define OR_FCM_PGS_SHIFT   10

Definition at line 76 of file fsl_lbc.h.

#define OR_FCM_RST   0x00000008

Definition at line 92 of file fsl_lbc.h.

#define OR_FCM_RST_SHIFT   3

Definition at line 93 of file fsl_lbc.h.

#define OR_FCM_SCY   0x00000070

Definition at line 83 of file fsl_lbc.h.

#define OR_FCM_SCY_1   0x00000010

Definition at line 85 of file fsl_lbc.h.

#define OR_FCM_SCY_2   0x00000020

Definition at line 86 of file fsl_lbc.h.

#define OR_FCM_SCY_3   0x00000030

Definition at line 87 of file fsl_lbc.h.

#define OR_FCM_SCY_4   0x00000040

Definition at line 88 of file fsl_lbc.h.

#define OR_FCM_SCY_5   0x00000050

Definition at line 89 of file fsl_lbc.h.

#define OR_FCM_SCY_6   0x00000060

Definition at line 90 of file fsl_lbc.h.

#define OR_FCM_SCY_7   0x00000070

Definition at line 91 of file fsl_lbc.h.

#define OR_FCM_SCY_SHIFT   4

Definition at line 84 of file fsl_lbc.h.

#define OR_FCM_TRLX   0x00000004

Definition at line 94 of file fsl_lbc.h.

#define OR_FCM_TRLX_SHIFT   2

Definition at line 95 of file fsl_lbc.h.

Function Documentation

u32 fsl_lbc_addr ( phys_addr_t  addr_base)

fsl_lbc_addr - convert the base address : base address of the memory bank

This function converts a base address of lbc into the right format for the BR register. If the SOC has eLBC then it returns 32bit physical address else it convers a 34bit local bus physical address to correct format of 32bit address for BR register (Example: MPC8641).

Definition at line 46 of file fsl_lbc.c.

int fsl_lbc_find ( phys_addr_t  addr_base)

fsl_lbc_find - find Localbus bank : base address of the memory bank

This function walks LBC banks comparing "Base address" field of the BR registers with the supplied addr_base argument. When bases match this function returns bank number (starting with 0), otherwise it returns appropriate errno value.

Definition at line 67 of file fsl_lbc.c.

int fsl_upm_find ( phys_addr_t  addr_base,
struct fsl_upm upm 
)

fsl_upm_find - find pre-programmed UPM via base address : base address of the memory bank controlled by the UPM : pointer to the allocated fsl_upm structure

This function fills fsl_upm structure so you can use it with the rest of UPM API. On success this function returns 0, otherwise it returns appropriate errno value.

Definition at line 97 of file fsl_lbc.c.

int fsl_upm_run_pattern ( struct fsl_upm upm,
void __iomem io_base,
u32  mar 
)

fsl_upm_run_pattern - actually run an UPM pattern : pointer to the fsl_upm structure obtained via fsl_upm_find : remapped pointer to where memory access should happen : MAR register content during pattern execution

This function triggers dummy write to the memory specified by the io_base, thus UPM pattern actually executed. Note that mar usage depends on the pre-programmed AMX bits in the UPM RAM.

Definition at line 155 of file fsl_lbc.c.

Variable Documentation

struct fsl_lbc_ctrl* fsl_lbc_ctrl_dev

Definition at line 34 of file fsl_lbc.c.