29 #include <asm/cacheflush.h>
46 #define HB_SCU_VIRT_BASE 0xfee00000
56 static void __init highbank_scu_map_io(
void)
61 asm(
"mrc p15, 4, %0, c15, c0, 0" :
"=r" (base));
67 static void __init highbank_map_io(
void)
69 highbank_scu_map_io();
73 #define HB_JUMP_TABLE_PHYS(cpu) (0x40 + (0x10 * (cpu)))
74 #define HB_JUMP_TABLE_VIRT(cpu) phys_to_virt(HB_JUMP_TABLE_PHYS(cpu))
86 { .compatible =
"arm,cortex-a9-gic", .data =
gic_of_init, },
90 #ifdef CONFIG_CACHE_L2X0
91 static void highbank_l2x0_disable(
void)
98 static void __init highbank_init_irq(
void)
102 #ifdef CONFIG_CACHE_L2X0
105 l2x0_of_init(0, ~0
UL);
106 outer_cache.disable = highbank_l2x0_disable;
115 static void __init highbank_timer_init(
void)
132 lookup.
clk = of_clk_get(np, 0);
135 sp804_clocksource_and_sched_clock_init(timer_base + 0x20,
"timer1");
138 twd_local_timer_of_register();
141 static struct sys_timer highbank_timer = {
142 .init = highbank_timer_init,
145 static void highbank_power_off(
void)
147 hignbank_set_pwr_shutdown();
155 unsigned long event,
void *__dev)
174 if (res->
start == 0xfff50000)
176 else if (res->
start == 0xfff51000)
184 if (of_property_read_bool(dev->
of_node,
"dma-coherent")) {
194 .notifier_call = highbank_platform_notifier,
198 .notifier_call = highbank_platform_notifier,
201 static void __init highbank_init(
void)
212 static const char *highbank_match[]
__initconst = {
219 .map_io = highbank_map_io,
220 .init_irq = highbank_init_irq,
221 .timer = &highbank_timer,
223 .init_machine = highbank_init,
224 .dt_compat = highbank_match,