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Data Structures | Macros | Functions
i7300_edac.c File Reference
#include <linux/module.h>
#include <linux/init.h>
#include <linux/pci.h>
#include <linux/pci_ids.h>
#include <linux/slab.h>
#include <linux/edac.h>
#include <linux/mmzone.h>
#include "edac_core.h"

Go to the source code of this file.

Data Structures

struct  i7300_dev_info
 
struct  i7300_dimm_info
 
struct  i7300_pvt
 

Macros

#define I7300_REVISION   " Ver: 1.0.0"
 
#define EDAC_MOD_STR   "i7300_edac"
 
#define i7300_printk(level, fmt, arg...)   edac_printk(level, "i7300", fmt, ##arg)
 
#define i7300_mc_printk(mci, level, fmt, arg...)   edac_mc_chipset_printk(mci, level, "i7300", fmt, ##arg)
 
#define MAX_SLOTS   8
 
#define MAX_BRANCHES   2
 
#define MAX_CH_PER_BRANCH   2
 
#define MAX_CHANNELS   (MAX_CH_PER_BRANCH * MAX_BRANCHES)
 
#define MAX_MIR   3
 
#define to_channel(ch, branch)   ((((branch)) << 1) | (ch))
 
#define to_csrow(slot, ch, branch)   (to_channel(ch, branch) | ((slot) << 2))
 
#define AMBASE   0x48 /* AMB Mem Mapped Reg Region Base */
 
#define MAXCH   0x56 /* Max Channel Number */
 
#define MAXDIMMPERCH   0x57 /* Max DIMM PER Channel Number */
 
#define MC_SETTINGS   0x40
 
#define IS_MIRRORED(mc)   ((mc) & (1 << 16))
 
#define IS_ECC_ENABLED(mc)   ((mc) & (1 << 5))
 
#define IS_RETRY_ENABLED(mc)   ((mc) & (1 << 31))
 
#define IS_SCRBALGO_ENHANCED(mc)   ((mc) & (1 << 8))
 
#define MC_SETTINGS_A   0x58
 
#define IS_SINGLE_MODE(mca)   ((mca) & (1 << 14))
 
#define TOLM   0x6C
 
#define MIR0   0x80
 
#define MIR1   0x84
 
#define MIR2   0x88
 
#define AMBPRESENT_0   0x64
 
#define AMBPRESENT_1   0x66
 
#define MTR_DIMMS_PRESENT(mtr)   ((mtr) & (1 << 8))
 
#define MTR_DIMMS_ETHROTTLE(mtr)   ((mtr) & (1 << 7))
 
#define MTR_DRAM_WIDTH(mtr)   (((mtr) & (1 << 6)) ? 8 : 4)
 
#define MTR_DRAM_BANKS(mtr)   (((mtr) & (1 << 5)) ? 8 : 4)
 
#define MTR_DIMM_RANKS(mtr)   (((mtr) & (1 << 4)) ? 1 : 0)
 
#define MTR_DIMM_ROWS(mtr)   (((mtr) >> 2) & 0x3)
 
#define MTR_DRAM_BANKS_ADDR_BITS   2
 
#define MTR_DIMM_ROWS_ADDR_BITS(mtr)   (MTR_DIMM_ROWS(mtr) + 13)
 
#define MTR_DIMM_COLS(mtr)   ((mtr) & 0x3)
 
#define MTR_DIMM_COLS_ADDR_BITS(mtr)   (MTR_DIMM_COLS(mtr) + 10)
 
#define FERR_FAT_FBD   0x98
 
#define GET_FBD_FAT_IDX(fbderr)   (((fbderr) >> 28) & 3)
 
#define FERR_FAT_FBD_ERR_MASK   ((1 << 0) | (1 << 1) | (1 << 2) | (1 << 22))
 
#define FERR_NF_FBD   0xa0
 
#define GET_FBD_NF_IDX(fbderr)   (((fbderr) >> 28) & 3)
 
#define FERR_NF_FBD_ERR_MASK
 
#define EMASK_FBD   0xa8
 
#define EMASK_FBD_ERR_MASK
 
#define FERR_GLOBAL_HI   0x48
 
#define ferr_global_hi_is_fatal(errno)   1
 
#define FERR_GLOBAL_LO   0x40
 
#define ferr_global_lo_is_fatal(errno)   ((errno < 16) ? 0 : 1)
 
#define NRECMEMA   0xbe
 
#define NRECMEMA_BANK(v)   (((v) >> 12) & 7)
 
#define NRECMEMA_RANK(v)   (((v) >> 8) & 15)
 
#define NRECMEMB   0xc0
 
#define NRECMEMB_IS_WR(v)   ((v) & (1 << 31))
 
#define NRECMEMB_CAS(v)   (((v) >> 16) & 0x1fff)
 
#define NRECMEMB_RAS(v)   ((v) & 0xffff)
 
#define REDMEMA   0xdc
 
#define REDMEMB   0x7c
 
#define IS_SECOND_CH(v)   ((v) * (1 << 17))
 
#define RECMEMA   0xe0
 
#define RECMEMA_BANK(v)   (((v) >> 12) & 7)
 
#define RECMEMA_RANK(v)   (((v) >> 8) & 15)
 
#define RECMEMB   0xe4
 
#define RECMEMB_IS_WR(v)   ((v) & (1 << 31))
 
#define RECMEMB_CAS(v)   (((v) >> 16) & 0x1fff)
 
#define RECMEMB_RAS(v)   ((v) & 0xffff)
 
#define GET_ERR_FROM_TABLE(table, pos)   get_err_from_table(table, ARRAY_SIZE(table), pos)
 

Functions

 MODULE_DEVICE_TABLE (pci, i7300_pci_tbl)
 
 module_init (i7300_init)
 
 module_exit (i7300_exit)
 
 MODULE_LICENSE ("GPL")
 
 MODULE_AUTHOR ("Mauro Carvalho Chehab <[email protected]>")
 
 MODULE_AUTHOR ("Red Hat Inc. (http://www.redhat.com)")
 
 MODULE_DESCRIPTION ("MC Driver for Intel I7300 memory controllers - "I7300_REVISION)
 
 module_param (edac_op_state, int, 0444)
 
 MODULE_PARM_DESC (edac_op_state,"EDAC Error Reporting state: 0=Poll,1=NMI")
 

Macro Definition Documentation

#define AMBASE   0x48 /* AMB Mem Mapped Reg Region Base */

Definition at line 131 of file i7300_edac.c.

#define AMBPRESENT_0   0x64

Definition at line 162 of file i7300_edac.c.

#define AMBPRESENT_1   0x66

Definition at line 163 of file i7300_edac.c.

#define EDAC_MOD_STR   "i7300_edac"

Definition at line 36 of file i7300_edac.c.

#define EMASK_FBD   0xa8

Definition at line 236 of file i7300_edac.c.

#define EMASK_FBD_ERR_MASK
Value:
((1 << 27) | (1 << 26) | (1 << 25) | (1 << 24) |\
(1 << 22) | (1 << 21) | (1 << 20) | (1 << 19) |\
(1 << 18) | (1 << 17) | (1 << 16) | (1 << 14) |\
(1 << 13) | (1 << 12) | (1 << 11) | (1 << 10) |\
(1 << 9) | (1 << 8) | (1 << 7) | (1 << 6) |\
(1 << 5) | (1 << 4) | (1 << 3) | (1 << 2) |\
(1 << 1) | (1 << 0))

Definition at line 237 of file i7300_edac.c.

#define FERR_FAT_FBD   0x98

Definition at line 192 of file i7300_edac.c.

#define FERR_FAT_FBD_ERR_MASK   ((1 << 0) | (1 << 1) | (1 << 2) | (1 << 22))

Definition at line 201 of file i7300_edac.c.

#define FERR_GLOBAL_HI   0x48

Definition at line 249 of file i7300_edac.c.

#define ferr_global_hi_is_fatal (   errno)    1

Definition at line 256 of file i7300_edac.c.

#define FERR_GLOBAL_LO   0x40

Definition at line 258 of file i7300_edac.c.

#define ferr_global_lo_is_fatal (   errno)    ((errno < 16) ? 0 : 1)

Definition at line 293 of file i7300_edac.c.

#define FERR_NF_FBD   0xa0

Definition at line 203 of file i7300_edac.c.

#define FERR_NF_FBD_ERR_MASK
Value:
((1 << 24) | (1 << 23) | (1 << 22) | (1 << 21) |\
(1 << 18) | (1 << 17) | (1 << 16) | (1 << 15) |\
(1 << 14) | (1 << 13) | (1 << 11) | (1 << 10) |\
(1 << 9) | (1 << 8) | (1 << 7) | (1 << 6) |\
(1 << 5) | (1 << 4) | (1 << 3) | (1 << 2) |\
(1 << 1) | (1 << 0))

Definition at line 229 of file i7300_edac.c.

#define GET_ERR_FROM_TABLE (   table,
  pos 
)    get_err_from_table(table, ARRAY_SIZE(table), pos)

Definition at line 345 of file i7300_edac.c.

#define GET_FBD_FAT_IDX (   fbderr)    (((fbderr) >> 28) & 3)

Definition at line 200 of file i7300_edac.c.

#define GET_FBD_NF_IDX (   fbderr)    (((fbderr) >> 28) & 3)

Definition at line 228 of file i7300_edac.c.

#define i7300_mc_printk (   mci,
  level,
  fmt,
  arg... 
)    edac_mc_chipset_printk(mci, level, "i7300", fmt, ##arg)

Definition at line 41 of file i7300_edac.c.

#define i7300_printk (   level,
  fmt,
  arg... 
)    edac_printk(level, "i7300", fmt, ##arg)

Definition at line 38 of file i7300_edac.c.

#define I7300_REVISION   " Ver: 1.0.0"

Definition at line 34 of file i7300_edac.c.

#define IS_ECC_ENABLED (   mc)    ((mc) & (1 << 5))

Definition at line 138 of file i7300_edac.c.

#define IS_MIRRORED (   mc)    ((mc) & (1 << 16))

Definition at line 137 of file i7300_edac.c.

#define IS_RETRY_ENABLED (   mc)    ((mc) & (1 << 31))

Definition at line 139 of file i7300_edac.c.

#define IS_SCRBALGO_ENHANCED (   mc)    ((mc) & (1 << 8))

Definition at line 140 of file i7300_edac.c.

#define IS_SECOND_CH (   v)    ((v) * (1 << 17))

Definition at line 307 of file i7300_edac.c.

#define IS_SINGLE_MODE (   mca)    ((mca) & (1 << 14))

Definition at line 143 of file i7300_edac.c.

#define MAX_BRANCHES   2

Definition at line 64 of file i7300_edac.c.

#define MAX_CH_PER_BRANCH   2

Definition at line 65 of file i7300_edac.c.

#define MAX_CHANNELS   (MAX_CH_PER_BRANCH * MAX_BRANCHES)

Definition at line 66 of file i7300_edac.c.

#define MAX_MIR   3

Definition at line 67 of file i7300_edac.c.

#define MAX_SLOTS   8

Definition at line 63 of file i7300_edac.c.

#define MAXCH   0x56 /* Max Channel Number */

Definition at line 132 of file i7300_edac.c.

#define MAXDIMMPERCH   0x57 /* Max DIMM PER Channel Number */

Definition at line 133 of file i7300_edac.c.

#define MC_SETTINGS   0x40

Definition at line 136 of file i7300_edac.c.

#define MC_SETTINGS_A   0x58

Definition at line 142 of file i7300_edac.c.

#define MIR0   0x80

Definition at line 147 of file i7300_edac.c.

#define MIR1   0x84

Definition at line 148 of file i7300_edac.c.

#define MIR2   0x88

Definition at line 149 of file i7300_edac.c.

#define MTR_DIMM_COLS (   mtr)    ((mtr) & 0x3)

Definition at line 182 of file i7300_edac.c.

#define MTR_DIMM_COLS_ADDR_BITS (   mtr)    (MTR_DIMM_COLS(mtr) + 10)

Definition at line 183 of file i7300_edac.c.

#define MTR_DIMM_RANKS (   mtr)    (((mtr) & (1 << 4)) ? 1 : 0)

Definition at line 178 of file i7300_edac.c.

#define MTR_DIMM_ROWS (   mtr)    (((mtr) >> 2) & 0x3)

Definition at line 179 of file i7300_edac.c.

#define MTR_DIMM_ROWS_ADDR_BITS (   mtr)    (MTR_DIMM_ROWS(mtr) + 13)

Definition at line 181 of file i7300_edac.c.

#define MTR_DIMMS_ETHROTTLE (   mtr)    ((mtr) & (1 << 7))

Definition at line 175 of file i7300_edac.c.

#define MTR_DIMMS_PRESENT (   mtr)    ((mtr) & (1 << 8))

Definition at line 174 of file i7300_edac.c.

#define MTR_DRAM_BANKS (   mtr)    (((mtr) & (1 << 5)) ? 8 : 4)

Definition at line 177 of file i7300_edac.c.

#define MTR_DRAM_BANKS_ADDR_BITS   2

Definition at line 180 of file i7300_edac.c.

#define MTR_DRAM_WIDTH (   mtr)    (((mtr) & (1 << 6)) ? 8 : 4)

Definition at line 176 of file i7300_edac.c.

#define NRECMEMA   0xbe

Definition at line 295 of file i7300_edac.c.

#define NRECMEMA_BANK (   v)    (((v) >> 12) & 7)

Definition at line 296 of file i7300_edac.c.

#define NRECMEMA_RANK (   v)    (((v) >> 8) & 15)

Definition at line 297 of file i7300_edac.c.

#define NRECMEMB   0xc0

Definition at line 299 of file i7300_edac.c.

#define NRECMEMB_CAS (   v)    (((v) >> 16) & 0x1fff)

Definition at line 301 of file i7300_edac.c.

#define NRECMEMB_IS_WR (   v)    ((v) & (1 << 31))

Definition at line 300 of file i7300_edac.c.

#define NRECMEMB_RAS (   v)    ((v) & 0xffff)

Definition at line 302 of file i7300_edac.c.

#define RECMEMA   0xe0

Definition at line 309 of file i7300_edac.c.

#define RECMEMA_BANK (   v)    (((v) >> 12) & 7)

Definition at line 310 of file i7300_edac.c.

#define RECMEMA_RANK (   v)    (((v) >> 8) & 15)

Definition at line 311 of file i7300_edac.c.

#define RECMEMB   0xe4

Definition at line 313 of file i7300_edac.c.

#define RECMEMB_CAS (   v)    (((v) >> 16) & 0x1fff)

Definition at line 315 of file i7300_edac.c.

#define RECMEMB_IS_WR (   v)    ((v) & (1 << 31))

Definition at line 314 of file i7300_edac.c.

#define RECMEMB_RAS (   v)    ((v) & 0xffff)

Definition at line 316 of file i7300_edac.c.

#define REDMEMA   0xdc

Definition at line 304 of file i7300_edac.c.

#define REDMEMB   0x7c

Definition at line 306 of file i7300_edac.c.

#define to_channel (   ch,
  branch 
)    ((((branch)) << 1) | (ch))

Definition at line 69 of file i7300_edac.c.

#define to_csrow (   slot,
  ch,
  branch 
)    (to_channel(ch, branch) | ((slot) << 2))

Definition at line 71 of file i7300_edac.c.

#define TOLM   0x6C

Definition at line 145 of file i7300_edac.c.

Function Documentation

MODULE_AUTHOR ( "Mauro Carvalho Chehab <[email protected]>"  )
MODULE_AUTHOR ( "Red Hat Inc. (http://www.redhat.com)"  )
MODULE_DESCRIPTION ( "MC Driver for Intel I7300 memory controllers - "  I7300_REVISION)
MODULE_DEVICE_TABLE ( pci  ,
i7300_pci_tbl   
)
module_exit ( i7300_exit  )
module_init ( i7300_init  )
MODULE_LICENSE ( "GPL"  )
module_param ( edac_op_state  ,
int  ,
0444   
)
MODULE_PARM_DESC ( edac_op_state  ,
"EDAC Error Reporting state:  0 = Poll 
)