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i82875p_edac.c File Reference
#include <linux/module.h>
#include <linux/init.h>
#include <linux/pci.h>
#include <linux/pci_ids.h>
#include <linux/edac.h>
#include "edac_core.h"

Go to the source code of this file.

Data Structures

struct  i82875p_pvt
 
struct  i82875p_dev_info
 
struct  i82875p_error_info
 

Macros

#define I82875P_REVISION   " Ver: 2.0.2"
 
#define EDAC_MOD_STR   "i82875p_edac"
 
#define i82875p_printk(level, fmt, arg...)   edac_printk(level, "i82875p", fmt, ##arg)
 
#define i82875p_mc_printk(mci, level, fmt, arg...)   edac_mc_chipset_printk(mci, level, "i82875p", fmt, ##arg)
 
#define PCI_DEVICE_ID_INTEL_82875_0   0x2578
 
#define PCI_DEVICE_ID_INTEL_82875_6   0x257e
 
#define I82875P_NR_DIMMS   8
 
#define I82875P_NR_CSROWS(nr_chans)   (I82875P_NR_DIMMS / (nr_chans))
 
#define I82875P_EAP
 
#define I82875P_DERRSYN
 
#define I82875P_DES
 
#define I82875P_ERRSTS
 
#define I82875P_ERRCMD
 
#define I82875P_PCICMD6
 
#define I82875P_BAR6
 
#define I82875P_DRB_SHIFT   26 /* 64MiB grain */
 
#define I82875P_DRB
 
#define I82875P_DRA
 
#define I82875P_DRC
 

Enumerations

enum  i82875p_chips { I82875P = 0 }
 

Functions

 MODULE_DEVICE_TABLE (pci, i82875p_pci_tbl)
 
 module_init (i82875p_init)
 
 module_exit (i82875p_exit)
 
 MODULE_LICENSE ("GPL")
 
 MODULE_AUTHOR ("Linux Networx (http://lnxi.com) Thayne Harbaugh")
 
 MODULE_DESCRIPTION ("MC support for Intel 82875 memory hub controllers")
 
 module_param (edac_op_state, int, 0444)
 
 MODULE_PARM_DESC (edac_op_state,"EDAC Error Reporting state: 0=Poll,1=NMI")
 

Macro Definition Documentation

#define EDAC_MOD_STR   "i82875p_edac"

Definition at line 24 of file i82875p_edac.c.

#define I82875P_BAR6
Value:
0x10 /* Mem Delays Base ADDR Reg (32b)
*
* 31:12 mem base addr [31:12]
* 11:4 address mask - ro 0
* 3 prefetchable - ro 0(non),1(pre)
* 2:1 mem type - ro 0
* 0 mem space - ro 0
*/

Definition at line 58 of file i82875p_edac.c.

#define I82875P_DERRSYN
Value:
0x5c /* DRAM Error Syndrome (8b)
*
* 7:0 DRAM ECC Syndrome
*/

Definition at line 47 of file i82875p_edac.c.

#define I82875P_DES
Value:
0x5d /* DRAM Error Status (8b)
*
* 7:1 reserved
* 0 Error channel 0/1
*/

Definition at line 49 of file i82875p_edac.c.

#define I82875P_DRA
Value:
0x10 /* DRAM Row Attribute (4b x 8)
*
* 7 reserved
* 6:4 row attr row 1
* 3 reserved
* 2:0 row attr row 0
*
* 000 = 4KiB
* 001 = 8KiB
* 010 = 16KiB
* 011 = 32KiB
*/

Definition at line 65 of file i82875p_edac.c.

#define I82875P_DRB
Value:
0x00 /* DRAM Row Boundary (8b x 8)
*
* 7 reserved
* 6:0 64MiB row boundary addr
*/

Definition at line 63 of file i82875p_edac.c.

#define I82875P_DRB_SHIFT   26 /* 64MiB grain */

Definition at line 62 of file i82875p_edac.c.

#define I82875P_DRC
Value:
0x68 /* DRAM Controller Mode (32b)
*
* 31:30 reserved
* 29 init complete
* 28:23 reserved
* 22:21 nr chan 00=1,01=2
* 20 reserved
* 19:18 Data Integ Mode 00=none,01=ecc
* 17:11 reserved
* 10:8 refresh mode
* 7 reserved
* 6:4 mode select
* 3:2 reserved
* 1:0 DRAM type 01=DDR
*/

Definition at line 67 of file i82875p_edac.c.

#define I82875P_EAP
Value:
0x58 /* Error Address Pointer (32b)
*
* 31:12 block address
* 11:0 reserved
*/

Definition at line 45 of file i82875p_edac.c.

#define I82875P_ERRCMD
Value:
0xca /* Error Command (16b)
*
* 15:10 reserved
* 9 SERR on non-DRAM lock
* 8 SERR on ECC UE
* 7 SERR on ECC CE
* 6 target abort on high exception
* 5 detect unimplemented cyc
* 4 AGP access outside of GA
* 3 SERR on invalid AGP access
* 2 invalid translation table
* 1 SERR on unsupported AGP command
* 0 reserved
*/

Definition at line 53 of file i82875p_edac.c.

#define I82875P_ERRSTS
Value:
0xc8 /* Error Status Register (16b)
*
* 15:10 reserved
* 9 non-DRAM lock error (ndlock)
* 8 Sftwr Generated SMI
* 7 ECC UE
* 6 reserved
* 5 MCH detects unimplemented cycle
* 4 AGP access outside GA
* 3 Invalid AGP access
* 2 Invalid GA translation table
* 1 Unsupported AGP command
* 0 ECC CE
*/

Definition at line 51 of file i82875p_edac.c.

#define i82875p_mc_printk (   mci,
  level,
  fmt,
  arg... 
)    edac_mc_chipset_printk(mci, level, "i82875p", fmt, ##arg)

Definition at line 29 of file i82875p_edac.c.

#define I82875P_NR_CSROWS (   nr_chans)    (I82875P_NR_DIMMS / (nr_chans))

Definition at line 42 of file i82875p_edac.c.

#define I82875P_NR_DIMMS   8

Definition at line 41 of file i82875p_edac.c.

#define I82875P_PCICMD6
Value:
0x04 /* PCI Command Register (16b)
*
* 15:10 reserved
* 9 fast back-to-back - ro 0
* 8 SERR enable - ro 0
* 7 addr/data stepping - ro 0
* 6 parity err enable - ro 0
* 5 VGA palette snoop - ro 0
* 4 mem wr & invalidate - ro 0
* 3 special cycle - ro 0
* 2 bus master - ro 0
* 1 mem access dev6 - 0(dis),1(en)
* 0 IO access dev3 - 0(dis),1(en)
*/

Definition at line 56 of file i82875p_edac.c.

#define i82875p_printk (   level,
  fmt,
  arg... 
)    edac_printk(level, "i82875p", fmt, ##arg)

Definition at line 26 of file i82875p_edac.c.

#define I82875P_REVISION   " Ver: 2.0.2"

Definition at line 23 of file i82875p_edac.c.

#define PCI_DEVICE_ID_INTEL_82875_0   0x2578

Definition at line 33 of file i82875p_edac.c.

#define PCI_DEVICE_ID_INTEL_82875_6   0x257e

Definition at line 37 of file i82875p_edac.c.

Enumeration Type Documentation

enum i82875p_chips
Enumerator:
I82875P 

Definition at line 69 of file i82875p_edac.c.

Function Documentation

MODULE_AUTHOR ( "Linux Networx (http://lnxi.com) Thayne Harbaugh"  )
MODULE_DESCRIPTION ( "MC support for Intel 82875 memory hub controllers"  )
MODULE_DEVICE_TABLE ( pci  ,
i82875p_pci_tbl   
)
module_exit ( i82875p_exit  )
module_init ( i82875p_init  )
MODULE_LICENSE ( "GPL"  )
module_param ( edac_op_state  ,
int  ,
0444   
)
MODULE_PARM_DESC ( edac_op_state  ,
"EDAC Error Reporting state:  0 = Poll 
)
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