Go to the source code of this file.
#define DO_LOAD_SWITCH_STACK |
Value:
;; \
invala; \
mov.ret.sptk b7=
r28,1
f; \
br.cond.sptk.many load_switch_stack; \
adds
sp=IA64_SWITCH_STACK_SIZE,
sp
Definition at line 75 of file entry.h.
#define DO_SAVE_SWITCH_STACK |
Value:
;; \
.fframe IA64_SWITCH_STACK_SIZE; \
adds
sp=-IA64_SWITCH_STACK_SIZE,
sp; \
mov.ret.sptk b7=
r28,1
f; \
SWITCH_STACK_SAVES(0); \
br.cond.sptk.many save_switch_stack; \
1:
Definition at line 65 of file entry.h.
#define PRED_KERNEL_STACK 2 /* returning to kernel-stacks? */ |
#define PRED_USER_STACK 3 /* returning to user-stacks? */ |
#define PT |
( |
|
f | ) |
(IA64_PT_REGS_##f##_OFFSET) |
#define PT_REGS_SAVES |
( |
|
off | ) |
|
Value:.unwabi 3, 'i'; \
.fframe IA64_PT_REGS_SIZE+16+(off); \
.spillsp
rp,
PT(CR_IIP)+16+(off); \
.spillsp
ar.pfs,
PT(CR_IFS)+16+(off); \
.spillsp
ar.unat,
PT(AR_UNAT)+16+(off); \
.spillsp
ar.fpsr,
PT(AR_FPSR)+16+(off); \
Definition at line 27 of file entry.h.
#define PT_REGS_UNWIND_INFO |
( |
|
off | ) |
|
Value:.prologue; \
PT_REGS_SAVES(off); \
.body
Definition at line 36 of file entry.h.
#define SOS |
( |
|
f | ) |
(IA64_SAL_OS_STATE_##f##_OFFSET) |
#define SW |
( |
|
f | ) |
(IA64_SWITCH_STACK_##f##_OFFSET) |
#define SWITCH_STACK_SAVES |
( |
|
off | ) |
|
Value:.savesp
ar.unat,
SW(CALLER_UNAT)+16+(off); \
.savesp
ar.fpsr,
SW(AR_FPSR)+16+(off); \
.spillsp f16,
SW(F16)+16+(off); .spillsp f17,
SW(F17)+16+(off); \
.spillsp f18,
SW(F18)+16+(off); .spillsp f19,
SW(F19)+16+(off); \
.spillsp f20,
SW(F20)+16+(off); .spillsp f21,
SW(F21)+16+(off); \
.spillsp f22,
SW(F22)+16+(off); .spillsp f23,
SW(F23)+16+(off); \
.spillsp f24,
SW(F24)+16+(off); .spillsp f25,
SW(F25)+16+(off); \
.spillsp f26,
SW(F26)+16+(off); .spillsp f27,
SW(F27)+16+(off); \
.spillsp f28,
SW(F28)+16+(off); .spillsp f29,
SW(F29)+16+(off); \
.spillsp f30,
SW(F30)+16+(off); .spillsp f31,
SW(F31)+16+(off); \
.spillsp b0,
SW(
B0)+16+(off); .spillsp b1,
SW(
B1)+16+(off); \
.spillsp b2,
SW(
B2)+16+(off); .spillsp b3,
SW(B3)+16+(off); \
.spillsp b4,
SW(
B4)+16+(off); .spillsp b5,
SW(B5)+16+(off); \
.spillsp
ar.pfs,
SW(AR_PFS)+16+(off); .spillsp
ar.lc,
SW(AR_LC)+16+(off); \
.spillsp @priunat,
SW(AR_UNAT)+16+(off); \
.spillsp
ar.rnat,
SW(AR_RNAT)+16+(off); \
.spillsp
ar.bspstore,
SW(AR_BSPSTORE)+16+(off); \
Definition at line 41 of file entry.h.