#include <linux/delay.h>
#include <linux/slab.h>
#include <linux/pci.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/kmod.h>
#include <linux/i2c.h>
#include <asm/io.h>
#include <linux/stringify.h>
#include <linux/mutex.h>
#include <linux/scatterlist.h>
#include <media/v4l2-device.h>
#include <media/v4l2-ctrls.h>
#include <linux/vmalloc.h>
#include <linux/mm.h>

Data Structures
struct	saa7146_pgtable

struct	saa7146_pci_extension_data

struct	saa7146_extension

struct	saa7146_dma

struct	saa7146_dev

Macros
#define	saa7146_write(sxy, adr, dat) writel((dat),(sxy->mem+(adr)))

#define	saa7146_read(sxy, adr) readl(sxy->mem+(adr))

#define	DEBUG_VARIABLE saa7146_debug

#define	ERR(fmt,...) pr_err("%s: " fmt, __func__, ##__VA_ARGS__)

#define	_DBG(mask, fmt,...)

#define	DEB_S(fmt,...) _DBG(0x01, fmt, ##__VA_ARGS__)

#define	DEB_D(fmt,...) _DBG(0x02, fmt, ##__VA_ARGS__)

#define	DEB_EE(fmt,...) _DBG(0x04, fmt, ##__VA_ARGS__)

#define	DEB_I2C(fmt,...) _DBG(0x08, fmt, ##__VA_ARGS__)

#define	DEB_VBI(fmt,...) _DBG(0x10, fmt, ##__VA_ARGS__)

#define	DEB_INT(fmt,...) _DBG(0x20, fmt, ##__VA_ARGS__)

#define	DEB_CAP(fmt,...) _DBG(0x40, fmt, ##__VA_ARGS__)

#define	SAA7146_ISR_CLEAR(x, y) saa7146_write(x, ISR, (y));

#define	MAKE_EXTENSION_PCI(x_var, x_vendor, x_device)

#define	SAA7146_USE_I2C_IRQ 0x1

#define	SAA7146_I2C_SHORT_DELAY 0x2

#define	SAA7146_I2C_MEM ( 1*PAGE_SIZE)

#define	SAA7146_RPS_MEM ( 1*PAGE_SIZE)

#define	SAA7146_I2C_TIMEOUT 100 /* i2c-timeout-value in ms */

#define	SAA7146_I2C_RETRIES 3 /* how many times shall we retry an i2c-operation? */

#define	SAA7146_I2C_DELAY 5 /* time we wait after certain i2c-operations */

#define	ME1 0x0000000800

#define	PV1 0x0000000008

#define	SAA7146_GPIO_INPUT 0x00

#define	SAA7146_GPIO_IRQHI 0x10

#define	SAA7146_GPIO_IRQLO 0x20

#define	SAA7146_GPIO_IRQHL 0x30

#define	SAA7146_GPIO_OUTLO 0x40

#define	SAA7146_GPIO_OUTHI 0x50

#define	DEBINOSWAP 0x000e0000

#define	CMD_NOP 0x00000000 /* No operation */

#define	CMD_CLR_EVENT 0x00000000 /* Clear event */

#define	CMD_SET_EVENT 0x10000000 /* Set signal event */

#define	CMD_PAUSE 0x20000000 /* Pause */

#define	CMD_CHECK_LATE 0x30000000 /* Check late */

#define	CMD_UPLOAD 0x40000000 /* Upload */

#define	CMD_STOP 0x50000000 /* Stop */

#define	CMD_INTERRUPT 0x60000000 /* Interrupt */

#define	CMD_JUMP 0x80000000 /* Jump */

#define	CMD_WR_REG 0x90000000 /* Write (load) register */

#define	CMD_RD_REG 0xa0000000 /* Read (store) register */

#define	CMD_WR_REG_MASK 0xc0000000 /* Write register with mask */

#define	CMD_OAN MASK_27

#define	CMD_INV MASK_26

#define	CMD_SIG4 MASK_25

#define	CMD_SIG3 MASK_24

#define	CMD_SIG2 MASK_23

#define	CMD_SIG1 MASK_22

#define	CMD_SIG0 MASK_21

#define	CMD_O_FID_B MASK_14

#define	CMD_E_FID_B MASK_13

#define	CMD_O_FID_A MASK_12

#define	CMD_E_FID_A MASK_11

#define	EVT_HS (1<<15)

#define	EVT_VBI_B (1<<9)

#define	RPS_OAN (1<<27)

#define	RPS_INV (1<<26)

#define	GPIO3_MSK 0xFF000000

#define	MASK_00 0x00000001 /* Mask value for bit 0 */

#define	MASK_01 0x00000002 /* Mask value for bit 1 */

#define	MASK_02 0x00000004 /* Mask value for bit 2 */

#define	MASK_03 0x00000008 /* Mask value for bit 3 */

#define	MASK_04 0x00000010 /* Mask value for bit 4 */

#define	MASK_05 0x00000020 /* Mask value for bit 5 */

#define	MASK_06 0x00000040 /* Mask value for bit 6 */

#define	MASK_07 0x00000080 /* Mask value for bit 7 */

#define	MASK_08 0x00000100 /* Mask value for bit 8 */

#define	MASK_09 0x00000200 /* Mask value for bit 9 */

#define	MASK_10 0x00000400 /* Mask value for bit 10 */

#define	MASK_11 0x00000800 /* Mask value for bit 11 */

#define	MASK_12 0x00001000 /* Mask value for bit 12 */

#define	MASK_13 0x00002000 /* Mask value for bit 13 */

#define	MASK_14 0x00004000 /* Mask value for bit 14 */

#define	MASK_15 0x00008000 /* Mask value for bit 15 */

#define	MASK_16 0x00010000 /* Mask value for bit 16 */

#define	MASK_17 0x00020000 /* Mask value for bit 17 */

#define	MASK_18 0x00040000 /* Mask value for bit 18 */

#define	MASK_19 0x00080000 /* Mask value for bit 19 */

#define	MASK_20 0x00100000 /* Mask value for bit 20 */

#define	MASK_21 0x00200000 /* Mask value for bit 21 */

#define	MASK_22 0x00400000 /* Mask value for bit 22 */

#define	MASK_23 0x00800000 /* Mask value for bit 23 */

#define	MASK_24 0x01000000 /* Mask value for bit 24 */

#define	MASK_25 0x02000000 /* Mask value for bit 25 */

#define	MASK_26 0x04000000 /* Mask value for bit 26 */

#define	MASK_27 0x08000000 /* Mask value for bit 27 */

#define	MASK_28 0x10000000 /* Mask value for bit 28 */

#define	MASK_29 0x20000000 /* Mask value for bit 29 */

#define	MASK_30 0x40000000 /* Mask value for bit 30 */

#define	MASK_31 0x80000000 /* Mask value for bit 31 */

#define	MASK_B0 0x000000ff /* Mask value for byte 0 */

#define	MASK_B1 0x0000ff00 /* Mask value for byte 1 */

#define	MASK_B2 0x00ff0000 /* Mask value for byte 2 */

#define	MASK_B3 0xff000000 /* Mask value for byte 3 */

#define	MASK_W0 0x0000ffff /* Mask value for word 0 */

#define	MASK_W1 0xffff0000 /* Mask value for word 1 */

#define	MASK_PA 0xfffffffc /* Mask value for physical address */

#define	MASK_PR 0xfffffffe /* Mask value for protection register */

#define	MASK_ER 0xffffffff /* Mask value for the entire register */

#define	MASK_NONE 0x00000000 /* No mask */

#define	BASE_ODD1 0x00 /* Video DMA 1 registers */

#define	BASE_EVEN1 0x04

#define	PROT_ADDR1 0x08

#define	PITCH1 0x0C

#define	BASE_PAGE1 0x10 /* Video DMA 1 base page */

#define	NUM_LINE_BYTE1 0x14

#define	BASE_ODD2 0x18 /* Video DMA 2 registers */

#define	BASE_EVEN2 0x1C

#define	PROT_ADDR2 0x20

#define	PITCH2 0x24

#define	BASE_PAGE2 0x28 /* Video DMA 2 base page */

#define	NUM_LINE_BYTE2 0x2C

#define	BASE_ODD3 0x30 /* Video DMA 3 registers */

#define	BASE_EVEN3 0x34

#define	PROT_ADDR3 0x38

#define	PITCH3 0x3C

#define	BASE_PAGE3 0x40 /* Video DMA 3 base page */

#define	NUM_LINE_BYTE3 0x44

#define	PCI_BT_V1 0x48 /* Video/FIFO 1 */

#define	PCI_BT_V2 0x49 /* Video/FIFO 2 */

#define	PCI_BT_V3 0x4A /* Video/FIFO 3 */

#define	PCI_BT_DEBI 0x4B /* DEBI */

#define	PCI_BT_A 0x4C /* Audio */

#define	DD1_INIT 0x50 /* Init setting of DD1 interface */

#define	DD1_STREAM_B 0x54 /* DD1 B video data stream handling */

#define	DD1_STREAM_A 0x56 /* DD1 A video data stream handling */

#define	BRS_CTRL 0x58 /* BRS control register */

#define	HPS_CTRL 0x5C /* HPS control register */

#define	HPS_V_SCALE 0x60 /* HPS vertical scale */

#define	HPS_V_GAIN 0x64 /* HPS vertical ACL and gain */

#define	HPS_H_PRESCALE 0x68 /* HPS horizontal prescale */

#define	HPS_H_SCALE 0x6C /* HPS horizontal scale */

#define	BCS_CTRL 0x70 /* BCS control */

#define	CHROMA_KEY_RANGE 0x74

#define	CLIP_FORMAT_CTRL 0x78 /* HPS outputs formats & clipping */

#define	DEBI_CONFIG 0x7C

#define	DEBI_COMMAND 0x80

#define	DEBI_PAGE 0x84

#define	DEBI_AD 0x88

#define	I2C_TRANSFER 0x8C

#define	I2C_STATUS 0x90

#define	BASE_A1_IN 0x94 /* Audio 1 input DMA */

#define	PROT_A1_IN 0x98

#define	PAGE_A1_IN 0x9C

#define	BASE_A1_OUT 0xA0 /* Audio 1 output DMA */

#define	PROT_A1_OUT 0xA4

#define	PAGE_A1_OUT 0xA8

#define	BASE_A2_IN 0xAC /* Audio 2 input DMA */

#define	PROT_A2_IN 0xB0

#define	PAGE_A2_IN 0xB4

#define	BASE_A2_OUT 0xB8 /* Audio 2 output DMA */

#define	PROT_A2_OUT 0xBC

#define	PAGE_A2_OUT 0xC0

#define	RPS_PAGE0 0xC4 /* RPS task 0 page register */

#define	RPS_PAGE1 0xC8 /* RPS task 1 page register */

#define	RPS_THRESH0 0xCC /* HBI threshold for task 0 */

#define	RPS_THRESH1 0xD0 /* HBI threshold for task 1 */

#define	RPS_TOV0 0xD4 /* RPS timeout for task 0 */

#define	RPS_TOV1 0xD8 /* RPS timeout for task 1 */

#define	IER 0xDC /* Interrupt enable register */

#define	GPIO_CTRL 0xE0 /* GPIO 0-3 register */

#define	EC1SSR 0xE4 /* Event cnt set 1 source select */

#define	EC2SSR 0xE8 /* Event cnt set 2 source select */

#define	ECT1R 0xEC /* Event cnt set 1 thresholds */

#define	ECT2R 0xF0 /* Event cnt set 2 thresholds */

#define	ACON1 0xF4

#define	ACON2 0xF8

#define	MC1 0xFC /* Main control register 1 */

#define	MC2 0x100 /* Main control register 2 */

#define	RPS_ADDR0 0x104 /* RPS task 0 address register */

#define	RPS_ADDR1 0x108 /* RPS task 1 address register */

#define	ISR 0x10C /* Interrupt status register */

#define	PSR 0x110 /* Primary status register */

#define	SSR 0x114 /* Secondary status register */

#define	EC1R 0x118 /* Event counter set 1 register */

#define	EC2R 0x11C /* Event counter set 2 register */

#define	PCI_VDP1 0x120 /* Video DMA pointer of FIFO 1 */

#define	PCI_VDP2 0x124 /* Video DMA pointer of FIFO 2 */

#define	PCI_VDP3 0x128 /* Video DMA pointer of FIFO 3 */

#define	PCI_ADP1 0x12C /* Audio DMA pointer of audio out 1 */

#define	PCI_ADP2 0x130 /* Audio DMA pointer of audio in 1 */

#define	PCI_ADP3 0x134 /* Audio DMA pointer of audio out 2 */

#define	PCI_ADP4 0x138 /* Audio DMA pointer of audio in 2 */

#define	PCI_DMA_DDP 0x13C /* DEBI DMA pointer */

#define	LEVEL_REP 0x140,

#define	A_TIME_SLOT1 0x180, /* from 180 - 1BC */

#define	A_TIME_SLOT2 0x1C0, /* from 1C0 - 1FC */

#define	SPCI_PPEF 0x80000000 /* PCI parity error */

#define	SPCI_PABO 0x40000000 /* PCI access error (target or master abort) */

#define	SPCI_PPED 0x20000000 /* PCI parity error on 'real time data' */

#define	SPCI_RPS_I1 0x10000000 /* Interrupt issued by RPS1 */

#define	SPCI_RPS_I0 0x08000000 /* Interrupt issued by RPS0 */

#define	SPCI_RPS_LATE1 0x04000000 /* RPS task 1 is late */

#define	SPCI_RPS_LATE0 0x02000000 /* RPS task 0 is late */

#define	SPCI_RPS_E1 0x01000000 /* RPS error from task 1 */

#define	SPCI_RPS_E0 0x00800000 /* RPS error from task 0 */

#define	SPCI_RPS_TO1 0x00400000 /* RPS timeout task 1 */

#define	SPCI_RPS_TO0 0x00200000 /* RPS timeout task 0 */

#define	SPCI_UPLD 0x00100000 /* RPS in upload */

#define	SPCI_DEBI_S 0x00080000 /* DEBI status */

#define	SPCI_DEBI_E 0x00040000 /* DEBI error */

#define	SPCI_IIC_S 0x00020000 /* I2C status */

#define	SPCI_IIC_E 0x00010000 /* I2C error */

#define	SPCI_A2_IN 0x00008000 /* Audio 2 input DMA protection / limit */

#define	SPCI_A2_OUT 0x00004000 /* Audio 2 output DMA protection / limit */

#define	SPCI_A1_IN 0x00002000 /* Audio 1 input DMA protection / limit */

#define	SPCI_A1_OUT 0x00001000 /* Audio 1 output DMA protection / limit */

#define	SPCI_AFOU 0x00000800 /* Audio FIFO over- / underflow */

#define	SPCI_V_PE 0x00000400 /* Video protection address */

#define	SPCI_VFOU 0x00000200 /* Video FIFO over- / underflow */

#define	SPCI_FIDA 0x00000100 /* Field ID video port A */

#define	SPCI_FIDB 0x00000080 /* Field ID video port B */

#define	SPCI_PIN3 0x00000040 /* GPIO pin 3 */

#define	SPCI_PIN2 0x00000020 /* GPIO pin 2 */

#define	SPCI_PIN1 0x00000010 /* GPIO pin 1 */

#define	SPCI_PIN0 0x00000008 /* GPIO pin 0 */

#define	SPCI_ECS 0x00000004 /* Event counter 1, 2, 4, 5 */

#define	SPCI_EC3S 0x00000002 /* Event counter 3 */

#define	SPCI_EC0S 0x00000001 /* Event counter 0 */

#define	SAA7146_I2C_ABORT (1<<7)

#define	SAA7146_I2C_SPERR (1<<6)

#define	SAA7146_I2C_APERR (1<<5)

#define	SAA7146_I2C_DTERR (1<<4)

#define	SAA7146_I2C_DRERR (1<<3)

#define	SAA7146_I2C_AL (1<<2)

#define	SAA7146_I2C_ERR (1<<1)

#define	SAA7146_I2C_BUSY (1<<0)

#define	SAA7146_I2C_START (0x3)

#define	SAA7146_I2C_CONT (0x2)

#define	SAA7146_I2C_STOP (0x1)

#define	SAA7146_I2C_NOP (0x0)

#define	SAA7146_I2C_BUS_BIT_RATE_6400 (0x500)

#define	SAA7146_I2C_BUS_BIT_RATE_3200 (0x100)

#define	SAA7146_I2C_BUS_BIT_RATE_480 (0x400)

#define	SAA7146_I2C_BUS_BIT_RATE_320 (0x600)

#define	SAA7146_I2C_BUS_BIT_RATE_240 (0x700)

#define	SAA7146_I2C_BUS_BIT_RATE_120 (0x000)

#define	SAA7146_I2C_BUS_BIT_RATE_80 (0x200)

#define	SAA7146_I2C_BUS_BIT_RATE_60 (0x300)

Functions
int	saa7146_i2c_adapter_prepare (struct saa7146_dev dev, struct i2c_adapter i2c_adapter, u32 bitrate)

int	saa7146_register_extension (struct saa7146_extension *)

int	saa7146_unregister_extension (struct saa7146_extension *)

struct saa7146_format *	saa7146_format_by_fourcc (struct saa7146_dev *dev, int fourcc)

int	saa7146_pgtable_alloc (struct pci_dev pci, struct saa7146_pgtable pt)

void	saa7146_pgtable_free (struct pci_dev pci, struct saa7146_pgtable pt)

int	saa7146_pgtable_build_single (struct pci_dev pci, struct saa7146_pgtable pt, struct scatterlist *list, int length)

void *	saa7146_vmalloc_build_pgtable (struct pci_dev pci, long length, struct saa7146_pgtable pt)

void	saa7146_vfree_destroy_pgtable (struct pci_dev pci, void mem, struct saa7146_pgtable *pt)

void	saa7146_setgpio (struct saa7146_dev *dev, int port, u32 data)

int	saa7146_wait_for_debi_done (struct saa7146_dev *dev, int nobusyloop)

Variables
unsigned int	saa7146_debug

Macro Definition Documentation

#define _DBG	(	mask,
		fmt,
		...
	)

Value:

do {                                    \
    if (DEBUG_VARIABLE & mask)                  \
        pr_debug("%s(): " fmt, __func__, ##__VA_ARGS__);    \
} while (0)

Definition at line 32 of file saa7146.h.

#define A_TIME_SLOT1 0x180, /* from 180 - 1BC */

Definition at line 394 of file saa7146.h.

#define A_TIME_SLOT2 0x1C0, /* from 1C0 - 1FC */

Definition at line 395 of file saa7146.h.

#define ACON1 0xF4

Definition at line 368 of file saa7146.h.

#define ACON2 0xF8

Definition at line 369 of file saa7146.h.

#define BASE_A1_IN 0x94 /* Audio 1 input DMA */

Definition at line 334 of file saa7146.h.

#define BASE_A1_OUT 0xA0 /* Audio 1 output DMA */

Definition at line 338 of file saa7146.h.

#define BASE_A2_IN 0xAC /* Audio 2 input DMA */

Definition at line 342 of file saa7146.h.

#define BASE_A2_OUT 0xB8 /* Audio 2 output DMA */

Definition at line 346 of file saa7146.h.

#define BASE_EVEN1 0x04

Definition at line 285 of file saa7146.h.

#define BASE_EVEN2 0x1C

Definition at line 292 of file saa7146.h.

#define BASE_EVEN3 0x34

Definition at line 299 of file saa7146.h.

#define BASE_ODD1 0x00 /* Video DMA 1 registers */

Definition at line 284 of file saa7146.h.

#define BASE_ODD2 0x18 /* Video DMA 2 registers */

Definition at line 291 of file saa7146.h.

#define BASE_ODD3 0x30 /* Video DMA 3 registers */

Definition at line 298 of file saa7146.h.

#define BASE_PAGE1 0x10 /* Video DMA 1 base page */

Definition at line 288 of file saa7146.h.

#define BASE_PAGE2 0x28 /* Video DMA 2 base page */

Definition at line 295 of file saa7146.h.

#define BASE_PAGE3 0x40 /* Video DMA 3 base page */

Definition at line 302 of file saa7146.h.

#define BCS_CTRL 0x70 /* BCS control */

Definition at line 322 of file saa7146.h.

#define BRS_CTRL 0x58 /* BRS control register */

Definition at line 316 of file saa7146.h.

#define CHROMA_KEY_RANGE 0x74

Definition at line 323 of file saa7146.h.

#define CLIP_FORMAT_CTRL 0x78 /* HPS outputs formats & clipping */

Definition at line 324 of file saa7146.h.

#define CMD_CHECK_LATE 0x30000000 /* Check late */

Definition at line 207 of file saa7146.h.

#define CMD_CLR_EVENT 0x00000000 /* Clear event */

Definition at line 204 of file saa7146.h.

#define CMD_E_FID_A MASK_11

Definition at line 226 of file saa7146.h.

#define CMD_E_FID_B MASK_13

Definition at line 224 of file saa7146.h.

#define CMD_INTERRUPT 0x60000000 /* Interrupt */

Definition at line 210 of file saa7146.h.

#define CMD_INV MASK_26

Definition at line 217 of file saa7146.h.

#define CMD_JUMP 0x80000000 /* Jump */

Definition at line 211 of file saa7146.h.

#define CMD_NOP 0x00000000 /* No operation */

Definition at line 203 of file saa7146.h.

#define CMD_O_FID_A MASK_12

Definition at line 225 of file saa7146.h.

#define CMD_O_FID_B MASK_14

Definition at line 223 of file saa7146.h.

#define CMD_OAN MASK_27

Definition at line 216 of file saa7146.h.

#define CMD_PAUSE 0x20000000 /* Pause */

Definition at line 206 of file saa7146.h.

#define CMD_RD_REG 0xa0000000 /* Read (store) register */

Definition at line 213 of file saa7146.h.

#define CMD_SET_EVENT 0x10000000 /* Set signal event */

Definition at line 205 of file saa7146.h.

#define CMD_SIG0 MASK_21

Definition at line 222 of file saa7146.h.

#define CMD_SIG1 MASK_22

Definition at line 221 of file saa7146.h.

#define CMD_SIG2 MASK_23

Definition at line 220 of file saa7146.h.

#define CMD_SIG3 MASK_24

Definition at line 219 of file saa7146.h.

#define CMD_SIG4 MASK_25

Definition at line 218 of file saa7146.h.

#define CMD_STOP 0x50000000 /* Stop */

Definition at line 209 of file saa7146.h.

#define CMD_UPLOAD 0x40000000 /* Upload */

Definition at line 208 of file saa7146.h.

#define CMD_WR_REG 0x90000000 /* Write (load) register */

Definition at line 212 of file saa7146.h.

#define CMD_WR_REG_MASK 0xc0000000 /* Write register with mask */

Definition at line 214 of file saa7146.h.

#define DD1_INIT 0x50 /* Init setting of DD1 interface */

Definition at line 311 of file saa7146.h.

#define DD1_STREAM_A 0x56 /* DD1 A video data stream handling */

Definition at line 314 of file saa7146.h.

#define DD1_STREAM_B 0x54 /* DD1 B video data stream handling */

Definition at line 313 of file saa7146.h.

#define DEB_CAP	(	fmt,
		...
	)	_DBG(0x40, fmt, ##__VA_ARGS__)

Definition at line 51 of file saa7146.h.

#define DEB_D	(	fmt,
		...
	)	_DBG(0x02, fmt, ##__VA_ARGS__)

Definition at line 41 of file saa7146.h.

#define DEB_EE	(	fmt,
		...
	)	_DBG(0x04, fmt, ##__VA_ARGS__)

Definition at line 43 of file saa7146.h.

#define DEB_I2C	(	fmt,
		...
	)	_DBG(0x08, fmt, ##__VA_ARGS__)

Definition at line 45 of file saa7146.h.

#define DEB_INT	(	fmt,
		...
	)	_DBG(0x20, fmt, ##__VA_ARGS__)

Definition at line 49 of file saa7146.h.

#define DEB_S	(	fmt,
		...
	)	_DBG(0x01, fmt, ##__VA_ARGS__)

Definition at line 39 of file saa7146.h.

#define DEB_VBI	(	fmt,
		...
	)	_DBG(0x10, fmt, ##__VA_ARGS__)

Definition at line 47 of file saa7146.h.

#define DEBI_AD 0x88

Definition at line 329 of file saa7146.h.

#define DEBI_COMMAND 0x80

Definition at line 327 of file saa7146.h.

#define DEBI_CONFIG 0x7C

Definition at line 326 of file saa7146.h.

#define DEBI_PAGE 0x84

Definition at line 328 of file saa7146.h.

#define DEBINOSWAP 0x000e0000

Definition at line 200 of file saa7146.h.

#define DEBUG_VARIABLE saa7146_debug

Definition at line 27 of file saa7146.h.

#define EC1R 0x118 /* Event counter set 1 register */

Definition at line 381 of file saa7146.h.

#define EC1SSR 0xE4 /* Event cnt set 1 source select */

Definition at line 363 of file saa7146.h.

#define EC2R 0x11C /* Event counter set 2 register */

Definition at line 382 of file saa7146.h.

#define EC2SSR 0xE8 /* Event cnt set 2 source select */

Definition at line 364 of file saa7146.h.

#define ECT1R 0xEC /* Event cnt set 1 thresholds */

Definition at line 365 of file saa7146.h.

#define ECT2R 0xF0 /* Event cnt set 2 thresholds */

Definition at line 366 of file saa7146.h.

#define ERR	(	fmt,
		...
	)	pr_err("%s: " fmt, __func__, ##__VA_ARGS__)

Definition at line 30 of file saa7146.h.

#define EVT_HS (1<<15)

Definition at line 229 of file saa7146.h.

#define EVT_VBI_B (1<<9)

Definition at line 230 of file saa7146.h.

#define GPIO3_MSK 0xFF000000

Definition at line 233 of file saa7146.h.

#define GPIO_CTRL 0xE0 /* GPIO 0-3 register */

Definition at line 361 of file saa7146.h.

#define HPS_CTRL 0x5C /* HPS control register */

Definition at line 317 of file saa7146.h.

#define HPS_H_PRESCALE 0x68 /* HPS horizontal prescale */

Definition at line 320 of file saa7146.h.

#define HPS_H_SCALE 0x6C /* HPS horizontal scale */

Definition at line 321 of file saa7146.h.

#define HPS_V_GAIN 0x64 /* HPS vertical ACL and gain */

Definition at line 319 of file saa7146.h.

#define HPS_V_SCALE 0x60 /* HPS vertical scale */

Definition at line 318 of file saa7146.h.

#define I2C_STATUS 0x90

Definition at line 332 of file saa7146.h.

#define I2C_TRANSFER 0x8C

Definition at line 331 of file saa7146.h.

#define IER 0xDC /* Interrupt enable register */

Definition at line 359 of file saa7146.h.

#define ISR 0x10C /* Interrupt status register */

Definition at line 377 of file saa7146.h.

#define LEVEL_REP 0x140,

Definition at line 393 of file saa7146.h.

#define MAKE_EXTENSION_PCI	(	x_var,
		x_vendor,
		x_device
	)

Value:

{                           \
        .vendor    = PCI_VENDOR_ID_PHILIPS,     \
        .device    = PCI_DEVICE_ID_PHILIPS_SAA7146, \
        .subvendor = x_vendor,              \
        .subdevice = x_device,              \
        .driver_data = (unsigned long)& x_var,      \
    }

Definition at line 79 of file saa7146.h.

#define MASK_00 0x00000001 /* Mask value for bit 0 */

Definition at line 236 of file saa7146.h.

#define MASK_01 0x00000002 /* Mask value for bit 1 */

Definition at line 237 of file saa7146.h.

#define MASK_02 0x00000004 /* Mask value for bit 2 */

Definition at line 238 of file saa7146.h.

#define MASK_03 0x00000008 /* Mask value for bit 3 */

Definition at line 239 of file saa7146.h.

#define MASK_04 0x00000010 /* Mask value for bit 4 */

Definition at line 240 of file saa7146.h.

#define MASK_05 0x00000020 /* Mask value for bit 5 */

Definition at line 241 of file saa7146.h.

#define MASK_06 0x00000040 /* Mask value for bit 6 */

Definition at line 242 of file saa7146.h.

#define MASK_07 0x00000080 /* Mask value for bit 7 */

Definition at line 243 of file saa7146.h.

#define MASK_08 0x00000100 /* Mask value for bit 8 */

Definition at line 244 of file saa7146.h.

#define MASK_09 0x00000200 /* Mask value for bit 9 */

Definition at line 245 of file saa7146.h.

#define MASK_10 0x00000400 /* Mask value for bit 10 */

Definition at line 246 of file saa7146.h.

#define MASK_11 0x00000800 /* Mask value for bit 11 */

Definition at line 247 of file saa7146.h.

#define MASK_12 0x00001000 /* Mask value for bit 12 */

Definition at line 248 of file saa7146.h.

#define MASK_13 0x00002000 /* Mask value for bit 13 */

Definition at line 249 of file saa7146.h.

#define MASK_14 0x00004000 /* Mask value for bit 14 */

Definition at line 250 of file saa7146.h.

#define MASK_15 0x00008000 /* Mask value for bit 15 */

Definition at line 251 of file saa7146.h.

#define MASK_16 0x00010000 /* Mask value for bit 16 */

Definition at line 252 of file saa7146.h.

#define MASK_17 0x00020000 /* Mask value for bit 17 */

Definition at line 253 of file saa7146.h.

#define MASK_18 0x00040000 /* Mask value for bit 18 */

Definition at line 254 of file saa7146.h.

#define MASK_19 0x00080000 /* Mask value for bit 19 */

Definition at line 255 of file saa7146.h.

#define MASK_20 0x00100000 /* Mask value for bit 20 */

Definition at line 256 of file saa7146.h.

#define MASK_21 0x00200000 /* Mask value for bit 21 */

Definition at line 257 of file saa7146.h.

#define MASK_22 0x00400000 /* Mask value for bit 22 */

Definition at line 258 of file saa7146.h.

#define MASK_23 0x00800000 /* Mask value for bit 23 */

Definition at line 259 of file saa7146.h.

#define MASK_24 0x01000000 /* Mask value for bit 24 */

Definition at line 260 of file saa7146.h.

#define MASK_25 0x02000000 /* Mask value for bit 25 */

Definition at line 261 of file saa7146.h.

#define MASK_26 0x04000000 /* Mask value for bit 26 */

Definition at line 262 of file saa7146.h.

#define MASK_27 0x08000000 /* Mask value for bit 27 */

Definition at line 263 of file saa7146.h.

#define MASK_28 0x10000000 /* Mask value for bit 28 */

Definition at line 264 of file saa7146.h.

#define MASK_29 0x20000000 /* Mask value for bit 29 */

Definition at line 265 of file saa7146.h.

#define MASK_30 0x40000000 /* Mask value for bit 30 */

Definition at line 266 of file saa7146.h.

#define MASK_31 0x80000000 /* Mask value for bit 31 */

Definition at line 267 of file saa7146.h.

#define MASK_B0 0x000000ff /* Mask value for byte 0 */

Definition at line 269 of file saa7146.h.

#define MASK_B1 0x0000ff00 /* Mask value for byte 1 */

Definition at line 270 of file saa7146.h.

#define MASK_B2 0x00ff0000 /* Mask value for byte 2 */

Definition at line 271 of file saa7146.h.

#define MASK_B3 0xff000000 /* Mask value for byte 3 */

Definition at line 272 of file saa7146.h.

#define MASK_ER 0xffffffff /* Mask value for the entire register */

Definition at line 279 of file saa7146.h.

#define MASK_NONE 0x00000000 /* No mask */

Definition at line 281 of file saa7146.h.

#define MASK_PA 0xfffffffc /* Mask value for physical address */

Definition at line 277 of file saa7146.h.

#define MASK_PR 0xfffffffe /* Mask value for protection register */

Definition at line 278 of file saa7146.h.

#define MASK_W0 0x0000ffff /* Mask value for word 0 */

Definition at line 274 of file saa7146.h.

#define MASK_W1 0xffff0000 /* Mask value for word 1 */

Definition at line 275 of file saa7146.h.

#define MC1 0xFC /* Main control register 1 */

Definition at line 371 of file saa7146.h.

#define MC2 0x100 /* Main control register 2 */

Definition at line 372 of file saa7146.h.

#define ME1 0x0000000800

Definition at line 188 of file saa7146.h.

#define NUM_LINE_BYTE1 0x14

Definition at line 289 of file saa7146.h.

#define NUM_LINE_BYTE2 0x2C

Definition at line 296 of file saa7146.h.

#define NUM_LINE_BYTE3 0x44

Definition at line 303 of file saa7146.h.

#define PAGE_A1_IN 0x9C

Definition at line 336 of file saa7146.h.

#define PAGE_A1_OUT 0xA8

Definition at line 340 of file saa7146.h.

#define PAGE_A2_IN 0xB4

Definition at line 344 of file saa7146.h.

#define PAGE_A2_OUT 0xC0

Definition at line 348 of file saa7146.h.

#define PCI_ADP1 0x12C /* Audio DMA pointer of audio out 1 */

Definition at line 387 of file saa7146.h.

#define PCI_ADP2 0x130 /* Audio DMA pointer of audio in 1 */

Definition at line 388 of file saa7146.h.

#define PCI_ADP3 0x134 /* Audio DMA pointer of audio out 2 */

Definition at line 389 of file saa7146.h.

#define PCI_ADP4 0x138 /* Audio DMA pointer of audio in 2 */

Definition at line 390 of file saa7146.h.

#define PCI_BT_A 0x4C /* Audio */

Definition at line 309 of file saa7146.h.

#define PCI_BT_DEBI 0x4B /* DEBI */

Definition at line 308 of file saa7146.h.

#define PCI_BT_V1 0x48 /* Video/FIFO 1 */

Definition at line 305 of file saa7146.h.

#define PCI_BT_V2 0x49 /* Video/FIFO 2 */

Definition at line 306 of file saa7146.h.

#define PCI_BT_V3 0x4A /* Video/FIFO 3 */

Definition at line 307 of file saa7146.h.

#define PCI_DMA_DDP 0x13C /* DEBI DMA pointer */

Definition at line 391 of file saa7146.h.

#define PCI_VDP1 0x120 /* Video DMA pointer of FIFO 1 */

Definition at line 384 of file saa7146.h.

#define PCI_VDP2 0x124 /* Video DMA pointer of FIFO 2 */

Definition at line 385 of file saa7146.h.

#define PCI_VDP3 0x128 /* Video DMA pointer of FIFO 3 */

Definition at line 386 of file saa7146.h.

#define PITCH1 0x0C

Definition at line 287 of file saa7146.h.

#define PITCH2 0x24

Definition at line 294 of file saa7146.h.

#define PITCH3 0x3C

Definition at line 301 of file saa7146.h.

#define PROT_A1_IN 0x98

Definition at line 335 of file saa7146.h.

#define PROT_A1_OUT 0xA4

Definition at line 339 of file saa7146.h.

#define PROT_A2_IN 0xB0

Definition at line 343 of file saa7146.h.

#define PROT_A2_OUT 0xBC

Definition at line 347 of file saa7146.h.

#define PROT_ADDR1 0x08

Definition at line 286 of file saa7146.h.

#define PROT_ADDR2 0x20

Definition at line 293 of file saa7146.h.

#define PROT_ADDR3 0x38

Definition at line 300 of file saa7146.h.

#define PSR 0x110 /* Primary status register */

Definition at line 378 of file saa7146.h.

#define PV1 0x0000000008

Definition at line 189 of file saa7146.h.

#define RPS_ADDR0 0x104 /* RPS task 0 address register */

Definition at line 374 of file saa7146.h.

#define RPS_ADDR1 0x108 /* RPS task 1 address register */

Definition at line 375 of file saa7146.h.

#define RPS_INV (1<<26)

Definition at line 232 of file saa7146.h.

#define RPS_OAN (1<<27)

Definition at line 231 of file saa7146.h.

#define RPS_PAGE0 0xC4 /* RPS task 0 page register */

Definition at line 350 of file saa7146.h.

#define RPS_PAGE1 0xC8 /* RPS task 1 page register */

Definition at line 351 of file saa7146.h.

#define RPS_THRESH0 0xCC /* HBI threshold for task 0 */

Definition at line 353 of file saa7146.h.

#define RPS_THRESH1 0xD0 /* HBI threshold for task 1 */

Definition at line 354 of file saa7146.h.

#define RPS_TOV0 0xD4 /* RPS timeout for task 0 */

Definition at line 356 of file saa7146.h.

#define RPS_TOV1 0xD8 /* RPS timeout for task 1 */

Definition at line 357 of file saa7146.h.

#define SAA7146_GPIO_INPUT 0x00

Definition at line 192 of file saa7146.h.

#define SAA7146_GPIO_IRQHI 0x10

Definition at line 193 of file saa7146.h.

#define SAA7146_GPIO_IRQHL 0x30

Definition at line 195 of file saa7146.h.

#define SAA7146_GPIO_IRQLO 0x20

Definition at line 194 of file saa7146.h.

#define SAA7146_GPIO_OUTHI 0x50

Definition at line 197 of file saa7146.h.

#define SAA7146_GPIO_OUTLO 0x40

Definition at line 196 of file saa7146.h.

#define SAA7146_I2C_ABORT (1<<7)

Definition at line 432 of file saa7146.h.

#define SAA7146_I2C_AL (1<<2)

Definition at line 437 of file saa7146.h.

#define SAA7146_I2C_APERR (1<<5)

Definition at line 434 of file saa7146.h.

#define SAA7146_I2C_BUS_BIT_RATE_120 (0x000)

Definition at line 451 of file saa7146.h.

#define SAA7146_I2C_BUS_BIT_RATE_240 (0x700)

Definition at line 450 of file saa7146.h.

#define SAA7146_I2C_BUS_BIT_RATE_320 (0x600)

Definition at line 449 of file saa7146.h.

#define SAA7146_I2C_BUS_BIT_RATE_3200 (0x100)

Definition at line 447 of file saa7146.h.

#define SAA7146_I2C_BUS_BIT_RATE_480 (0x400)

Definition at line 448 of file saa7146.h.

#define SAA7146_I2C_BUS_BIT_RATE_60 (0x300)

Definition at line 453 of file saa7146.h.

#define SAA7146_I2C_BUS_BIT_RATE_6400 (0x500)

Definition at line 446 of file saa7146.h.

#define SAA7146_I2C_BUS_BIT_RATE_80 (0x200)

Definition at line 452 of file saa7146.h.

#define SAA7146_I2C_BUSY (1<<0)

Definition at line 439 of file saa7146.h.

#define SAA7146_I2C_CONT (0x2)

Definition at line 442 of file saa7146.h.

#define SAA7146_I2C_DELAY 5 /* time we wait after certain i2c-operations */

Definition at line 185 of file saa7146.h.

#define SAA7146_I2C_DRERR (1<<3)

Definition at line 436 of file saa7146.h.

#define SAA7146_I2C_DTERR (1<<4)

Definition at line 435 of file saa7146.h.

#define SAA7146_I2C_ERR (1<<1)

Definition at line 438 of file saa7146.h.

#define SAA7146_I2C_MEM ( 1*PAGE_SIZE)

Definition at line 179 of file saa7146.h.

#define SAA7146_I2C_NOP (0x0)

Definition at line 444 of file saa7146.h.

#define SAA7146_I2C_RETRIES 3 /* how many times shall we retry an i2c-operation? */

Definition at line 184 of file saa7146.h.

#define SAA7146_I2C_SHORT_DELAY 0x2

Definition at line 92 of file saa7146.h.

#define SAA7146_I2C_SPERR (1<<6)

Definition at line 433 of file saa7146.h.

#define SAA7146_I2C_START (0x3)

Definition at line 441 of file saa7146.h.

#define SAA7146_I2C_STOP (0x1)

Definition at line 443 of file saa7146.h.

#define SAA7146_I2C_TIMEOUT 100 /* i2c-timeout-value in ms */

Definition at line 183 of file saa7146.h.

#define SAA7146_ISR_CLEAR	(	x,
		y
	)	saa7146_write(x, ISR, (y));

Definition at line 53 of file saa7146.h.

#define saa7146_read	(	sxy,
		adr
	)	readl(sxy->mem+(adr))

Definition at line 22 of file saa7146.h.

#define SAA7146_RPS_MEM ( 1*PAGE_SIZE)

Definition at line 180 of file saa7146.h.

#define SAA7146_USE_I2C_IRQ 0x1

Definition at line 91 of file saa7146.h.

#define saa7146_write	(	sxy,
		adr,
		dat
	)	writel((dat),(sxy->mem+(adr)))

Definition at line 21 of file saa7146.h.

#define SPCI_A1_IN 0x00002000 /* Audio 1 input DMA protection / limit */

Definition at line 416 of file saa7146.h.

#define SPCI_A1_OUT 0x00001000 /* Audio 1 output DMA protection / limit */

Definition at line 417 of file saa7146.h.

#define SPCI_A2_IN 0x00008000 /* Audio 2 input DMA protection / limit */

Definition at line 414 of file saa7146.h.

#define SPCI_A2_OUT 0x00004000 /* Audio 2 output DMA protection / limit */

Definition at line 415 of file saa7146.h.

#define SPCI_AFOU 0x00000800 /* Audio FIFO over- / underflow */

Definition at line 418 of file saa7146.h.

#define SPCI_DEBI_E 0x00040000 /* DEBI error */

Definition at line 411 of file saa7146.h.

#define SPCI_DEBI_S 0x00080000 /* DEBI status */

Definition at line 410 of file saa7146.h.

#define SPCI_EC0S 0x00000001 /* Event counter 0 */

Definition at line 429 of file saa7146.h.

#define SPCI_EC3S 0x00000002 /* Event counter 3 */

Definition at line 428 of file saa7146.h.

#define SPCI_ECS 0x00000004 /* Event counter 1, 2, 4, 5 */

Definition at line 427 of file saa7146.h.

#define SPCI_FIDA 0x00000100 /* Field ID video port A */

Definition at line 421 of file saa7146.h.

#define SPCI_FIDB 0x00000080 /* Field ID video port B */

Definition at line 422 of file saa7146.h.

#define SPCI_IIC_E 0x00010000 /* I2C error */

Definition at line 413 of file saa7146.h.

#define SPCI_IIC_S 0x00020000 /* I2C status */

Definition at line 412 of file saa7146.h.

#define SPCI_PABO 0x40000000 /* PCI access error (target or master abort) */

Definition at line 399 of file saa7146.h.

#define SPCI_PIN0 0x00000008 /* GPIO pin 0 */

Definition at line 426 of file saa7146.h.

#define SPCI_PIN1 0x00000010 /* GPIO pin 1 */

Definition at line 425 of file saa7146.h.

#define SPCI_PIN2 0x00000020 /* GPIO pin 2 */

Definition at line 424 of file saa7146.h.

#define SPCI_PIN3 0x00000040 /* GPIO pin 3 */

Definition at line 423 of file saa7146.h.

#define SPCI_PPED 0x20000000 /* PCI parity error on 'real time data' */

Definition at line 400 of file saa7146.h.

#define SPCI_PPEF 0x80000000 /* PCI parity error */

Definition at line 398 of file saa7146.h.

#define SPCI_RPS_E0 0x00800000 /* RPS error from task 0 */

Definition at line 406 of file saa7146.h.

#define SPCI_RPS_E1 0x01000000 /* RPS error from task 1 */

Definition at line 405 of file saa7146.h.

#define SPCI_RPS_I0 0x08000000 /* Interrupt issued by RPS0 */

Definition at line 402 of file saa7146.h.

#define SPCI_RPS_I1 0x10000000 /* Interrupt issued by RPS1 */

Definition at line 401 of file saa7146.h.

#define SPCI_RPS_LATE0 0x02000000 /* RPS task 0 is late */

Definition at line 404 of file saa7146.h.

#define SPCI_RPS_LATE1 0x04000000 /* RPS task 1 is late */

Definition at line 403 of file saa7146.h.

#define SPCI_RPS_TO0 0x00200000 /* RPS timeout task 0 */

Definition at line 408 of file saa7146.h.

#define SPCI_RPS_TO1 0x00400000 /* RPS timeout task 1 */

Definition at line 407 of file saa7146.h.

#define SPCI_UPLD 0x00100000 /* RPS in upload */

Definition at line 409 of file saa7146.h.

#define SPCI_V_PE 0x00000400 /* Video protection address */

Definition at line 419 of file saa7146.h.

#define SPCI_VFOU 0x00000200 /* Video FIFO over- / underflow */

Definition at line 420 of file saa7146.h.

#define SSR 0x114 /* Secondary status register */

Definition at line 379 of file saa7146.h.

Function Documentation

struct saa7146_format* saa7146_format_by_fourcc	(	struct saa7146_dev *	dev,
		int	fourcc
	)

read

Definition at line 92 of file saa7146_video.c.

int saa7146_i2c_adapter_prepare	(	struct saa7146_dev *	dev,
		struct i2c_adapter *	i2c_adapter,
		u32	bitrate
	)

Definition at line 403 of file saa7146_i2c.c.

int saa7146_pgtable_alloc	(	struct pci_dev *	pci,
		struct saa7146_pgtable *	pt
	)

Definition at line 231 of file saa7146_core.c.

int saa7146_pgtable_build_single	(	struct pci_dev *	pci,
		struct saa7146_pgtable *	pt,
		struct scatterlist *	list,
		int	length
	)

Definition at line 247 of file saa7146_core.c.

void saa7146_pgtable_free	(	struct pci_dev *	pci,
		struct saa7146_pgtable *	pt
	)

Definition at line 223 of file saa7146_core.c.

int saa7146_register_extension ( struct saa7146_extension * )

Definition at line 552 of file saa7146_core.c.

void saa7146_setgpio	(	struct saa7146_dev *	dev,
		int	port,
		u32	data
	)

Definition at line 48 of file saa7146_core.c.

int saa7146_unregister_extension ( struct saa7146_extension * )

Definition at line 565 of file saa7146_core.c.

void saa7146_vfree_destroy_pgtable	(	struct pci_dev *	pci,
		void *	mem,
		struct saa7146_pgtable *	pt
	)

Definition at line 214 of file saa7146_core.c.

void* saa7146_vmalloc_build_pgtable	(	struct pci_dev *	pci,
		long	length,
		struct saa7146_pgtable *	pt
	)

Definition at line 176 of file saa7146_core.c.

int saa7146_wait_for_debi_done	(	struct saa7146_dev *	dev,
		int	nobusyloop
	)

Definition at line 134 of file saa7146_core.c.

Variable Documentation

unsigned int saa7146_debug

Definition at line 28 of file saa7146_core.c.

Data Structures

Macros

Functions

Variables

Macro Definition Documentation

Function Documentation

Variable Documentation