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Linux Kernel
3.7.1
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#include <linux/i2c.h>#include <linux/slab.h>#include <linux/export.h>#include <drm/drmP.h>#include <drm/drm_crtc.h>#include <drm/drm_crtc_helper.h>#include <drm/drm_edid.h>#include "intel_drv.h"#include <drm/i915_drm.h>#include "i915_drv.h"Go to the source code of this file.
Data Structures | |
| struct | intel_dp_m_n |
Macros | |
| #define | DP_RECEIVER_CAP_SIZE 0xf |
| #define | DP_LINK_STATUS_SIZE 6 |
| #define | DP_LINK_CHECK_TIMEOUT (10 * 1000) |
| #define | IDLE_ON_MASK (PP_ON | 0 | PP_SEQUENCE_MASK | 0 | PP_SEQUENCE_STATE_MASK) |
| #define | IDLE_ON_VALUE (PP_ON | 0 | PP_SEQUENCE_NONE | 0 | PP_SEQUENCE_STATE_ON_IDLE) |
| #define | IDLE_OFF_MASK (PP_ON | 0 | PP_SEQUENCE_MASK | 0 | PP_SEQUENCE_STATE_MASK) |
| #define | IDLE_OFF_VALUE (0 | 0 | PP_SEQUENCE_NONE | 0 | PP_SEQUENCE_STATE_OFF_IDLE) |
| #define | IDLE_CYCLE_MASK (PP_ON | 0 | PP_SEQUENCE_MASK | PP_CYCLE_DELAY_ACTIVE | PP_SEQUENCE_STATE_MASK) |
| #define | IDLE_CYCLE_VALUE (0 | 0 | PP_SEQUENCE_NONE | 0 | PP_SEQUENCE_STATE_OFF_IDLE) |
| #define | CHANNEL_EQ_BITS |
| #define | get_delay(field) ((max(cur.field, vbt.field) + 9) / 10) |
Functions | |
| bool | intel_encoder_is_pch_edp (struct drm_encoder *encoder) |
| void | intel_edp_link_config (struct intel_encoder *intel_encoder, int *lane_num, int *link_bw) |
| int | intel_edp_target_clock (struct intel_encoder *intel_encoder, struct drm_display_mode *mode) |
| void | intel_dp_set_m_n (struct drm_crtc *crtc, struct drm_display_mode *mode, struct drm_display_mode *adjusted_mode) |
| int | intel_trans_dp_port_sel (struct drm_crtc *crtc) |
| bool | intel_dpd_is_edp (struct drm_device *dev) |
| void | intel_dp_init (struct drm_device *dev, int output_reg, enum port port) |
| #define CHANNEL_EQ_BITS |
Definition at line 1646 of file intel_dp.c.
| #define DP_LINK_CHECK_TIMEOUT (10 * 1000) |
Definition at line 41 of file intel_dp.c.
| #define DP_LINK_STATUS_SIZE 6 |
Definition at line 40 of file intel_dp.c.
| #define DP_RECEIVER_CAP_SIZE 0xf |
Definition at line 39 of file intel_dp.c.
| #define IDLE_CYCLE_MASK (PP_ON | 0 | PP_SEQUENCE_MASK | PP_CYCLE_DELAY_ACTIVE | PP_SEQUENCE_STATE_MASK) |
Definition at line 927 of file intel_dp.c.
| #define IDLE_CYCLE_VALUE (0 | 0 | PP_SEQUENCE_NONE | 0 | PP_SEQUENCE_STATE_OFF_IDLE) |
Definition at line 928 of file intel_dp.c.
| #define IDLE_OFF_MASK (PP_ON | 0 | PP_SEQUENCE_MASK | 0 | PP_SEQUENCE_STATE_MASK) |
Definition at line 924 of file intel_dp.c.
| #define IDLE_OFF_VALUE (0 | 0 | PP_SEQUENCE_NONE | 0 | PP_SEQUENCE_STATE_OFF_IDLE) |
Definition at line 925 of file intel_dp.c.
| #define IDLE_ON_MASK (PP_ON | 0 | PP_SEQUENCE_MASK | 0 | PP_SEQUENCE_STATE_MASK) |
Definition at line 921 of file intel_dp.c.
| #define IDLE_ON_VALUE (PP_ON | 0 | PP_SEQUENCE_NONE | 0 | PP_SEQUENCE_STATE_ON_IDLE) |
Definition at line 922 of file intel_dp.c.
Definition at line 2479 of file intel_dp.c.
| void intel_dp_set_m_n | ( | struct drm_crtc * | crtc, |
| struct drm_display_mode * | mode, | ||
| struct drm_display_mode * | adjusted_mode | ||
| ) |
Definition at line 761 of file intel_dp.c.
| bool intel_dpd_is_edp | ( | struct drm_device * | dev | ) |
Definition at line 2452 of file intel_dp.c.
| void intel_edp_link_config | ( | struct intel_encoder * | intel_encoder, |
| int * | lane_num, | ||
| int * | link_bw | ||
| ) |
Definition at line 114 of file intel_dp.c.
| int intel_edp_target_clock | ( | struct intel_encoder * | intel_encoder, |
| struct drm_display_mode * | mode | ||
| ) |
Definition at line 127 of file intel_dp.c.
| bool intel_encoder_is_pch_edp | ( | struct drm_encoder * | encoder | ) |
intel_encoder_is_pch_edp - is the given encoder a PCH attached eDP? : DRM encoder
Return true if corresponds to a PCH attached eDP panel. Needed by intel_display.c.
Definition at line 97 of file intel_dp.c.
Definition at line 2435 of file intel_dp.c.
1.8.2