Linux Kernel  3.7.1
 All Data Structures Namespaces Files Functions Variables Typedefs Enumerations Enumerator Macros Groups Pages
intel_lvds.c
Go to the documentation of this file.
1 /*
2  * Copyright © 2006-2007 Intel Corporation
3  * Copyright (c) 2006 Dave Airlie <[email protected]>
4  *
5  * Permission is hereby granted, free of charge, to any person obtaining a
6  * copy of this software and associated documentation files (the "Software"),
7  * to deal in the Software without restriction, including without limitation
8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9  * and/or sell copies of the Software, and to permit persons to whom the
10  * Software is furnished to do so, subject to the following conditions:
11  *
12  * The above copyright notice and this permission notice (including the next
13  * paragraph) shall be included in all copies or substantial portions of the
14  * Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22  * DEALINGS IN THE SOFTWARE.
23  *
24  * Authors:
25  * Eric Anholt <[email protected]>
26  * Dave Airlie <[email protected]>
27  * Jesse Barnes <[email protected]>
28  */
29 
30 #include <acpi/button.h>
31 #include <linux/dmi.h>
32 #include <linux/i2c.h>
33 #include <linux/slab.h>
34 #include <drm/drmP.h>
35 #include <drm/drm_crtc.h>
36 #include <drm/drm_edid.h>
37 #include "intel_drv.h"
38 #include <drm/i915_drm.h>
39 #include "i915_drv.h"
40 #include <linux/acpi.h>
41 
42 /* Private structure for the integrated LVDS support */
43 struct intel_lvds {
45 
46  struct edid *edid;
47 
51  bool pfit_dirty;
52 
54 };
55 
56 static struct intel_lvds *to_intel_lvds(struct drm_encoder *encoder)
57 {
58  return container_of(encoder, struct intel_lvds, base.base);
59 }
60 
61 static struct intel_lvds *intel_attached_lvds(struct drm_connector *connector)
62 {
63  return container_of(intel_attached_encoder(connector),
64  struct intel_lvds, base);
65 }
66 
67 static bool intel_lvds_get_hw_state(struct intel_encoder *encoder,
68  enum pipe *pipe)
69 {
70  struct drm_device *dev = encoder->base.dev;
71  struct drm_i915_private *dev_priv = dev->dev_private;
72  u32 lvds_reg, tmp;
73 
74  if (HAS_PCH_SPLIT(dev)) {
75  lvds_reg = PCH_LVDS;
76  } else {
77  lvds_reg = LVDS;
78  }
79 
80  tmp = I915_READ(lvds_reg);
81 
82  if (!(tmp & LVDS_PORT_EN))
83  return false;
84 
85  if (HAS_PCH_CPT(dev))
86  *pipe = PORT_TO_PIPE_CPT(tmp);
87  else
88  *pipe = PORT_TO_PIPE(tmp);
89 
90  return true;
91 }
92 
96 static void intel_enable_lvds(struct intel_encoder *encoder)
97 {
98  struct drm_device *dev = encoder->base.dev;
99  struct intel_lvds *intel_lvds = to_intel_lvds(&encoder->base);
100  struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc);
101  struct drm_i915_private *dev_priv = dev->dev_private;
102  u32 ctl_reg, lvds_reg, stat_reg;
103 
104  if (HAS_PCH_SPLIT(dev)) {
105  ctl_reg = PCH_PP_CONTROL;
106  lvds_reg = PCH_LVDS;
107  stat_reg = PCH_PP_STATUS;
108  } else {
109  ctl_reg = PP_CONTROL;
110  lvds_reg = LVDS;
111  stat_reg = PP_STATUS;
112  }
113 
114  I915_WRITE(lvds_reg, I915_READ(lvds_reg) | LVDS_PORT_EN);
115 
116  if (intel_lvds->pfit_dirty) {
117  /*
118  * Enable automatic panel scaling so that non-native modes
119  * fill the screen. The panel fitter should only be
120  * adjusted whilst the pipe is disabled, according to
121  * register description and PRM.
122  */
123  DRM_DEBUG_KMS("applying panel-fitter: %x, %x\n",
124  intel_lvds->pfit_control,
125  intel_lvds->pfit_pgm_ratios);
126 
128  I915_WRITE(PFIT_CONTROL, intel_lvds->pfit_control);
129  intel_lvds->pfit_dirty = false;
130  }
131 
132  I915_WRITE(ctl_reg, I915_READ(ctl_reg) | POWER_TARGET_ON);
133  POSTING_READ(lvds_reg);
134  if (wait_for((I915_READ(stat_reg) & PP_ON) != 0, 1000))
135  DRM_ERROR("timed out waiting for panel to power on\n");
136 
137  intel_panel_enable_backlight(dev, intel_crtc->pipe);
138 }
139 
140 static void intel_disable_lvds(struct intel_encoder *encoder)
141 {
142  struct drm_device *dev = encoder->base.dev;
143  struct intel_lvds *intel_lvds = to_intel_lvds(&encoder->base);
144  struct drm_i915_private *dev_priv = dev->dev_private;
145  u32 ctl_reg, lvds_reg, stat_reg;
146 
147  if (HAS_PCH_SPLIT(dev)) {
148  ctl_reg = PCH_PP_CONTROL;
149  lvds_reg = PCH_LVDS;
150  stat_reg = PCH_PP_STATUS;
151  } else {
152  ctl_reg = PP_CONTROL;
153  lvds_reg = LVDS;
154  stat_reg = PP_STATUS;
155  }
156 
158 
159  I915_WRITE(ctl_reg, I915_READ(ctl_reg) & ~POWER_TARGET_ON);
160  if (wait_for((I915_READ(stat_reg) & PP_ON) == 0, 1000))
161  DRM_ERROR("timed out waiting for panel to power off\n");
162 
163  if (intel_lvds->pfit_control) {
165  intel_lvds->pfit_dirty = true;
166  }
167 
168  I915_WRITE(lvds_reg, I915_READ(lvds_reg) & ~LVDS_PORT_EN);
169  POSTING_READ(lvds_reg);
170 }
171 
172 static int intel_lvds_mode_valid(struct drm_connector *connector,
173  struct drm_display_mode *mode)
174 {
175  struct intel_lvds *intel_lvds = intel_attached_lvds(connector);
176  struct drm_display_mode *fixed_mode = intel_lvds->fixed_mode;
177 
178  if (mode->hdisplay > fixed_mode->hdisplay)
179  return MODE_PANEL;
180  if (mode->vdisplay > fixed_mode->vdisplay)
181  return MODE_PANEL;
182 
183  return MODE_OK;
184 }
185 
186 static void
187 centre_horizontally(struct drm_display_mode *mode,
188  int width)
189 {
190  u32 border, sync_pos, blank_width, sync_width;
191 
192  /* keep the hsync and hblank widths constant */
193  sync_width = mode->crtc_hsync_end - mode->crtc_hsync_start;
194  blank_width = mode->crtc_hblank_end - mode->crtc_hblank_start;
195  sync_pos = (blank_width - sync_width + 1) / 2;
196 
197  border = (mode->hdisplay - width + 1) / 2;
198  border += border & 1; /* make the border even */
199 
200  mode->crtc_hdisplay = width;
201  mode->crtc_hblank_start = width + border;
202  mode->crtc_hblank_end = mode->crtc_hblank_start + blank_width;
203 
204  mode->crtc_hsync_start = mode->crtc_hblank_start + sync_pos;
205  mode->crtc_hsync_end = mode->crtc_hsync_start + sync_width;
206 
208 }
209 
210 static void
211 centre_vertically(struct drm_display_mode *mode,
212  int height)
213 {
214  u32 border, sync_pos, blank_width, sync_width;
215 
216  /* keep the vsync and vblank widths constant */
217  sync_width = mode->crtc_vsync_end - mode->crtc_vsync_start;
218  blank_width = mode->crtc_vblank_end - mode->crtc_vblank_start;
219  sync_pos = (blank_width - sync_width + 1) / 2;
220 
221  border = (mode->vdisplay - height + 1) / 2;
222 
223  mode->crtc_vdisplay = height;
224  mode->crtc_vblank_start = height + border;
225  mode->crtc_vblank_end = mode->crtc_vblank_start + blank_width;
226 
227  mode->crtc_vsync_start = mode->crtc_vblank_start + sync_pos;
228  mode->crtc_vsync_end = mode->crtc_vsync_start + sync_width;
229 
231 }
232 
233 static inline u32 panel_fitter_scaling(u32 source, u32 target)
234 {
235  /*
236  * Floating point operation is not supported. So the FACTOR
237  * is defined, which can avoid the floating point computation
238  * when calculating the panel ratio.
239  */
240 #define ACCURACY 12
241 #define FACTOR (1 << ACCURACY)
242  u32 ratio = source * FACTOR / target;
243  return (FACTOR * ratio + FACTOR/2) / FACTOR;
244 }
245 
246 static bool intel_lvds_mode_fixup(struct drm_encoder *encoder,
247  const struct drm_display_mode *mode,
248  struct drm_display_mode *adjusted_mode)
249 {
250  struct drm_device *dev = encoder->dev;
251  struct drm_i915_private *dev_priv = dev->dev_private;
252  struct intel_lvds *intel_lvds = to_intel_lvds(encoder);
253  struct intel_crtc *intel_crtc = intel_lvds->base.new_crtc;
254  u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0;
255  int pipe;
256 
257  /* Should never happen!! */
258  if (INTEL_INFO(dev)->gen < 4 && intel_crtc->pipe == 0) {
259  DRM_ERROR("Can't support LVDS on pipe A\n");
260  return false;
261  }
262 
263  if (intel_encoder_check_is_cloned(&intel_lvds->base))
264  return false;
265 
266  /*
267  * We have timings from the BIOS for the panel, put them in
268  * to the adjusted mode. The CRTC will be set up for this mode,
269  * with the panel scaling set up to source from the H/VDisplay
270  * of the original mode.
271  */
272  intel_fixed_panel_mode(intel_lvds->fixed_mode, adjusted_mode);
273 
274  if (HAS_PCH_SPLIT(dev)) {
275  intel_pch_panel_fitting(dev, intel_lvds->fitting_mode,
276  mode, adjusted_mode);
277  return true;
278  }
279 
280  /* Native modes don't need fitting */
281  if (adjusted_mode->hdisplay == mode->hdisplay &&
282  adjusted_mode->vdisplay == mode->vdisplay)
283  goto out;
284 
285  /* 965+ wants fuzzy fitting */
286  if (INTEL_INFO(dev)->gen >= 4)
287  pfit_control |= ((intel_crtc->pipe << PFIT_PIPE_SHIFT) |
289 
290  /*
291  * Enable automatic panel scaling for non-native modes so that they fill
292  * the screen. Should be enabled before the pipe is enabled, according
293  * to register description and PRM.
294  * Change the value here to see the borders for debugging
295  */
296  for_each_pipe(pipe)
297  I915_WRITE(BCLRPAT(pipe), 0);
298 
299  drm_mode_set_crtcinfo(adjusted_mode, 0);
300 
301  switch (intel_lvds->fitting_mode) {
303  /*
304  * For centered modes, we have to calculate border widths &
305  * heights and modify the values programmed into the CRTC.
306  */
307  centre_horizontally(adjusted_mode, mode->hdisplay);
308  centre_vertically(adjusted_mode, mode->vdisplay);
309  border = LVDS_BORDER_ENABLE;
310  break;
311 
313  /* Scale but preserve the aspect ratio */
314  if (INTEL_INFO(dev)->gen >= 4) {
315  u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay;
316  u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay;
317 
318  /* 965+ is easy, it does everything in hw */
319  if (scaled_width > scaled_height)
320  pfit_control |= PFIT_ENABLE | PFIT_SCALING_PILLAR;
321  else if (scaled_width < scaled_height)
322  pfit_control |= PFIT_ENABLE | PFIT_SCALING_LETTER;
323  else if (adjusted_mode->hdisplay != mode->hdisplay)
324  pfit_control |= PFIT_ENABLE | PFIT_SCALING_AUTO;
325  } else {
326  u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay;
327  u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay;
328  /*
329  * For earlier chips we have to calculate the scaling
330  * ratio by hand and program it into the
331  * PFIT_PGM_RATIO register
332  */
333  if (scaled_width > scaled_height) { /* pillar */
334  centre_horizontally(adjusted_mode, scaled_height / mode->vdisplay);
335 
336  border = LVDS_BORDER_ENABLE;
337  if (mode->vdisplay != adjusted_mode->vdisplay) {
338  u32 bits = panel_fitter_scaling(mode->vdisplay, adjusted_mode->vdisplay);
339  pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
340  bits << PFIT_VERT_SCALE_SHIFT);
341  pfit_control |= (PFIT_ENABLE |
344  }
345  } else if (scaled_width < scaled_height) { /* letter */
346  centre_vertically(adjusted_mode, scaled_width / mode->hdisplay);
347 
348  border = LVDS_BORDER_ENABLE;
349  if (mode->hdisplay != adjusted_mode->hdisplay) {
350  u32 bits = panel_fitter_scaling(mode->hdisplay, adjusted_mode->hdisplay);
351  pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
352  bits << PFIT_VERT_SCALE_SHIFT);
353  pfit_control |= (PFIT_ENABLE |
356  }
357  } else
358  /* Aspects match, Let hw scale both directions */
359  pfit_control |= (PFIT_ENABLE |
363  }
364  break;
365 
367  /*
368  * Full scaling, even if it changes the aspect ratio.
369  * Fortunately this is all done for us in hw.
370  */
371  if (mode->vdisplay != adjusted_mode->vdisplay ||
372  mode->hdisplay != adjusted_mode->hdisplay) {
373  pfit_control |= PFIT_ENABLE;
374  if (INTEL_INFO(dev)->gen >= 4)
375  pfit_control |= PFIT_SCALING_AUTO;
376  else
377  pfit_control |= (VERT_AUTO_SCALE |
381  }
382  break;
383 
384  default:
385  break;
386  }
387 
388 out:
389  /* If not enabling scaling, be consistent and always use 0. */
390  if ((pfit_control & PFIT_ENABLE) == 0) {
391  pfit_control = 0;
392  pfit_pgm_ratios = 0;
393  }
394 
395  /* Make sure pre-965 set dither correctly */
396  if (INTEL_INFO(dev)->gen < 4 && dev_priv->lvds_dither)
397  pfit_control |= PANEL_8TO6_DITHER_ENABLE;
398 
399  if (pfit_control != intel_lvds->pfit_control ||
400  pfit_pgm_ratios != intel_lvds->pfit_pgm_ratios) {
401  intel_lvds->pfit_control = pfit_control;
402  intel_lvds->pfit_pgm_ratios = pfit_pgm_ratios;
403  intel_lvds->pfit_dirty = true;
404  }
405  dev_priv->lvds_border_bits = border;
406 
407  /*
408  * XXX: It would be nice to support lower refresh rates on the
409  * panels to reduce power consumption, and perhaps match the
410  * user's requested refresh rate.
411  */
412 
413  return true;
414 }
415 
416 static void intel_lvds_mode_set(struct drm_encoder *encoder,
417  struct drm_display_mode *mode,
418  struct drm_display_mode *adjusted_mode)
419 {
420  /*
421  * The LVDS pin pair will already have been turned on in the
422  * intel_crtc_mode_set since it has a large impact on the DPLL
423  * settings.
424  */
425 }
426 
434 static enum drm_connector_status
435 intel_lvds_detect(struct drm_connector *connector, bool force)
436 {
437  struct drm_device *dev = connector->dev;
439 
440  status = intel_panel_detect(dev);
441  if (status != connector_status_unknown)
442  return status;
443 
445 }
446 
450 static int intel_lvds_get_modes(struct drm_connector *connector)
451 {
452  struct intel_lvds *intel_lvds = intel_attached_lvds(connector);
453  struct drm_device *dev = connector->dev;
454  struct drm_display_mode *mode;
455 
456  if (intel_lvds->edid)
457  return drm_add_edid_modes(connector, intel_lvds->edid);
458 
459  mode = drm_mode_duplicate(dev, intel_lvds->fixed_mode);
460  if (mode == NULL)
461  return 0;
462 
463  drm_mode_probed_add(connector, mode);
464  return 1;
465 }
466 
467 static int intel_no_modeset_on_lid_dmi_callback(const struct dmi_system_id *id)
468 {
469  DRM_INFO("Skipping forced modeset for %s\n", id->ident);
470  return 1;
471 }
472 
473 /* The GPU hangs up on these systems if modeset is performed on LID open */
474 static const struct dmi_system_id intel_no_modeset_on_lid[] = {
475  {
476  .callback = intel_no_modeset_on_lid_dmi_callback,
477  .ident = "Toshiba Tecra A11",
478  .matches = {
479  DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
480  DMI_MATCH(DMI_PRODUCT_NAME, "TECRA A11"),
481  },
482  },
483 
484  { } /* terminating entry */
485 };
486 
487 /*
488  * Lid events. Note the use of 'modeset_on_lid':
489  * - we set it on lid close, and reset it on open
490  * - we use it as a "only once" bit (ie we ignore
491  * duplicate events where it was already properly
492  * set/reset)
493  * - the suspend/resume paths will also set it to
494  * zero, since they restore the mode ("lid open").
495  */
496 static int intel_lid_notify(struct notifier_block *nb, unsigned long val,
497  void *unused)
498 {
499  struct drm_i915_private *dev_priv =
501  struct drm_device *dev = dev_priv->dev;
502  struct drm_connector *connector = dev_priv->int_lvds_connector;
503 
504  if (dev->switch_power_state != DRM_SWITCH_POWER_ON)
505  return NOTIFY_OK;
506 
507  /*
508  * check and update the status of LVDS connector after receiving
509  * the LID nofication event.
510  */
511  if (connector)
512  connector->status = connector->funcs->detect(connector,
513  false);
514 
515  /* Don't force modeset on machines where it causes a GPU lockup */
516  if (dmi_check_system(intel_no_modeset_on_lid))
517  return NOTIFY_OK;
518  if (!acpi_lid_open()) {
519  dev_priv->modeset_on_lid = 1;
520  return NOTIFY_OK;
521  }
522 
523  if (!dev_priv->modeset_on_lid)
524  return NOTIFY_OK;
525 
526  dev_priv->modeset_on_lid = 0;
527 
528  mutex_lock(&dev->mode_config.mutex);
530  mutex_unlock(&dev->mode_config.mutex);
531 
532  return NOTIFY_OK;
533 }
534 
542 static void intel_lvds_destroy(struct drm_connector *connector)
543 {
544  struct drm_device *dev = connector->dev;
545  struct drm_i915_private *dev_priv = dev->dev_private;
546 
548 
549  if (dev_priv->lid_notifier.notifier_call)
551  drm_sysfs_connector_remove(connector);
552  drm_connector_cleanup(connector);
553  kfree(connector);
554 }
555 
556 static int intel_lvds_set_property(struct drm_connector *connector,
557  struct drm_property *property,
558  uint64_t value)
559 {
560  struct intel_lvds *intel_lvds = intel_attached_lvds(connector);
561  struct drm_device *dev = connector->dev;
562 
563  if (property == dev->mode_config.scaling_mode_property) {
564  struct drm_crtc *crtc = intel_lvds->base.base.crtc;
565 
566  if (value == DRM_MODE_SCALE_NONE) {
567  DRM_DEBUG_KMS("no scaling not supported\n");
568  return -EINVAL;
569  }
570 
571  if (intel_lvds->fitting_mode == value) {
572  /* the LVDS scaling property is not changed */
573  return 0;
574  }
575  intel_lvds->fitting_mode = value;
576  if (crtc && crtc->enabled) {
577  /*
578  * If the CRTC is enabled, the display will be changed
579  * according to the new panel fitting mode.
580  */
581  intel_set_mode(crtc, &crtc->mode,
582  crtc->x, crtc->y, crtc->fb);
583  }
584  }
585 
586  return 0;
587 }
588 
589 static const struct drm_encoder_helper_funcs intel_lvds_helper_funcs = {
590  .mode_fixup = intel_lvds_mode_fixup,
591  .mode_set = intel_lvds_mode_set,
592  .disable = intel_encoder_noop,
593 };
594 
595 static const struct drm_connector_helper_funcs intel_lvds_connector_helper_funcs = {
596  .get_modes = intel_lvds_get_modes,
597  .mode_valid = intel_lvds_mode_valid,
598  .best_encoder = intel_best_encoder,
599 };
600 
601 static const struct drm_connector_funcs intel_lvds_connector_funcs = {
602  .dpms = intel_connector_dpms,
603  .detect = intel_lvds_detect,
605  .set_property = intel_lvds_set_property,
606  .destroy = intel_lvds_destroy,
607 };
608 
609 static const struct drm_encoder_funcs intel_lvds_enc_funcs = {
610  .destroy = intel_encoder_destroy,
611 };
612 
613 static int __init intel_no_lvds_dmi_callback(const struct dmi_system_id *id)
614 {
615  DRM_INFO("Skipping LVDS initialization for %s\n", id->ident);
616  return 1;
617 }
618 
619 /* These systems claim to have LVDS, but really don't */
620 static const struct dmi_system_id intel_no_lvds[] = {
621  {
622  .callback = intel_no_lvds_dmi_callback,
623  .ident = "Apple Mac Mini (Core series)",
624  .matches = {
625  DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
626  DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"),
627  },
628  },
629  {
630  .callback = intel_no_lvds_dmi_callback,
631  .ident = "Apple Mac Mini (Core 2 series)",
632  .matches = {
633  DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
634  DMI_MATCH(DMI_PRODUCT_NAME, "Macmini2,1"),
635  },
636  },
637  {
638  .callback = intel_no_lvds_dmi_callback,
639  .ident = "MSI IM-945GSE-A",
640  .matches = {
641  DMI_MATCH(DMI_SYS_VENDOR, "MSI"),
642  DMI_MATCH(DMI_PRODUCT_NAME, "A9830IMS"),
643  },
644  },
645  {
646  .callback = intel_no_lvds_dmi_callback,
647  .ident = "Dell Studio Hybrid",
648  .matches = {
649  DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
650  DMI_MATCH(DMI_PRODUCT_NAME, "Studio Hybrid 140g"),
651  },
652  },
653  {
654  .callback = intel_no_lvds_dmi_callback,
655  .ident = "Dell OptiPlex FX170",
656  .matches = {
657  DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
658  DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex FX170"),
659  },
660  },
661  {
662  .callback = intel_no_lvds_dmi_callback,
663  .ident = "AOpen Mini PC",
664  .matches = {
665  DMI_MATCH(DMI_SYS_VENDOR, "AOpen"),
666  DMI_MATCH(DMI_PRODUCT_NAME, "i965GMx-IF"),
667  },
668  },
669  {
670  .callback = intel_no_lvds_dmi_callback,
671  .ident = "AOpen Mini PC MP915",
672  .matches = {
673  DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
674  DMI_MATCH(DMI_BOARD_NAME, "i915GMx-F"),
675  },
676  },
677  {
678  .callback = intel_no_lvds_dmi_callback,
679  .ident = "AOpen i915GMm-HFS",
680  .matches = {
681  DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
682  DMI_MATCH(DMI_BOARD_NAME, "i915GMm-HFS"),
683  },
684  },
685  {
686  .callback = intel_no_lvds_dmi_callback,
687  .ident = "AOpen i45GMx-I",
688  .matches = {
689  DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
690  DMI_MATCH(DMI_BOARD_NAME, "i45GMx-I"),
691  },
692  },
693  {
694  .callback = intel_no_lvds_dmi_callback,
695  .ident = "Aopen i945GTt-VFA",
696  .matches = {
697  DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"),
698  },
699  },
700  {
701  .callback = intel_no_lvds_dmi_callback,
702  .ident = "Clientron U800",
703  .matches = {
704  DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
705  DMI_MATCH(DMI_PRODUCT_NAME, "U800"),
706  },
707  },
708  {
709  .callback = intel_no_lvds_dmi_callback,
710  .ident = "Clientron E830",
711  .matches = {
712  DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
713  DMI_MATCH(DMI_PRODUCT_NAME, "E830"),
714  },
715  },
716  {
717  .callback = intel_no_lvds_dmi_callback,
718  .ident = "Asus EeeBox PC EB1007",
719  .matches = {
720  DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer INC."),
721  DMI_MATCH(DMI_PRODUCT_NAME, "EB1007"),
722  },
723  },
724  {
725  .callback = intel_no_lvds_dmi_callback,
726  .ident = "Asus AT5NM10T-I",
727  .matches = {
728  DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
729  DMI_MATCH(DMI_BOARD_NAME, "AT5NM10T-I"),
730  },
731  },
732  {
733  .callback = intel_no_lvds_dmi_callback,
734  .ident = "Hewlett-Packard HP t5740e Thin Client",
735  .matches = {
736  DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
737  DMI_MATCH(DMI_PRODUCT_NAME, "HP t5740e Thin Client"),
738  },
739  },
740  {
741  .callback = intel_no_lvds_dmi_callback,
742  .ident = "Hewlett-Packard t5745",
743  .matches = {
744  DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
745  DMI_MATCH(DMI_PRODUCT_NAME, "hp t5745"),
746  },
747  },
748  {
749  .callback = intel_no_lvds_dmi_callback,
750  .ident = "Hewlett-Packard st5747",
751  .matches = {
752  DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
753  DMI_MATCH(DMI_PRODUCT_NAME, "hp st5747"),
754  },
755  },
756  {
757  .callback = intel_no_lvds_dmi_callback,
758  .ident = "MSI Wind Box DC500",
759  .matches = {
760  DMI_MATCH(DMI_BOARD_VENDOR, "MICRO-STAR INTERNATIONAL CO., LTD"),
761  DMI_MATCH(DMI_BOARD_NAME, "MS-7469"),
762  },
763  },
764  {
765  .callback = intel_no_lvds_dmi_callback,
766  .ident = "ZOTAC ZBOXSD-ID12/ID13",
767  .matches = {
768  DMI_MATCH(DMI_BOARD_VENDOR, "ZOTAC"),
769  DMI_MATCH(DMI_BOARD_NAME, "ZBOXSD-ID12/ID13"),
770  },
771  },
772  {
773  .callback = intel_no_lvds_dmi_callback,
774  .ident = "Gigabyte GA-D525TUD",
775  .matches = {
776  DMI_MATCH(DMI_BOARD_VENDOR, "Gigabyte Technology Co., Ltd."),
777  DMI_MATCH(DMI_BOARD_NAME, "D525TUD"),
778  },
779  },
780  {
781  .callback = intel_no_lvds_dmi_callback,
782  .ident = "Supermicro X7SPA-H",
783  .matches = {
784  DMI_MATCH(DMI_SYS_VENDOR, "Supermicro"),
785  DMI_MATCH(DMI_PRODUCT_NAME, "X7SPA-H"),
786  },
787  },
788 
789  { } /* terminating entry */
790 };
791 
799 static void intel_find_lvds_downclock(struct drm_device *dev,
800  struct drm_display_mode *fixed_mode,
801  struct drm_connector *connector)
802 {
803  struct drm_i915_private *dev_priv = dev->dev_private;
804  struct drm_display_mode *scan;
805  int temp_downclock;
806 
807  temp_downclock = fixed_mode->clock;
808  list_for_each_entry(scan, &connector->probed_modes, head) {
809  /*
810  * If one mode has the same resolution with the fixed_panel
811  * mode while they have the different refresh rate, it means
812  * that the reduced downclock is found for the LVDS. In such
813  * case we can set the different FPx0/1 to dynamically select
814  * between low and high frequency.
815  */
816  if (scan->hdisplay == fixed_mode->hdisplay &&
817  scan->hsync_start == fixed_mode->hsync_start &&
818  scan->hsync_end == fixed_mode->hsync_end &&
819  scan->htotal == fixed_mode->htotal &&
820  scan->vdisplay == fixed_mode->vdisplay &&
821  scan->vsync_start == fixed_mode->vsync_start &&
822  scan->vsync_end == fixed_mode->vsync_end &&
823  scan->vtotal == fixed_mode->vtotal) {
824  if (scan->clock < temp_downclock) {
825  /*
826  * The downclock is already found. But we
827  * expect to find the lower downclock.
828  */
829  temp_downclock = scan->clock;
830  }
831  }
832  }
833  if (temp_downclock < fixed_mode->clock && i915_lvds_downclock) {
834  /* We found the downclock for LVDS. */
835  dev_priv->lvds_downclock_avail = 1;
836  dev_priv->lvds_downclock = temp_downclock;
837  DRM_DEBUG_KMS("LVDS downclock is found in EDID. "
838  "Normal clock %dKhz, downclock %dKhz\n",
839  fixed_mode->clock, temp_downclock);
840  }
841 }
842 
843 /*
844  * Enumerate the child dev array parsed from VBT to check whether
845  * the LVDS is present.
846  * If it is present, return 1.
847  * If it is not present, return false.
848  * If no child dev is parsed from VBT, it assumes that the LVDS is present.
849  */
850 static bool lvds_is_present_in_vbt(struct drm_device *dev,
851  u8 *i2c_pin)
852 {
853  struct drm_i915_private *dev_priv = dev->dev_private;
854  int i;
855 
856  if (!dev_priv->child_dev_num)
857  return true;
858 
859  for (i = 0; i < dev_priv->child_dev_num; i++) {
860  struct child_device_config *child = dev_priv->child_dev + i;
861 
862  /* If the device type is not LFP, continue.
863  * We have to check both the new identifiers as well as the
864  * old for compatibility with some BIOSes.
865  */
866  if (child->device_type != DEVICE_TYPE_INT_LFP &&
867  child->device_type != DEVICE_TYPE_LFP)
868  continue;
869 
871  *i2c_pin = child->i2c_pin;
872 
873  /* However, we cannot trust the BIOS writers to populate
874  * the VBT correctly. Since LVDS requires additional
875  * information from AIM blocks, a non-zero addin offset is
876  * a good indicator that the LVDS is actually present.
877  */
878  if (child->addin_offset)
879  return true;
880 
881  /* But even then some BIOS writers perform some black magic
882  * and instantiate the device without reference to any
883  * additional data. Trust that if the VBT was written into
884  * the OpRegion then they have validated the LVDS's existence.
885  */
886  if (dev_priv->opregion.vbt)
887  return true;
888  }
889 
890  return false;
891 }
892 
893 static bool intel_lvds_supported(struct drm_device *dev)
894 {
895  /* With the introduction of the PCH we gained a dedicated
896  * LVDS presence pin, use it. */
897  if (HAS_PCH_SPLIT(dev))
898  return true;
899 
900  /* Otherwise LVDS was only attached to mobile products,
901  * except for the inglorious 830gm */
902  return IS_MOBILE(dev) && !IS_I830(dev);
903 }
904 
912 bool intel_lvds_init(struct drm_device *dev)
913 {
914  struct drm_i915_private *dev_priv = dev->dev_private;
915  struct intel_lvds *intel_lvds;
918  struct drm_connector *connector;
919  struct drm_encoder *encoder;
920  struct drm_display_mode *scan; /* *modes, *bios_mode; */
921  struct drm_crtc *crtc;
922  u32 lvds;
923  int pipe;
924  u8 pin;
925 
926  if (!intel_lvds_supported(dev))
927  return false;
928 
929  /* Skip init on machines we know falsely report LVDS */
930  if (dmi_check_system(intel_no_lvds))
931  return false;
932 
933  pin = GMBUS_PORT_PANEL;
934  if (!lvds_is_present_in_vbt(dev, &pin)) {
935  DRM_DEBUG_KMS("LVDS is not present in VBT\n");
936  return false;
937  }
938 
939  if (HAS_PCH_SPLIT(dev)) {
940  if ((I915_READ(PCH_LVDS) & LVDS_DETECTED) == 0)
941  return false;
942  if (dev_priv->edp.support) {
943  DRM_DEBUG_KMS("disable LVDS for eDP support\n");
944  return false;
945  }
946  }
947 
948  intel_lvds = kzalloc(sizeof(struct intel_lvds), GFP_KERNEL);
949  if (!intel_lvds) {
950  return false;
951  }
952 
953  intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL);
954  if (!intel_connector) {
955  kfree(intel_lvds);
956  return false;
957  }
958 
959  if (!HAS_PCH_SPLIT(dev)) {
960  intel_lvds->pfit_control = I915_READ(PFIT_CONTROL);
961  }
962 
963  intel_encoder = &intel_lvds->base;
964  encoder = &intel_encoder->base;
965  connector = &intel_connector->base;
966  drm_connector_init(dev, &intel_connector->base, &intel_lvds_connector_funcs,
968 
969  drm_encoder_init(dev, &intel_encoder->base, &intel_lvds_enc_funcs,
971 
972  intel_encoder->enable = intel_enable_lvds;
973  intel_encoder->disable = intel_disable_lvds;
974  intel_encoder->get_hw_state = intel_lvds_get_hw_state;
975  intel_connector->get_hw_state = intel_connector_get_hw_state;
976 
977  intel_connector_attach_encoder(intel_connector, intel_encoder);
978  intel_encoder->type = INTEL_OUTPUT_LVDS;
979 
980  intel_encoder->cloneable = false;
981  if (HAS_PCH_SPLIT(dev))
982  intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
983  else if (IS_GEN4(dev))
984  intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
985  else
986  intel_encoder->crtc_mask = (1 << 1);
987 
988  drm_encoder_helper_add(encoder, &intel_lvds_helper_funcs);
989  drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs);
990  connector->display_info.subpixel_order = SubPixelHorizontalRGB;
991  connector->interlace_allowed = false;
992  connector->doublescan_allowed = false;
993 
994  /* create the scaling mode property */
996  /*
997  * the initial panel fitting mode will be FULL_SCREEN.
998  */
999 
1000  drm_connector_attach_property(&intel_connector->base,
1001  dev->mode_config.scaling_mode_property,
1003  intel_lvds->fitting_mode = DRM_MODE_SCALE_ASPECT;
1004  /*
1005  * LVDS discovery:
1006  * 1) check for EDID on DDC
1007  * 2) check for VBT data
1008  * 3) check to see if LVDS is already on
1009  * if none of the above, no panel
1010  * 4) make sure lid is open
1011  * if closed, act like it's not there for now
1012  */
1013 
1014  /*
1015  * Attempt to get the fixed panel mode from DDC. Assume that the
1016  * preferred mode is the right one.
1017  */
1018  intel_lvds->edid = drm_get_edid(connector,
1019  intel_gmbus_get_adapter(dev_priv,
1020  pin));
1021  if (intel_lvds->edid) {
1022  if (drm_add_edid_modes(connector,
1023  intel_lvds->edid)) {
1025  intel_lvds->edid);
1026  } else {
1027  kfree(intel_lvds->edid);
1028  intel_lvds->edid = NULL;
1029  }
1030  }
1031  if (!intel_lvds->edid) {
1032  /* Didn't get an EDID, so
1033  * Set wide sync ranges so we get all modes
1034  * handed to valid_mode for checking
1035  */
1036  connector->display_info.min_vfreq = 0;
1037  connector->display_info.max_vfreq = 200;
1038  connector->display_info.min_hfreq = 0;
1039  connector->display_info.max_hfreq = 200;
1040  }
1041 
1042  list_for_each_entry(scan, &connector->probed_modes, head) {
1043  if (scan->type & DRM_MODE_TYPE_PREFERRED) {
1044  intel_lvds->fixed_mode =
1045  drm_mode_duplicate(dev, scan);
1046  intel_find_lvds_downclock(dev,
1047  intel_lvds->fixed_mode,
1048  connector);
1049  goto out;
1050  }
1051  }
1052 
1053  /* Failed to get EDID, what about VBT? */
1054  if (dev_priv->lfp_lvds_vbt_mode) {
1055  intel_lvds->fixed_mode =
1056  drm_mode_duplicate(dev, dev_priv->lfp_lvds_vbt_mode);
1057  if (intel_lvds->fixed_mode) {
1058  intel_lvds->fixed_mode->type |=
1060  goto out;
1061  }
1062  }
1063 
1064  /*
1065  * If we didn't get EDID, try checking if the panel is already turned
1066  * on. If so, assume that whatever is currently programmed is the
1067  * correct mode.
1068  */
1069 
1070  /* Ironlake: FIXME if still fail, not try pipe mode now */
1071  if (HAS_PCH_SPLIT(dev))
1072  goto failed;
1073 
1074  lvds = I915_READ(LVDS);
1075  pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
1076  crtc = intel_get_crtc_for_pipe(dev, pipe);
1077 
1078  if (crtc && (lvds & LVDS_PORT_EN)) {
1079  intel_lvds->fixed_mode = intel_crtc_mode_get(dev, crtc);
1080  if (intel_lvds->fixed_mode) {
1081  intel_lvds->fixed_mode->type |=
1083  goto out;
1084  }
1085  }
1086 
1087  /* If we still don't have a mode after all that, give up. */
1088  if (!intel_lvds->fixed_mode)
1089  goto failed;
1090 
1091 out:
1092  /*
1093  * Unlock registers and just
1094  * leave them unlocked
1095  */
1096  if (HAS_PCH_SPLIT(dev)) {
1099  } else {
1102  }
1103  dev_priv->lid_notifier.notifier_call = intel_lid_notify;
1104  if (acpi_lid_notifier_register(&dev_priv->lid_notifier)) {
1105  DRM_DEBUG_KMS("lid notifier registration failed\n");
1106  dev_priv->lid_notifier.notifier_call = NULL;
1107  }
1108  /* keep the LVDS connector */
1109  dev_priv->int_lvds_connector = connector;
1110  drm_sysfs_connector_add(connector);
1111 
1113 
1114  return true;
1115 
1116 failed:
1117  DRM_DEBUG_KMS("No LVDS modes found, disabling.\n");
1118  drm_connector_cleanup(connector);
1119  drm_encoder_cleanup(encoder);
1120  kfree(intel_lvds);
1121  kfree(intel_connector);
1122  return false;
1123 }