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ipath_kernel.h
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1 #ifndef _IPATH_KERNEL_H
2 #define _IPATH_KERNEL_H
3 /*
4  * Copyright (c) 2006, 2007, 2008 QLogic Corporation. All rights reserved.
5  * Copyright (c) 2003, 2004, 2005, 2006 PathScale, Inc. All rights reserved.
6  *
7  * This software is available to you under a choice of one of two
8  * licenses. You may choose to be licensed under the terms of the GNU
9  * General Public License (GPL) Version 2, available from the file
10  * COPYING in the main directory of this source tree, or the
11  * OpenIB.org BSD license below:
12  *
13  * Redistribution and use in source and binary forms, with or
14  * without modification, are permitted provided that the following
15  * conditions are met:
16  *
17  * - Redistributions of source code must retain the above
18  * copyright notice, this list of conditions and the following
19  * disclaimer.
20  *
21  * - Redistributions in binary form must reproduce the above
22  * copyright notice, this list of conditions and the following
23  * disclaimer in the documentation and/or other materials
24  * provided with the distribution.
25  *
26  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
27  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
28  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
29  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
30  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
31  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
32  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
33  * SOFTWARE.
34  */
35 
36 /*
37  * This header file is the base header file for infinipath kernel code
38  * ipath_user.h serves a similar purpose for user code.
39  */
40 
41 #include <linux/interrupt.h>
42 #include <linux/pci.h>
43 #include <linux/dma-mapping.h>
44 #include <linux/mutex.h>
45 #include <linux/list.h>
46 #include <linux/scatterlist.h>
47 #include <asm/io.h>
48 #include <rdma/ib_verbs.h>
49 
50 #include "ipath_common.h"
51 #include "ipath_debug.h"
52 #include "ipath_registers.h"
53 
54 /* only s/w major version of InfiniPath we can handle */
55 #define IPATH_CHIP_VERS_MAJ 2U
56 
57 /* don't care about this except printing */
58 #define IPATH_CHIP_VERS_MIN 0U
59 
60 /* temporary, maybe always */
61 extern struct infinipath_stats ipath_stats;
62 
63 #define IPATH_CHIP_SWVERSION IPATH_CHIP_VERS_MAJ
64 /*
65  * First-cut critierion for "device is active" is
66  * two thousand dwords combined Tx, Rx traffic per
67  * 5-second interval. SMA packets are 64 dwords,
68  * and occur "a few per second", presumably each way.
69  */
70 #define IPATH_TRAFFIC_ACTIVE_THRESHOLD (2000)
71 /*
72  * Struct used to indicate which errors are logged in each of the
73  * error-counters that are logged to EEPROM. A counter is incremented
74  * _once_ (saturating at 255) for each event with any bits set in
75  * the error or hwerror register masks below.
76  */
77 #define IPATH_EEP_LOG_CNT (4)
81 };
82 
86  /* rcvhdrq base, needs mmap before useful */
87  void *port_rcvhdrq;
88  /* kernel virtual address where hdrqtail is updated */
90  /*
91  * temp buffer for expected send setup, allocated at open, instead
92  * of each setup call
93  */
95  /* when waiting for rcv or pioavail */
97  /*
98  * rcvegr bufs base, physical, must fit
99  * in 44 bits so 32 bit programs mmap64 44 bit works)
100  */
102  /* mmap of hdrq, must fit in 44 bits */
105  /*
106  * number of opens (including slave subports) on this instance
107  * (ignoring forks, dup, etc. for now)
108  */
109  int port_cnt;
110  /*
111  * how much space to leave at start of eager TID entries for
112  * protocol use, on each TID
113  */
114  /* instead of calculating it */
115  unsigned port_port;
116  /* non-zero if port is being shared. */
118  /* non-zero if port is being shared. */
120  /* number of pio bufs for this port (all procs, if shared) */
122  /* first pio buffer for this port */
124  /* chip offset of PIO buffers for this port */
126  /* how many alloc_pages() chunks in port_rcvegrbuf_pages */
128  /* how many egrbufs per chunk */
130  /* order for port_rcvegrbuf_pages */
132  /* rcvhdrq size (for freeing) */
134  /* next expected TID to check when looking for free */
136  /* next expected TID to check */
137  unsigned long port_flag;
138  /* what happened */
139  unsigned long int_flag;
140  /* WAIT_RCV that timed out, no interrupt */
142  /* WAIT_PIO that timed out, no interrupt */
144  /* WAIT_RCV already happened, no wait */
146  /* WAIT_PIO already happened, no wait */
148  /* total number of rcvhdrqfull errors */
150  /*
151  * Used to suppress multiple instances of same
152  * port staying stuck at same point.
153  */
155  /* saved total number of rcvhdrqfull errors for poll edge trigger */
157  /* total number of polled urgent packets */
159  /* saved total number of polled urgent packets for poll edge trigger */
161  /* pid of process using this port */
162  struct pid *port_pid;
164  /* same size as task_struct .comm[] */
165  char port_comm[16];
166  /* pkeys set by this use of this port */
168  /* so file ops can get at unit */
170  /* A page of memory for rcvhdrhead, rcvegrhead, rcvegrtail * N */
172  /* An array of pages for the eager receive buffers * N */
174  /* An array of pages for the eager header queue entries * N */
176  /* The version of the library which opened this port */
178  /* Bitmask of active slaves */
180  /* Type of packets or conditions we want to poll for */
182  /* port rcvhdrq head offset */
184  /* receive packet sequence counter */
186 };
187 
188 struct sk_buff;
189 struct ipath_sge_state;
190 struct ipath_verbs_txreq;
191 
192 /*
193  * control information for layered drivers
194  */
195 struct _ipath_layer {
196  void *l_arg;
197 };
198 
200  struct sk_buff *skb;
202 };
203 
205  int flags;
206  int sg_count;
207  union {
208  struct scatterlist *sg;
209  void *map_addr;
210  };
211  void (*callback)(void *, int);
214  u16 start_idx; /* sdma private */
215  u16 next_descq_idx; /* sdma private */
216  struct list_head list; /* sdma private */
217 };
218 
220  __le64 qw[2];
221 };
222 
223 #define IPATH_SDMA_TXREQ_F_USELARGEBUF 0x1
224 #define IPATH_SDMA_TXREQ_F_HEADTOHOST 0x2
225 #define IPATH_SDMA_TXREQ_F_INTREQ 0x4
226 #define IPATH_SDMA_TXREQ_F_FREEBUF 0x8
227 #define IPATH_SDMA_TXREQ_F_FREEDESC 0x10
228 #define IPATH_SDMA_TXREQ_F_VL15 0x20
229 
230 #define IPATH_SDMA_TXREQ_S_OK 0
231 #define IPATH_SDMA_TXREQ_S_SENDERROR 1
232 #define IPATH_SDMA_TXREQ_S_ABORTED 2
233 #define IPATH_SDMA_TXREQ_S_SHUTDOWN 3
234 
235 #define IPATH_SDMA_STATUS_SCORE_BOARD_DRAIN_IN_PROG (1ull << 63)
236 #define IPATH_SDMA_STATUS_ABORT_IN_PROG (1ull << 62)
237 #define IPATH_SDMA_STATUS_INTERNAL_SDMA_ENABLE (1ull << 61)
238 #define IPATH_SDMA_STATUS_SCB_EMPTY (1ull << 30)
239 
240 /* max dwords in small buffer packet */
241 #define IPATH_SMALLBUF_DWORDS (dd->ipath_piosize2k >> 2)
242 
243 /*
244  * Possible IB config parameters for ipath_f_get/set_ib_cfg()
245  */
246 #define IPATH_IB_CFG_LIDLMC 0 /* Get/set LID (LS16b) and Mask (MS16b) */
247 #define IPATH_IB_CFG_HRTBT 1 /* Get/set Heartbeat off/enable/auto */
248 #define IPATH_IB_HRTBT_ON 3 /* Heartbeat enabled, sent every 100msec */
249 #define IPATH_IB_HRTBT_OFF 0 /* Heartbeat off */
250 #define IPATH_IB_CFG_LWID_ENB 2 /* Get/set allowed Link-width */
251 #define IPATH_IB_CFG_LWID 3 /* Get currently active Link-width */
252 #define IPATH_IB_CFG_SPD_ENB 4 /* Get/set allowed Link speeds */
253 #define IPATH_IB_CFG_SPD 5 /* Get current Link spd */
254 #define IPATH_IB_CFG_RXPOL_ENB 6 /* Get/set Auto-RX-polarity enable */
255 #define IPATH_IB_CFG_LREV_ENB 7 /* Get/set Auto-Lane-reversal enable */
256 #define IPATH_IB_CFG_LINKLATENCY 8 /* Get Auto-Lane-reversal enable */
257 
258 
261 
264 
265  /* mem-mapped pointer to base of chip regs */
267  /* end of mem-mapped chip space; range checking */
269  /* physical address of chip for io_remap, etc. */
270  unsigned long ipath_physaddr;
271  /* base of memory alloced for ipath_kregbase, for free */
273  /* ipath_cfgports pointers */
275  /* sk_buffs used by port 0 eager receive queue */
277  /* kvirt address of 1st 2k pio buffer */
279  /* kvirt address of 1st 4k pio buffer */
281  /*
282  * points to area where PIOavail registers will be DMA'ed.
283  * Has to be on a page of it's own, because the page will be
284  * mapped into user program space. This copy is *ONLY* ever
285  * written by DMA, not by the driver! Need a copy per device
286  * when we get to multiple devices
287  */
289  /* physical address where updates occur */
292  /* setup intr */
294  /* fallback to alternate interrupt type if possible */
296  /* setup on-chip bus config */
297  int (*ipath_f_bus)(struct ipath_devdata *, struct pci_dev *);
298  /* hard reset chip */
301  size_t);
304  size_t);
308  void (*ipath_f_clear_tids)(struct ipath_devdata *, unsigned);
310  u32, unsigned long);
314  /* fill out chip-specific fields */
316  /* free irq */
318  struct ipath_message_header *(*ipath_f_get_msgheader)
319  (struct ipath_devdata *, __le32 *);
325  struct infinipath_counters *);
327  /* per chip actions needed for IB Link up/down changes */
329 
333  /* total dwords sent (summed from counter) */
335  /* total dwords rcvd (summed from counter) */
337  /* total packets sent (summed from counter) */
339  /* total packets rcvd (summed from counter) */
341  /* ipath_statusp initially points to this. */
343  /* GUID for this interface, in network order */
345  /*
346  * aggregrate of error bits reported since last cleared, for
347  * limiting of error reporting
348  */
350  /*
351  * aggregrate of error bits reported since last cleared, for
352  * limiting of hwerror reporting
353  */
355  /* errors masked because they occur too fast */
357  u64 ipath_lastlinkrecov; /* link recoveries at last ACTIVE */
358  /* these 5 fields are used to establish deltas for IB Symbol
359  * errors and linkrecovery errors. They can be reported on
360  * some chips during link negotiation prior to INIT, and with
361  * DDR when faking DDR negotiations with non-IBTA switches.
362  * The chip counters are adjusted at driver unload if there is
363  * a non-zero delta.
364  */
370 
371  /* time in jiffies at which to re-enable maskederrs */
372  unsigned long ipath_unmasktime;
373  /* count of egrfull errors, combined for all ports */
375  /* for ipath_qcheck() */
377  /* template for writing TIDs */
379  /* value to write to free TIDs */
381  /* IBA6120 rcv interrupt setup */
383 
384  /* size of memory at ipath_kregbase */
386  /* number of registers used for pioavail */
388  /* IPATH_POLL, etc. */
390  /* ipath_flags driver is waiting for */
392  /* last buffer for user use, first buf for kernel use is this
393  * index. */
395  /* is a stats timer active */
397  /* number of interrupts for this device -- saturates... */
399  /* dwords sent read from counter */
401  /* dwords received read from counter */
403  /* sent packets read from counter */
405  /* received packets read from counter */
407  /* pio bufs allocated per port */
409  /* if remainder on bufs/port, ports < extrabuf get 1 extra */
411  u32 ipath_pioupd_thresh; /* update threshold, some chips */
412  /*
413  * number of ports configured as max; zero is set to number chip
414  * supports, less gives more pio bufs/port, etc.
415  */
417  /* count of port 0 hdrqfull errors */
419  /* port 0 number of receive eager buffers */
421 
422  /*
423  * index of last piobuffer we used. Speeds up searching, by
424  * starting at this point. Doesn't matter if multiple cpu's use and
425  * update, last updater is only write that matters. Whenever it
426  * wraps, we update shadow copies. Need a copy per device when we
427  * get to multiple devices
428  */
431  /* max length of freezemsg */
433  /*
434  * consecutive times we wanted a PIO buffer but were unable to
435  * get one
436  */
438  /*
439  * hint that we should update ipath_pioavailshadow before
440  * looking for a PIO buffer
441  */
443  /* so we can rewrite it after a chip reset */
445  /* so we can rewrite it after a chip reset */
450 
451  struct ipath_relock {
454  unsigned int ipath_relock_interval; /* in jiffies */
456 
457  /* interrupt number */
459  /* HT/PCI Vendor ID (here for NodeInfo) */
461  /* HT/PCI Device ID (here for NodeInfo) */
463  /* offset in HT config space of slave/primary interface block */
465  /* for write combining settings */
466  unsigned long ipath_wc_cookie;
467  unsigned long ipath_wc_base;
468  unsigned long ipath_wc_len;
469  /* ref count for each pkey */
471  /* shadow copy of struct page *'s for exp tid pages */
473  /* shadow copy of dma handles for exp tid pages */
476  /* lock to workaround chip bug 9437 and others */
480  /* around ipath_pd and (user ports) port_cnt use (intr vs free) */
482 
483  /*
484  * IPATH_STATUS_*,
485  * this address is mapped readonly into user processes so they can
486  * get status cheaply, whenever they want.
487  */
489  /* freeze msg if hw error put chip in freeze */
491  /* pci access data structure */
492  struct pci_dev *pcidev;
493  struct cdev *user_cdev;
494  struct cdev *diag_cdev;
495  struct device *user_dev;
496  struct device *diag_dev;
497  /* timer used to prevent stats overflow, error throttling, etc. */
499  /* timer to verify interrupts work, and fallback if possible */
501  void *ipath_dummy_hdrq; /* used after port close */
503 
504  /* SendDMA related entries */
506  unsigned long ipath_sdma_status;
509  unsigned long ipath_sdma_buf_jiffies;
526 
530 
531  unsigned long ipath_ureg_align; /* user register alignment */
532 
535 
536  /* HoL blocking / user app forward-progress state */
537  unsigned ipath_hol_state;
538  unsigned ipath_hol_next;
540 
541  /*
542  * Shadow copies of registers; size indicates read access size.
543  * Most of them are readonly, but some are write-only register,
544  * where we manipulate the bits in the shadow copy, and then write
545  * the shadow copy to infinipath.
546  *
547  * We deliberately make most of these 32 bits, since they have
548  * restricted range. For any that we read, we won't to generate 32
549  * bit accesses, since Opteron will generate 2 separate 32 bit HT
550  * transactions for a 64 bit read, and we want to avoid unnecessary
551  * HT transactions.
552  */
553 
554  /* This is the 64 bit group */
555 
556  /*
557  * shadow of pioavail, check to be sure it's large enough at
558  * init time.
559  */
560  unsigned long ipath_pioavailshadow[8];
561  /* bitmap of send buffers available for the kernel to use with PIO. */
562  unsigned long ipath_pioavailkernel[8];
563  /* shadow of kr_gpio_out, for rmw ops */
565  /* shadow the gpio mask register */
567  /* shadow the gpio output enable, etc... */
569  /* kr_revision shadow */
571  /*
572  * shadow of ibcctrl, for interrupt handling of link changes,
573  * etc.
574  */
576  /*
577  * last ibcstatus, to suppress "duplicate" status change messages,
578  * mostly from 2 to 3
579  */
581  /* hwerrmask shadow */
583  ipath_err_t ipath_errormask; /* errormask shadow */
584  /* interrupt config reg shadow */
586  /* kr_sendpiobufbase value */
588  /* kr_ibcddrctrl shadow */
590 
591  /* these are the "32 bit" regs */
592 
593  /*
594  * number of GUIDs in the flash for this interface; may need some
595  * rethinking for setting on other ifaces
596  */
598  /*
599  * the following two are 32-bit bitmasks, but {test,clear,set}_bit
600  * all expect bit fields to be "unsigned long"
601  */
602  /* shadow kr_rcvctrl */
603  unsigned long ipath_rcvctrl;
604  /* shadow kr_sendctrl */
605  unsigned long ipath_sendctrl;
606  /* to not count armlaunch after cancel */
607  unsigned long ipath_lastcancel;
608  /* count cases where special trigger was needed (double write) */
609  unsigned long ipath_spectriggerhit;
610 
611  /* value we put in kr_rcvhdrcnt */
613  /* value we put in kr_rcvhdrsize */
615  /* value we put in kr_rcvhdrentsize */
617  /* offset of last entry in rcvhdrq */
619  /* kr_portcnt value */
621  /* kr_pagealign value */
623  /* number of "2KB" PIO buffers */
625  /* size in bytes of "2KB" PIO buffers */
627  /* number of "4KB" PIO buffers */
629  /* size in bytes of "4KB" PIO buffers */
631  u32 ipath_pioreserved; /* reserved special-inkernel; */
632  /* kr_rcvegrbase value */
634  /* kr_rcvegrcnt value */
636  /* kr_rcvtidbase value */
638  /* kr_rcvtidcnt value */
640  /* kr_sendregbase */
642  /* kr_userregbase */
644  /* kr_counterregbase */
646  /* shadow the control register contents */
648  /* PCI revision register (HTC rev on FPGA) */
650 
651  /* chip address space used by 4k pio buffers */
653  /* The MTU programmed for this unit */
655  /*
656  * The max size IB packet, included IB headers that we can send.
657  * Starts same as ipath_piosize, but is affected when ibmtu is
658  * changed, or by size of eager buffers
659  */
661  /*
662  * ibmaxlen at init time, limited by chip and by receive buffer
663  * size. Not changed after init.
664  */
666  /* size of each rcvegrbuffer */
668  /* localbus width (1, 2,4,8,16,32) from config space */
670  /* localbus speed (HT: 200,400,800,1000; PCIe 2500) */
672  /*
673  * number of sequential ibcstatus change for polling active/quiet
674  * (i.e., link not coming up).
675  */
677  /* low and high portions of MSI capability/vector */
679  /* saved after PCIe init for restore after reset */
681  /* MSI data (vector) saved for restore */
683  /* MLID programmed for this instance */
685  /* LID programmed for this instance */
687  /* list of pkeys programmed; 0 if not set */
689  /*
690  * ASCII serial number, from flash, large enough for original
691  * all digit strings, and longer QLogic serial number format
692  */
694  /* human readable board version */
696  u8 ipath_lbus_info[32]; /* human readable localbus info */
697  /* chip major rev, from ipath_revision */
699  /* chip minor rev, from ipath_revision */
701  /* board rev, from ipath_revision */
703  /* saved for restore after reset */
705  /* LID mask control */
707  /* link width supported */
709  /* link speed supported */
715  /* Rx Polarity inversion (compensate for ~tx on partner) */
717 
722 
723  /* unit # of this chip, if present */
725 
726  /* local link integrity counter */
728  /* local link integrity errors */
730  /*
731  * Above counts only cases where _successive_ LocalLinkIntegrity
732  * errors were seen in the receive headers of kern-packets.
733  * Below are the three (monotonically increasing) counters
734  * maintained via GPIO interrupts on iba6120-rev2.
735  */
739 
740  /*
741  * Not all devices managed by a driver instance are the same
742  * type, so these fields must be per-device.
743  */
747 
748  /*
749  * Below should be computable from number of ports,
750  * since they are never modified.
751  */
756 
757  /*
758  * Register bits for selecting i2c direction and values, used for
759  * I2C serial flash.
760  */
766 
767  /* lock for doing RMW of shadows/regs for ExtCtrl and GPIO */
769 
770  /*
771  * IB link and linktraining states and masks that vary per chip in
772  * some way. Set at init, to avoid each IB status change interrupt
773  */
780 
781  u16 ipath_rhf_offset; /* offset of RHF within receive header entry */
782 
783  /*
784  * shift/mask for linkcmd, linkinitcmd, maxpktlen in ibccontol
785  * reg. Changes for IBA7220
786  */
787  u8 ibcc_lic_mask; /* LinkInitCmd */
788  u8 ibcc_lc_shift; /* LinkCmd */
789  u8 ibcc_mpl_shift; /* Maxpktlen */
790 
792 
793  /* used to override LED behavior */
794  u8 ipath_led_override; /* Substituted for normal value, if non-zero */
795  u16 ipath_led_override_timeoff; /* delta to next timer event */
796  u8 ipath_led_override_vals[2]; /* Alternates per blink-frame */
797  u8 ipath_led_override_phase; /* Just counts, LSB picks from vals[] */
799  /* Used to flash LEDs in override mode */
801 
802  /* Support (including locks) for EEPROM logging of errors and time */
803  /* control access to actual counters, timer */
805  /* control high-level access to EEPROM */
807  /* Below inc'd by ipath_snap_cntrs(), locked by ipath_eep_st_lock */
809  /* active time is kept in seconds, but logged in hours */
811  /* Below are nominal shadow of EEPROM, new since last EEPROM update */
815  /*
816  * masks for which bits of errs, hwerrs that cause
817  * each of the counters to increment.
818  */
820 
821  /* interrupt mitigation reload register info */
822  u16 ipath_jint_idle_ticks; /* idle clock ticks */
823  u16 ipath_jint_max_packets; /* max packets across all ports */
824 
825  /*
826  * lock for access to SerDes, and flags to sequence preset
827  * versus steady-state. 7220-only at the moment.
828  */
830  u8 ipath_presets_needed; /* Set if presets to be restored next DOWN */
831 };
832 
833 /* ipath_hol_state values (stopping/starting user proc, send flushing) */
834 #define IPATH_HOL_UP 0
835 #define IPATH_HOL_DOWN 1
836 /* ipath_hol_next toggle values, used when hol_state IPATH_HOL_DOWN */
837 #define IPATH_HOL_DOWNSTOP 0
838 #define IPATH_HOL_DOWNCONT 1
839 
840 /* bit positions for sdma_status */
841 #define IPATH_SDMA_ABORTING 0
842 #define IPATH_SDMA_DISARMED 1
843 #define IPATH_SDMA_DISABLED 2
844 #define IPATH_SDMA_LAYERBUF 3
845 #define IPATH_SDMA_RUNNING 30
846 #define IPATH_SDMA_SHUTDOWN 31
847 
848 /* bit combinations that correspond to abort states */
849 #define IPATH_SDMA_ABORT_NONE 0
850 #define IPATH_SDMA_ABORT_ABORTING (1UL << IPATH_SDMA_ABORTING)
851 #define IPATH_SDMA_ABORT_DISARMED ((1UL << IPATH_SDMA_ABORTING) | \
852  (1UL << IPATH_SDMA_DISARMED))
853 #define IPATH_SDMA_ABORT_DISABLED ((1UL << IPATH_SDMA_ABORTING) | \
854  (1UL << IPATH_SDMA_DISABLED))
855 #define IPATH_SDMA_ABORT_ABORTED ((1UL << IPATH_SDMA_ABORTING) | \
856  (1UL << IPATH_SDMA_DISARMED) | (1UL << IPATH_SDMA_DISABLED))
857 #define IPATH_SDMA_ABORT_MASK ((1UL<<IPATH_SDMA_ABORTING) | \
858  (1UL << IPATH_SDMA_DISARMED) | (1UL << IPATH_SDMA_DISABLED))
859 
860 #define IPATH_SDMA_BUF_NONE 0
861 #define IPATH_SDMA_BUF_MASK (1UL<<IPATH_SDMA_LAYERBUF)
862 
863 /* Private data for file operations */
866  unsigned subport;
867  unsigned tidcursor;
869 };
870 extern struct list_head ipath_dev_list;
872 extern struct ipath_devdata *ipath_lookup(int unit);
873 
874 int ipath_init_chip(struct ipath_devdata *, int);
875 int ipath_enable_wc(struct ipath_devdata *dd);
876 void ipath_disable_wc(struct ipath_devdata *dd);
877 int ipath_count_units(int *npresentp, int *nupp, int *maxportsp);
878 void ipath_shutdown_device(struct ipath_devdata *);
879 void ipath_clear_freeze(struct ipath_devdata *);
880 
881 struct file_operations;
882 int ipath_cdev_init(int minor, char *name, const struct file_operations *fops,
883  struct cdev **cdevp, struct device **devp);
884 void ipath_cdev_cleanup(struct cdev **cdevp,
885  struct device **devp);
886 
887 int ipath_diag_add(struct ipath_devdata *);
888 void ipath_diag_remove(struct ipath_devdata *);
889 
891 
892 int ipath_user_add(struct ipath_devdata *dd);
893 void ipath_user_remove(struct ipath_devdata *dd);
894 
895 struct sk_buff *ipath_alloc_skb(struct ipath_devdata *dd, gfp_t);
896 
897 extern int ipath_diag_inuse;
898 
899 irqreturn_t ipath_intr(int irq, void *devid);
900 int ipath_decode_err(struct ipath_devdata *dd, char *buf, size_t blen,
901  ipath_err_t err);
902 #if __IPATH_INFO || __IPATH_DBG
903 extern const char *ipath_ibcstatus_str[];
904 #endif
905 
906 /* clean up any per-chip chip-specific stuff */
907 void ipath_chip_cleanup(struct ipath_devdata *);
908 /* clean up any chip type-specific stuff */
909 void ipath_chip_done(void);
910 
911 /* check to see if we have to force ordering for write combining */
912 int ipath_unordered_wc(void);
913 
914 void ipath_disarm_piobufs(struct ipath_devdata *, unsigned first,
915  unsigned cnt);
916 void ipath_cancel_sends(struct ipath_devdata *, int);
917 
918 int ipath_create_rcvhdrq(struct ipath_devdata *, struct ipath_portdata *);
919 void ipath_free_pddata(struct ipath_devdata *, struct ipath_portdata *);
920 
921 int ipath_parse_ushort(const char *str, unsigned short *valp);
922 
923 void ipath_kreceive(struct ipath_portdata *);
924 int ipath_setrcvhdrsize(struct ipath_devdata *, unsigned);
925 int ipath_reset_device(int);
926 void ipath_get_faststats(unsigned long);
927 int ipath_wait_linkstate(struct ipath_devdata *, u32, int);
928 int ipath_set_linkstate(struct ipath_devdata *, u8);
929 int ipath_set_mtu(struct ipath_devdata *, u16);
930 int ipath_set_lid(struct ipath_devdata *, u32, u8);
931 int ipath_set_rx_pol_inv(struct ipath_devdata *dd, u8 new_pol_inv);
934 void ipath_hol_down(struct ipath_devdata *);
935 void ipath_hol_up(struct ipath_devdata *);
936 void ipath_hol_event(unsigned long);
937 void ipath_toggle_rclkrls(struct ipath_devdata *);
939 void ipath_set_relock_poll(struct ipath_devdata *, int);
941 
942 /* for use in system calls, where we want to know device type, etc. */
943 #define port_fp(fp) ((struct ipath_filedata *)(fp)->private_data)->pd
944 #define subport_fp(fp) \
945  ((struct ipath_filedata *)(fp)->private_data)->subport
946 #define tidcursor_fp(fp) \
947  ((struct ipath_filedata *)(fp)->private_data)->tidcursor
948 #define user_sdma_queue_fp(fp) \
949  ((struct ipath_filedata *)(fp)->private_data)->pq
950 
951 /*
952  * values for ipath_flags
953  */
954  /* chip can report link latency (IB 1.2) */
955 #define IPATH_HAS_LINK_LATENCY 0x1
956  /* The chip is up and initted */
957 #define IPATH_INITTED 0x2
958  /* set if any user code has set kr_rcvhdrsize */
959 #define IPATH_RCVHDRSZ_SET 0x4
960  /* The chip is present and valid for accesses */
961 #define IPATH_PRESENT 0x8
962  /* HT link0 is only 8 bits wide, ignore upper byte crc
963  * errors, etc. */
964 #define IPATH_8BIT_IN_HT0 0x10
965  /* HT link1 is only 8 bits wide, ignore upper byte crc
966  * errors, etc. */
967 #define IPATH_8BIT_IN_HT1 0x20
968  /* The link is down */
969 #define IPATH_LINKDOWN 0x40
970  /* The link level is up (0x11) */
971 #define IPATH_LINKINIT 0x80
972  /* The link is in the armed (0x21) state */
973 #define IPATH_LINKARMED 0x100
974  /* The link is in the active (0x31) state */
975 #define IPATH_LINKACTIVE 0x200
976  /* link current state is unknown */
977 #define IPATH_LINKUNK 0x400
978  /* Write combining flush needed for PIO */
979 #define IPATH_PIO_FLUSH_WC 0x1000
980  /* DMA Receive tail pointer */
981 #define IPATH_NODMA_RTAIL 0x2000
982  /* no IB cable, or no device on IB cable */
983 #define IPATH_NOCABLE 0x4000
984  /* Supports port zero per packet receive interrupts via
985  * GPIO */
986 #define IPATH_GPIO_INTR 0x8000
987  /* uses the coded 4byte TID, not 8 byte */
988 #define IPATH_4BYTE_TID 0x10000
989  /* packet/word counters are 32 bit, else those 4 counters
990  * are 64bit */
991 #define IPATH_32BITCOUNTERS 0x20000
992  /* Interrupt register is 64 bits */
993 #define IPATH_INTREG_64 0x40000
994  /* can miss port0 rx interrupts */
995 #define IPATH_DISABLED 0x80000 /* administratively disabled */
996  /* Use GPIO interrupts for new counters */
997 #define IPATH_GPIO_ERRINTRS 0x100000
998 #define IPATH_SWAP_PIOBUFS 0x200000
999  /* Supports Send DMA */
1000 #define IPATH_HAS_SEND_DMA 0x400000
1001  /* Supports Send Count (not just word count) in PBC */
1002 #define IPATH_HAS_PBC_CNT 0x800000
1003  /* Suppress heartbeat, even if turning off loopback */
1004 #define IPATH_NO_HRTBT 0x1000000
1005 #define IPATH_HAS_THRESH_UPDATE 0x4000000
1006 #define IPATH_HAS_MULT_IB_SPEED 0x8000000
1007 #define IPATH_IB_AUTONEG_INPROG 0x10000000
1008 #define IPATH_IB_AUTONEG_FAILED 0x20000000
1009  /* Linkdown-disable intentionally, Do not attempt to bring up */
1010 #define IPATH_IB_LINK_DISABLED 0x40000000
1011 #define IPATH_IB_FORCE_NOTIFY 0x80000000 /* force notify on next ib change */
1012 
1013 /* Bits in GPIO for the added interrupts */
1014 #define IPATH_GPIO_PORT0_BIT 2
1015 #define IPATH_GPIO_RXUVL_BIT 3
1016 #define IPATH_GPIO_OVRUN_BIT 4
1017 #define IPATH_GPIO_LLI_BIT 5
1018 #define IPATH_GPIO_ERRINTR_MASK 0x38
1019 
1020 /* portdata flag bit offsets */
1021  /* waiting for a packet to arrive */
1022 #define IPATH_PORT_WAITING_RCV 2
1023  /* master has not finished initializing */
1024 #define IPATH_PORT_MASTER_UNINIT 4
1025  /* waiting for an urgent packet to arrive */
1026 #define IPATH_PORT_WAITING_URG 5
1027 
1028 /* free up any allocated data at closes */
1029 void ipath_free_data(struct ipath_portdata *dd);
1031 void ipath_chg_pioavailkernel(struct ipath_devdata *dd, unsigned start,
1032  unsigned len, int avail);
1034 void ipath_get_eeprom_info(struct ipath_devdata *);
1036 void ipath_inc_eeprom_err(struct ipath_devdata *dd, u32 eidx, u32 incr);
1040 void signal_ib_event(struct ipath_devdata *dd, enum ib_event_type ev);
1041 
1042 /*
1043  * Set LED override, only the two LSBs have "public" meaning, but
1044  * any non-zero value substitutes them for the Link and LinkTrain
1045  * LED states.
1046  */
1047 #define IPATH_LED_PHYS 1 /* Physical (linktraining) GREEN LED */
1048 #define IPATH_LED_LOG 2 /* Logical (link) YELLOW LED */
1049 void ipath_set_led_override(struct ipath_devdata *dd, unsigned int val);
1050 
1051 /* send dma routines */
1052 int setup_sdma(struct ipath_devdata *);
1053 void teardown_sdma(struct ipath_devdata *);
1054 void ipath_restart_sdma(struct ipath_devdata *);
1055 void ipath_sdma_intr(struct ipath_devdata *);
1056 int ipath_sdma_verbs_send(struct ipath_devdata *, struct ipath_sge_state *,
1057  u32, struct ipath_verbs_txreq *);
1058 /* ipath_sdma_lock should be locked before calling this. */
1060 
1061 /* must be called under ipath_sdma_lock */
1062 static inline u16 ipath_sdma_descq_freecnt(const struct ipath_devdata *dd)
1063 {
1064  return dd->ipath_sdma_descq_cnt -
1066  1 - dd->ipath_sdma_desc_nreserved;
1067 }
1068 
1069 static inline void ipath_sdma_desc_reserve(struct ipath_devdata *dd, u16 cnt)
1070 {
1072 }
1073 
1074 static inline void ipath_sdma_desc_unreserve(struct ipath_devdata *dd, u16 cnt)
1075 {
1077 }
1078 
1079 /*
1080  * number of words used for protocol header if not set by ipath_userinit();
1081  */
1082 #define IPATH_DFLT_RCVHDRSIZE 9
1083 
1084 int ipath_get_user_pages(unsigned long, size_t, struct page **);
1085 void ipath_release_user_pages(struct page **, size_t);
1086 void ipath_release_user_pages_on_close(struct page **, size_t);
1087 int ipath_eeprom_read(struct ipath_devdata *, u8, void *, int);
1088 int ipath_eeprom_write(struct ipath_devdata *, u8, const void *, int);
1089 int ipath_tempsense_read(struct ipath_devdata *, u8 regnum);
1090 int ipath_tempsense_write(struct ipath_devdata *, u8 regnum, u8 data);
1091 
1092 /* these are used for the registers that vary with port */
1093 void ipath_write_kreg_port(const struct ipath_devdata *, ipath_kreg,
1094  unsigned, u64);
1095 
1096 /*
1097  * We could have a single register get/put routine, that takes a group type,
1098  * but this is somewhat clearer and cleaner. It also gives us some error
1099  * checking. 64 bit register reads should always work, but are inefficient
1100  * on opteron (the northbridge always generates 2 separate HT 32 bit reads),
1101  * so we use kreg32 wherever possible. User register and counter register
1102  * reads are always 32 bit reads, so only one form of those routines.
1103  */
1104 
1105 /*
1106  * At the moment, none of the s-registers are writable, so no
1107  * ipath_write_sreg().
1108  */
1109 
1120 static inline u32 ipath_read_ureg32(const struct ipath_devdata *dd,
1121  ipath_ureg regno, int port)
1122 {
1123  if (!dd->ipath_kregbase || !(dd->ipath_flags & IPATH_PRESENT))
1124  return 0;
1125 
1126  return readl(regno + (u64 __iomem *)
1127  (dd->ipath_uregbase +
1128  (char __iomem *)dd->ipath_kregbase +
1129  dd->ipath_ureg_align * port));
1130 }
1131 
1141 static inline void ipath_write_ureg(const struct ipath_devdata *dd,
1142  ipath_ureg regno, u64 value, int port)
1143 {
1144  u64 __iomem *ubase = (u64 __iomem *)
1145  (dd->ipath_uregbase + (char __iomem *) dd->ipath_kregbase +
1146  dd->ipath_ureg_align * port);
1147  if (dd->ipath_kregbase)
1148  writeq(value, &ubase[regno]);
1149 }
1150 
1151 static inline u32 ipath_read_kreg32(const struct ipath_devdata *dd,
1152  ipath_kreg regno)
1153 {
1154  if (!dd->ipath_kregbase || !(dd->ipath_flags & IPATH_PRESENT))
1155  return -1;
1156  return readl((u32 __iomem *) & dd->ipath_kregbase[regno]);
1157 }
1158 
1159 static inline u64 ipath_read_kreg64(const struct ipath_devdata *dd,
1160  ipath_kreg regno)
1161 {
1162  if (!dd->ipath_kregbase || !(dd->ipath_flags & IPATH_PRESENT))
1163  return -1;
1164 
1165  return readq(&dd->ipath_kregbase[regno]);
1166 }
1167 
1168 static inline void ipath_write_kreg(const struct ipath_devdata *dd,
1169  ipath_kreg regno, u64 value)
1170 {
1171  if (dd->ipath_kregbase)
1172  writeq(value, &dd->ipath_kregbase[regno]);
1173 }
1174 
1175 static inline u64 ipath_read_creg(const struct ipath_devdata *dd,
1176  ipath_sreg regno)
1177 {
1178  if (!dd->ipath_kregbase || !(dd->ipath_flags & IPATH_PRESENT))
1179  return 0;
1180 
1181  return readq(regno + (u64 __iomem *)
1182  (dd->ipath_cregbase +
1183  (char __iomem *)dd->ipath_kregbase));
1184 }
1185 
1186 static inline u32 ipath_read_creg32(const struct ipath_devdata *dd,
1187  ipath_sreg regno)
1188 {
1189  if (!dd->ipath_kregbase || !(dd->ipath_flags & IPATH_PRESENT))
1190  return 0;
1191  return readl(regno + (u64 __iomem *)
1192  (dd->ipath_cregbase +
1193  (char __iomem *)dd->ipath_kregbase));
1194 }
1195 
1196 static inline void ipath_write_creg(const struct ipath_devdata *dd,
1197  ipath_creg regno, u64 value)
1198 {
1199  if (dd->ipath_kregbase)
1200  writeq(value, regno + (u64 __iomem *)
1201  (dd->ipath_cregbase +
1202  (char __iomem *)dd->ipath_kregbase));
1203 }
1204 
1205 static inline void ipath_clear_rcvhdrtail(const struct ipath_portdata *pd)
1206 {
1207  *((u64 *) pd->port_rcvhdrtail_kvaddr) = 0ULL;
1208 }
1209 
1210 static inline u32 ipath_get_rcvhdrtail(const struct ipath_portdata *pd)
1211 {
1212  return (u32) le64_to_cpu(*((volatile __le64 *)
1213  pd->port_rcvhdrtail_kvaddr));
1214 }
1215 
1216 static inline u32 ipath_get_hdrqtail(const struct ipath_portdata *pd)
1217 {
1218  const struct ipath_devdata *dd = pd->port_dd;
1219  u32 hdrqtail;
1220 
1221  if (dd->ipath_flags & IPATH_NODMA_RTAIL) {
1222  __le32 *rhf_addr;
1223  u32 seq;
1224 
1225  rhf_addr = (__le32 *) pd->port_rcvhdrq +
1226  pd->port_head + dd->ipath_rhf_offset;
1227  seq = ipath_hdrget_seq(rhf_addr);
1228  hdrqtail = pd->port_head;
1229  if (seq == pd->port_seq_cnt)
1230  hdrqtail++;
1231  } else
1232  hdrqtail = ipath_get_rcvhdrtail(pd);
1233 
1234  return hdrqtail;
1235 }
1236 
1237 static inline u64 ipath_read_ireg(const struct ipath_devdata *dd, ipath_kreg r)
1238 {
1239  return (dd->ipath_flags & IPATH_INTREG_64) ?
1240  ipath_read_kreg64(dd, r) : ipath_read_kreg32(dd, r);
1241 }
1242 
1243 /*
1244  * from contents of IBCStatus (or a saved copy), return linkstate
1245  * Report ACTIVE_DEFER as ACTIVE, because we treat them the same
1246  * everywhere, anyway (and should be, for almost all purposes).
1247  */
1248 static inline u32 ipath_ib_linkstate(struct ipath_devdata *dd, u64 ibcs)
1249 {
1250  u32 state = (u32)(ibcs >> dd->ibcs_ls_shift) &
1252  if (state == INFINIPATH_IBCS_L_STATE_ACT_DEFER)
1254  return state;
1255 }
1256 
1257 /* from contents of IBCStatus (or a saved copy), return linktrainingstate */
1258 static inline u32 ipath_ib_linktrstate(struct ipath_devdata *dd, u64 ibcs)
1259 {
1260  return (u32)(ibcs >> INFINIPATH_IBCS_LINKTRAININGSTATE_SHIFT) &
1261  dd->ibcs_lts_mask;
1262 }
1263 
1264 /*
1265  * from contents of IBCStatus (or a saved copy), return logical link state
1266  * combination of link state and linktraining state (down, active, init,
1267  * arm, etc.
1268  */
1269 static inline u32 ipath_ib_state(struct ipath_devdata *dd, u64 ibcs)
1270 {
1271  u32 ibs;
1272  ibs = (u32)(ibcs >> INFINIPATH_IBCS_LINKTRAININGSTATE_SHIFT) &
1273  dd->ibcs_lts_mask;
1274  ibs |= (u32)(ibcs &
1276  return ibs;
1277 }
1278 
1279 /*
1280  * sysfs interface.
1281  */
1282 
1283 struct device_driver;
1284 
1285 extern const char ib_ipath_version[];
1286 
1287 extern const struct attribute_group *ipath_driver_attr_groups[];
1288 
1289 int ipath_device_create_group(struct device *, struct ipath_devdata *);
1290 void ipath_device_remove_group(struct device *, struct ipath_devdata *);
1291 int ipath_expose_reset(struct device *);
1292 
1293 int ipath_init_ipathfs(void);
1294 void ipath_exit_ipathfs(void);
1295 int ipathfs_add_device(struct ipath_devdata *);
1296 int ipathfs_remove_device(struct ipath_devdata *);
1297 
1298 /*
1299  * dma_addr wrappers - all 0's invalid for hw
1300  */
1301 dma_addr_t ipath_map_page(struct pci_dev *, struct page *, unsigned long,
1302  size_t, int);
1303 dma_addr_t ipath_map_single(struct pci_dev *, void *, size_t, int);
1304 const char *ipath_get_unit_name(int unit);
1305 
1306 /*
1307  * Flush write combining store buffers (if present) and perform a write
1308  * barrier.
1309  */
1310 #if defined(CONFIG_X86_64)
1311 #define ipath_flush_wc() asm volatile("sfence" ::: "memory")
1312 #else
1313 #define ipath_flush_wc() wmb()
1314 #endif
1315 
1316 extern unsigned ipath_debug; /* debugging bit mask */
1317 extern unsigned ipath_linkrecovery;
1318 extern unsigned ipath_mtu4096;
1319 extern struct mutex ipath_mutex;
1320 
1321 #define IPATH_DRV_NAME "ib_ipath"
1322 #define IPATH_MAJOR 233
1323 #define IPATH_USER_MINOR_BASE 0
1324 #define IPATH_DIAGPKT_MINOR 127
1325 #define IPATH_DIAG_MINOR_BASE 129
1326 #define IPATH_NMINORS 255
1327 
1328 #define ipath_dev_err(dd,fmt,...) \
1329  do { \
1330  const struct ipath_devdata *__dd = (dd); \
1331  if (__dd->pcidev) \
1332  dev_err(&__dd->pcidev->dev, "%s: " fmt, \
1333  ipath_get_unit_name(__dd->ipath_unit), \
1334  ##__VA_ARGS__); \
1335  else \
1336  printk(KERN_ERR IPATH_DRV_NAME ": %s: " fmt, \
1337  ipath_get_unit_name(__dd->ipath_unit), \
1338  ##__VA_ARGS__); \
1339  } while (0)
1340 
1341 #if _IPATH_DEBUGGING
1342 
1343 # define __IPATH_DBG_WHICH(which,fmt,...) \
1344  do { \
1345  if (unlikely(ipath_debug & (which))) \
1346  printk(KERN_DEBUG IPATH_DRV_NAME ": %s: " fmt, \
1347  __func__,##__VA_ARGS__); \
1348  } while(0)
1349 
1350 # define ipath_dbg(fmt,...) \
1351  __IPATH_DBG_WHICH(__IPATH_DBG,fmt,##__VA_ARGS__)
1352 # define ipath_cdbg(which,fmt,...) \
1353  __IPATH_DBG_WHICH(__IPATH_##which##DBG,fmt,##__VA_ARGS__)
1354 
1355 #else /* ! _IPATH_DEBUGGING */
1356 
1357 # define ipath_dbg(fmt,...)
1358 # define ipath_cdbg(which,fmt,...)
1359 
1360 #endif /* _IPATH_DEBUGGING */
1361 
1362 /*
1363  * this is used for formatting hw error messages...
1364  */
1367  const char *msg;
1368 };
1369 
1370 #define INFINIPATH_HWE_MSG(a, b) { .mask = INFINIPATH_HWE_##a, .msg = b }
1371 
1372 /* in ipath_intr.c... */
1373 void ipath_format_hwerrors(u64 hwerrs,
1374  const struct ipath_hwerror_msgs *hwerrmsgs,
1375  size_t nhwerrmsgs,
1376  char *msg, size_t lmsg);
1377 
1378 #endif /* _IPATH_KERNEL_H */