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commands.h
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1 /******************************************************************************
2  *
3  * This file is provided under a dual BSD/GPLv2 license. When using or
4  * redistributing this file, you may do so under either license.
5  *
6  * GPL LICENSE SUMMARY
7  *
8  * Copyright(c) 2005 - 2012 Intel Corporation. All rights reserved.
9  *
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13  *
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17  * General Public License for more details.
18  *
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21  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
22  * USA
23  *
24  * The full GNU General Public License is included in this distribution
25  * in the file called LICENSE.GPL.
26  *
27  * Contact Information:
28  * Intel Linux Wireless <[email protected]>
29  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
30  *
31  * BSD LICENSE
32  *
33  * Copyright(c) 2005 - 2012 Intel Corporation. All rights reserved.
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49  *
50  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
51  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
52  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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56  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
57  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
58  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
59  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
60  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
61  *
62  *****************************************************************************/
63 /*
64  * Please use this file (commands.h) only for uCode API definitions.
65  * Please use iwl-xxxx-hw.h for hardware-related definitions.
66  * Please use dev.h for driver implementation definitions.
67  */
68 
69 #ifndef __iwl_commands_h__
70 #define __iwl_commands_h__
71 
72 #include <linux/ieee80211.h>
73 #include <linux/types.h>
74 
75 
76 enum {
77  REPLY_ALIVE = 0x1,
78  REPLY_ERROR = 0x2,
79  REPLY_ECHO = 0x3, /* test command */
80 
81  /* RXON and QOS commands */
82  REPLY_RXON = 0x10,
86 
87  /* Multi-Station support */
88  REPLY_ADD_STA = 0x18,
90  REPLY_REMOVE_ALL_STA = 0x1a, /* not used */
92 
93  /* Security */
94  REPLY_WEPKEY = 0x20,
95 
96  /* RX, TX, LEDs */
97  REPLY_TX = 0x1c,
100 
101  /* WiMAX coexistence */
105 
106  /* Calibration */
111 
112  /* 802.11h related */
113  REPLY_QUIET_CMD = 0x71, /* not used */
118 
119  /* Power Management */
123 
124  /* Scan commands and notifications */
130 
131  /* IBSS/AP commands */
134  WHO_IS_AWAKE_NOTIFICATION = 0x94, /* not used */
135 
136  /* Miscellaneous commands */
138  QUIET_NOTIFICATION = 0x96, /* not used */
140  REPLY_TX_POWER_DBM_CMD_V1 = 0x98, /* old version of API */
142  MEASURE_ABORT_NOTIFICATION = 0x99, /* not used */
143 
144  /* Bluetooth device coexistence config command */
146 
147  /* Statistics */
150 
151  /* RF-KILL commands and notifications */
154 
155  /* Missed beacons notification */
157 
163  REPLY_RX = 0xc3,
165 
166  /* BT Coex */
170 
171  /* PAN commands */
173  REPLY_WIPAN_RXON = 0xb3, /* use REPLY_RXON structure */
174  REPLY_WIPAN_RXON_TIMING = 0xb4, /* use REPLY_RXON_TIMING structure */
175  REPLY_WIPAN_RXON_ASSOC = 0xb6, /* use REPLY_RXON_ASSOC structure */
176  REPLY_WIPAN_QOS_PARAM = 0xb7, /* use REPLY_QOS_PARAM structure */
177  REPLY_WIPAN_WEPKEY = 0xb8, /* use REPLY_WEPKEY structure */
181 
189 
190  REPLY_MAX = 0xff
191 };
192 
193 /*
194  * Minimum number of queues. MAX_NUM is defined in hw specific files.
195  * Set the minimum to accommodate
196  * - 4 standard TX queues
197  * - the command queue
198  * - 4 PAN TX queues
199  * - the PAN multicast queue, and
200  * - the AUX (TX during scan dwell) queue.
201  */
202 #define IWL_MIN_NUM_QUEUES 11
203 
204 /*
205  * Command queue depends on iPAN support.
206  */
207 #define IWL_DEFAULT_CMD_QUEUE_NUM 4
208 #define IWL_IPAN_CMD_QUEUE_NUM 9
209 
210 #define IWL_TX_FIFO_BK 0 /* shared */
211 #define IWL_TX_FIFO_BE 1
212 #define IWL_TX_FIFO_VI 2 /* shared */
213 #define IWL_TX_FIFO_VO 3
214 #define IWL_TX_FIFO_BK_IPAN IWL_TX_FIFO_BK
215 #define IWL_TX_FIFO_BE_IPAN 4
216 #define IWL_TX_FIFO_VI_IPAN IWL_TX_FIFO_VI
217 #define IWL_TX_FIFO_VO_IPAN 5
218 /* re-uses the VO FIFO, uCode will properly flush/schedule */
219 #define IWL_TX_FIFO_AUX 5
220 #define IWL_TX_FIFO_UNUSED 255
221 
222 #define IWLAGN_CMD_FIFO_NUM 7
223 
224 /*
225  * This queue number is required for proper operation
226  * because the ucode will stop/start the scheduler as
227  * required.
228  */
229 #define IWL_IPAN_MCAST_QUEUE 8
230 
231 /******************************************************************************
232  * (0)
233  * Commonly used structures and definitions:
234  * Command header, rate_n_flags, txpower
235  *
236  *****************************************************************************/
237 
279 #define RATE_MCS_CODE_MSK 0x7
280 #define RATE_MCS_SPATIAL_POS 3
281 #define RATE_MCS_SPATIAL_MSK 0x18
282 #define RATE_MCS_HT_DUP_POS 5
283 #define RATE_MCS_HT_DUP_MSK 0x20
284 /* Both legacy and HT use bits 7:0 as the CCK/OFDM rate or HT MCS */
285 #define RATE_MCS_RATE_MSK 0xff
286 
287 /* Bit 8: (1) HT format, (0) legacy format in bits 7:0 */
288 #define RATE_MCS_FLAGS_POS 8
289 #define RATE_MCS_HT_POS 8
290 #define RATE_MCS_HT_MSK 0x100
291 
292 /* Bit 9: (1) CCK, (0) OFDM. HT (bit 8) must be "0" for this bit to be valid */
293 #define RATE_MCS_CCK_POS 9
294 #define RATE_MCS_CCK_MSK 0x200
295 
296 /* Bit 10: (1) Use Green Field preamble */
297 #define RATE_MCS_GF_POS 10
298 #define RATE_MCS_GF_MSK 0x400
299 
300 /* Bit 11: (1) Use 40Mhz HT40 chnl width, (0) use 20 MHz legacy chnl width */
301 #define RATE_MCS_HT40_POS 11
302 #define RATE_MCS_HT40_MSK 0x800
303 
304 /* Bit 12: (1) Duplicate data on both 20MHz chnls. HT40 (bit 11) must be set. */
305 #define RATE_MCS_DUP_POS 12
306 #define RATE_MCS_DUP_MSK 0x1000
307 
308 /* Bit 13: (1) Short guard interval (0.4 usec), (0) normal GI (0.8 usec) */
309 #define RATE_MCS_SGI_POS 13
310 #define RATE_MCS_SGI_MSK 0x2000
311 
321 #define RATE_MCS_ANT_POS 14
322 #define RATE_MCS_ANT_A_MSK 0x04000
323 #define RATE_MCS_ANT_B_MSK 0x08000
324 #define RATE_MCS_ANT_C_MSK 0x10000
325 #define RATE_MCS_ANT_AB_MSK (RATE_MCS_ANT_A_MSK | RATE_MCS_ANT_B_MSK)
326 #define RATE_MCS_ANT_ABC_MSK (RATE_MCS_ANT_AB_MSK | RATE_MCS_ANT_C_MSK)
327 #define RATE_ANT_NUM 3
328 
329 #define POWER_TABLE_NUM_ENTRIES 33
330 #define POWER_TABLE_NUM_HT_OFDM_ENTRIES 32
331 #define POWER_TABLE_CCK_ENTRY 32
332 
333 #define IWL_PWR_NUM_HT_OFDM_ENTRIES 24
334 #define IWL_PWR_CCK_ENTRIES 2
335 
343 struct tx_power_dual_stream {
344  __le32 dw;
345 } __packed;
346 
351 #define IWLAGN_TX_POWER_AUTO 0x7f
352 #define IWLAGN_TX_POWER_NO_CLOSED (0x1 << 6)
353 
355  s8 global_lmt; /*in half-dBm (e.g. 30 = 15 dBm) */
357  s8 srv_chan_lmt; /*in half-dBm (e.g. 30 = 15 dBm) */
359 } __packed;
360 
369 } __packed;
370 
371 /******************************************************************************
372  * (0a)
373  * Alive and Error Commands & Responses:
374  *
375  *****************************************************************************/
376 
377 #define UCODE_VALID_OK cpu_to_le32(0x1)
378 
419 /*
420  * Note: This structure is read from the device with IO accesses,
421  * and the reading already does the endian conversion. As it is
422  * read with u32-sized accesses, any members with a different size
423  * need to be ordered correctly though!
424  */
426  u32 valid; /* (nonzero) valid, (0) log is empty */
427  u32 error_id; /* type of error */
428  u32 pc; /* program counter */
429  u32 blink1; /* branch link */
430  u32 blink2; /* branch link */
431  u32 ilink1; /* interrupt link */
432  u32 ilink2; /* interrupt link */
433  u32 data1; /* error-specific data */
434  u32 data2; /* error-specific data */
435  u32 line; /* source code line of error */
436  u32 bcon_time; /* beacon timer */
437  u32 tsf_low; /* network timestamp function timer */
438  u32 tsf_hi; /* network timestamp function timer */
439  u32 gp1; /* GP1 timer register */
440  u32 gp2; /* GP2 timer register */
441  u32 gp3; /* GP3 timer register */
442  u32 ucode_ver; /* uCode version */
443  u32 hw_ver; /* HW Silicon version */
444  u32 brd_ver; /* HW board version */
445  u32 log_pc; /* log program counter */
446  u32 frame_ptr; /* frame pointer */
447  u32 stack_ptr; /* stack pointer */
448  u32 hcmd; /* last host command header */
449  u32 isr0; /* isr status register LMPM_NIC_ISR0:
450  * rxtx_flag */
451  u32 isr1; /* isr status register LMPM_NIC_ISR1:
452  * host_flag */
453  u32 isr2; /* isr status register LMPM_NIC_ISR2:
454  * enc_flag */
455  u32 isr3; /* isr status register LMPM_NIC_ISR3:
456  * time_flag */
457  u32 isr4; /* isr status register LMPM_NIC_ISR4:
458  * wico interrupt */
459  u32 isr_pref; /* isr status register LMPM_NIC_PREF_STAT */
460  u32 wait_event; /* wait event() caller address */
461  u32 l2p_control; /* L2pControlField */
462  u32 l2p_duration; /* L2pDurationField */
463  u32 l2p_mhvalid; /* L2pMhValidBits */
464  u32 l2p_addr_match; /* L2pAddrMatchStat */
465  u32 lmpm_pmg_sel; /* indicate which clocks are turned on
466  * (LMPM_PMG_SEL) */
467  u32 u_timestamp; /* indicate when the date and time of the
468  * compilation */
469  u32 flow_handler; /* FH read/write pointers, RX credit */
470 } __packed;
471 
476  u8 sw_rev[8];
478  u8 ver_subtype; /* not "9" for runtime alive */
480  __le32 log_event_table_ptr; /* SRAM address for event log */
481  __le32 error_event_table_ptr; /* SRAM address for error log */
484 } __packed;
485 
486 /*
487  * REPLY_ERROR = 0x2 (response only, not a command)
488  */
496 } __packed;
497 
498 /******************************************************************************
499  * (1)
500  * RXON Commands & Responses:
501  *
502  *****************************************************************************/
503 
504 /*
505  * Rx config defines & structure
506  */
507 /* rx_config device types */
508 enum {
516 };
517 
518 
519 #define RXON_RX_CHAIN_DRIVER_FORCE_MSK cpu_to_le16(0x1 << 0)
520 #define RXON_RX_CHAIN_DRIVER_FORCE_POS (0)
521 #define RXON_RX_CHAIN_VALID_MSK cpu_to_le16(0x7 << 1)
522 #define RXON_RX_CHAIN_VALID_POS (1)
523 #define RXON_RX_CHAIN_FORCE_SEL_MSK cpu_to_le16(0x7 << 4)
524 #define RXON_RX_CHAIN_FORCE_SEL_POS (4)
525 #define RXON_RX_CHAIN_FORCE_MIMO_SEL_MSK cpu_to_le16(0x7 << 7)
526 #define RXON_RX_CHAIN_FORCE_MIMO_SEL_POS (7)
527 #define RXON_RX_CHAIN_CNT_MSK cpu_to_le16(0x3 << 10)
528 #define RXON_RX_CHAIN_CNT_POS (10)
529 #define RXON_RX_CHAIN_MIMO_CNT_MSK cpu_to_le16(0x3 << 12)
530 #define RXON_RX_CHAIN_MIMO_CNT_POS (12)
531 #define RXON_RX_CHAIN_MIMO_FORCE_MSK cpu_to_le16(0x1 << 14)
532 #define RXON_RX_CHAIN_MIMO_FORCE_POS (14)
533 
534 /* rx_config flags */
535 /* band & modulation selection */
536 #define RXON_FLG_BAND_24G_MSK cpu_to_le32(1 << 0)
537 #define RXON_FLG_CCK_MSK cpu_to_le32(1 << 1)
538 /* auto detection enable */
539 #define RXON_FLG_AUTO_DETECT_MSK cpu_to_le32(1 << 2)
540 /* TGg protection when tx */
541 #define RXON_FLG_TGG_PROTECT_MSK cpu_to_le32(1 << 3)
542 /* cck short slot & preamble */
543 #define RXON_FLG_SHORT_SLOT_MSK cpu_to_le32(1 << 4)
544 #define RXON_FLG_SHORT_PREAMBLE_MSK cpu_to_le32(1 << 5)
545 /* antenna selection */
546 #define RXON_FLG_DIS_DIV_MSK cpu_to_le32(1 << 7)
547 #define RXON_FLG_ANT_SEL_MSK cpu_to_le32(0x0f00)
548 #define RXON_FLG_ANT_A_MSK cpu_to_le32(1 << 8)
549 #define RXON_FLG_ANT_B_MSK cpu_to_le32(1 << 9)
550 /* radar detection enable */
551 #define RXON_FLG_RADAR_DETECT_MSK cpu_to_le32(1 << 12)
552 #define RXON_FLG_TGJ_NARROW_BAND_MSK cpu_to_le32(1 << 13)
553 /* rx response to host with 8-byte TSF
554 * (according to ON_AIR deassertion) */
555 #define RXON_FLG_TSF2HOST_MSK cpu_to_le32(1 << 15)
556 
557 
558 /* HT flags */
559 #define RXON_FLG_CTRL_CHANNEL_LOC_POS (22)
560 #define RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK cpu_to_le32(0x1 << 22)
561 
562 #define RXON_FLG_HT_OPERATING_MODE_POS (23)
563 
564 #define RXON_FLG_HT_PROT_MSK cpu_to_le32(0x1 << 23)
565 #define RXON_FLG_HT40_PROT_MSK cpu_to_le32(0x2 << 23)
566 
567 #define RXON_FLG_CHANNEL_MODE_POS (25)
568 #define RXON_FLG_CHANNEL_MODE_MSK cpu_to_le32(0x3 << 25)
569 
570 /* channel mode */
571 enum {
576 };
577 #define RXON_FLG_CHANNEL_MODE_LEGACY cpu_to_le32(CHANNEL_MODE_LEGACY << RXON_FLG_CHANNEL_MODE_POS)
578 #define RXON_FLG_CHANNEL_MODE_PURE_40 cpu_to_le32(CHANNEL_MODE_PURE_40 << RXON_FLG_CHANNEL_MODE_POS)
579 #define RXON_FLG_CHANNEL_MODE_MIXED cpu_to_le32(CHANNEL_MODE_MIXED << RXON_FLG_CHANNEL_MODE_POS)
580 
581 /* CTS to self (if spec allows) flag */
582 #define RXON_FLG_SELF_CTS_EN cpu_to_le32(0x1<<30)
583 
584 /* rx_config filter flags */
585 /* accept all data frames */
586 #define RXON_FILTER_PROMISC_MSK cpu_to_le32(1 << 0)
587 /* pass control & management to host */
588 #define RXON_FILTER_CTL2HOST_MSK cpu_to_le32(1 << 1)
589 /* accept multi-cast */
590 #define RXON_FILTER_ACCEPT_GRP_MSK cpu_to_le32(1 << 2)
591 /* don't decrypt uni-cast frames */
592 #define RXON_FILTER_DIS_DECRYPT_MSK cpu_to_le32(1 << 3)
593 /* don't decrypt multi-cast frames */
594 #define RXON_FILTER_DIS_GRP_DECRYPT_MSK cpu_to_le32(1 << 4)
595 /* STA is associated */
596 #define RXON_FILTER_ASSOC_MSK cpu_to_le32(1 << 5)
597 /* transfer to host non bssid beacons in associated state */
598 #define RXON_FILTER_BCON_AWARE_MSK cpu_to_le32(1 << 6)
599 
618 struct iwl_rxon_cmd {
640 } __packed;
641 
642 /*
643  * REPLY_RXON_ASSOC = 0x11 (command, has simple generic response)
644  */
658 } __packed;
659 
660 #define IWL_CONN_MAX_LISTEN_INTERVAL 10
661 #define IWL_MAX_UCODE_BEACON_INTERVAL 4 /* 4096 */
662 
663 /*
664  * REPLY_RXON_TIMING = 0x14 (command, has simple generic response)
665  */
674 } __packed;
675 
676 /*
677  * REPLY_CHANNEL_SWITCH = 0x72 (command, has simple generic response)
678  */
698 } __packed;
699 
719 } __packed;
720 
721 /*
722  * CHANNEL_SWITCH_NOTIFICATION = 0x73 (notification only, not a command)
723  */
727  __le32 status; /* 0 - OK, 1 - fail */
728 } __packed;
729 
730 /******************************************************************************
731  * (2)
732  * Quality-of-Service (QOS) Commands & Responses:
733  *
734  *****************************************************************************/
735 
752 struct iwl_ac_qos {
758 } __packed;
759 
760 /* QoS flags defines */
761 #define QOS_PARAM_FLG_UPDATE_EDCA_MSK cpu_to_le32(0x01)
762 #define QOS_PARAM_FLG_TGN_MSK cpu_to_le32(0x02)
763 #define QOS_PARAM_FLG_TXOP_TYPE_MSK cpu_to_le32(0x10)
764 
765 /* Number of Access Categories (AC) (EDCA), queues 0..3 */
766 #define AC_NUM 4
767 
768 /*
769  * REPLY_QOS_PARAM = 0x13 (command, has simple generic response)
770  *
771  * This command sets up timings for each of the 4 prioritized EDCA Tx FIFOs
772  * 0: Background, 1: Best Effort, 2: Video, 3: Voice.
773  */
777 } __packed;
778 
779 /******************************************************************************
780  * (3)
781  * Add/Modify Stations Commands & Responses:
782  *
783  *****************************************************************************/
784 /*
785  * Multi station support
786  */
787 
788 /* Special, dedicated locations within device's station table */
789 #define IWL_AP_ID 0
790 #define IWL_AP_ID_PAN 1
791 #define IWL_STA_ID 2
792 #define IWLAGN_PAN_BCAST_ID 14
793 #define IWLAGN_BROADCAST_ID 15
794 #define IWLAGN_STATION_COUNT 16
795 
796 #define IWL_TID_NON_QOS IWL_MAX_TID_COUNT
797 
798 #define STA_FLG_TX_RATE_MSK cpu_to_le32(1 << 2)
799 #define STA_FLG_PWR_SAVE_MSK cpu_to_le32(1 << 8)
800 #define STA_FLG_PAN_STATION cpu_to_le32(1 << 13)
801 #define STA_FLG_RTS_MIMO_PROT_MSK cpu_to_le32(1 << 17)
802 #define STA_FLG_AGG_MPDU_8US_MSK cpu_to_le32(1 << 18)
803 #define STA_FLG_MAX_AGG_SIZE_POS (19)
804 #define STA_FLG_MAX_AGG_SIZE_MSK cpu_to_le32(3 << 19)
805 #define STA_FLG_HT40_EN_MSK cpu_to_le32(1 << 21)
806 #define STA_FLG_MIMO_DIS_MSK cpu_to_le32(1 << 22)
807 #define STA_FLG_AGG_MPDU_DENSITY_POS (23)
808 #define STA_FLG_AGG_MPDU_DENSITY_MSK cpu_to_le32(7 << 23)
809 
810 /* Use in mode field. 1: modify existing entry, 0: add new station entry */
811 #define STA_CONTROL_MODIFY_MSK 0x01
812 
813 /* key flags __le16*/
814 #define STA_KEY_FLG_ENCRYPT_MSK cpu_to_le16(0x0007)
815 #define STA_KEY_FLG_NO_ENC cpu_to_le16(0x0000)
816 #define STA_KEY_FLG_WEP cpu_to_le16(0x0001)
817 #define STA_KEY_FLG_CCMP cpu_to_le16(0x0002)
818 #define STA_KEY_FLG_TKIP cpu_to_le16(0x0003)
819 
820 #define STA_KEY_FLG_KEYID_POS 8
821 #define STA_KEY_FLG_INVALID cpu_to_le16(0x0800)
822 /* wep key is either from global key (0) or from station info array (1) */
823 #define STA_KEY_FLG_MAP_KEY_MSK cpu_to_le16(0x0008)
824 
825 /* wep key in STA: 5-bytes (0) or 13-bytes (1) */
826 #define STA_KEY_FLG_KEY_SIZE_MSK cpu_to_le16(0x1000)
827 #define STA_KEY_MULTICAST_MSK cpu_to_le16(0x4000)
828 #define STA_KEY_MAX_NUM 8
829 #define STA_KEY_MAX_NUM_PAN 16
830 /* must not match WEP_INVALID_OFFSET */
831 #define IWLAGN_HW_KEY_DEFAULT 0xfe
832 
833 /* Flags indicate whether to modify vs. don't change various station params */
834 #define STA_MODIFY_KEY_MASK 0x01
835 #define STA_MODIFY_TID_DISABLE_TX 0x02
836 #define STA_MODIFY_TX_RATE_MSK 0x04
837 #define STA_MODIFY_ADDBA_TID_MSK 0x08
838 #define STA_MODIFY_DELBA_TID_MSK 0x10
839 #define STA_MODIFY_SLEEP_TX_COUNT_MSK 0x20
840 
841 /* Receiver address (actually, Rx station's index into station table),
842  * combined with Traffic ID (QOS priority), in format used by Tx Scheduler */
843 #define BUILD_RAxTID(sta_id, tid) (((sta_id) << 4) + (tid))
844 
845 /* agn */
846 struct iwl_keyinfo {
848  u8 tkip_rx_tsc_byte2; /* TSC[2] for key mix ph1 detection */
850  __le16 tkip_rx_ttak[5]; /* 10-byte unicast TKIP TTAK */
853  u8 key[16]; /* 16-byte unicast decryption key */
857 } __packed;
858 
871 struct sta_id_modify {
872  u8 addr[ETH_ALEN];
874  u8 sta_id;
875  u8 modify_mask;
877 } __packed;
878 
879 /*
880  * REPLY_ADD_STA = 0x18 (command)
881  *
882  * The device contains an internal table of per-station information,
883  * with info on security keys, aggregation parameters, and Tx rates for
884  * initial Tx attempt and any retries (agn devices uses
885  * REPLY_TX_LINK_QUALITY_CMD,
886  *
887  * REPLY_ADD_STA sets up the table entry for one station, either creating
888  * a new entry, or modifying a pre-existing one.
889  *
890  * NOTE: RXON command (without "associated" bit set) wipes the station table
891  * clean. Moving into RF_KILL state does this also. Driver must set up
892  * new station table before transmitting anything on the RXON channel
893  * (except active scans or active measurements; those commands carry
894  * their own txpower/rate setup data).
895  *
896  * When getting started on a new channel, driver must set up the
897  * IWL_BROADCAST_ID entry (last entry in the table). For a client
898  * station in a BSS, once an AP is selected, driver sets up the AP STA
899  * in the IWL_AP_ID entry (1st entry in the table). BROADCAST and AP
900  * are all that are needed for a BSS client station. If the device is
901  * used as AP, or in an IBSS network, driver must set up station table
902  * entries for all STAs in network, starting with index IWL_STA_ID.
903  */
904 
906  u8 mode; /* 1: modify existing, 0: add new station */
909  struct iwl_keyinfo key;
910  __le32 station_flags; /* STA_FLG_* */
911  __le32 station_flags_msk; /* STA_FLG_* */
912 
913  /* bit field to disable (1) or enable (0) Tx for Traffic ID (TID)
914  * corresponding to bit (e.g. bit 5 controls TID 5).
915  * Set modify_mask bit STA_MODIFY_TID_DISABLE_TX to use this field. */
918 
919  /* TID for which to add block-ack support.
920  * Set modify_mask bit STA_MODIFY_ADDBA_TID_MSK to use this field. */
922 
923  /* TID for which to remove block-ack support.
924  * Set modify_mask bit STA_MODIFY_DELBA_TID_MSK to use this field. */
926 
927  /* Starting Sequence Number for added block-ack support.
928  * Set modify_mask bit STA_MODIFY_ADDBA_TID_MSK to use this field. */
930 
931  /*
932  * Number of packets OK to transmit to station even though
933  * it is asleep -- used to synchronise PS-poll and u-APSD
934  * responses while ucode keeps track of STA sleep state.
935  */
937 
939 } __packed;
940 
941 
942 #define ADD_STA_SUCCESS_MSK 0x1
943 #define ADD_STA_NO_ROOM_IN_TABLE 0x2
944 #define ADD_STA_NO_BLOCK_ACK_RESOURCE 0x4
945 #define ADD_STA_MODIFY_NON_EXIST_STA 0x8
946 /*
947  * REPLY_ADD_STA = 0x18 (response)
948  */
950  u8 status; /* ADD_STA_* */
951 } __packed;
952 
953 #define REM_STA_SUCCESS_MSK 0x1
954 /*
955  * REPLY_REM_STA = 0x19 (response)
956  */
959 } __packed;
960 
961 /*
962  * REPLY_REM_STA = 0x19 (command)
963  */
965  u8 num_sta; /* number of removed stations */
967  u8 addr[ETH_ALEN]; /* MAC addr of the first station */
969 } __packed;
970 
971 
972 /* WiFi queues mask */
973 #define IWL_SCD_BK_MSK cpu_to_le32(BIT(0))
974 #define IWL_SCD_BE_MSK cpu_to_le32(BIT(1))
975 #define IWL_SCD_VI_MSK cpu_to_le32(BIT(2))
976 #define IWL_SCD_VO_MSK cpu_to_le32(BIT(3))
977 #define IWL_SCD_MGMT_MSK cpu_to_le32(BIT(3))
978 
979 /* PAN queues mask */
980 #define IWL_PAN_SCD_BK_MSK cpu_to_le32(BIT(4))
981 #define IWL_PAN_SCD_BE_MSK cpu_to_le32(BIT(5))
982 #define IWL_PAN_SCD_VI_MSK cpu_to_le32(BIT(6))
983 #define IWL_PAN_SCD_VO_MSK cpu_to_le32(BIT(7))
984 #define IWL_PAN_SCD_MGMT_MSK cpu_to_le32(BIT(7))
985 #define IWL_PAN_SCD_MULTICAST_MSK cpu_to_le32(BIT(8))
986 
987 #define IWL_AGG_TX_QUEUE_MSK cpu_to_le32(0xffc00)
988 
989 #define IWL_DROP_SINGLE 0
990 #define IWL_DROP_ALL (BIT(IWL_RXON_CTX_BSS) | BIT(IWL_RXON_CTX_PAN))
991 
992 /*
993  * REPLY_TXFIFO_FLUSH = 0x1e(command and response)
994  *
995  * When using full FIFO flush this command checks the scheduler HW block WR/RD
996  * pointers to check if all the frames were transferred by DMA into the
997  * relevant TX FIFO queue. Only when the DMA is finished and the queue is
998  * empty the command can finish.
999  * This command is used to flush the TXFIFO from transmit commands, it may
1000  * operate on single or multiple queues, the command queue can't be flushed by
1001  * this command. The command response is returned when all the queue flush
1002  * operations are done. Each TX command flushed return response with the FLUSH
1003  * status set in the TX response status. When FIFO flush operation is used,
1004  * the flush operation ends when both the scheduler DMA done and TXFIFO empty
1005  * are set.
1006  *
1007  * @fifo_control: bit mask for which queues to flush
1008  * @flush_control: flush controls
1009  * 0: Dump single MSDU
1010  * 1: Dump multiple MSDU according to PS, INVALID STA, TTL, TID disable.
1011  * 2: Dump all FIFO
1012  */
1017 } __packed;
1018 
1019 /*
1020  * REPLY_WEP_KEY = 0x20
1021  */
1022 struct iwl_wep_key {
1028  u8 key[16];
1029 } __packed;
1030 
1031 struct iwl_wep_cmd {
1036  struct iwl_wep_key key[0];
1037 } __packed;
1038 
1039 #define WEP_KEY_WEP_TYPE 1
1040 #define WEP_KEYS_MAX 4
1041 #define WEP_INVALID_OFFSET 0xff
1042 #define WEP_KEY_LEN_64 5
1043 #define WEP_KEY_LEN_128 13
1044 
1045 /******************************************************************************
1046  * (4)
1047  * Rx Responses:
1048  *
1049  *****************************************************************************/
1050 
1051 #define RX_RES_STATUS_NO_CRC32_ERROR cpu_to_le32(1 << 0)
1052 #define RX_RES_STATUS_NO_RXE_OVERFLOW cpu_to_le32(1 << 1)
1053 
1054 #define RX_RES_PHY_FLAGS_BAND_24_MSK cpu_to_le16(1 << 0)
1055 #define RX_RES_PHY_FLAGS_MOD_CCK_MSK cpu_to_le16(1 << 1)
1056 #define RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK cpu_to_le16(1 << 2)
1057 #define RX_RES_PHY_FLAGS_NARROW_BAND_MSK cpu_to_le16(1 << 3)
1058 #define RX_RES_PHY_FLAGS_ANTENNA_MSK 0x70
1059 #define RX_RES_PHY_FLAGS_ANTENNA_POS 4
1060 #define RX_RES_PHY_FLAGS_AGG_MSK cpu_to_le16(1 << 7)
1061 
1062 #define RX_RES_STATUS_SEC_TYPE_MSK (0x7 << 8)
1063 #define RX_RES_STATUS_SEC_TYPE_NONE (0x0 << 8)
1064 #define RX_RES_STATUS_SEC_TYPE_WEP (0x1 << 8)
1065 #define RX_RES_STATUS_SEC_TYPE_CCMP (0x2 << 8)
1066 #define RX_RES_STATUS_SEC_TYPE_TKIP (0x3 << 8)
1067 #define RX_RES_STATUS_SEC_TYPE_ERR (0x7 << 8)
1068 
1069 #define RX_RES_STATUS_STATION_FOUND (1<<6)
1070 #define RX_RES_STATUS_NO_STATION_INFO_MISMATCH (1<<7)
1071 
1072 #define RX_RES_STATUS_DECRYPT_TYPE_MSK (0x3 << 11)
1073 #define RX_RES_STATUS_NOT_DECRYPT (0x0 << 11)
1074 #define RX_RES_STATUS_DECRYPT_OK (0x3 << 11)
1075 #define RX_RES_STATUS_BAD_ICV_MIC (0x1 << 11)
1076 #define RX_RES_STATUS_BAD_KEY_TTAK (0x2 << 11)
1077 
1078 #define RX_MPDU_RES_STATUS_ICV_OK (0x20)
1079 #define RX_MPDU_RES_STATUS_MIC_OK (0x40)
1080 #define RX_MPDU_RES_STATUS_TTAK_OK (1 << 7)
1081 #define RX_MPDU_RES_STATUS_DEC_DONE_MSK (0x800)
1082 
1083 
1084 #define IWLAGN_RX_RES_PHY_CNT 8
1085 #define IWLAGN_RX_RES_AGC_IDX 1
1086 #define IWLAGN_RX_RES_RSSI_AB_IDX 2
1087 #define IWLAGN_RX_RES_RSSI_C_IDX 3
1088 #define IWLAGN_OFDM_AGC_MSK 0xfe00
1089 #define IWLAGN_OFDM_AGC_BIT_POS 9
1090 #define IWLAGN_OFDM_RSSI_INBAND_A_BITMSK 0x00ff
1091 #define IWLAGN_OFDM_RSSI_ALLBAND_A_BITMSK 0xff00
1092 #define IWLAGN_OFDM_RSSI_A_BIT_POS 0
1093 #define IWLAGN_OFDM_RSSI_INBAND_B_BITMSK 0xff0000
1094 #define IWLAGN_OFDM_RSSI_ALLBAND_B_BITMSK 0xff000000
1095 #define IWLAGN_OFDM_RSSI_B_BIT_POS 16
1096 #define IWLAGN_OFDM_RSSI_INBAND_C_BITMSK 0x00ff
1097 #define IWLAGN_OFDM_RSSI_ALLBAND_C_BITMSK 0xff00
1098 #define IWLAGN_OFDM_RSSI_C_BIT_POS 0
1099 
1101  __le32 non_cfg_phy[IWLAGN_RX_RES_PHY_CNT]; /* up to 8 phy entries */
1102 } __packed;
1103 
1104 
1105 /*
1106  * REPLY_RX = 0xc3 (response only, not a command)
1107  * Used only for legacy (non 11n) frames.
1108  */
1110  u8 non_cfg_phy_cnt; /* non configurable DSP phy data byte count */
1111  u8 cfg_phy_cnt; /* configurable DSP phy data byte count */
1112  u8 stat_id; /* configurable DSP phy data set ID */
1114  __le64 timestamp; /* TSF at on air rise */
1115  __le32 beacon_time_stamp; /* beacon at on-air rise */
1116  __le16 phy_flags; /* general phy flags: band, modulation, ... */
1117  __le16 channel; /* channel number */
1118  u8 non_cfg_phy_buf[32]; /* for various implementations of non_cfg_phy */
1119  __le32 rate_n_flags; /* RATE_MCS_* */
1120  __le16 byte_count; /* frame's byte-count */
1121  __le16 frame_time; /* frame's time on the air */
1122 } __packed;
1123 
1127 } __packed;
1128 
1129 
1130 /******************************************************************************
1131  * (5)
1132  * Tx Commands & Responses:
1133  *
1134  * Driver must place each REPLY_TX command into one of the prioritized Tx
1135  * queues in host DRAM, shared between driver and device (see comments for
1136  * SCD registers and Tx/Rx Queues). When the device's Tx scheduler and uCode
1137  * are preparing to transmit, the device pulls the Tx command over the PCI
1138  * bus via one of the device's Tx DMA channels, to fill an internal FIFO
1139  * from which data will be transmitted.
1140  *
1141  * uCode handles all timing and protocol related to control frames
1142  * (RTS/CTS/ACK), based on flags in the Tx command. uCode and Tx scheduler
1143  * handle reception of block-acks; uCode updates the host driver via
1144  * REPLY_COMPRESSED_BA.
1145  *
1146  * uCode handles retrying Tx when an ACK is expected but not received.
1147  * This includes trying lower data rates than the one requested in the Tx
1148  * command, as set up by the REPLY_TX_LINK_QUALITY_CMD (agn).
1149  *
1150  * Driver sets up transmit power for various rates via REPLY_TX_PWR_TABLE_CMD.
1151  * This command must be executed after every RXON command, before Tx can occur.
1152  *****************************************************************************/
1153 
1154 /* REPLY_TX Tx flags field */
1155 
1156 /*
1157  * 1: Use RTS/CTS protocol or CTS-to-self if spec allows it
1158  * before this frame. if CTS-to-self required check
1159  * RXON_FLG_SELF_CTS_EN status.
1160  */
1161 #define TX_CMD_FLG_PROT_REQUIRE_MSK cpu_to_le32(1 << 0)
1162 
1163 /* 1: Expect ACK from receiving station
1164  * 0: Don't expect ACK (MAC header's duration field s/b 0)
1165  * Set this for unicast frames, but not broadcast/multicast. */
1166 #define TX_CMD_FLG_ACK_MSK cpu_to_le32(1 << 3)
1167 
1168 /* For agn devices:
1169  * 1: Use rate scale table (see REPLY_TX_LINK_QUALITY_CMD).
1170  * Tx command's initial_rate_index indicates first rate to try;
1171  * uCode walks through table for additional Tx attempts.
1172  * 0: Use Tx rate/MCS from Tx command's rate_n_flags field.
1173  * This rate will be used for all Tx attempts; it will not be scaled. */
1174 #define TX_CMD_FLG_STA_RATE_MSK cpu_to_le32(1 << 4)
1175 
1176 /* 1: Expect immediate block-ack.
1177  * Set when Txing a block-ack request frame. Also set TX_CMD_FLG_ACK_MSK. */
1178 #define TX_CMD_FLG_IMM_BA_RSP_MASK cpu_to_le32(1 << 6)
1179 
1180 /* Tx antenna selection field; reserved (0) for agn devices. */
1181 #define TX_CMD_FLG_ANT_SEL_MSK cpu_to_le32(0xf00)
1182 
1183 /* 1: Ignore Bluetooth priority for this frame.
1184  * 0: Delay Tx until Bluetooth device is done (normal usage). */
1185 #define TX_CMD_FLG_IGNORE_BT cpu_to_le32(1 << 12)
1186 
1187 /* 1: uCode overrides sequence control field in MAC header.
1188  * 0: Driver provides sequence control field in MAC header.
1189  * Set this for management frames, non-QOS data frames, non-unicast frames,
1190  * and also in Tx command embedded in REPLY_SCAN_CMD for active scans. */
1191 #define TX_CMD_FLG_SEQ_CTL_MSK cpu_to_le32(1 << 13)
1192 
1193 /* 1: This frame is non-last MPDU; more fragments are coming.
1194  * 0: Last fragment, or not using fragmentation. */
1195 #define TX_CMD_FLG_MORE_FRAG_MSK cpu_to_le32(1 << 14)
1196 
1197 /* 1: uCode calculates and inserts Timestamp Function (TSF) in outgoing frame.
1198  * 0: No TSF required in outgoing frame.
1199  * Set this for transmitting beacons and probe responses. */
1200 #define TX_CMD_FLG_TSF_MSK cpu_to_le32(1 << 16)
1201 
1202 /* 1: Driver inserted 2 bytes pad after the MAC header, for (required) dword
1203  * alignment of frame's payload data field.
1204  * 0: No pad
1205  * Set this for MAC headers with 26 or 30 bytes, i.e. those with QOS or ADDR4
1206  * field (but not both). Driver must align frame data (i.e. data following
1207  * MAC header) to DWORD boundary. */
1208 #define TX_CMD_FLG_MH_PAD_MSK cpu_to_le32(1 << 20)
1209 
1210 /* accelerate aggregation support
1211  * 0 - no CCMP encryption; 1 - CCMP encryption */
1212 #define TX_CMD_FLG_AGG_CCMP_MSK cpu_to_le32(1 << 22)
1213 
1214 /* HCCA-AP - disable duration overwriting. */
1215 #define TX_CMD_FLG_DUR_MSK cpu_to_le32(1 << 25)
1216 
1217 
1218 /*
1219  * TX command security control
1220  */
1221 #define TX_CMD_SEC_WEP 0x01
1222 #define TX_CMD_SEC_CCM 0x02
1223 #define TX_CMD_SEC_TKIP 0x03
1224 #define TX_CMD_SEC_MSK 0x03
1225 #define TX_CMD_SEC_SHIFT 6
1226 #define TX_CMD_SEC_KEY128 0x08
1227 
1228 /*
1229  * security overhead sizes
1230  */
1231 #define WEP_IV_LEN 4
1232 #define WEP_ICV_LEN 4
1233 #define CCMP_MIC_LEN 8
1234 #define TKIP_ICV_LEN 4
1235 
1236 /*
1237  * REPLY_TX = 0x1c (command)
1238  */
1239 
1240 /*
1241  * 4965 uCode updates these Tx attempt count values in host DRAM.
1242  * Used for managing Tx retries when expecting block-acks.
1243  * Driver should set these fields to 0.
1244  */
1246  u8 try_cnt; /* Tx attempts */
1247  u8 bt_kill_cnt; /* Tx attempts blocked by Bluetooth device */
1249 } __packed;
1250 
1251 struct iwl_tx_cmd {
1252  /*
1253  * MPDU byte count:
1254  * MAC header (24/26/30/32 bytes) + 2 bytes pad if 26/30 header size,
1255  * + 8 byte IV for CCM or TKIP (not used for WEP)
1256  * + Data payload
1257  * + 8-byte MIC (not used for CCM/WEP)
1258  * NOTE: Does not include Tx command bytes, post-MAC pad bytes,
1259  * MIC (CCM) 8 bytes, ICV (WEP/TKIP/CKIP) 4 bytes, CRC 4 bytes.i
1260  * Range: 14-2342 bytes.
1261  */
1263 
1264  /*
1265  * MPDU or MSDU byte count for next frame.
1266  * Used for fragmentation and bursting, but not 11n aggregation.
1267  * Same as "len", but for next frame. Set to 0 if not applicable.
1268  */
1270 
1271  __le32 tx_flags; /* TX_CMD_FLG_* */
1272 
1273  /* uCode may modify this field of the Tx command (in host DRAM!).
1274  * Driver must also set dram_lsb_ptr and dram_msb_ptr in this cmd. */
1276 
1277  /* Rate for *all* Tx attempts, if TX_CMD_FLG_STA_RATE_MSK is cleared. */
1278  __le32 rate_n_flags; /* RATE_MCS_* */
1279 
1280  /* Index of destination station in uCode's station table */
1282 
1283  /* Type of security encryption: CCM or TKIP */
1284  u8 sec_ctl; /* TX_CMD_SEC_* */
1285 
1286  /*
1287  * Index into rate table (see REPLY_TX_LINK_QUALITY_CMD) for initial
1288  * Tx attempt, if TX_CMD_FLG_STA_RATE_MSK is set. Normally "0" for
1289  * data frames, this field may be used to selectively reduce initial
1290  * rate (via non-0 value) for special frames (e.g. management), while
1291  * still supporting rate scaling for all frames.
1292  */
1295  u8 key[16];
1298  union {
1301  } stop_time;
1302 
1303  /* Host DRAM physical address pointer to "scratch" in this command.
1304  * Must be dword aligned. "0" in dram_lsb_ptr disables usage. */
1307 
1308  u8 rts_retry_limit; /*byte 50 */
1309  u8 data_retry_limit; /*byte 51 */
1311  union {
1314  } timeout;
1315 
1316  /*
1317  * Duration of EDCA burst Tx Opportunity, in 32-usec units.
1318  * Set this if txop time is not specified by HCCA protocol (e.g. by AP).
1319  */
1321 
1322  /*
1323  * MAC header goes here, followed by 2 bytes padding if MAC header
1324  * length is 26 or 30 bytes, followed by payload data
1325  */
1327  struct ieee80211_hdr hdr[0];
1328 } __packed;
1329 
1330 /*
1331  * TX command response is sent after *agn* transmission attempts.
1332  *
1333  * both postpone and abort status are expected behavior from uCode. there is
1334  * no special operation required from driver; except for RFKILL_FLUSH,
1335  * which required tx flush host command to flush all the tx frames in queues
1336  */
1337 enum {
1340  /* postpone TX */
1346  /* abort TX */
1364 };
1365 
1366 #define TX_PACKET_MODE_REGULAR 0x0000
1367 #define TX_PACKET_MODE_BURST_SEQ 0x0100
1368 #define TX_PACKET_MODE_BURST_FIRST 0x0200
1369 
1370 enum {
1372 };
1373 
1374 enum {
1375  TX_STATUS_MSK = 0x000000ff, /* bits 0:7 */
1376  TX_STATUS_DELAY_MSK = 0x00000040,
1377  TX_STATUS_ABORT_MSK = 0x00000080,
1378  TX_PACKET_MODE_MSK = 0x0000ff00, /* bits 8:15 */
1379  TX_FIFO_NUMBER_MSK = 0x00070000, /* bits 16:18 */
1380  TX_RESERVED = 0x00780000, /* bits 19:22 */
1381  TX_POWER_PA_DETECT_MSK = 0x7f800000, /* bits 23:30 */
1382  TX_ABORT_REQUIRED_MSK = 0x80000000, /* bits 31:31 */
1383 };
1384 
1385 /* *******************************
1386  * TX aggregation status
1387  ******************************* */
1388 
1389 enum {
1403 };
1404 
1405 #define AGG_TX_STATUS_MSK 0x00000fff /* bits 0:11 */
1406 #define AGG_TX_TRY_MSK 0x0000f000 /* bits 12:15 */
1407 
1408 #define AGG_TX_STATE_LAST_SENT_MSK (AGG_TX_STATE_LAST_SENT_TTL_MSK | \
1409  AGG_TX_STATE_LAST_SENT_TRY_CNT_MSK | \
1410  AGG_TX_STATE_LAST_SENT_BT_KILL_MSK)
1411 
1412 /* # tx attempts for first frame in aggregation */
1413 #define AGG_TX_STATE_TRY_CNT_POS 12
1414 #define AGG_TX_STATE_TRY_CNT_MSK 0xf000
1415 
1416 /* Command ID and sequence number of Tx command for this frame */
1417 #define AGG_TX_STATE_SEQ_NUM_POS 16
1418 #define AGG_TX_STATE_SEQ_NUM_MSK 0xffff0000
1419 
1420 /*
1421  * REPLY_TX = 0x1c (response)
1422  *
1423  * This response may be in one of two slightly different formats, indicated
1424  * by the frame_count field:
1425  *
1426  * 1) No aggregation (frame_count == 1). This reports Tx results for
1427  * a single frame. Multiple attempts, at various bit rates, may have
1428  * been made for this frame.
1429  *
1430  * 2) Aggregation (frame_count > 1). This reports Tx results for
1431  * 2 or more frames that used block-acknowledge. All frames were
1432  * transmitted at same rate. Rate scaling may have been used if first
1433  * frame in this new agg block failed in previous agg block(s).
1434  *
1435  * Note that, for aggregation, ACK (block-ack) status is not delivered here;
1436  * block-ack has not been received by the time the agn device records
1437  * this status.
1438  * This status relates to reasons the tx might have been blocked or aborted
1439  * within the sending station (this agn device), rather than whether it was
1440  * received successfully by the destination station.
1441  */
1442 struct agg_tx_status {
1443  __le16 status;
1444  __le16 sequence;
1445 } __packed;
1446 
1447 /*
1448  * definitions for initial rate index field
1449  * bits [3:0] initial rate index
1450  * bits [6:4] rate table color, used for the initial rate
1451  * bit-7 invalid rate indication
1452  * i.e. rate was not chosen from rate table
1453  * or rate table color was changed during frame retries
1454  * refer tlc rate info
1455  */
1456 
1457 #define IWL50_TX_RES_INIT_RATE_INDEX_POS 0
1458 #define IWL50_TX_RES_INIT_RATE_INDEX_MSK 0x0f
1459 #define IWL50_TX_RES_RATE_TABLE_COLOR_POS 4
1460 #define IWL50_TX_RES_RATE_TABLE_COLOR_MSK 0x70
1461 #define IWL50_TX_RES_INV_RATE_INDEX_MSK 0x80
1462 
1463 /* refer to ra_tid */
1464 #define IWLAGN_TX_RES_TID_POS 0
1465 #define IWLAGN_TX_RES_TID_MSK 0x0f
1466 #define IWLAGN_TX_RES_RA_POS 4
1467 #define IWLAGN_TX_RES_RA_MSK 0xf0
1468 
1470  u8 frame_count; /* 1 no aggregation, >1 aggregation */
1471  u8 bt_kill_count; /* # blocked by bluetooth (unused for agg) */
1472  u8 failure_rts; /* # failures due to unsuccessful RTS */
1473  u8 failure_frame; /* # failures due to no ACK (unused for agg) */
1474 
1475  /* For non-agg: Rate at which frame was successful.
1476  * For agg: Rate at which all frames were transmitted. */
1477  __le32 rate_n_flags; /* RATE_MCS_* */
1478 
1479  /* For non-agg: RTS + CTS + frame tx attempts time + ACK.
1480  * For agg: RTS + CTS + aggregation tx time + block-ack time. */
1482 
1483  u8 pa_status; /* RF power amplifier measurement (not used) */
1487 
1492  u8 ra_tid; /* tid (0:3), sta_id (4:7) */
1494  /*
1495  * For non-agg: frame status TX_STATUS_*
1496  * For agg: status of 1st frame, AGG_TX_STATE_*; other frame status
1497  * fields follow this one, up to frame_count.
1498  * Bit fields:
1499  * 11- 0: AGG_TX_STATE_* status code
1500  * 15-12: Retry count for 1st frame in aggregation (retries
1501  * occur if tx failed for this frame when it was a
1502  * member of a previous aggregation block). If rate
1503  * scaling is used, retry count indicates the rate
1504  * table entry used for all frames in the new agg.
1505  * 31-16: Sequence # for this frame's Tx cmd (not SSN!)
1506  */
1507  struct agg_tx_status status; /* TX status (in aggregation -
1508  * status of 1st frame) */
1509 } __packed;
1510 /*
1511  * REPLY_COMPRESSED_BA = 0xc5 (response only, not a command)
1512  *
1513  * Reports Block-Acknowledge from recipient station
1514  */
1519 
1520  /* Index of recipient (BA-sending) station in uCode's station table */
1527  u8 txed; /* number of frames sent */
1528  u8 txed_2_done; /* number of frames acked */
1529 } __packed;
1530 
1531 /*
1532  * REPLY_TX_PWR_TABLE_CMD = 0x97 (command, has simple generic response)
1533  *
1534  */
1535 
1536 /*RS_NEW_API: only TLC_RTS remains and moved to bit 0 */
1537 #define LINK_QUAL_FLAGS_SET_STA_TLC_RTS_MSK (1 << 0)
1538 
1539 /* # of EDCA prioritized tx fifos */
1540 #define LINK_QUAL_AC_NUM AC_NUM
1541 
1542 /* # entries in rate scale table to support Tx retries */
1543 #define LINK_QUAL_MAX_RETRY_NUM 16
1544 
1545 /* Tx antenna selection values */
1546 #define LINK_QUAL_ANT_A_MSK (1 << 0)
1547 #define LINK_QUAL_ANT_B_MSK (1 << 1)
1548 #define LINK_QUAL_ANT_MSK (LINK_QUAL_ANT_A_MSK|LINK_QUAL_ANT_B_MSK)
1549 
1550 
1558 
1559  /* No entries at or above this (driver chosen) index contain MIMO */
1561 
1562  /* Best single antenna to use for single stream (legacy, SISO). */
1563  u8 single_stream_ant_msk; /* LINK_QUAL_ANT_* */
1564 
1565  /* Best antennas to use for MIMO (unused for 4965, assumes both). */
1566  u8 dual_stream_ant_msk; /* LINK_QUAL_ANT_* */
1567 
1568  /*
1569  * If driver needs to use different initial rates for different
1570  * EDCA QOS access categories (as implemented by tx fifos 0-3),
1571  * this table will set that up, by indicating the indexes in the
1572  * rs_table[LINK_QUAL_MAX_RETRY_NUM] rate table at which to start.
1573  * Otherwise, driver should set all entries to 0.
1574  *
1575  * Entry usage:
1576  * 0 = Background, 1 = Best Effort (normal), 2 = Video, 3 = Voice
1577  * TX FIFOs above 3 use same value (typically 0) as TX FIFO 3.
1578  */
1580 } __packed;
1581 
1582 #define LINK_QUAL_AGG_TIME_LIMIT_DEF (4000) /* 4 milliseconds */
1583 #define LINK_QUAL_AGG_TIME_LIMIT_MAX (8000)
1584 #define LINK_QUAL_AGG_TIME_LIMIT_MIN (100)
1585 
1586 #define LINK_QUAL_AGG_DISABLE_START_DEF (3)
1587 #define LINK_QUAL_AGG_DISABLE_START_MAX (255)
1588 #define LINK_QUAL_AGG_DISABLE_START_MIN (0)
1589 
1590 #define LINK_QUAL_AGG_FRAME_LIMIT_DEF (63)
1591 #define LINK_QUAL_AGG_FRAME_LIMIT_MAX (63)
1592 #define LINK_QUAL_AGG_FRAME_LIMIT_MIN (0)
1593 
1600 
1601  /*
1602  *Maximum number of uSec in aggregation.
1603  * default set to 4000 (4 milliseconds) if not configured in .cfg
1604  */
1606 
1607  /*
1608  * Number of Tx retries allowed for a frame, before that frame will
1609  * no longer be considered for the start of an aggregation sequence
1610  * (scheduler will then try to tx it as single frame).
1611  * Driver should set this to 3.
1612  */
1614 
1615  /*
1616  * Maximum number of frames in aggregation.
1617  * 0 = no limit (default). 1 = no aggregation.
1618  * Other values = max # frames in aggregation.
1619  */
1621 
1623 } __packed;
1624 
1625 /*
1626  * REPLY_TX_LINK_QUALITY_CMD = 0x4e (command, has simple generic response)
1627  *
1628  * For agn devices
1629  *
1630  * Each station in the agn device's internal station table has its own table
1631  * of 16
1632  * Tx rates and modulation modes (e.g. legacy/SISO/MIMO) for retrying Tx when
1633  * an ACK is not received. This command replaces the entire table for
1634  * one station.
1635  *
1636  * NOTE: Station must already be in agn device's station table.
1637  * Use REPLY_ADD_STA.
1638  *
1639  * The rate scaling procedures described below work well. Of course, other
1640  * procedures are possible, and may work better for particular environments.
1641  *
1642  *
1643  * FILLING THE RATE TABLE
1644  *
1645  * Given a particular initial rate and mode, as determined by the rate
1646  * scaling algorithm described below, the Linux driver uses the following
1647  * formula to fill the rs_table[LINK_QUAL_MAX_RETRY_NUM] rate table in the
1648  * Link Quality command:
1649  *
1650  *
1651  * 1) If using High-throughput (HT) (SISO or MIMO) initial rate:
1652  * a) Use this same initial rate for first 3 entries.
1653  * b) Find next lower available rate using same mode (SISO or MIMO),
1654  * use for next 3 entries. If no lower rate available, switch to
1655  * legacy mode (no HT40 channel, no MIMO, no short guard interval).
1656  * c) If using MIMO, set command's mimo_delimiter to number of entries
1657  * using MIMO (3 or 6).
1658  * d) After trying 2 HT rates, switch to legacy mode (no HT40 channel,
1659  * no MIMO, no short guard interval), at the next lower bit rate
1660  * (e.g. if second HT bit rate was 54, try 48 legacy), and follow
1661  * legacy procedure for remaining table entries.
1662  *
1663  * 2) If using legacy initial rate:
1664  * a) Use the initial rate for only one entry.
1665  * b) For each following entry, reduce the rate to next lower available
1666  * rate, until reaching the lowest available rate.
1667  * c) When reducing rate, also switch antenna selection.
1668  * d) Once lowest available rate is reached, repeat this rate until
1669  * rate table is filled (16 entries), switching antenna each entry.
1670  *
1671  *
1672  * ACCUMULATING HISTORY
1673  *
1674  * The rate scaling algorithm for agn devices, as implemented in Linux driver,
1675  * uses two sets of frame Tx success history: One for the current/active
1676  * modulation mode, and one for a speculative/search mode that is being
1677  * attempted. If the speculative mode turns out to be more effective (i.e.
1678  * actual transfer rate is better), then the driver continues to use the
1679  * speculative mode as the new current active mode.
1680  *
1681  * Each history set contains, separately for each possible rate, data for a
1682  * sliding window of the 62 most recent tx attempts at that rate. The data
1683  * includes a shifting bitmap of success(1)/failure(0), and sums of successful
1684  * and attempted frames, from which the driver can additionally calculate a
1685  * success ratio (success / attempted) and number of failures
1686  * (attempted - success), and control the size of the window (attempted).
1687  * The driver uses the bit map to remove successes from the success sum, as
1688  * the oldest tx attempts fall out of the window.
1689  *
1690  * When the agn device makes multiple tx attempts for a given frame, each
1691  * attempt might be at a different rate, and have different modulation
1692  * characteristics (e.g. antenna, fat channel, short guard interval), as set
1693  * up in the rate scaling table in the Link Quality command. The driver must
1694  * determine which rate table entry was used for each tx attempt, to determine
1695  * which rate-specific history to update, and record only those attempts that
1696  * match the modulation characteristics of the history set.
1697  *
1698  * When using block-ack (aggregation), all frames are transmitted at the same
1699  * rate, since there is no per-attempt acknowledgment from the destination
1700  * station. The Tx response struct iwl_tx_resp indicates the Tx rate in
1701  * rate_n_flags field. After receiving a block-ack, the driver can update
1702  * history for the entire block all at once.
1703  *
1704  *
1705  * FINDING BEST STARTING RATE:
1706  *
1707  * When working with a selected initial modulation mode (see below), the
1708  * driver attempts to find a best initial rate. The initial rate is the
1709  * first entry in the Link Quality command's rate table.
1710  *
1711  * 1) Calculate actual throughput (success ratio * expected throughput, see
1712  * table below) for current initial rate. Do this only if enough frames
1713  * have been attempted to make the value meaningful: at least 6 failed
1714  * tx attempts, or at least 8 successes. If not enough, don't try rate
1715  * scaling yet.
1716  *
1717  * 2) Find available rates adjacent to current initial rate. Available means:
1718  * a) supported by hardware &&
1719  * b) supported by association &&
1720  * c) within any constraints selected by user
1721  *
1722  * 3) Gather measured throughputs for adjacent rates. These might not have
1723  * enough history to calculate a throughput. That's okay, we might try
1724  * using one of them anyway!
1725  *
1726  * 4) Try decreasing rate if, for current rate:
1727  * a) success ratio is < 15% ||
1728  * b) lower adjacent rate has better measured throughput ||
1729  * c) higher adjacent rate has worse throughput, and lower is unmeasured
1730  *
1731  * As a sanity check, if decrease was determined above, leave rate
1732  * unchanged if:
1733  * a) lower rate unavailable
1734  * b) success ratio at current rate > 85% (very good)
1735  * c) current measured throughput is better than expected throughput
1736  * of lower rate (under perfect 100% tx conditions, see table below)
1737  *
1738  * 5) Try increasing rate if, for current rate:
1739  * a) success ratio is < 15% ||
1740  * b) both adjacent rates' throughputs are unmeasured (try it!) ||
1741  * b) higher adjacent rate has better measured throughput ||
1742  * c) lower adjacent rate has worse throughput, and higher is unmeasured
1743  *
1744  * As a sanity check, if increase was determined above, leave rate
1745  * unchanged if:
1746  * a) success ratio at current rate < 70%. This is not particularly
1747  * good performance; higher rate is sure to have poorer success.
1748  *
1749  * 6) Re-evaluate the rate after each tx frame. If working with block-
1750  * acknowledge, history and statistics may be calculated for the entire
1751  * block (including prior history that fits within the history windows),
1752  * before re-evaluation.
1753  *
1754  * FINDING BEST STARTING MODULATION MODE:
1755  *
1756  * After working with a modulation mode for a "while" (and doing rate scaling),
1757  * the driver searches for a new initial mode in an attempt to improve
1758  * throughput. The "while" is measured by numbers of attempted frames:
1759  *
1760  * For legacy mode, search for new mode after:
1761  * 480 successful frames, or 160 failed frames
1762  * For high-throughput modes (SISO or MIMO), search for new mode after:
1763  * 4500 successful frames, or 400 failed frames
1764  *
1765  * Mode switch possibilities are (3 for each mode):
1766  *
1767  * For legacy:
1768  * Change antenna, try SISO (if HT association), try MIMO (if HT association)
1769  * For SISO:
1770  * Change antenna, try MIMO, try shortened guard interval (SGI)
1771  * For MIMO:
1772  * Try SISO antenna A, SISO antenna B, try shortened guard interval (SGI)
1773  *
1774  * When trying a new mode, use the same bit rate as the old/current mode when
1775  * trying antenna switches and shortened guard interval. When switching to
1776  * SISO from MIMO or legacy, or to MIMO from SISO or legacy, use a rate
1777  * for which the expected throughput (under perfect conditions) is about the
1778  * same or slightly better than the actual measured throughput delivered by
1779  * the old/current mode.
1780  *
1781  * Actual throughput can be estimated by multiplying the expected throughput
1782  * by the success ratio (successful / attempted tx frames). Frame size is
1783  * not considered in this calculation; it assumes that frame size will average
1784  * out to be fairly consistent over several samples. The following are
1785  * metric values for expected throughput assuming 100% success ratio.
1786  * Only G band has support for CCK rates:
1787  *
1788  * RATE: 1 2 5 11 6 9 12 18 24 36 48 54 60
1789  *
1790  * G: 7 13 35 58 40 57 72 98 121 154 177 186 186
1791  * A: 0 0 0 0 40 57 72 98 121 154 177 186 186
1792  * SISO 20MHz: 0 0 0 0 42 42 76 102 124 159 183 193 202
1793  * SGI SISO 20MHz: 0 0 0 0 46 46 82 110 132 168 192 202 211
1794  * MIMO 20MHz: 0 0 0 0 74 74 123 155 179 214 236 244 251
1795  * SGI MIMO 20MHz: 0 0 0 0 81 81 131 164 188 222 243 251 257
1796  * SISO 40MHz: 0 0 0 0 77 77 127 160 184 220 242 250 257
1797  * SGI SISO 40MHz: 0 0 0 0 83 83 135 169 193 229 250 257 264
1798  * MIMO 40MHz: 0 0 0 0 123 123 182 214 235 264 279 285 289
1799  * SGI MIMO 40MHz: 0 0 0 0 131 131 191 222 242 270 284 289 293
1800  *
1801  * After the new mode has been tried for a short while (minimum of 6 failed
1802  * frames or 8 successful frames), compare success ratio and actual throughput
1803  * estimate of the new mode with the old. If either is better with the new
1804  * mode, continue to use the new mode.
1805  *
1806  * Continue comparing modes until all 3 possibilities have been tried.
1807  * If moving from legacy to HT, try all 3 possibilities from the new HT
1808  * mode. After trying all 3, a best mode is found. Continue to use this mode
1809  * for the longer "while" described above (e.g. 480 successful frames for
1810  * legacy), and then repeat the search process.
1811  *
1812  */
1814 
1815  /* Index of destination/recipient station in uCode's station table */
1818  __le16 control; /* not used */
1821 
1822  /*
1823  * Rate info; when using rate-scaling, Tx command's initial_rate_index
1824  * specifies 1st Tx rate attempted, via index into this table.
1825  * agn devices works its way through table when retrying Tx.
1826  */
1827  struct {
1828  __le32 rate_n_flags; /* RATE_MCS_*, IWL_RATE_* */
1831 } __packed;
1832 
1833 /*
1834  * BT configuration enable flags:
1835  * bit 0 - 1: BT channel announcement enabled
1836  * 0: disable
1837  * bit 1 - 1: priority of BT device enabled
1838  * 0: disable
1839  * bit 2 - 1: BT 2 wire support enabled
1840  * 0: disable
1841  */
1842 #define BT_COEX_DISABLE (0x0)
1843 #define BT_ENABLE_CHANNEL_ANNOUNCE BIT(0)
1844 #define BT_ENABLE_PRIORITY BIT(1)
1845 #define BT_ENABLE_2_WIRE BIT(2)
1846 
1847 #define BT_COEX_DISABLE (0x0)
1848 #define BT_COEX_ENABLE (BT_ENABLE_CHANNEL_ANNOUNCE | BT_ENABLE_PRIORITY)
1849 
1850 #define BT_LEAD_TIME_MIN (0x0)
1851 #define BT_LEAD_TIME_DEF (0x1E)
1852 #define BT_LEAD_TIME_MAX (0xFF)
1853 
1854 #define BT_MAX_KILL_MIN (0x1)
1855 #define BT_MAX_KILL_DEF (0x5)
1856 #define BT_MAX_KILL_MAX (0xFF)
1857 
1858 #define BT_DURATION_LIMIT_DEF 625
1859 #define BT_DURATION_LIMIT_MAX 1250
1860 #define BT_DURATION_LIMIT_MIN 625
1861 
1862 #define BT_ON_THRESHOLD_DEF 4
1863 #define BT_ON_THRESHOLD_MAX 1000
1864 #define BT_ON_THRESHOLD_MIN 1
1865 
1866 #define BT_FRAG_THRESHOLD_DEF 0
1867 #define BT_FRAG_THRESHOLD_MAX 0
1868 #define BT_FRAG_THRESHOLD_MIN 0
1869 
1870 #define BT_AGG_THRESHOLD_DEF 1200
1871 #define BT_AGG_THRESHOLD_MAX 8000
1872 #define BT_AGG_THRESHOLD_MIN 400
1873 
1874 /*
1875  * REPLY_BT_CONFIG = 0x9b (command, has simple generic response)
1876  *
1877  * agn devices support hardware handshake with Bluetooth device on
1878  * same platform. Bluetooth device alerts wireless device when it will Tx;
1879  * wireless device can delay or kill its own Tx to accommodate.
1880  */
1881 struct iwl_bt_cmd {
1888 } __packed;
1889 
1890 #define IWLAGN_BT_FLAG_CHANNEL_INHIBITION BIT(0)
1891 
1892 #define IWLAGN_BT_FLAG_COEX_MODE_MASK (BIT(3)|BIT(4)|BIT(5))
1893 #define IWLAGN_BT_FLAG_COEX_MODE_SHIFT 3
1894 #define IWLAGN_BT_FLAG_COEX_MODE_DISABLED 0
1895 #define IWLAGN_BT_FLAG_COEX_MODE_LEGACY_2W 1
1896 #define IWLAGN_BT_FLAG_COEX_MODE_3W 2
1897 #define IWLAGN_BT_FLAG_COEX_MODE_4W 3
1898 
1899 #define IWLAGN_BT_FLAG_UCODE_DEFAULT BIT(6)
1900 /* Disable Sync PSPoll on SCO/eSCO */
1901 #define IWLAGN_BT_FLAG_SYNC_2_BT_DISABLE BIT(7)
1902 
1903 #define IWLAGN_BT_PSP_MIN_RSSI_THRESHOLD -75 /* dBm */
1904 #define IWLAGN_BT_PSP_MAX_RSSI_THRESHOLD -65 /* dBm */
1905 
1906 #define IWLAGN_BT_PRIO_BOOST_MAX 0xFF
1907 #define IWLAGN_BT_PRIO_BOOST_MIN 0x00
1908 #define IWLAGN_BT_PRIO_BOOST_DEFAULT 0xF0
1909 #define IWLAGN_BT_PRIO_BOOST_DEFAULT32 0xF0F0F0F0
1910 
1911 #define IWLAGN_BT_MAX_KILL_DEFAULT 5
1912 
1913 #define IWLAGN_BT3_T7_DEFAULT 1
1914 
1919 };
1920 
1921 #define IWLAGN_BT_KILL_ACK_MASK_DEFAULT cpu_to_le32(0xffff0000)
1922 #define IWLAGN_BT_KILL_CTS_MASK_DEFAULT cpu_to_le32(0xffff0000)
1923 #define IWLAGN_BT_KILL_ACK_CTS_MASK_SCO cpu_to_le32(0xffffffff)
1924 #define IWLAGN_BT_KILL_ACK_CTS_MASK_REDUCE cpu_to_le32(0)
1925 
1926 #define IWLAGN_BT3_PRIO_SAMPLE_DEFAULT 2
1927 
1928 #define IWLAGN_BT3_T2_DEFAULT 0xc
1929 
1930 #define IWLAGN_BT_VALID_ENABLE_FLAGS cpu_to_le16(BIT(0))
1931 #define IWLAGN_BT_VALID_BOOST cpu_to_le16(BIT(1))
1932 #define IWLAGN_BT_VALID_MAX_KILL cpu_to_le16(BIT(2))
1933 #define IWLAGN_BT_VALID_3W_TIMERS cpu_to_le16(BIT(3))
1934 #define IWLAGN_BT_VALID_KILL_ACK_MASK cpu_to_le16(BIT(4))
1935 #define IWLAGN_BT_VALID_KILL_CTS_MASK cpu_to_le16(BIT(5))
1936 #define IWLAGN_BT_VALID_REDUCED_TX_PWR cpu_to_le16(BIT(6))
1937 #define IWLAGN_BT_VALID_3W_LUT cpu_to_le16(BIT(7))
1938 
1939 #define IWLAGN_BT_ALL_VALID_MSK (IWLAGN_BT_VALID_ENABLE_FLAGS | \
1940  IWLAGN_BT_VALID_BOOST | \
1941  IWLAGN_BT_VALID_MAX_KILL | \
1942  IWLAGN_BT_VALID_3W_TIMERS | \
1943  IWLAGN_BT_VALID_KILL_ACK_MASK | \
1944  IWLAGN_BT_VALID_KILL_CTS_MASK | \
1945  IWLAGN_BT_VALID_REDUCED_TX_PWR | \
1946  IWLAGN_BT_VALID_3W_LUT)
1947 
1948 #define IWLAGN_BT_REDUCED_TX_PWR BIT(0)
1949 
1950 #define IWLAGN_BT_DECISION_LUT_SIZE 12
1951 
1954  u8 ledtime; /* unused */
1963  /*
1964  * bit 0: use reduced tx power for control frame
1965  * bit 1 - 7: reserved
1966  */
1970 };
1971 
1975  /*
1976  * set IWLAGN_BT_VALID_BOOST to "1" in "valid" bitmask
1977  * if configure the following patterns
1978  */
1979  u8 tx_prio_boost; /* SW boost of WiFi tx priority */
1980  __le16 rx_prio_boost; /* SW boost of WiFi rx priority */
1981 };
1982 
1986  /*
1987  * set IWLAGN_BT_VALID_BOOST to "1" in "valid" bitmask
1988  * if configure the following patterns
1989  */
1991  u8 tx_prio_boost; /* SW boost of WiFi tx priority */
1992  __le16 rx_prio_boost; /* SW boost of WiFi rx priority */
1993 };
1994 
1995 #define IWLAGN_BT_SCO_ACTIVE cpu_to_le32(BIT(0))
1996 
1999 };
2000 
2001 /******************************************************************************
2002  * (6)
2003  * Spectrum Management (802.11h) Commands, Responses, Notifications:
2004  *
2005  *****************************************************************************/
2006 
2007 /*
2008  * Spectrum Management
2009  */
2010 #define MEASUREMENT_FILTER_FLAG (RXON_FILTER_PROMISC_MSK | \
2011  RXON_FILTER_CTL2HOST_MSK | \
2012  RXON_FILTER_ACCEPT_GRP_MSK | \
2013  RXON_FILTER_DIS_DECRYPT_MSK | \
2014  RXON_FILTER_DIS_GRP_DECRYPT_MSK | \
2015  RXON_FILTER_ASSOC_MSK | \
2016  RXON_FILTER_BCON_AWARE_MSK)
2017 
2019  __le32 duration; /* measurement duration in extended beacon
2020  * format */
2021  u8 channel; /* channel to measure */
2022  u8 type; /* see enum iwl_measure_type */
2024 } __packed;
2025 
2026 /*
2027  * REPLY_SPECTRUM_MEASUREMENT_CMD = 0x74 (command)
2028  */
2030  __le16 len; /* number of bytes starting from token */
2031  u8 token; /* token id */
2032  u8 id; /* measurement id -- 0 or 1 */
2033  u8 origin; /* 0 = TGh, 1 = other, 2 = TGk */
2034  u8 periodic; /* 1 = periodic */
2036  __le32 start_time; /* start time in extended beacon format */
2038  __le32 flags; /* rxon flags */
2039  __le32 filter_flags; /* rxon filter flags */
2040  __le16 channel_count; /* minimum 1, maximum 10 */
2043 } __packed;
2044 
2045 /*
2046  * REPLY_SPECTRUM_MEASUREMENT_CMD = 0x74 (response)
2047  */
2050  u8 id; /* id of the prior command replaced, or 0xff */
2051  __le16 status; /* 0 - command will be handled
2052  * 1 - cannot handle (conflicts with another
2053  * measurement) */
2054 } __packed;
2055 
2059 };
2060 
2066  /* 4-5 reserved */
2070 };
2071 
2072 #define NUM_ELEMENTS_IN_HISTOGRAM 8
2073 
2075  __le32 ofdm[NUM_ELEMENTS_IN_HISTOGRAM]; /* in 0.8usec counts */
2076  __le32 cck[NUM_ELEMENTS_IN_HISTOGRAM]; /* in 1usec counts */
2077 } __packed;
2078 
2079 /* clear channel availability counters */
2083 } __packed;
2084 
2086  IWL_MEASURE_BASIC = (1 << 0),
2090  IWL_MEASURE_FRAME = (1 << 4),
2091  /* bits 5:6 are reserved */
2092  IWL_MEASURE_IDLE = (1 << 7),
2093 };
2094 
2095 /*
2096  * SPECTRUM_MEASURE_NOTIFICATION = 0x75 (notification only, not a command)
2097  */
2099  u8 id; /* measurement id -- 0 or 1 */
2101  u8 channel_index; /* index in measurement channel list */
2102  u8 state; /* 0 - start, 1 - stop */
2103  __le32 start_time; /* lower 32-bits of TSF */
2104  u8 band; /* 0 - 5.2GHz, 1 - 2.4GHz */
2106  u8 type; /* see enum iwl_measurement_type */
2108  /* NOTE: cca_ofdm, cca_cck, basic_type, and histogram are only only
2109  * valid if applicable for measurement type requested. */
2110  __le32 cca_ofdm; /* cca fraction time in 40Mhz clock periods */
2111  __le32 cca_cck; /* cca fraction time in 44Mhz clock periods */
2112  __le32 cca_time; /* channel load time in usecs */
2113  u8 basic_type; /* 0 - bss, 1 - ofdm preamble, 2 -
2114  * unidentified */
2117  __le32 stop_time; /* lower 32-bits of TSF */
2118  __le32 status; /* see iwl_measurement_status */
2119 } __packed;
2120 
2121 /******************************************************************************
2122  * (7)
2123  * Power Management Commands, Responses, Notifications:
2124  *
2125  *****************************************************************************/
2126 
2162 #define IWL_POWER_VEC_SIZE 5
2163 
2164 #define IWL_POWER_DRIVER_ALLOW_SLEEP_MSK cpu_to_le16(BIT(0))
2165 #define IWL_POWER_POWER_SAVE_ENA_MSK cpu_to_le16(BIT(0))
2166 #define IWL_POWER_POWER_MANAGEMENT_ENA_MSK cpu_to_le16(BIT(1))
2167 #define IWL_POWER_SLEEP_OVER_DTIM_MSK cpu_to_le16(BIT(2))
2168 #define IWL_POWER_PCI_PM_MSK cpu_to_le16(BIT(3))
2169 #define IWL_POWER_FAST_PD cpu_to_le16(BIT(4))
2170 #define IWL_POWER_BEACON_FILTERING cpu_to_le16(BIT(5))
2171 #define IWL_POWER_SHADOW_REG_ENA cpu_to_le16(BIT(6))
2172 #define IWL_POWER_CT_KILL_SET cpu_to_le16(BIT(7))
2173 #define IWL_POWER_BT_SCO_ENA cpu_to_le16(BIT(8))
2174 #define IWL_POWER_ADVANCE_PM_ENA_MSK cpu_to_le16(BIT(9))
2175 
2184 } __packed;
2185 
2186 /*
2187  * PM_SLEEP_NOTIFICATION = 0x7A (notification only, not a command)
2188  * all devices identical.
2189  */
2197 } __packed;
2198 
2199 /* Sleep states. all devices identical. */
2200 enum {
2210  /* 3 reserved */
2212 };
2213 
2214 /*
2215  * REPLY_CARD_STATE_CMD = 0xa0 (command, has simple generic response)
2216  */
2217 #define CARD_STATE_CMD_DISABLE 0x00 /* Put card to sleep */
2218 #define CARD_STATE_CMD_ENABLE 0x01 /* Wake up card */
2219 #define CARD_STATE_CMD_HALT 0x02 /* Power down permanently */
2221  __le32 status; /* CARD_STATE_CMD_* request new power state */
2222 } __packed;
2223 
2224 /*
2225  * CARD_STATE_NOTIFICATION = 0xa1 (notification only, not a command)
2226  */
2229 } __packed;
2230 
2231 #define HW_CARD_DISABLED 0x01
2232 #define SW_CARD_DISABLED 0x02
2233 #define CT_CARD_DISABLED 0x04
2234 #define RXON_CARD_DISABLED 0x10
2235 
2240 } __packed;
2241 
2242 /* 1000, and 6x00 */
2247 } __packed;
2248 
2249 /******************************************************************************
2250  * (8)
2251  * Scan Commands, Responses, Notifications:
2252  *
2253  *****************************************************************************/
2254 
2255 #define SCAN_CHANNEL_TYPE_PASSIVE cpu_to_le32(0)
2256 #define SCAN_CHANNEL_TYPE_ACTIVE cpu_to_le32(1)
2257 
2279  /*
2280  * type is defined as:
2281  * 0:0 1 = active, 0 = passive
2282  * 1:20 SSID direct bit map; if a bit is set, then corresponding
2283  * SSID IE is transmitted in probe request.
2284  * 21:31 reserved
2285  */
2287  __le16 channel; /* band is selected by iwl_scan_cmd "flags" field */
2288  u8 tx_gain; /* gain for analog radio */
2289  u8 dsp_atten; /* gain for DSP */
2290  __le16 active_dwell; /* in 1024-uSec TU (time units), typ 5-50 */
2291  __le16 passive_dwell; /* in 1024-uSec TU (time units), typ 20-500 */
2292 } __packed;
2293 
2294 /* set number of direct probes __le32 type */
2295 #define IWL_SCAN_PROBE_MASK(n) cpu_to_le32((BIT(n) | (BIT(n) - BIT(1))))
2296 
2305 struct iwl_ssid_ie {
2308  u8 ssid[32];
2309 } __packed;
2310 
2311 #define PROBE_OPTION_MAX 20
2312 #define TX_CMD_LIFE_TIME_INFINITE cpu_to_le32(0xFFFFFFFF)
2313 #define IWL_GOOD_CRC_TH_DISABLED 0
2314 #define IWL_GOOD_CRC_TH_DEFAULT cpu_to_le16(1)
2315 #define IWL_GOOD_CRC_TH_NEVER cpu_to_le16(0xffff)
2316 #define IWL_MAX_CMD_SIZE 4096
2317 
2318 /*
2319  * REPLY_SCAN_CMD = 0x80 (command)
2320  *
2321  * The hardware scan command is very powerful; the driver can set it up to
2322  * maintain (relatively) normal network traffic while doing a scan in the
2323  * background. The max_out_time and suspend_time control the ratio of how
2324  * long the device stays on an associated network channel ("service channel")
2325  * vs. how long it's away from the service channel, i.e. tuned to other channels
2326  * for scanning.
2327  *
2328  * max_out_time is the max time off-channel (in usec), and suspend_time
2329  * is how long (in "extended beacon" format) that the scan is "suspended"
2330  * after returning to the service channel. That is, suspend_time is the
2331  * time that we stay on the service channel, doing normal work, between
2332  * scan segments. The driver may set these parameters differently to support
2333  * scanning when associated vs. not associated, and light vs. heavy traffic
2334  * loads when associated.
2335  *
2336  * After receiving this command, the device's scan engine does the following;
2337  *
2338  * 1) Sends SCAN_START notification to driver
2339  * 2) Checks to see if it has time to do scan for one channel
2340  * 3) Sends NULL packet, with power-save (PS) bit set to 1,
2341  * to tell AP that we're going off-channel
2342  * 4) Tunes to first channel in scan list, does active or passive scan
2343  * 5) Sends SCAN_RESULT notification to driver
2344  * 6) Checks to see if it has time to do scan on *next* channel in list
2345  * 7) Repeats 4-6 until it no longer has time to scan the next channel
2346  * before max_out_time expires
2347  * 8) Returns to service channel
2348  * 9) Sends NULL packet with PS=0 to tell AP that we're back
2349  * 10) Stays on service channel until suspend_time expires
2350  * 11) Repeats entire process 2-10 until list is complete
2351  * 12) Sends SCAN_COMPLETE notification
2352  *
2353  * For fast, efficient scans, the scan command also has support for staying on
2354  * a channel for just a short time, if doing active scanning and getting no
2355  * responses to the transmitted probe request. This time is controlled by
2356  * quiet_time, and the number of received packets below which a channel is
2357  * considered "quiet" is controlled by quiet_plcp_threshold.
2358  *
2359  * For active scanning on channels that have regulatory restrictions against
2360  * blindly transmitting, the scan can listen before transmitting, to make sure
2361  * that there is already legitimate activity on the channel. If enough
2362  * packets are cleanly received on the channel (controlled by good_CRC_th,
2363  * typical value 1), the scan engine starts transmitting probe requests.
2364  *
2365  * Driver must use separate scan commands for 2.4 vs. 5 GHz bands.
2366  *
2367  * To avoid uCode errors, see timing restrictions described under
2368  * struct iwl_scan_channel.
2369  */
2370 
2372  /* BIT(0) currently unused */
2374  /* bits 2-7 reserved */
2375 };
2376 
2379  u8 scan_flags; /* scan flags: see enum iwl_scan_flags */
2380  u8 channel_count; /* # channels in channel list */
2381  __le16 quiet_time; /* dwell only this # millisecs on quiet channel
2382  * (only for active scan) */
2383  __le16 quiet_plcp_th; /* quiet chnl is < this # pkts (typ. 1) */
2384  __le16 good_CRC_th; /* passive -> active promotion threshold */
2385  __le16 rx_chain; /* RXON_RX_CHAIN_* */
2386  __le32 max_out_time; /* max usec to be away from associated (service)
2387  * channel */
2388  __le32 suspend_time; /* pause scan this long (in "extended beacon
2389  * format") when returning to service chnl:
2390  */
2391  __le32 flags; /* RXON_FLG_* */
2392  __le32 filter_flags; /* RXON_FILTER_* */
2393 
2394  /* For active scans (set to all-0s for passive scans).
2395  * Does not include payload. Must specify Tx rate; no rate scaling. */
2397 
2398  /* For directed active scans (set to all-0s otherwise) */
2400 
2401  /*
2402  * Probe request frame, followed by channel list.
2403  *
2404  * Size of probe request frame is specified by byte count in tx_cmd.
2405  * Channel list follows immediately after probe request frame.
2406  * Number of channels in list is specified by channel_count.
2407  * Each channel in list is of type:
2408  *
2409  * struct iwl_scan_channel channels[0];
2410  *
2411  * NOTE: Only one band of channels can be scanned per pass. You
2412  * must not mix 2.4GHz channels and 5.2GHz channels, and you must wait
2413  * for one scan to complete (i.e. receive SCAN_COMPLETE_NOTIFICATION)
2414  * before requesting another scan.
2415  */
2416  u8 data[0];
2417 } __packed;
2418 
2419 /* Can abort will notify by complete notification with abort status. */
2420 #define CAN_ABORT_STATUS cpu_to_le32(0x1)
2421 /* complete notification statuses */
2422 #define ABORT_STATUS 0x2
2423 
2424 /*
2425  * REPLY_SCAN_CMD = 0x80 (response)
2426  */
2428  __le32 status; /* 1: okay, 2: cannot fulfill request */
2429 } __packed;
2430 
2431 /*
2432  * SCAN_START_NOTIFICATION = 0x82 (notification only, not a command)
2433  */
2442 } __packed;
2443 
2444 #define SCAN_OWNER_STATUS 0x1
2445 #define MEASURE_OWNER_STATUS 0x2
2446 
2447 #define IWL_PROBE_STATUS_OK 0
2448 #define IWL_PROBE_STATUS_TX_FAILED BIT(0)
2449 /* error statuses combined with TX_FAILED */
2450 #define IWL_PROBE_STATUS_FAIL_TTL BIT(1)
2451 #define IWL_PROBE_STATUS_FAIL_BT BIT(2)
2452 
2453 #define NUMBER_OF_STATISTICS 1 /* first __le32 is good CRC */
2454 /*
2455  * SCAN_RESULTS_NOTIFICATION = 0x83 (notification only, not a command)
2456  */
2461  u8 num_probe_not_sent; /* not enough time to send */
2465 } __packed;
2466 
2467 /*
2468  * SCAN_COMPLETE_NOTIFICATION = 0x84 (notification only, not a command)
2469  */
2473  u8 bt_status; /* BT On/Off status */
2477 } __packed;
2478 
2479 
2480 /******************************************************************************
2481  * (9)
2482  * IBSS/AP Commands and Notifications:
2483  *
2484  *****************************************************************************/
2485 
2489 };
2490 
2491 /*
2492  * BEACON_NOTIFICATION = 0x90 (notification only, not a command)
2493  */
2494 
2500 } __packed;
2501 
2502 /*
2503  * REPLY_TX_BEACON = 0x91 (command, has simple generic response)
2504  */
2505 
2507  struct iwl_tx_cmd tx;
2511  struct ieee80211_hdr frame[0]; /* beacon frame */
2512 } __packed;
2513 
2514 /******************************************************************************
2515  * (10)
2516  * Statistics Commands and Notifications:
2517  *
2518  *****************************************************************************/
2519 
2520 #define IWL_TEMP_CONVERT 260
2521 
2522 #define SUP_RATE_11A_MAX_NUM_CHANNELS 8
2523 #define SUP_RATE_11B_MAX_NUM_CHANNELS 4
2524 #define SUP_RATE_11G_MAX_NUM_CHANNELS 12
2525 
2526 /* Used for passing to driver number of successes and failures per rate */
2527 struct rate_histogram {
2528  union {
2532  } success;
2533  union {
2537  } failed;
2538 } __packed;
2539 
2540 /* statistics command response */
2541 
2547 } __packed;
2548 
2570 } __packed;
2571 
2583 } __packed;
2584 
2585 #define INTERFERENCE_DATA_AVAILABLE cpu_to_le32(1)
2586 
2588  __le32 bogus_cts; /* CTS received when not expecting CTS */
2589  __le32 bogus_ack; /* ACK received when not expecting ACK */
2590  __le32 non_bssid_frames; /* number of frames with BSSID that
2591  * doesn't belong to the STA BSSID */
2592  __le32 filtered_frames; /* count frames that were dumped in the
2593  * filtering process */
2594  __le32 non_channel_beacons; /* beacons with our bss id but not on
2595  * our serving channel */
2596  __le32 channel_beacons; /* beacons with our bss id and in our
2597  * serving channel */
2598  __le32 num_missed_bcon; /* number of missed beacons */
2599  __le32 adc_rx_saturation_time; /* count in 0.8us units the time the
2600  * ADC was in saturation */
2601  __le32 ina_detection_search_time;/* total time (in 0.8us) searched
2602  * for INA */
2603  __le32 beacon_silence_rssi_a; /* RSSI silence after beacon frame */
2604  __le32 beacon_silence_rssi_b; /* RSSI silence after beacon frame */
2605  __le32 beacon_silence_rssi_c; /* RSSI silence after beacon frame */
2606  __le32 interference_data_flag; /* flag for interference data
2607  * availability. 1 when data is
2608  * available. */
2609  __le32 channel_load; /* counts RX Enable time in uSec */
2610  __le32 dsp_false_alarms; /* DSP false alarm (both OFDM
2611  * and CCK) counter */
2618 } __packed;
2619 
2622  /* additional stats for bt */
2625 } __packed;
2626 
2632 } __packed;
2633 
2639 } __packed;
2640 
2653 } __packed;
2654 
2666 } __packed;
2667 
2684  /*
2685  * "tx_power" are optional parameters provided by uCode,
2686  * 6000 series is the only device provide the information,
2687  * Those are reserved fields for all the other devices
2688  */
2691 } __packed;
2692 
2693 
2701 } __packed;
2702 
2704  __le32 temperature; /* radio temperature */
2705  __le32 temperature_m; /* radio voltage */
2713  /*
2714  * num_of_sos_states:
2715  * count the number of times we have to re-tune
2716  * in order to get out of bad PHY status
2717  */
2719 } __packed;
2720 
2722  /* Tx statistics */
2727  /* Rx statistics */
2732 } __packed;
2733 
2738 } __packed;
2739 
2745 } __packed;
2746 
2747 #define UCODE_STATISTICS_CLEAR_MSK (0x1 << 0)
2748 #define UCODE_STATISTICS_FREQUENCY_MSK (0x1 << 1)
2749 #define UCODE_STATISTICS_NARROW_BAND_MSK (0x1 << 2)
2750 
2751 /*
2752  * REPLY_STATISTICS_CMD = 0x9c,
2753  * all devices identical.
2754  *
2755  * This command triggers an immediate response containing uCode statistics.
2756  * The response is in the same format as STATISTICS_NOTIFICATION 0x9d, below.
2757  *
2758  * If the CLEAR_STATS configuration flag is set, uCode will clear its
2759  * internal copy of the statistics (counters) after issuing the response.
2760  * This flag does not affect STATISTICS_NOTIFICATIONs after beacons (see below).
2761  *
2762  * If the DISABLE_NOTIF configuration flag is set, uCode will not issue
2763  * STATISTICS_NOTIFICATIONs after received beacons (see below). This flag
2764  * does not affect the response to the REPLY_STATISTICS_CMD 0x9c itself.
2765  */
2766 #define IWL_STATS_CONF_CLEAR_STATS cpu_to_le32(0x1) /* see above */
2767 #define IWL_STATS_CONF_DISABLE_NOTIF cpu_to_le32(0x2)/* see above */
2769  __le32 configuration_flags; /* IWL_STATS_CONF_* */
2770 } __packed;
2771 
2772 /*
2773  * STATISTICS_NOTIFICATION = 0x9d (notification only, not a command)
2774  *
2775  * By default, uCode issues this notification after receiving a beacon
2776  * while associated. To disable this behavior, set DISABLE_NOTIF flag in the
2777  * REPLY_STATISTICS_CMD 0x9c, above.
2778  *
2779  * Statistics counters continue to increment beacon after beacon, but are
2780  * cleared when changing channels or when driver issues REPLY_STATISTICS_CMD
2781  * 0x9c with CLEAR_STATS bit set (see above).
2782  *
2783  * uCode also issues this notification during scans. uCode clears statistics
2784  * appropriately so that each notification contains statistics for only the
2785  * one channel that has just been scanned.
2786  */
2787 #define STATISTICS_REPLY_FLG_BAND_24G_MSK cpu_to_le32(0x2)
2788 #define STATISTICS_REPLY_FLG_HT40_MODE_MSK cpu_to_le32(0x8)
2789 
2795 } __packed;
2796 
2802 } __packed;
2803 
2804 /*
2805  * MISSED_BEACONS_NOTIFICATION = 0xa2 (notification only, not a command)
2806  *
2807  * uCode send MISSED_BEACONS_NOTIFICATION to driver when detect beacon missed
2808  * in regardless of how many missed beacons, which mean when driver receive the
2809  * notification, inside the command, it can find all the beacons information
2810  * which include number of total missed beacons, number of consecutive missed
2811  * beacons, number of beacons received and number of beacons expected to
2812  * receive.
2813  *
2814  * If uCode detected consecutive_missed_beacons > 5, it will reset the radio
2815  * in order to bring the radio/PHY back to working state; which has no relation
2816  * to when driver will perform sensitivity calibration.
2817  *
2818  * Driver should set it own missed_beacon_threshold to decide when to perform
2819  * sensitivity calibration based on number of consecutive missed beacons in
2820  * order to improve overall performance, especially in noisy environment.
2821  *
2822  */
2823 
2824 #define IWL_MISSED_BEACON_THRESHOLD_MIN (1)
2825 #define IWL_MISSED_BEACON_THRESHOLD_DEF (5)
2826 #define IWL_MISSED_BEACON_THRESHOLD_MAX IWL_MISSED_BEACON_THRESHOLD_DEF
2827 
2833 } __packed;
2834 
2835 
2836 /******************************************************************************
2837  * (11)
2838  * Rx Calibration Commands:
2839  *
2840  * With the uCode used for open source drivers, most Tx calibration (except
2841  * for Tx Power) and most Rx calibration is done by uCode during the
2842  * "initialize" phase of uCode boot. Driver must calibrate only:
2843  *
2844  * 1) Tx power (depends on temperature), described elsewhere
2845  * 2) Receiver gain balance (optimize MIMO, and detect disconnected antennas)
2846  * 3) Receiver sensitivity (to optimize signal detection)
2847  *
2848  *****************************************************************************/
2849 
3005 /*
3006  * Table entries in SENSITIVITY_CMD (struct iwl_sensitivity_cmd)
3007  */
3008 #define HD_TABLE_SIZE (11) /* number of entries */
3009 #define HD_MIN_ENERGY_CCK_DET_INDEX (0) /* table indexes */
3010 #define HD_MIN_ENERGY_OFDM_DET_INDEX (1)
3011 #define HD_AUTO_CORR32_X1_TH_ADD_MIN_INDEX (2)
3012 #define HD_AUTO_CORR32_X1_TH_ADD_MIN_MRC_INDEX (3)
3013 #define HD_AUTO_CORR40_X4_TH_ADD_MIN_MRC_INDEX (4)
3014 #define HD_AUTO_CORR32_X4_TH_ADD_MIN_INDEX (5)
3015 #define HD_AUTO_CORR32_X4_TH_ADD_MIN_MRC_INDEX (6)
3016 #define HD_BARKER_CORR_TH_ADD_MIN_INDEX (7)
3017 #define HD_BARKER_CORR_TH_ADD_MIN_MRC_INDEX (8)
3018 #define HD_AUTO_CORR40_X4_TH_ADD_MIN_INDEX (9)
3019 #define HD_OFDM_ENERGY_TH_IN_INDEX (10)
3020 
3021 /*
3022  * Additional table entries in enhance SENSITIVITY_CMD
3023  */
3024 #define HD_INA_NON_SQUARE_DET_OFDM_INDEX (11)
3025 #define HD_INA_NON_SQUARE_DET_CCK_INDEX (12)
3026 #define HD_CORR_11_INSTEAD_OF_CORR_9_EN_INDEX (13)
3027 #define HD_OFDM_NON_SQUARE_DET_SLOPE_MRC_INDEX (14)
3028 #define HD_OFDM_NON_SQUARE_DET_INTERCEPT_MRC_INDEX (15)
3029 #define HD_OFDM_NON_SQUARE_DET_SLOPE_INDEX (16)
3030 #define HD_OFDM_NON_SQUARE_DET_INTERCEPT_INDEX (17)
3031 #define HD_CCK_NON_SQUARE_DET_SLOPE_MRC_INDEX (18)
3032 #define HD_CCK_NON_SQUARE_DET_INTERCEPT_MRC_INDEX (19)
3033 #define HD_CCK_NON_SQUARE_DET_SLOPE_INDEX (20)
3034 #define HD_CCK_NON_SQUARE_DET_INTERCEPT_INDEX (21)
3035 #define HD_RESERVED (22)
3036 
3037 /* number of entries for enhanced tbl */
3038 #define ENHANCE_HD_TABLE_SIZE (23)
3039 
3040 /* number of additional entries for enhanced tbl */
3041 #define ENHANCE_HD_TABLE_ENTRIES (ENHANCE_HD_TABLE_SIZE - HD_TABLE_SIZE)
3042 
3043 #define HD_INA_NON_SQUARE_DET_OFDM_DATA_V1 cpu_to_le16(0)
3044 #define HD_INA_NON_SQUARE_DET_CCK_DATA_V1 cpu_to_le16(0)
3045 #define HD_CORR_11_INSTEAD_OF_CORR_9_EN_DATA_V1 cpu_to_le16(0)
3046 #define HD_OFDM_NON_SQUARE_DET_SLOPE_MRC_DATA_V1 cpu_to_le16(668)
3047 #define HD_OFDM_NON_SQUARE_DET_INTERCEPT_MRC_DATA_V1 cpu_to_le16(4)
3048 #define HD_OFDM_NON_SQUARE_DET_SLOPE_DATA_V1 cpu_to_le16(486)
3049 #define HD_OFDM_NON_SQUARE_DET_INTERCEPT_DATA_V1 cpu_to_le16(37)
3050 #define HD_CCK_NON_SQUARE_DET_SLOPE_MRC_DATA_V1 cpu_to_le16(853)
3051 #define HD_CCK_NON_SQUARE_DET_INTERCEPT_MRC_DATA_V1 cpu_to_le16(4)
3052 #define HD_CCK_NON_SQUARE_DET_SLOPE_DATA_V1 cpu_to_le16(476)
3053 #define HD_CCK_NON_SQUARE_DET_INTERCEPT_DATA_V1 cpu_to_le16(99)
3054 
3055 #define HD_INA_NON_SQUARE_DET_OFDM_DATA_V2 cpu_to_le16(1)
3056 #define HD_INA_NON_SQUARE_DET_CCK_DATA_V2 cpu_to_le16(1)
3057 #define HD_CORR_11_INSTEAD_OF_CORR_9_EN_DATA_V2 cpu_to_le16(1)
3058 #define HD_OFDM_NON_SQUARE_DET_SLOPE_MRC_DATA_V2 cpu_to_le16(600)
3059 #define HD_OFDM_NON_SQUARE_DET_INTERCEPT_MRC_DATA_V2 cpu_to_le16(40)
3060 #define HD_OFDM_NON_SQUARE_DET_SLOPE_DATA_V2 cpu_to_le16(486)
3061 #define HD_OFDM_NON_SQUARE_DET_INTERCEPT_DATA_V2 cpu_to_le16(45)
3062 #define HD_CCK_NON_SQUARE_DET_SLOPE_MRC_DATA_V2 cpu_to_le16(853)
3063 #define HD_CCK_NON_SQUARE_DET_INTERCEPT_MRC_DATA_V2 cpu_to_le16(60)
3064 #define HD_CCK_NON_SQUARE_DET_SLOPE_DATA_V2 cpu_to_le16(476)
3065 #define HD_CCK_NON_SQUARE_DET_INTERCEPT_DATA_V2 cpu_to_le16(99)
3066 
3067 
3068 /* Control field in struct iwl_sensitivity_cmd */
3069 #define SENSITIVITY_CMD_CONTROL_DEFAULT_TABLE cpu_to_le16(0)
3070 #define SENSITIVITY_CMD_CONTROL_WORK_TABLE cpu_to_le16(1)
3071 
3080  __le16 control; /* always use "1" */
3081  __le16 table[HD_TABLE_SIZE]; /* use HD_* as index */
3082 } __packed;
3083 
3084 /*
3085  *
3086  */
3088  __le16 control; /* always use "1" */
3089  __le16 enhance_table[ENHANCE_HD_TABLE_SIZE]; /* use HD_* as index */
3090 } __packed;
3091 
3092 
3148 /* Phy calibration command for series */
3149 enum {
3157 };
3158 
3159 /* This enum defines the bitmap of various calibrations to enable in both
3160  * init ucode and runtime ucode through CALIBRATION_CFG_CMD.
3161  */
3174 };
3175 
3176 #define IWL_CALIB_INIT_CFG_ALL cpu_to_le32(IWL_CALIB_CFG_RX_BB_IDX | \
3177  IWL_CALIB_CFG_DC_IDX | \
3178  IWL_CALIB_CFG_LO_IDX | \
3179  IWL_CALIB_CFG_TX_IQ_IDX | \
3180  IWL_CALIB_CFG_RX_IQ_IDX | \
3181  IWL_CALIB_CFG_CRYSTAL_IDX)
3182 
3183 #define IWL_CALIB_RT_CFG_ALL cpu_to_le32(IWL_CALIB_CFG_RX_BB_IDX | \
3184  IWL_CALIB_CFG_DC_IDX | \
3185  IWL_CALIB_CFG_LO_IDX | \
3186  IWL_CALIB_CFG_TX_IQ_IDX | \
3187  IWL_CALIB_CFG_RX_IQ_IDX | \
3188  IWL_CALIB_CFG_TEMPERATURE_IDX | \
3189  IWL_CALIB_CFG_PAPD_IDX | \
3190  IWL_CALIB_CFG_TX_PWR_IDX | \
3191  IWL_CALIB_CFG_CRYSTAL_IDX)
3192 
3193 #define IWL_CALIB_CFG_FLAG_SEND_COMPLETE_NTFY_MSK cpu_to_le32(BIT(0))
3194 
3201 } __packed;
3202 
3207 } __packed;
3208 
3213 } __packed;
3214 
3220 } __packed;
3221 
3224  u8 data[0];
3225 } __packed;
3226 
3231  u8 pad[2];
3232 } __packed;
3233 
3234 #define DEFAULT_RADIO_SENSOR_OFFSET cpu_to_le16(2700)
3239 } __packed;
3240 
3247 } __packed;
3248 
3249 /* IWL_PHY_CALIBRATE_CHAIN_NOISE_RESET_CMD */
3252  u8 data[0];
3253 };
3254 
3255 /* IWL_PHY_CALIBRATE_CHAIN_NOISE_GAIN_CMD */
3260  u8 pad[2];
3261 } __packed;
3262 
3263 /******************************************************************************
3264  * (12)
3265  * Miscellaneous Commands:
3266  *
3267  *****************************************************************************/
3268 
3269 /*
3270  * LEDs Command & Response
3271  * REPLY_LEDS_CMD = 0x48 (command, has simple generic response)
3272  *
3273  * For each of 3 possible LEDs (Activity/Link/Tech, selected by "id" field),
3274  * this command turns it on or off, or sets up a periodic blinking cycle.
3275  */
3276 struct iwl_led_cmd {
3277  __le32 interval; /* "interval" in uSec */
3278  u8 id; /* 1: Activity, 2: Link, 3: Tech */
3279  u8 off; /* # intervals off while blinking;
3280  * "0", with >0 "on" value, turns LED on */
3281  u8 on; /* # intervals on while blinking;
3282  * "0", regardless of "off", turns LED off */
3284 } __packed;
3285 
3286 /*
3287  * station priority table entries
3288  * also used as potential "events" value for both
3289  * COEX_MEDIUM_NOTIFICATION and COEX_EVENT_CMD
3290  */
3291 
3292 /*
3293  * COEX events entry flag masks
3294  * RP - Requested Priority
3295  * WP - Win Medium Priority: priority assigned when the contention has been won
3296  */
3297 #define COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG (0x1)
3298 #define COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG (0x2)
3299 #define COEX_EVT_FLAG_DELAY_MEDIUM_FREE_NTFY_FLG (0x4)
3300 
3301 #define COEX_CU_UNASSOC_IDLE_RP 4
3302 #define COEX_CU_UNASSOC_MANUAL_SCAN_RP 4
3303 #define COEX_CU_UNASSOC_AUTO_SCAN_RP 4
3304 #define COEX_CU_CALIBRATION_RP 4
3305 #define COEX_CU_PERIODIC_CALIBRATION_RP 4
3306 #define COEX_CU_CONNECTION_ESTAB_RP 4
3307 #define COEX_CU_ASSOCIATED_IDLE_RP 4
3308 #define COEX_CU_ASSOC_MANUAL_SCAN_RP 4
3309 #define COEX_CU_ASSOC_AUTO_SCAN_RP 4
3310 #define COEX_CU_ASSOC_ACTIVE_LEVEL_RP 4
3311 #define COEX_CU_RF_ON_RP 6
3312 #define COEX_CU_RF_OFF_RP 4
3313 #define COEX_CU_STAND_ALONE_DEBUG_RP 6
3314 #define COEX_CU_IPAN_ASSOC_LEVEL_RP 4
3315 #define COEX_CU_RSRVD1_RP 4
3316 #define COEX_CU_RSRVD2_RP 4
3317 
3318 #define COEX_CU_UNASSOC_IDLE_WP 3
3319 #define COEX_CU_UNASSOC_MANUAL_SCAN_WP 3
3320 #define COEX_CU_UNASSOC_AUTO_SCAN_WP 3
3321 #define COEX_CU_CALIBRATION_WP 3
3322 #define COEX_CU_PERIODIC_CALIBRATION_WP 3
3323 #define COEX_CU_CONNECTION_ESTAB_WP 3
3324 #define COEX_CU_ASSOCIATED_IDLE_WP 3
3325 #define COEX_CU_ASSOC_MANUAL_SCAN_WP 3
3326 #define COEX_CU_ASSOC_AUTO_SCAN_WP 3
3327 #define COEX_CU_ASSOC_ACTIVE_LEVEL_WP 3
3328 #define COEX_CU_RF_ON_WP 3
3329 #define COEX_CU_RF_OFF_WP 3
3330 #define COEX_CU_STAND_ALONE_DEBUG_WP 6
3331 #define COEX_CU_IPAN_ASSOC_LEVEL_WP 3
3332 #define COEX_CU_RSRVD1_WP 3
3333 #define COEX_CU_RSRVD2_WP 3
3334 
3335 #define COEX_UNASSOC_IDLE_FLAGS 0
3336 #define COEX_UNASSOC_MANUAL_SCAN_FLAGS \
3337  (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \
3338  COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG)
3339 #define COEX_UNASSOC_AUTO_SCAN_FLAGS \
3340  (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \
3341  COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG)
3342 #define COEX_CALIBRATION_FLAGS \
3343  (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \
3344  COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG)
3345 #define COEX_PERIODIC_CALIBRATION_FLAGS 0
3346 /*
3347  * COEX_CONNECTION_ESTAB:
3348  * we need DELAY_MEDIUM_FREE_NTFY to let WiMAX disconnect from network.
3349  */
3350 #define COEX_CONNECTION_ESTAB_FLAGS \
3351  (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \
3352  COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG | \
3353  COEX_EVT_FLAG_DELAY_MEDIUM_FREE_NTFY_FLG)
3354 #define COEX_ASSOCIATED_IDLE_FLAGS 0
3355 #define COEX_ASSOC_MANUAL_SCAN_FLAGS \
3356  (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \
3357  COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG)
3358 #define COEX_ASSOC_AUTO_SCAN_FLAGS \
3359  (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \
3360  COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG)
3361 #define COEX_ASSOC_ACTIVE_LEVEL_FLAGS 0
3362 #define COEX_RF_ON_FLAGS 0
3363 #define COEX_RF_OFF_FLAGS 0
3364 #define COEX_STAND_ALONE_DEBUG_FLAGS \
3365  (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \
3366  COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG)
3367 #define COEX_IPAN_ASSOC_LEVEL_FLAGS \
3368  (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \
3369  COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG | \
3370  COEX_EVT_FLAG_DELAY_MEDIUM_FREE_NTFY_FLG)
3371 #define COEX_RSRVD1_FLAGS 0
3372 #define COEX_RSRVD2_FLAGS 0
3373 /*
3374  * COEX_CU_RF_ON is the event wrapping all radio ownership.
3375  * We need DELAY_MEDIUM_FREE_NTFY to let WiMAX disconnect from network.
3376  */
3377 #define COEX_CU_RF_ON_FLAGS \
3378  (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \
3379  COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG | \
3380  COEX_EVT_FLAG_DELAY_MEDIUM_FREE_NTFY_FLG)
3381 
3382 
3383 enum {
3384  /* un-association part */
3388  /* calibration */
3391  /* connection */
3393  /* association part */
3398  /* RF ON/OFF */
3402  /* IPAN */
3404  /* reserved */
3408 };
3409 
3410 /*
3411  * Coexistence WIFI/WIMAX Command
3412  * COEX_PRIORITY_TABLE_CMD = 0x5a
3413  *
3414  */
3420 } __packed;
3421 
3422 /* COEX flag masks */
3423 
3424 /* Station table is valid */
3425 #define COEX_FLAGS_STA_TABLE_VALID_MSK (0x1)
3426 /* UnMask wake up src at unassociated sleep */
3427 #define COEX_FLAGS_UNASSOC_WA_UNMASK_MSK (0x4)
3428 /* UnMask wake up src at associated sleep */
3429 #define COEX_FLAGS_ASSOC_WA_UNMASK_MSK (0x8)
3430 /* Enable CoEx feature. */
3431 #define COEX_FLAGS_COEX_ENABLE_MSK (0x80)
3432 
3437 } __packed;
3438 
3439 /*
3440  * Coexistence MEDIUM NOTIFICATION
3441  * COEX_MEDIUM_NOTIFICATION = 0x5b
3442  *
3443  * notification from uCode to host to indicate medium changes
3444  *
3445  */
3446 /*
3447  * status field
3448  * bit 0 - 2: medium status
3449  * bit 3: medium change indication
3450  * bit 4 - 31: reserved
3451  */
3452 /* status option values, (0 - 2 bits) */
3453 #define COEX_MEDIUM_BUSY (0x0) /* radio belongs to WiMAX */
3454 #define COEX_MEDIUM_ACTIVE (0x1) /* radio belongs to WiFi */
3455 #define COEX_MEDIUM_PRE_RELEASE (0x2) /* received radio release */
3456 #define COEX_MEDIUM_MSK (0x7)
3457 
3458 /* send notification status (1 bit) */
3459 #define COEX_MEDIUM_CHANGED (0x8)
3460 #define COEX_MEDIUM_CHANGED_MSK (0x8)
3461 #define COEX_MEDIUM_SHIFT (3)
3462 
3466 } __packed;
3467 
3468 /*
3469  * Coexistence EVENT Command
3470  * COEX_EVENT_CMD = 0x5c
3471  *
3472  * send from host to uCode for coex event request.
3473  */
3474 /* flags options */
3475 #define COEX_EVENT_REQUEST_MSK (0x1)
3476 
3481 } __packed;
3482 
3485 } __packed;
3486 
3487 
3488 /******************************************************************************
3489  * Bluetooth Coexistence commands
3490  *
3491  *****************************************************************************/
3492 
3493 /*
3494  * BT Status notification
3495  * REPLY_BT_COEX_PROFILE_NOTIF = 0xce
3496  */
3502 /*
3503  * There are no more even though below is a u8, the
3504  * indication from the BT device only has two bits.
3505  */
3506 };
3507 
3508 #define BT_SESSION_ACTIVITY_1_UART_MSG 0x1
3509 #define BT_SESSION_ACTIVITY_2_UART_MSG 0x2
3510 
3511 /* BT UART message - Share Part (BT -> WiFi) */
3512 #define BT_UART_MSG_FRAME1MSGTYPE_POS (0)
3513 #define BT_UART_MSG_FRAME1MSGTYPE_MSK \
3514  (0x7 << BT_UART_MSG_FRAME1MSGTYPE_POS)
3515 #define BT_UART_MSG_FRAME1SSN_POS (3)
3516 #define BT_UART_MSG_FRAME1SSN_MSK \
3517  (0x3 << BT_UART_MSG_FRAME1SSN_POS)
3518 #define BT_UART_MSG_FRAME1UPDATEREQ_POS (5)
3519 #define BT_UART_MSG_FRAME1UPDATEREQ_MSK \
3520  (0x1 << BT_UART_MSG_FRAME1UPDATEREQ_POS)
3521 #define BT_UART_MSG_FRAME1RESERVED_POS (6)
3522 #define BT_UART_MSG_FRAME1RESERVED_MSK \
3523  (0x3 << BT_UART_MSG_FRAME1RESERVED_POS)
3524 
3525 #define BT_UART_MSG_FRAME2OPENCONNECTIONS_POS (0)
3526 #define BT_UART_MSG_FRAME2OPENCONNECTIONS_MSK \
3527  (0x3 << BT_UART_MSG_FRAME2OPENCONNECTIONS_POS)
3528 #define BT_UART_MSG_FRAME2TRAFFICLOAD_POS (2)
3529 #define BT_UART_MSG_FRAME2TRAFFICLOAD_MSK \
3530  (0x3 << BT_UART_MSG_FRAME2TRAFFICLOAD_POS)
3531 #define BT_UART_MSG_FRAME2CHLSEQN_POS (4)
3532 #define BT_UART_MSG_FRAME2CHLSEQN_MSK \
3533  (0x1 << BT_UART_MSG_FRAME2CHLSEQN_POS)
3534 #define BT_UART_MSG_FRAME2INBAND_POS (5)
3535 #define BT_UART_MSG_FRAME2INBAND_MSK \
3536  (0x1 << BT_UART_MSG_FRAME2INBAND_POS)
3537 #define BT_UART_MSG_FRAME2RESERVED_POS (6)
3538 #define BT_UART_MSG_FRAME2RESERVED_MSK \
3539  (0x3 << BT_UART_MSG_FRAME2RESERVED_POS)
3540 
3541 #define BT_UART_MSG_FRAME3SCOESCO_POS (0)
3542 #define BT_UART_MSG_FRAME3SCOESCO_MSK \
3543  (0x1 << BT_UART_MSG_FRAME3SCOESCO_POS)
3544 #define BT_UART_MSG_FRAME3SNIFF_POS (1)
3545 #define BT_UART_MSG_FRAME3SNIFF_MSK \
3546  (0x1 << BT_UART_MSG_FRAME3SNIFF_POS)
3547 #define BT_UART_MSG_FRAME3A2DP_POS (2)
3548 #define BT_UART_MSG_FRAME3A2DP_MSK \
3549  (0x1 << BT_UART_MSG_FRAME3A2DP_POS)
3550 #define BT_UART_MSG_FRAME3ACL_POS (3)
3551 #define BT_UART_MSG_FRAME3ACL_MSK \
3552  (0x1 << BT_UART_MSG_FRAME3ACL_POS)
3553 #define BT_UART_MSG_FRAME3MASTER_POS (4)
3554 #define BT_UART_MSG_FRAME3MASTER_MSK \
3555  (0x1 << BT_UART_MSG_FRAME3MASTER_POS)
3556 #define BT_UART_MSG_FRAME3OBEX_POS (5)
3557 #define BT_UART_MSG_FRAME3OBEX_MSK \
3558  (0x1 << BT_UART_MSG_FRAME3OBEX_POS)
3559 #define BT_UART_MSG_FRAME3RESERVED_POS (6)
3560 #define BT_UART_MSG_FRAME3RESERVED_MSK \
3561  (0x3 << BT_UART_MSG_FRAME3RESERVED_POS)
3562 
3563 #define BT_UART_MSG_FRAME4IDLEDURATION_POS (0)
3564 #define BT_UART_MSG_FRAME4IDLEDURATION_MSK \
3565  (0x3F << BT_UART_MSG_FRAME4IDLEDURATION_POS)
3566 #define BT_UART_MSG_FRAME4RESERVED_POS (6)
3567 #define BT_UART_MSG_FRAME4RESERVED_MSK \
3568  (0x3 << BT_UART_MSG_FRAME4RESERVED_POS)
3569 
3570 #define BT_UART_MSG_FRAME5TXACTIVITY_POS (0)
3571 #define BT_UART_MSG_FRAME5TXACTIVITY_MSK \
3572  (0x3 << BT_UART_MSG_FRAME5TXACTIVITY_POS)
3573 #define BT_UART_MSG_FRAME5RXACTIVITY_POS (2)
3574 #define BT_UART_MSG_FRAME5RXACTIVITY_MSK \
3575  (0x3 << BT_UART_MSG_FRAME5RXACTIVITY_POS)
3576 #define BT_UART_MSG_FRAME5ESCORETRANSMIT_POS (4)
3577 #define BT_UART_MSG_FRAME5ESCORETRANSMIT_MSK \
3578  (0x3 << BT_UART_MSG_FRAME5ESCORETRANSMIT_POS)
3579 #define BT_UART_MSG_FRAME5RESERVED_POS (6)
3580 #define BT_UART_MSG_FRAME5RESERVED_MSK \
3581  (0x3 << BT_UART_MSG_FRAME5RESERVED_POS)
3582 
3583 #define BT_UART_MSG_FRAME6SNIFFINTERVAL_POS (0)
3584 #define BT_UART_MSG_FRAME6SNIFFINTERVAL_MSK \
3585  (0x1F << BT_UART_MSG_FRAME6SNIFFINTERVAL_POS)
3586 #define BT_UART_MSG_FRAME6DISCOVERABLE_POS (5)
3587 #define BT_UART_MSG_FRAME6DISCOVERABLE_MSK \
3588  (0x1 << BT_UART_MSG_FRAME6DISCOVERABLE_POS)
3589 #define BT_UART_MSG_FRAME6RESERVED_POS (6)
3590 #define BT_UART_MSG_FRAME6RESERVED_MSK \
3591  (0x3 << BT_UART_MSG_FRAME6RESERVED_POS)
3592 
3593 #define BT_UART_MSG_FRAME7SNIFFACTIVITY_POS (0)
3594 #define BT_UART_MSG_FRAME7SNIFFACTIVITY_MSK \
3595  (0x7 << BT_UART_MSG_FRAME7SNIFFACTIVITY_POS)
3596 #define BT_UART_MSG_FRAME7PAGE_POS (3)
3597 #define BT_UART_MSG_FRAME7PAGE_MSK \
3598  (0x1 << BT_UART_MSG_FRAME7PAGE_POS)
3599 #define BT_UART_MSG_FRAME7INQUIRY_POS (4)
3600 #define BT_UART_MSG_FRAME7INQUIRY_MSK \
3601  (0x1 << BT_UART_MSG_FRAME7INQUIRY_POS)
3602 #define BT_UART_MSG_FRAME7CONNECTABLE_POS (5)
3603 #define BT_UART_MSG_FRAME7CONNECTABLE_MSK \
3604  (0x1 << BT_UART_MSG_FRAME7CONNECTABLE_POS)
3605 #define BT_UART_MSG_FRAME7RESERVED_POS (6)
3606 #define BT_UART_MSG_FRAME7RESERVED_MSK \
3607  (0x3 << BT_UART_MSG_FRAME7RESERVED_POS)
3608 
3609 /* BT Session Activity 2 UART message (BT -> WiFi) */
3610 #define BT_UART_MSG_2_FRAME1RESERVED1_POS (5)
3611 #define BT_UART_MSG_2_FRAME1RESERVED1_MSK \
3612  (0x1<<BT_UART_MSG_2_FRAME1RESERVED1_POS)
3613 #define BT_UART_MSG_2_FRAME1RESERVED2_POS (6)
3614 #define BT_UART_MSG_2_FRAME1RESERVED2_MSK \
3615  (0x3<<BT_UART_MSG_2_FRAME1RESERVED2_POS)
3616 
3617 #define BT_UART_MSG_2_FRAME2AGGTRAFFICLOAD_POS (0)
3618 #define BT_UART_MSG_2_FRAME2AGGTRAFFICLOAD_MSK \
3619  (0x3F<<BT_UART_MSG_2_FRAME2AGGTRAFFICLOAD_POS)
3620 #define BT_UART_MSG_2_FRAME2RESERVED_POS (6)
3621 #define BT_UART_MSG_2_FRAME2RESERVED_MSK \
3622  (0x3<<BT_UART_MSG_2_FRAME2RESERVED_POS)
3623 
3624 #define BT_UART_MSG_2_FRAME3BRLASTTXPOWER_POS (0)
3625 #define BT_UART_MSG_2_FRAME3BRLASTTXPOWER_MSK \
3626  (0xF<<BT_UART_MSG_2_FRAME3BRLASTTXPOWER_POS)
3627 #define BT_UART_MSG_2_FRAME3INQPAGESRMODE_POS (4)
3628 #define BT_UART_MSG_2_FRAME3INQPAGESRMODE_MSK \
3629  (0x1<<BT_UART_MSG_2_FRAME3INQPAGESRMODE_POS)
3630 #define BT_UART_MSG_2_FRAME3LEMASTER_POS (5)
3631 #define BT_UART_MSG_2_FRAME3LEMASTER_MSK \
3632  (0x1<<BT_UART_MSG_2_FRAME3LEMASTER_POS)
3633 #define BT_UART_MSG_2_FRAME3RESERVED_POS (6)
3634 #define BT_UART_MSG_2_FRAME3RESERVED_MSK \
3635  (0x3<<BT_UART_MSG_2_FRAME3RESERVED_POS)
3636 
3637 #define BT_UART_MSG_2_FRAME4LELASTTXPOWER_POS (0)
3638 #define BT_UART_MSG_2_FRAME4LELASTTXPOWER_MSK \
3639  (0xF<<BT_UART_MSG_2_FRAME4LELASTTXPOWER_POS)
3640 #define BT_UART_MSG_2_FRAME4NUMLECONN_POS (4)
3641 #define BT_UART_MSG_2_FRAME4NUMLECONN_MSK \
3642  (0x3<<BT_UART_MSG_2_FRAME4NUMLECONN_POS)
3643 #define BT_UART_MSG_2_FRAME4RESERVED_POS (6)
3644 #define BT_UART_MSG_2_FRAME4RESERVED_MSK \
3645  (0x3<<BT_UART_MSG_2_FRAME4RESERVED_POS)
3646 
3647 #define BT_UART_MSG_2_FRAME5BTMINRSSI_POS (0)
3648 #define BT_UART_MSG_2_FRAME5BTMINRSSI_MSK \
3649  (0xF<<BT_UART_MSG_2_FRAME5BTMINRSSI_POS)
3650 #define BT_UART_MSG_2_FRAME5LESCANINITMODE_POS (4)
3651 #define BT_UART_MSG_2_FRAME5LESCANINITMODE_MSK \
3652  (0x1<<BT_UART_MSG_2_FRAME5LESCANINITMODE_POS)
3653 #define BT_UART_MSG_2_FRAME5LEADVERMODE_POS (5)
3654 #define BT_UART_MSG_2_FRAME5LEADVERMODE_MSK \
3655  (0x1<<BT_UART_MSG_2_FRAME5LEADVERMODE_POS)
3656 #define BT_UART_MSG_2_FRAME5RESERVED_POS (6)
3657 #define BT_UART_MSG_2_FRAME5RESERVED_MSK \
3658  (0x3<<BT_UART_MSG_2_FRAME5RESERVED_POS)
3659 
3660 #define BT_UART_MSG_2_FRAME6LECONNINTERVAL_POS (0)
3661 #define BT_UART_MSG_2_FRAME6LECONNINTERVAL_MSK \
3662  (0x1F<<BT_UART_MSG_2_FRAME6LECONNINTERVAL_POS)
3663 #define BT_UART_MSG_2_FRAME6RFU_POS (5)
3664 #define BT_UART_MSG_2_FRAME6RFU_MSK \
3665  (0x1<<BT_UART_MSG_2_FRAME6RFU_POS)
3666 #define BT_UART_MSG_2_FRAME6RESERVED_POS (6)
3667 #define BT_UART_MSG_2_FRAME6RESERVED_MSK \
3668  (0x3<<BT_UART_MSG_2_FRAME6RESERVED_POS)
3669 
3670 #define BT_UART_MSG_2_FRAME7LECONNSLAVELAT_POS (0)
3671 #define BT_UART_MSG_2_FRAME7LECONNSLAVELAT_MSK \
3672  (0x7<<BT_UART_MSG_2_FRAME7LECONNSLAVELAT_POS)
3673 #define BT_UART_MSG_2_FRAME7LEPROFILE1_POS (3)
3674 #define BT_UART_MSG_2_FRAME7LEPROFILE1_MSK \
3675  (0x1<<BT_UART_MSG_2_FRAME7LEPROFILE1_POS)
3676 #define BT_UART_MSG_2_FRAME7LEPROFILE2_POS (4)
3677 #define BT_UART_MSG_2_FRAME7LEPROFILE2_MSK \
3678  (0x1<<BT_UART_MSG_2_FRAME7LEPROFILE2_POS)
3679 #define BT_UART_MSG_2_FRAME7LEPROFILEOTHER_POS (5)
3680 #define BT_UART_MSG_2_FRAME7LEPROFILEOTHER_MSK \
3681  (0x1<<BT_UART_MSG_2_FRAME7LEPROFILEOTHER_POS)
3682 #define BT_UART_MSG_2_FRAME7RESERVED_POS (6)
3683 #define BT_UART_MSG_2_FRAME7RESERVED_MSK \
3684  (0x3<<BT_UART_MSG_2_FRAME7RESERVED_POS)
3685 
3686 
3687 #define BT_ENABLE_REDUCED_TXPOWER_THRESHOLD (-62)
3688 #define BT_DISABLE_REDUCED_TXPOWER_THRESHOLD (-65)
3689 
3699 } __attribute__((packed));
3703  u8 bt_status; /* 0 - off, 1 - on */
3704  u8 bt_traffic_load; /* 0 .. 3? */
3705  u8 bt_ci_compliance; /* 0 - not complied, 1 - complied */
3707 } __attribute__((packed));
3709 #define IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS 0
3710 #define IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_MSK 0x1
3711 #define IWL_BT_COEX_PRIO_TBL_PRIO_POS 1
3712 #define IWL_BT_COEX_PRIO_TBL_PRIO_MASK 0x0e
3713 #define IWL_BT_COEX_PRIO_TBL_RESERVED_POS 4
3714 #define IWL_BT_COEX_PRIO_TBL_RESERVED_MASK 0xf0
3715 #define IWL_BT_COEX_PRIO_TBL_PRIO_SHIFT 1
3716 
3717 /*
3718  * BT Coexistence Priority table
3719  * REPLY_BT_COEX_PRIO_TABLE = 0xcc
3720  */
3738  /* BT_COEX_PRIO_TBL_EVT_MAX should always be last */
3740 };
3741 
3752 };
3753 
3756 } __attribute__((packed));
3758 #define IWL_BT_COEX_ENV_CLOSE 0
3759 #define IWL_BT_COEX_ENV_OPEN 1
3760 /*
3761  * BT Protection Envelope
3762  * REPLY_BT_COEX_PROT_ENV = 0xcd
3763  */
3765  u8 action; /* 0 = closed, 1 = open */
3766  u8 type; /* 0 .. 15 */
3768 } __attribute__((packed));
3770 /*
3771  * REPLY_D3_CONFIG
3772  */
3776 };
3777 
3781 } __packed;
3782 
3783 /*
3784  * REPLY_WOWLAN_PATTERNS
3785  */
3786 #define IWLAGN_WOWLAN_MIN_PATTERN_LEN 16
3787 #define IWLAGN_WOWLAN_MAX_PATTERN_LEN 128
3788 
3795 } __packed;
3796 
3797 #define IWLAGN_WOWLAN_MAX_PATTERNS 20
3798 
3802 } __packed;
3803 
3804 /*
3805  * REPLY_WOWLAN_WAKEUP_FILTER
3806  */
3817 };
3818 
3824 };
3825 
3826 /*
3827  * REPLY_WOWLAN_TSC_RSC_PARAMS
3828  */
3829 #define IWLAGN_NUM_RSC 16
3830 
3831 struct tkip_sc {
3835 } __packed;
3836 
3840  struct tkip_sc tsc;
3841 } __packed;
3842 
3843 struct aes_sc {
3845 } __packed;
3846 
3850  struct aes_sc tsc;
3851 } __packed;
3852 
3856 };
3857 
3860 } __packed;
3861 
3862 /*
3863  * REPLY_WOWLAN_TKIP_PARAMS
3864  */
3865 #define IWLAGN_MIC_KEY_SIZE 8
3866 #define IWLAGN_P1K_SIZE 5
3871 } __packed;
3872 
3875 } __packed;
3876 
3877 #define IWLAGN_NUM_RX_P1K_CACHE 2
3878 
3884 } __packed;
3885 
3886 /*
3887  * REPLY_WOWLAN_KEK_KCK_MATERIAL
3888  */
3889 
3890 #define IWLAGN_KCK_MAX_SIZE 32
3891 #define IWLAGN_KEK_MAX_SIZE 32
3892 
3899 } __packed;
3900 
3901 /*
3902  * REPLY_WIPAN_PARAMS = 0xb2 (Commands and Notification)
3903  */
3904 
3905 /*
3906  * Minimum slot time in TU
3907  */
3908 #define IWL_MIN_SLOT_TIME 20
3909 
3921 } __packed;
3922 
3923 #define IWL_WIPAN_PARAMS_FLG_LEAVE_CHANNEL_CTS BIT(1) /* reserved */
3924 #define IWL_WIPAN_PARAMS_FLG_LEAVE_CHANNEL_QUIET BIT(2) /* reserved */
3925 #define IWL_WIPAN_PARAMS_FLG_SLOTTED_MODE BIT(3) /* reserved */
3926 #define IWL_WIPAN_PARAMS_FLG_FILTER_BEACON_NOTIF BIT(4)
3927 #define IWL_WIPAN_PARAMS_FLG_FULL_SLOTTED_MODE BIT(5)
3928 
3948  struct iwl_wipan_slot slots[10];
3949 } __packed;
3950 
3951 /*
3952  * REPLY_WIPAN_P2P_CHANNEL_SWITCH = 0xb9
3953  *
3954  * TODO: Figure out what this is used for,
3955  * it can only switch between 2.4 GHz
3956  * channels!!
3957  */
3958 
3962 };
3963 
3964 /*
3965  * REPLY_WIPAN_NOA_NOTIFICATION = 0xbc
3966  *
3967  * This is used by the device to notify us of the
3968  * NoA schedule it determined so we can forward it
3969  * to userspace for inclusion in probe responses.
3970  *
3971  * In beacons, the NoA schedule is simply appended
3972  * to the frame we give the device.
3973  */
3974 
3980 } __packed;
3981 
3989 } __packed;
3990 
3994 } __packed;
3995 
3996 #endif /* __iwl_commands_h__ */