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#define | LOG_NONE 0 |
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#define | LOG_ERROR 1 |
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#define | LOG_SBEBUG3 3 /* hidden, for development/debug usage */ |
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#define | LOG_LSCHANGE 5 /* line state change logging */ |
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#define | LOG_LSIMMEDIATE 6 /* line state change logging w/o hysterisis */ |
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#define | LOG_WARN 8 |
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#define | LOG_MONITOR 10 |
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#define | LOG_SBEBUG12 12 /* hidden, for development/debug usage */ |
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#define | LOG_MONITOR2 14 /* hidden, for development/debug usage */ |
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#define | LOG_DEBUG 16 |
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#define | c4_LOG_NONE LOG_NONE |
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#define | c4_LOG_ERROR LOG_ERROR |
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#define | c4_LOG_WARN LOG_WARN |
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#define | c4_LOG_sTrace |
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#define | c4_LOG_DEBUG LOG_DEBUG |
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#define | c4_LOG_MAX LOG_DEBUG |
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#define | REL_STRLEN 80 |
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#define | CHNM_STRLEN 16 |
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#define | PCI_VENDOR_ID_SBE 0x1176 |
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#define | PCI_DEVICE_ID_WANPMC_C4T1E1 0x0701 /* BID 0x0X, BTYP 0x0X */ |
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#define | PCI_DEVICE_ID_WANPTMC_C4T1E1 0x0702 /* BID 0x41 */ |
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#define | PCI_DEVICE_ID_WANADAPT_HC4T1E1 0x0703 /* BID 0x44 */ |
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#define | PCI_DEVICE_ID_WANPTMC_256T3_T1 0x0704 /* BID 0x42 (T1 Version) */ |
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#define | PCI_DEVICE_ID_WANPCI_C4T1E1 0x0705 /* BID 0x1X, BTYP 0x0X */ |
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#define | PCI_DEVICE_ID_WANPMC_C1T3 0x0706 /* BID 0x45 */ |
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#define | PCI_DEVICE_ID_WANPCI_C2T1E1 0x0707 /* BID 0x1X, BTYP 0x2X */ |
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#define | PCI_DEVICE_ID_WANPCI_C1T1E1 0x0708 /* BID 0x1X, BTYP 0x1X */ |
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#define | PCI_DEVICE_ID_WANPMC_C2T1E1 0x0709 /* BID 0x0X, BTYP 0x2X */ |
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#define | PCI_DEVICE_ID_WANPMC_C1T1E1 0x070A /* BID 0x0X, BTYP 0x1X */ |
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#define | PCI_DEVICE_ID_WANPTMC_256T3_E1 0x070B /* BID 0x46 (E1 Version) */ |
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#define | PCI_DEVICE_ID_WANPTMC_C24TE1 0x070C /* BID 0x47 */ |
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#define | PCI_DEVICE_ID_WANPMC_C4T1E1_L |
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#define | PCI_DEVICE_ID_WANPMC_C2T1E1_L |
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#define | PCI_DEVICE_ID_WANPMC_C1T1E1_L |
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#define | PCI_DEVICE_ID_WANPMC_2SSI 0x0801 |
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#define | PCI_DEVICE_ID_WANPCI_4SSI 0x0802 |
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#define | PCI_DEVICE_ID_WANPMC_2T3E3 0x0900 /* BID 0x43 */ |
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#define | SBE_BOARD_ID(v, id) ((v<<16) | id) |
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#define | BINFO_PCI_SPEED_unk 0 |
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#define | BINFO_PCI_SPEED_33 1 |
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#define | BINFO_PCI_SPEED_66 2 |
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#define | BRDADDR_SIZE_64 1 |
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#define | BRDADDR_SIZE_32 2 |
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#define | C1T3_CHIP_MSCC_32 0x01000000 |
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#define | C1T3_CHIP_TECT3_8 0x02000000 |
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#define | C1T3_CHIP_CPLD_8 0x03000000 |
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#define | C1T3_CHIP_EEPROM_8 0x04000000 |
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#define | W256T3_CHIP_MUSYCC_32 0x02000000 |
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#define | W256T3_CHIP_TEMUX_8 0x10000000 |
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#define | W256T3_CHIP_T8110_8 0x20000000 |
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#define | W256T3_CHIP_T8110_32 0x22000000 |
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#define | W256T3_CHIP_CPLD_8 0x30000000 |
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#define | W256T3_CHIP_EEPROM_8 0x40000000 |
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#define | CFG_CLK_PORT_MASK 0x80 /* Loop timing */ |
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#define | CFG_CLK_PORT_INTERNAL 0x80 /* Loop timing */ |
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#define | CFG_CLK_PORT_EXTERNAL 0x00 /* Loop timing */ |
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#define | CFG_LBO_MASK 0x0F |
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#define | CFG_LBO_unk 0 /* <not defined> */ |
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#define | CFG_LBO_LH0 1 /* T1 Long Haul (default) */ |
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#define | CFG_LBO_LH7_5 2 /* T1 Long Haul */ |
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#define | CFG_LBO_LH15 3 /* T1 Long Haul */ |
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#define | CFG_LBO_LH22_5 4 /* T1 Long Haul */ |
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#define | CFG_LBO_SH110 5 /* T1 Short Haul */ |
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#define | CFG_LBO_SH220 6 /* T1 Short Haul */ |
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#define | CFG_LBO_SH330 7 /* T1 Short Haul */ |
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#define | CFG_LBO_SH440 8 /* T1 Short Haul */ |
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#define | CFG_LBO_SH550 9 /* T1 Short Haul */ |
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#define | CFG_LBO_SH660 10 /* T1 Short Haul */ |
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#define | CFG_LBO_E75 11 /* E1 75 Ohm */ |
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#define | CFG_LBO_E120 12 /* E1 120 Ohm (default) */ |
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#define | SS7_INTR_SFILT 0x00000020 |
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#define | SS7_INTR_SDEC 0x00000040 |
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#define | SS7_INTR_SINC 0x00000080 |
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#define | SS7_INTR_SUERR 0x00000100 |
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#define | INTR_BUFF 0x00000002 |
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#define | INTR_EOM 0x00000004 |
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#define | INTR_MSG 0x00000008 |
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#define | INTR_IDLE 0x00000010 |
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#define | TX_ENABLED 0x01 |
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#define | RX_ENABLED 0x02 |
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#define | CFG_CH_PROTO_TRANS 0 |
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#define | CFG_CH_PROTO_SS7 1 |
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#define | CFG_CH_PROTO_HDLC_FCS16 2 |
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#define | CFG_CH_PROTO_HDLC_FCS32 3 |
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#define | CFG_CH_PROTO_ISLP_MODE 4 |
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#define | CFG_CH_FLAG_7E 0 |
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#define | CFG_CH_FLAG_FF 1 |
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#define | CFG_CH_FLAG_00 2 |
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#define | CFG_CH_DINV_NONE 0x00 |
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#define | CFG_CH_DINV_RX 0x01 |
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#define | CFG_CH_DINV_TX 0x02 |
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#define | RESET_DEV_TEMUX 1 |
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#define | RESET_DEV_TECT3 RESET_DEV_TEMUX |
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#define | RESET_DEV_PLL 2 |
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#define | FRAMING_M13 0 |
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#define | FRAMING_CBP 1 |
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#define | CFG_CARD_LOOPBACK_NONE 0x00 |
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#define | CFG_CARD_LOOPBACK_DIAG 0x01 |
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#define | CFG_CARD_LOOPBACK_LINE 0x02 |
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#define | CFG_CARD_LOOPBACK_PAYLOAD 0x03 |
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#define | CFG_LIU_LOOPBACK_NONE 0x00 |
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#define | CFG_LIU_LOOPBACK_ANALOG 0x10 |
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#define | CFG_LIU_LOOPBACK_DIGITAL 0x11 |
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#define | CFG_LIU_LOOPBACK_REMOTE 0x12 |
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#define | CFG_CLK_INTERNAL 0x00 |
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#define | CFG_CLK_EXTERNAL 0x01 |
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#define | LOOPBACK_NONE 0 |
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#define | LOOPBACK_LIU_ANALOG 1 |
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#define | LOOPBACK_LIU_DIGITAL 2 |
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#define | LOOPBACK_FRAMER_DS3 3 |
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#define | LOOPBACK_FRAMER_T1 4 |
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#define | LOOPBACK_LIU_REMOTE 5 |
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#define | CFG_DS1_MODE_MASK 0x0f |
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#define | CFG_DS1_MODE_T1 0x00 |
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#define | CFG_DS1_MODE_E1 0x01 |
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#define | CFG_DS1_MODE_CHANGE 0x80 |
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#define | CFG_DS3_UNCHAN_MASK 0x01 |
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#define | CFG_DS3_UNCHAN_OFF 0x00 |
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#define | CFG_DS3_UNCHAN_ON 0x01 |
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#define | CFG_FRAME_NONE 0 |
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#define | CFG_FRAME_SF 1 /* T1 B8ZS */ |
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#define | CFG_FRAME_ESF 2 /* T1 B8ZS */ |
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#define | CFG_FRAME_E1PLAIN 3 /* HDB3 w/o CAS,CRC */ |
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#define | CFG_FRAME_E1CAS 4 /* HDB3 */ |
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#define | CFG_FRAME_E1CRC 5 /* HDB3 */ |
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#define | CFG_FRAME_E1CRC_CAS 6 /* HDB3 */ |
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#define | CFG_FRAME_SF_AMI 7 /* T1 AMI */ |
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#define | CFG_FRAME_ESF_AMI 8 /* T1 AMI */ |
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#define | CFG_FRAME_E1PLAIN_AMI 9 /* E1 AMI w/o CAS,CRC */ |
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#define | CFG_FRAME_E1CAS_AMI 10 /* E1 AMI */ |
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#define | CFG_FRAME_E1CRC_AMI 11 /* E1 AMI */ |
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#define | CFG_FRAME_E1CRC_CAS_AMI 12 /* E1 AMI */ |
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#define | IS_FRAME_ANY_T1(field) |
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#define | IS_FRAME_ANY_T1ESF(field) |
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#define | IS_FRAME_ANY_E1(field) |
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#define | IS_FRAME_ANY_AMI(field) |
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#define | CFG_FRMR_LOOPBACK_NONE 0 |
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#define | CFG_FRMR_LOOPBACK_DIAG 1 |
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#define | CFG_FRMR_LOOPBACK_LINE 2 |
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#define | CFG_FRMR_LOOPBACK_PAYLOAD 3 |
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wcfg_t * | wancfg_init (char *, char *) |
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int | wancfg_card_blink (wcfg_t *, int) |
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int | wancfg_ctl (wcfg_t *, int, void *, int, void *, int) |
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int | wancfg_del_card_stats (wcfg_t *) |
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int | wancfg_del_chan_stats (wcfg_t *, int) |
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int | wancfg_enable_ports (wcfg_t *, int) |
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int | wancfg_free (wcfg_t *) |
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int | wancfg_get_brdaddr (wcfg_t *, struct sbe_brd_addr *) |
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int | wancfg_get_brdinfo (wcfg_t *, struct sbe_brd_info *) |
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int | wancfg_get_card (wcfg_t *, struct sbecom_card_param *) |
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int | wancfg_get_card_chan_stats (wcfg_t *, struct sbecom_chan_stats *) |
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int | wancfg_get_card_sn (wcfg_t *) |
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int | wancfg_get_card_stats (wcfg_t *, struct temux_card_stats *) |
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int | wancfg_get_chan (wcfg_t *, int, struct sbecom_chan_param *) |
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int | wancfg_get_chan_stats (wcfg_t *, int, struct sbecom_chan_stats *) |
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int | wancfg_get_drvinfo (wcfg_t *, int, struct sbe_drv_info *) |
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int | wancfg_get_framer (wcfg_t *, int, struct sbecom_framer_param *) |
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int | wancfg_get_iid (wcfg_t *, int, struct sbe_iid_info *) |
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int | wancfg_get_sn (wcfg_t *, unsigned int *) |
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int | wancfg_read (wcfg_t *, int, struct sbecom_wrt_vec *) |
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int | wancfg_reset_device (wcfg_t *, int) |
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int | wancfg_set_card (wcfg_t *, struct sbecom_card_param *) |
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int | wancfg_set_chan (wcfg_t *, int, struct sbecom_chan_param *) |
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int | wancfg_set_framer (wcfg_t *, int, struct sbecom_framer_param *) |
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int | wancfg_set_loglevel (wcfg_t *, uint) |
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int | wancfg_write (wcfg_t *, int, struct sbecom_wrt_vec *) |
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