m528xsim.h File Reference

#include <asm/m52xxacr.h>

Go to the source code of this file.

Macros
#define	CPU_NAME   "COLDFIRE(m528x)"
#define	CPU_INSTR_PER_JIFFY   3
#define	MCF_BUSCLK   MCF_CLK
#define	MCFICM_INTC0   (MCF_IPSBAR + 0x0c00) /* Base for Interrupt Ctrl 0 */
#define	MCFICM_INTC1   (MCF_IPSBAR + 0x0d00) /* Base for Interrupt Ctrl 0 */
#define	MCFINTC_IPRH   0x00 /* Interrupt pending 32-63 */
#define	MCFINTC_IPRL   0x04 /* Interrupt pending 1-31 */
#define	MCFINTC_IMRH   0x08 /* Interrupt mask 32-63 */
#define	MCFINTC_IMRL   0x0c /* Interrupt mask 1-31 */
#define	MCFINTC_INTFRCH   0x10 /* Interrupt force 32-63 */
#define	MCFINTC_INTFRCL   0x14 /* Interrupt force 1-31 */
#define	MCFINTC_IRLR   0x18 /* */
#define	MCFINTC_IACKL   0x19 /* */
#define	MCFINTC_ICR0   0x40 /* Base ICR register */
#define	MCFINT_VECBASE   64 /* Vector base number */
#define	MCFINT_UART0   13 /* Interrupt number for UART0 */
#define	MCFINT_UART1   14 /* Interrupt number for UART1 */
#define	MCFINT_UART2   15 /* Interrupt number for UART2 */
#define	MCFINT_QSPI   18 /* Interrupt number for QSPI */
#define	MCFINT_FECRX0   23 /* Interrupt number for FEC */
#define	MCFINT_FECTX0   27 /* Interrupt number for FEC */
#define	MCFINT_FECENTC0   29 /* Interrupt number for FEC */
#define	MCFINT_PIT1   55 /* Interrupt number for PIT1 */
#define	MCF_IRQ_UART0   (MCFINT_VECBASE + MCFINT_UART0)
#define	MCF_IRQ_UART1   (MCFINT_VECBASE + MCFINT_UART1)
#define	MCF_IRQ_UART2   (MCFINT_VECBASE + MCFINT_UART2)
#define	MCF_IRQ_FECRX0   (MCFINT_VECBASE + MCFINT_FECRX0)
#define	MCF_IRQ_FECTX0   (MCFINT_VECBASE + MCFINT_FECTX0)
#define	MCF_IRQ_FECENTC0   (MCFINT_VECBASE + MCFINT_FECENTC0)
#define	MCF_IRQ_QSPI   (MCFINT_VECBASE + MCFINT_QSPI)
#define	MCF_IRQ_PIT1   (MCFINT_VECBASE + MCFINT_PIT1)
#define	MCFSIM_DCR   (MCF_IPSBAR + 0x00000044) /* Control */
#define	MCFSIM_DACR0   (MCF_IPSBAR + 0x00000048) /* Base address 0 */
#define	MCFSIM_DMR0   (MCF_IPSBAR + 0x0000004c) /* Address mask 0 */
#define	MCFSIM_DACR1   (MCF_IPSBAR + 0x00000050) /* Base address 1 */
#define	MCFSIM_DMR1   (MCF_IPSBAR + 0x00000054) /* Address mask 1 */
#define	MCFDMA_BASE0   (MCF_IPSBAR + 0x00000100)
#define	MCFDMA_BASE1   (MCF_IPSBAR + 0x00000140)
#define	MCFDMA_BASE2   (MCF_IPSBAR + 0x00000180)
#define	MCFDMA_BASE3   (MCF_IPSBAR + 0x000001C0)
#define	MCFUART_BASE0   (MCF_IPSBAR + 0x00000200)
#define	MCFUART_BASE1   (MCF_IPSBAR + 0x00000240)
#define	MCFUART_BASE2   (MCF_IPSBAR + 0x00000280)
#define	MCFFEC_BASE0   (MCF_IPSBAR + 0x00001000)
#define	MCFFEC_SIZE0   0x800
#define	MCFQSPI_BASE   (MCF_IPSBAR + 0x340)
#define	MCFQSPI_SIZE   0x40
#define	MCFQSPI_CS0   147
#define	MCFQSPI_CS1   148
#define	MCFQSPI_CS2   149
#define	MCFQSPI_CS3   150
#define	MCFGPIO_PODR_A   (MCF_IPSBAR + 0x00100000)
#define	MCFGPIO_PODR_B   (MCF_IPSBAR + 0x00100001)
#define	MCFGPIO_PODR_C   (MCF_IPSBAR + 0x00100002)
#define	MCFGPIO_PODR_D   (MCF_IPSBAR + 0x00100003)
#define	MCFGPIO_PODR_E   (MCF_IPSBAR + 0x00100004)
#define	MCFGPIO_PODR_F   (MCF_IPSBAR + 0x00100005)
#define	MCFGPIO_PODR_G   (MCF_IPSBAR + 0x00100006)
#define	MCFGPIO_PODR_H   (MCF_IPSBAR + 0x00100007)
#define	MCFGPIO_PODR_J   (MCF_IPSBAR + 0x00100008)
#define	MCFGPIO_PODR_DD   (MCF_IPSBAR + 0x00100009)
#define	MCFGPIO_PODR_EH   (MCF_IPSBAR + 0x0010000A)
#define	MCFGPIO_PODR_EL   (MCF_IPSBAR + 0x0010000B)
#define	MCFGPIO_PODR_AS   (MCF_IPSBAR + 0x0010000C)
#define	MCFGPIO_PODR_QS   (MCF_IPSBAR + 0x0010000D)
#define	MCFGPIO_PODR_SD   (MCF_IPSBAR + 0x0010000E)
#define	MCFGPIO_PODR_TC   (MCF_IPSBAR + 0x0010000F)
#define	MCFGPIO_PODR_TD   (MCF_IPSBAR + 0x00100010)
#define	MCFGPIO_PODR_UA   (MCF_IPSBAR + 0x00100011)
#define	MCFGPIO_PDDR_A   (MCF_IPSBAR + 0x00100014)
#define	MCFGPIO_PDDR_B   (MCF_IPSBAR + 0x00100015)
#define	MCFGPIO_PDDR_C   (MCF_IPSBAR + 0x00100016)
#define	MCFGPIO_PDDR_D   (MCF_IPSBAR + 0x00100017)
#define	MCFGPIO_PDDR_E   (MCF_IPSBAR + 0x00100018)
#define	MCFGPIO_PDDR_F   (MCF_IPSBAR + 0x00100019)
#define	MCFGPIO_PDDR_G   (MCF_IPSBAR + 0x0010001A)
#define	MCFGPIO_PDDR_H   (MCF_IPSBAR + 0x0010001B)
#define	MCFGPIO_PDDR_J   (MCF_IPSBAR + 0x0010001C)
#define	MCFGPIO_PDDR_DD   (MCF_IPSBAR + 0x0010001D)
#define	MCFGPIO_PDDR_EH   (MCF_IPSBAR + 0x0010001E)
#define	MCFGPIO_PDDR_EL   (MCF_IPSBAR + 0x0010001F)
#define	MCFGPIO_PDDR_AS   (MCF_IPSBAR + 0x00100020)
#define	MCFGPIO_PDDR_QS   (MCF_IPSBAR + 0x00100021)
#define	MCFGPIO_PDDR_SD   (MCF_IPSBAR + 0x00100022)
#define	MCFGPIO_PDDR_TC   (MCF_IPSBAR + 0x00100023)
#define	MCFGPIO_PDDR_TD   (MCF_IPSBAR + 0x00100024)
#define	MCFGPIO_PDDR_UA   (MCF_IPSBAR + 0x00100025)
#define	MCFGPIO_PPDSDR_A   (MCF_IPSBAR + 0x00100028)
#define	MCFGPIO_PPDSDR_B   (MCF_IPSBAR + 0x00100029)
#define	MCFGPIO_PPDSDR_C   (MCF_IPSBAR + 0x0010002A)
#define	MCFGPIO_PPDSDR_D   (MCF_IPSBAR + 0x0010002B)
#define	MCFGPIO_PPDSDR_E   (MCF_IPSBAR + 0x0010002C)
#define	MCFGPIO_PPDSDR_F   (MCF_IPSBAR + 0x0010002D)
#define	MCFGPIO_PPDSDR_G   (MCF_IPSBAR + 0x0010002E)
#define	MCFGPIO_PPDSDR_H   (MCF_IPSBAR + 0x0010002F)
#define	MCFGPIO_PPDSDR_J   (MCF_IPSBAR + 0x00100030)
#define	MCFGPIO_PPDSDR_DD   (MCF_IPSBAR + 0x00100031)
#define	MCFGPIO_PPDSDR_EH   (MCF_IPSBAR + 0x00100032)
#define	MCFGPIO_PPDSDR_EL   (MCF_IPSBAR + 0x00100033)
#define	MCFGPIO_PPDSDR_AS   (MCF_IPSBAR + 0x00100034)
#define	MCFGPIO_PPDSDR_QS   (MCF_IPSBAR + 0x00100035)
#define	MCFGPIO_PPDSDR_SD   (MCF_IPSBAR + 0x00100036)
#define	MCFGPIO_PPDSDR_TC   (MCF_IPSBAR + 0x00100037)
#define	MCFGPIO_PPDSDR_TD   (MCF_IPSBAR + 0x00100038)
#define	MCFGPIO_PPDSDR_UA   (MCF_IPSBAR + 0x00100039)
#define	MCFGPIO_PCLRR_A   (MCF_IPSBAR + 0x0010003C)
#define	MCFGPIO_PCLRR_B   (MCF_IPSBAR + 0x0010003D)
#define	MCFGPIO_PCLRR_C   (MCF_IPSBAR + 0x0010003E)
#define	MCFGPIO_PCLRR_D   (MCF_IPSBAR + 0x0010003F)
#define	MCFGPIO_PCLRR_E   (MCF_IPSBAR + 0x00100040)
#define	MCFGPIO_PCLRR_F   (MCF_IPSBAR + 0x00100041)
#define	MCFGPIO_PCLRR_G   (MCF_IPSBAR + 0x00100042)
#define	MCFGPIO_PCLRR_H   (MCF_IPSBAR + 0x00100043)
#define	MCFGPIO_PCLRR_J   (MCF_IPSBAR + 0x00100044)
#define	MCFGPIO_PCLRR_DD   (MCF_IPSBAR + 0x00100045)
#define	MCFGPIO_PCLRR_EH   (MCF_IPSBAR + 0x00100046)
#define	MCFGPIO_PCLRR_EL   (MCF_IPSBAR + 0x00100047)
#define	MCFGPIO_PCLRR_AS   (MCF_IPSBAR + 0x00100048)
#define	MCFGPIO_PCLRR_QS   (MCF_IPSBAR + 0x00100049)
#define	MCFGPIO_PCLRR_SD   (MCF_IPSBAR + 0x0010004A)
#define	MCFGPIO_PCLRR_TC   (MCF_IPSBAR + 0x0010004B)
#define	MCFGPIO_PCLRR_TD   (MCF_IPSBAR + 0x0010004C)
#define	MCFGPIO_PCLRR_UA   (MCF_IPSBAR + 0x0010004D)
#define	MCFGPIO_PBCDPAR   (MCF_IPSBAR + 0x00100050)
#define	MCFGPIO_PFPAR   (MCF_IPSBAR + 0x00100051)
#define	MCFGPIO_PEPAR   (MCF_IPSBAR + 0x00100052)
#define	MCFGPIO_PJPAR   (MCF_IPSBAR + 0x00100054)
#define	MCFGPIO_PSDPAR   (MCF_IPSBAR + 0x00100055)
#define	MCFGPIO_PASPAR   (MCF_IPSBAR + 0x00100056)
#define	MCFGPIO_PEHLPAR   (MCF_IPSBAR + 0x00100058)
#define	MCFGPIO_PQSPAR   (MCF_IPSBAR + 0x00100059)
#define	MCFGPIO_PTCPAR   (MCF_IPSBAR + 0x0010005A)
#define	MCFGPIO_PTDPAR   (MCF_IPSBAR + 0x0010005B)
#define	MCFGPIO_PUAPAR   (MCF_IPSBAR + 0x0010005C)
#define	MCFPIT_BASE1   (MCF_IPSBAR + 0x00150000)
#define	MCFPIT_BASE2   (MCF_IPSBAR + 0x00160000)
#define	MCFPIT_BASE3   (MCF_IPSBAR + 0x00170000)
#define	MCFPIT_BASE4   (MCF_IPSBAR + 0x00180000)
#define	MCFEPORT_EPPAR   (MCF_IPSBAR + 0x00130000)
#define	MCFEPORT_EPDDR   (MCF_IPSBAR + 0x00130002)
#define	MCFEPORT_EPIER   (MCF_IPSBAR + 0x00130003)
#define	MCFEPORT_EPDR   (MCF_IPSBAR + 0x00130004)
#define	MCFEPORT_EPPDR   (MCF_IPSBAR + 0x00130005)
#define	MCFEPORT_EPFR   (MCF_IPSBAR + 0x00130006)
#define	MCFQADC_PORTQA   (MCF_IPSBAR + 0x00190006)
#define	MCFQADC_PORTQB   (MCF_IPSBAR + 0x00190007)
#define	MCFQADC_DDRQA   (MCF_IPSBAR + 0x00190008)
#define	MCFQADC_DDRQB   (MCF_IPSBAR + 0x00190009)
#define	MCFGPTA_GPTPORT   (MCF_IPSBAR + 0x001A001D)
#define	MCFGPTA_GPTDDR   (MCF_IPSBAR + 0x001A001E)
#define	MCFGPTB_GPTPORT   (MCF_IPSBAR + 0x001B001D)
#define	MCFGPTB_GPTDDR   (MCF_IPSBAR + 0x001B001E)
#define	MCFGPIO_PODR   MCFGPIO_PODR_A /* port output data */
#define	MCFGPIO_PDDR   MCFGPIO_PDDR_A /* port data direction */
#define	MCFGPIO_PPDR   MCFGPIO_PPDSDR_A/* port pin data */
#define	MCFGPIO_SETR   MCFGPIO_PPDSDR_A/* set output */
#define	MCFGPIO_CLRR   MCFGPIO_PCLRR_A /* clr output */
#define	MCFGPIO_IRQ_MAX   8
#define	MCFGPIO_IRQ_VECBASE   MCFINT_VECBASE
#define	MCFGPIO_PIN_MAX   180
#define	MCF_RCR   (MCF_IPSBAR + 0x110000)
#define	MCF_RSR   (MCF_IPSBAR + 0x110001)
#define	MCF_RCR_SWRESET   0x80 /* Software reset bit */
#define	MCF_RCR_FRCSTOUT   0x40 /* Force external reset */

Macro Definition Documentation

#define CPU_INSTR_PER_JIFFY   3

Definition at line 15 of file m528xsim.h.

#define CPU_NAME   "COLDFIRE(m528x)"

Definition at line 14 of file m528xsim.h.

#define MCF_BUSCLK   MCF_CLK

Definition at line 16 of file m528xsim.h.

#define MCF_IRQ_FECENTC0   (MCFINT_VECBASE + MCFINT_FECENTC0)

Definition at line 52 of file m528xsim.h.

#define MCF_IRQ_FECRX0   (MCFINT_VECBASE + MCFINT_FECRX0)

Definition at line 50 of file m528xsim.h.

#define MCF_IRQ_FECTX0   (MCFINT_VECBASE + MCFINT_FECTX0)

Definition at line 51 of file m528xsim.h.

#define MCF_IRQ_PIT1   (MCFINT_VECBASE + MCFINT_PIT1)

Definition at line 55 of file m528xsim.h.

#define MCF_IRQ_QSPI   (MCFINT_VECBASE + MCFINT_QSPI)

Definition at line 54 of file m528xsim.h.

#define MCF_IRQ_UART0   (MCFINT_VECBASE + MCFINT_UART0)

Definition at line 46 of file m528xsim.h.

#define MCF_IRQ_UART1   (MCFINT_VECBASE + MCFINT_UART1)

Definition at line 47 of file m528xsim.h.

#define MCF_IRQ_UART2   (MCFINT_VECBASE + MCFINT_UART2)

Definition at line 48 of file m528xsim.h.

#define MCF_RCR   (MCF_IPSBAR + 0x110000)

Definition at line 239 of file m528xsim.h.

#define MCF_RCR_FRCSTOUT   0x40 /* Force external reset */

Definition at line 243 of file m528xsim.h.

#define MCF_RCR_SWRESET   0x80 /* Software reset bit */

Definition at line 242 of file m528xsim.h.

#define MCF_RSR   (MCF_IPSBAR + 0x110001)

Definition at line 240 of file m528xsim.h.

#define MCFDMA_BASE0   (MCF_IPSBAR + 0x00000100)

Definition at line 68 of file m528xsim.h.

#define MCFDMA_BASE1   (MCF_IPSBAR + 0x00000140)

Definition at line 69 of file m528xsim.h.

#define MCFDMA_BASE2   (MCF_IPSBAR + 0x00000180)

Definition at line 70 of file m528xsim.h.

#define MCFDMA_BASE3   (MCF_IPSBAR + 0x000001C0)

Definition at line 71 of file m528xsim.h.

#define MCFEPORT_EPDDR   (MCF_IPSBAR + 0x00130002)

Definition at line 200 of file m528xsim.h.

#define MCFEPORT_EPDR   (MCF_IPSBAR + 0x00130004)

Definition at line 202 of file m528xsim.h.

#define MCFEPORT_EPFR   (MCF_IPSBAR + 0x00130006)

Definition at line 204 of file m528xsim.h.

#define MCFEPORT_EPIER   (MCF_IPSBAR + 0x00130003)

Definition at line 201 of file m528xsim.h.

#define MCFEPORT_EPPAR   (MCF_IPSBAR + 0x00130000)

Definition at line 199 of file m528xsim.h.

#define MCFEPORT_EPPDR   (MCF_IPSBAR + 0x00130005)

Definition at line 203 of file m528xsim.h.

#define MCFFEC_BASE0   (MCF_IPSBAR + 0x00001000)

Definition at line 83 of file m528xsim.h.

#define MCFFEC_SIZE0   0x800

Definition at line 84 of file m528xsim.h.

#define MCFGPIO_CLRR   MCFGPIO_PCLRR_A /* clr output */

Definition at line 230 of file m528xsim.h.

#define MCFGPIO_IRQ_MAX   8

Definition at line 232 of file m528xsim.h.

#define MCFGPIO_IRQ_VECBASE   MCFINT_VECBASE

Definition at line 233 of file m528xsim.h.

#define MCFGPIO_PASPAR   (MCF_IPSBAR + 0x00100056)

Definition at line 181 of file m528xsim.h.

#define MCFGPIO_PBCDPAR   (MCF_IPSBAR + 0x00100050)

Definition at line 176 of file m528xsim.h.

#define MCFGPIO_PCLRR_A   (MCF_IPSBAR + 0x0010003C)

Definition at line 157 of file m528xsim.h.

#define MCFGPIO_PCLRR_AS   (MCF_IPSBAR + 0x00100048)

Definition at line 169 of file m528xsim.h.

#define MCFGPIO_PCLRR_B   (MCF_IPSBAR + 0x0010003D)

Definition at line 158 of file m528xsim.h.

#define MCFGPIO_PCLRR_C   (MCF_IPSBAR + 0x0010003E)

Definition at line 159 of file m528xsim.h.

#define MCFGPIO_PCLRR_D   (MCF_IPSBAR + 0x0010003F)

Definition at line 160 of file m528xsim.h.

#define MCFGPIO_PCLRR_DD   (MCF_IPSBAR + 0x00100045)

Definition at line 166 of file m528xsim.h.

#define MCFGPIO_PCLRR_E   (MCF_IPSBAR + 0x00100040)

Definition at line 161 of file m528xsim.h.

#define MCFGPIO_PCLRR_EH   (MCF_IPSBAR + 0x00100046)

Definition at line 167 of file m528xsim.h.

#define MCFGPIO_PCLRR_EL   (MCF_IPSBAR + 0x00100047)

Definition at line 168 of file m528xsim.h.

#define MCFGPIO_PCLRR_F   (MCF_IPSBAR + 0x00100041)

Definition at line 162 of file m528xsim.h.

#define MCFGPIO_PCLRR_G   (MCF_IPSBAR + 0x00100042)

Definition at line 163 of file m528xsim.h.

#define MCFGPIO_PCLRR_H   (MCF_IPSBAR + 0x00100043)

Definition at line 164 of file m528xsim.h.

#define MCFGPIO_PCLRR_J   (MCF_IPSBAR + 0x00100044)

Definition at line 165 of file m528xsim.h.

#define MCFGPIO_PCLRR_QS   (MCF_IPSBAR + 0x00100049)

Definition at line 170 of file m528xsim.h.

#define MCFGPIO_PCLRR_SD   (MCF_IPSBAR + 0x0010004A)

Definition at line 171 of file m528xsim.h.

#define MCFGPIO_PCLRR_TC   (MCF_IPSBAR + 0x0010004B)

Definition at line 172 of file m528xsim.h.

#define MCFGPIO_PCLRR_TD   (MCF_IPSBAR + 0x0010004C)

Definition at line 173 of file m528xsim.h.

#define MCFGPIO_PCLRR_UA   (MCF_IPSBAR + 0x0010004D)

Definition at line 174 of file m528xsim.h.

#define MCFGPIO_PDDR   MCFGPIO_PDDR_A /* port data direction */

Definition at line 227 of file m528xsim.h.

#define MCFGPIO_PDDR_A   (MCF_IPSBAR + 0x00100014)

Definition at line 119 of file m528xsim.h.

#define MCFGPIO_PDDR_AS   (MCF_IPSBAR + 0x00100020)

Definition at line 131 of file m528xsim.h.

#define MCFGPIO_PDDR_B   (MCF_IPSBAR + 0x00100015)

Definition at line 120 of file m528xsim.h.

#define MCFGPIO_PDDR_C   (MCF_IPSBAR + 0x00100016)

Definition at line 121 of file m528xsim.h.

#define MCFGPIO_PDDR_D   (MCF_IPSBAR + 0x00100017)

Definition at line 122 of file m528xsim.h.

#define MCFGPIO_PDDR_DD   (MCF_IPSBAR + 0x0010001D)

Definition at line 128 of file m528xsim.h.

#define MCFGPIO_PDDR_E   (MCF_IPSBAR + 0x00100018)

Definition at line 123 of file m528xsim.h.

#define MCFGPIO_PDDR_EH   (MCF_IPSBAR + 0x0010001E)

Definition at line 129 of file m528xsim.h.

#define MCFGPIO_PDDR_EL   (MCF_IPSBAR + 0x0010001F)

Definition at line 130 of file m528xsim.h.

#define MCFGPIO_PDDR_F   (MCF_IPSBAR + 0x00100019)

Definition at line 124 of file m528xsim.h.

#define MCFGPIO_PDDR_G   (MCF_IPSBAR + 0x0010001A)

Definition at line 125 of file m528xsim.h.

#define MCFGPIO_PDDR_H   (MCF_IPSBAR + 0x0010001B)

Definition at line 126 of file m528xsim.h.

#define MCFGPIO_PDDR_J   (MCF_IPSBAR + 0x0010001C)

Definition at line 127 of file m528xsim.h.

#define MCFGPIO_PDDR_QS   (MCF_IPSBAR + 0x00100021)

Definition at line 132 of file m528xsim.h.

#define MCFGPIO_PDDR_SD   (MCF_IPSBAR + 0x00100022)

Definition at line 133 of file m528xsim.h.

#define MCFGPIO_PDDR_TC   (MCF_IPSBAR + 0x00100023)

Definition at line 134 of file m528xsim.h.

#define MCFGPIO_PDDR_TD   (MCF_IPSBAR + 0x00100024)

Definition at line 135 of file m528xsim.h.

#define MCFGPIO_PDDR_UA   (MCF_IPSBAR + 0x00100025)

Definition at line 136 of file m528xsim.h.

#define MCFGPIO_PEHLPAR   (MCF_IPSBAR + 0x00100058)

Definition at line 182 of file m528xsim.h.

#define MCFGPIO_PEPAR   (MCF_IPSBAR + 0x00100052)

Definition at line 178 of file m528xsim.h.

#define MCFGPIO_PFPAR   (MCF_IPSBAR + 0x00100051)

Definition at line 177 of file m528xsim.h.

#define MCFGPIO_PIN_MAX   180

Definition at line 234 of file m528xsim.h.

#define MCFGPIO_PJPAR   (MCF_IPSBAR + 0x00100054)

Definition at line 179 of file m528xsim.h.

#define MCFGPIO_PODR   MCFGPIO_PODR_A /* port output data */

Definition at line 226 of file m528xsim.h.

#define MCFGPIO_PODR_A   (MCF_IPSBAR + 0x00100000)

Definition at line 100 of file m528xsim.h.

#define MCFGPIO_PODR_AS   (MCF_IPSBAR + 0x0010000C)

Definition at line 112 of file m528xsim.h.

#define MCFGPIO_PODR_B   (MCF_IPSBAR + 0x00100001)

Definition at line 101 of file m528xsim.h.

#define MCFGPIO_PODR_C   (MCF_IPSBAR + 0x00100002)

Definition at line 102 of file m528xsim.h.

#define MCFGPIO_PODR_D   (MCF_IPSBAR + 0x00100003)

Definition at line 103 of file m528xsim.h.

#define MCFGPIO_PODR_DD   (MCF_IPSBAR + 0x00100009)

Definition at line 109 of file m528xsim.h.

#define MCFGPIO_PODR_E   (MCF_IPSBAR + 0x00100004)

Definition at line 104 of file m528xsim.h.

#define MCFGPIO_PODR_EH   (MCF_IPSBAR + 0x0010000A)

Definition at line 110 of file m528xsim.h.

#define MCFGPIO_PODR_EL   (MCF_IPSBAR + 0x0010000B)

Definition at line 111 of file m528xsim.h.

#define MCFGPIO_PODR_F   (MCF_IPSBAR + 0x00100005)

Definition at line 105 of file m528xsim.h.

#define MCFGPIO_PODR_G   (MCF_IPSBAR + 0x00100006)

Definition at line 106 of file m528xsim.h.

#define MCFGPIO_PODR_H   (MCF_IPSBAR + 0x00100007)

Definition at line 107 of file m528xsim.h.

#define MCFGPIO_PODR_J   (MCF_IPSBAR + 0x00100008)

Definition at line 108 of file m528xsim.h.

#define MCFGPIO_PODR_QS   (MCF_IPSBAR + 0x0010000D)

Definition at line 113 of file m528xsim.h.

#define MCFGPIO_PODR_SD   (MCF_IPSBAR + 0x0010000E)

Definition at line 114 of file m528xsim.h.

#define MCFGPIO_PODR_TC   (MCF_IPSBAR + 0x0010000F)

Definition at line 115 of file m528xsim.h.

#define MCFGPIO_PODR_TD   (MCF_IPSBAR + 0x00100010)

Definition at line 116 of file m528xsim.h.

#define MCFGPIO_PODR_UA   (MCF_IPSBAR + 0x00100011)

Definition at line 117 of file m528xsim.h.

#define MCFGPIO_PPDR   MCFGPIO_PPDSDR_A/* port pin data */

Definition at line 228 of file m528xsim.h.

#define MCFGPIO_PPDSDR_A   (MCF_IPSBAR + 0x00100028)

Definition at line 138 of file m528xsim.h.

#define MCFGPIO_PPDSDR_AS   (MCF_IPSBAR + 0x00100034)

Definition at line 150 of file m528xsim.h.

#define MCFGPIO_PPDSDR_B   (MCF_IPSBAR + 0x00100029)

Definition at line 139 of file m528xsim.h.

#define MCFGPIO_PPDSDR_C   (MCF_IPSBAR + 0x0010002A)

Definition at line 140 of file m528xsim.h.

#define MCFGPIO_PPDSDR_D   (MCF_IPSBAR + 0x0010002B)

Definition at line 141 of file m528xsim.h.

#define MCFGPIO_PPDSDR_DD   (MCF_IPSBAR + 0x00100031)

Definition at line 147 of file m528xsim.h.

#define MCFGPIO_PPDSDR_E   (MCF_IPSBAR + 0x0010002C)

Definition at line 142 of file m528xsim.h.

#define MCFGPIO_PPDSDR_EH   (MCF_IPSBAR + 0x00100032)

Definition at line 148 of file m528xsim.h.

#define MCFGPIO_PPDSDR_EL   (MCF_IPSBAR + 0x00100033)

Definition at line 149 of file m528xsim.h.

#define MCFGPIO_PPDSDR_F   (MCF_IPSBAR + 0x0010002D)

Definition at line 143 of file m528xsim.h.

#define MCFGPIO_PPDSDR_G   (MCF_IPSBAR + 0x0010002E)

Definition at line 144 of file m528xsim.h.

#define MCFGPIO_PPDSDR_H   (MCF_IPSBAR + 0x0010002F)

Definition at line 145 of file m528xsim.h.

#define MCFGPIO_PPDSDR_J   (MCF_IPSBAR + 0x00100030)

Definition at line 146 of file m528xsim.h.

#define MCFGPIO_PPDSDR_QS   (MCF_IPSBAR + 0x00100035)

Definition at line 151 of file m528xsim.h.

#define MCFGPIO_PPDSDR_SD   (MCF_IPSBAR + 0x00100036)

Definition at line 152 of file m528xsim.h.

#define MCFGPIO_PPDSDR_TC   (MCF_IPSBAR + 0x00100037)

Definition at line 153 of file m528xsim.h.

#define MCFGPIO_PPDSDR_TD   (MCF_IPSBAR + 0x00100038)

Definition at line 154 of file m528xsim.h.

#define MCFGPIO_PPDSDR_UA   (MCF_IPSBAR + 0x00100039)

Definition at line 155 of file m528xsim.h.

#define MCFGPIO_PQSPAR   (MCF_IPSBAR + 0x00100059)

Definition at line 183 of file m528xsim.h.

#define MCFGPIO_PSDPAR   (MCF_IPSBAR + 0x00100055)

Definition at line 180 of file m528xsim.h.

#define MCFGPIO_PTCPAR   (MCF_IPSBAR + 0x0010005A)

Definition at line 184 of file m528xsim.h.

#define MCFGPIO_PTDPAR   (MCF_IPSBAR + 0x0010005B)

Definition at line 185 of file m528xsim.h.

#define MCFGPIO_PUAPAR   (MCF_IPSBAR + 0x0010005C)

Definition at line 186 of file m528xsim.h.

#define MCFGPIO_SETR   MCFGPIO_PPDSDR_A/* set output */

Definition at line 229 of file m528xsim.h.

#define MCFGPTA_GPTDDR   (MCF_IPSBAR + 0x001A001E)

Definition at line 218 of file m528xsim.h.

#define MCFGPTA_GPTPORT   (MCF_IPSBAR + 0x001A001D)

Definition at line 217 of file m528xsim.h.

#define MCFGPTB_GPTDDR   (MCF_IPSBAR + 0x001B001E)

Definition at line 220 of file m528xsim.h.

#define MCFGPTB_GPTPORT   (MCF_IPSBAR + 0x001B001D)

Definition at line 219 of file m528xsim.h.

#define MCFICM_INTC0   (MCF_IPSBAR + 0x0c00) /* Base for Interrupt Ctrl 0 */

Definition at line 23 of file m528xsim.h.

#define MCFICM_INTC1   (MCF_IPSBAR + 0x0d00) /* Base for Interrupt Ctrl 0 */

Definition at line 24 of file m528xsim.h.

#define MCFINT_FECENTC0   29 /* Interrupt number for FEC */

Definition at line 43 of file m528xsim.h.

#define MCFINT_FECRX0   23 /* Interrupt number for FEC */

Definition at line 41 of file m528xsim.h.

#define MCFINT_FECTX0   27 /* Interrupt number for FEC */

Definition at line 42 of file m528xsim.h.

#define MCFINT_PIT1   55 /* Interrupt number for PIT1 */

Definition at line 44 of file m528xsim.h.

#define MCFINT_QSPI   18 /* Interrupt number for QSPI */

Definition at line 40 of file m528xsim.h.

#define MCFINT_UART0   13 /* Interrupt number for UART0 */

Definition at line 37 of file m528xsim.h.

#define MCFINT_UART1   14 /* Interrupt number for UART1 */

Definition at line 38 of file m528xsim.h.

#define MCFINT_UART2   15 /* Interrupt number for UART2 */

Definition at line 39 of file m528xsim.h.

#define MCFINT_VECBASE   64 /* Vector base number */

Definition at line 36 of file m528xsim.h.

#define MCFINTC_IACKL   0x19 /* */

Definition at line 33 of file m528xsim.h.

#define MCFINTC_ICR0   0x40 /* Base ICR register */

Definition at line 34 of file m528xsim.h.

#define MCFINTC_IMRH   0x08 /* Interrupt mask 32-63 */

Definition at line 28 of file m528xsim.h.

#define MCFINTC_IMRL   0x0c /* Interrupt mask 1-31 */

Definition at line 29 of file m528xsim.h.

#define MCFINTC_INTFRCH   0x10 /* Interrupt force 32-63 */

Definition at line 30 of file m528xsim.h.

#define MCFINTC_INTFRCL   0x14 /* Interrupt force 1-31 */

Definition at line 31 of file m528xsim.h.

#define MCFINTC_IPRH   0x00 /* Interrupt pending 32-63 */

Definition at line 26 of file m528xsim.h.

#define MCFINTC_IPRL   0x04 /* Interrupt pending 1-31 */

Definition at line 27 of file m528xsim.h.

#define MCFINTC_IRLR   0x18 /* */

Definition at line 32 of file m528xsim.h.

#define MCFPIT_BASE1   (MCF_IPSBAR + 0x00150000)

Definition at line 191 of file m528xsim.h.

#define MCFPIT_BASE2   (MCF_IPSBAR + 0x00160000)

Definition at line 192 of file m528xsim.h.

#define MCFPIT_BASE3   (MCF_IPSBAR + 0x00170000)

Definition at line 193 of file m528xsim.h.

#define MCFPIT_BASE4   (MCF_IPSBAR + 0x00180000)

Definition at line 194 of file m528xsim.h.

#define MCFQADC_DDRQA   (MCF_IPSBAR + 0x00190008)

Definition at line 211 of file m528xsim.h.

#define MCFQADC_DDRQB   (MCF_IPSBAR + 0x00190009)

Definition at line 212 of file m528xsim.h.

#define MCFQADC_PORTQA   (MCF_IPSBAR + 0x00190006)

Definition at line 209 of file m528xsim.h.

#define MCFQADC_PORTQB   (MCF_IPSBAR + 0x00190007)

Definition at line 210 of file m528xsim.h.

#define MCFQSPI_BASE   (MCF_IPSBAR + 0x340)

Definition at line 89 of file m528xsim.h.

#define MCFQSPI_CS0   147

Definition at line 92 of file m528xsim.h.

#define MCFQSPI_CS1   148

Definition at line 93 of file m528xsim.h.

#define MCFQSPI_CS2   149

Definition at line 94 of file m528xsim.h.

#define MCFQSPI_CS3   150

Definition at line 95 of file m528xsim.h.

#define MCFQSPI_SIZE   0x40

Definition at line 90 of file m528xsim.h.

#define MCFSIM_DACR0   (MCF_IPSBAR + 0x00000048) /* Base address 0 */

Definition at line 60 of file m528xsim.h.

#define MCFSIM_DACR1   (MCF_IPSBAR + 0x00000050) /* Base address 1 */

Definition at line 62 of file m528xsim.h.

#define MCFSIM_DCR   (MCF_IPSBAR + 0x00000044) /* Control */

Definition at line 59 of file m528xsim.h.

#define MCFSIM_DMR0   (MCF_IPSBAR + 0x0000004c) /* Address mask 0 */

Definition at line 61 of file m528xsim.h.

#define MCFSIM_DMR1   (MCF_IPSBAR + 0x00000054) /* Address mask 1 */

Definition at line 63 of file m528xsim.h.

#define MCFUART_BASE0   (MCF_IPSBAR + 0x00000200)

Definition at line 76 of file m528xsim.h.

#define MCFUART_BASE1   (MCF_IPSBAR + 0x00000240)

Definition at line 77 of file m528xsim.h.

#define MCFUART_BASE2   (MCF_IPSBAR + 0x00000280)

Definition at line 78 of file m528xsim.h.