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Macros
m532xsim.h File Reference
#include <asm/m53xxacr.h>

Go to the source code of this file.

Macros

#define CPU_NAME   "COLDFIRE(m532x)"
 
#define CPU_INSTR_PER_JIFFY   3
 
#define MCF_BUSCLK   (MCF_CLK / 3)
 
#define MCFINT_VECBASE   64
 
#define MCFINT_UART0   26 /* Interrupt number for UART0 */
 
#define MCFINT_UART1   27 /* Interrupt number for UART1 */
 
#define MCFINT_UART2   28 /* Interrupt number for UART2 */
 
#define MCFINT_QSPI   31 /* Interrupt number for QSPI */
 
#define MCFINT_FECRX0   36 /* Interrupt number for FEC */
 
#define MCFINT_FECTX0   40 /* Interrupt number for FEC */
 
#define MCFINT_FECENTC0   42 /* Interrupt number for FEC */
 
#define MCF_IRQ_UART0   (MCFINT_VECBASE + MCFINT_UART0)
 
#define MCF_IRQ_UART1   (MCFINT_VECBASE + MCFINT_UART1)
 
#define MCF_IRQ_UART2   (MCFINT_VECBASE + MCFINT_UART2)
 
#define MCF_IRQ_FECRX0   (MCFINT_VECBASE + MCFINT_FECRX0)
 
#define MCF_IRQ_FECTX0   (MCFINT_VECBASE + MCFINT_FECTX0)
 
#define MCF_IRQ_FECENTC0   (MCFINT_VECBASE + MCFINT_FECENTC0)
 
#define MCF_IRQ_QSPI   (MCFINT_VECBASE + MCFINT_QSPI)
 
#define MCF_WTM_WCR   0xFC098000
 
#define MCFSIM_IPRL   0xFC048004
 
#define MCFSIM_IPRH   0xFC048000
 
#define MCFSIM_IPR   MCFSIM_IPRL
 
#define MCFSIM_IMRL   0xFC04800C
 
#define MCFSIM_IMRH   0xFC048008
 
#define MCFSIM_IMR   MCFSIM_IMRL
 
#define MCFSIM_ICR0   0xFC048040
 
#define MCFSIM_ICR1   0xFC048041
 
#define MCFSIM_ICR2   0xFC048042
 
#define MCFSIM_ICR3   0xFC048043
 
#define MCFSIM_ICR4   0xFC048044
 
#define MCFSIM_ICR5   0xFC048045
 
#define MCFSIM_ICR6   0xFC048046
 
#define MCFSIM_ICR7   0xFC048047
 
#define MCFSIM_ICR8   0xFC048048
 
#define MCFSIM_ICR9   0xFC048049
 
#define MCFSIM_ICR10   0xFC04804A
 
#define MCFSIM_ICR11   0xFC04804B
 
#define MCFSIM_SWDICR   MCFSIM_ICR0 /* Watchdog timer ICR */
 
#define MCFSIM_TIMER1ICR   MCFSIM_ICR1 /* Timer 1 ICR */
 
#define MCFSIM_TIMER2ICR   MCFSIM_ICR2 /* Timer 2 ICR */
 
#define MCFSIM_UART1ICR   MCFSIM_ICR4 /* UART 1 ICR */
 
#define MCFSIM_UART2ICR   MCFSIM_ICR5 /* UART 2 ICR */
 
#define MCFSIM_DMA0ICR   MCFSIM_ICR6 /* DMA 0 ICR */
 
#define MCFSIM_DMA1ICR   MCFSIM_ICR7 /* DMA 1 ICR */
 
#define MCFSIM_DMA2ICR   MCFSIM_ICR8 /* DMA 2 ICR */
 
#define MCFSIM_DMA3ICR   MCFSIM_ICR9 /* DMA 3 ICR */
 
#define MCFINTC0_SIMR   0xFC04801C
 
#define MCFINTC0_CIMR   0xFC04801D
 
#define MCFINTC0_ICR0   0xFC048040
 
#define MCFINTC1_SIMR   0xFC04C01C
 
#define MCFINTC1_CIMR   0xFC04C01D
 
#define MCFINTC1_ICR0   0xFC04C040
 
#define MCFINTC2_SIMR   (0)
 
#define MCFINTC2_CIMR   (0)
 
#define MCFINTC2_ICR0   (0)
 
#define MCFSIM_ICR_TIMER1   (0xFC048040+32)
 
#define MCFSIM_ICR_TIMER2   (0xFC048040+33)
 
#define MCF_IRQ_TIMER   (64 + 32) /* Timer0 */
 
#define MCF_IRQ_PROFILER   (64 + 33) /* Timer1 */
 
#define MCFUART_BASE0   0xFC060000 /* Base address of UART1 */
 
#define MCFUART_BASE1   0xFC064000 /* Base address of UART2 */
 
#define MCFUART_BASE2   0xFC068000 /* Base address of UART3 */
 
#define MCFFEC_BASE0   0xFC030000 /* Base address of FEC0 */
 
#define MCFFEC_SIZE0   0x800 /* Size of FEC0 region */
 
#define MCFQSPI_BASE   0xFC058000 /* Base address of QSPI */
 
#define MCFQSPI_SIZE   0x40 /* Size of QSPI region */
 
#define MCFQSPI_CS0   84
 
#define MCFQSPI_CS1   85
 
#define MCFQSPI_CS2   86
 
#define MCFTIMER_BASE1   0xFC070000 /* Base address of TIMER1 */
 
#define MCFTIMER_BASE2   0xFC074000 /* Base address of TIMER2 */
 
#define MCFTIMER_BASE3   0xFC078000 /* Base address of TIMER3 */
 
#define MCFTIMER_BASE4   0xFC07C000 /* Base address of TIMER4 */
 
#define MCF_RCR   0xFC0A0000
 
#define MCF_RSR   0xFC0A0001
 
#define MCF_RCR_SWRESET   0x80 /* Software reset bit */
 
#define MCF_RCR_FRCSTOUT   0x40 /* Force external reset */
 
#define MCFPM_WCR   0xfc040013
 
#define MCFPM_PPMSR0   0xfc04002c
 
#define MCFPM_PPMCR0   0xfc04002d
 
#define MCFPM_PPMSR1   0xfc04002e
 
#define MCFPM_PPMCR1   0xfc04002f
 
#define MCFPM_PPMHR0   0xfc040030
 
#define MCFPM_PPMLR0   0xfc040034
 
#define MCFPM_PPMHR1   0xfc040038
 
#define MCFPM_LPCR   0xec090007
 
#define MCF_CCM_CCR   0xFC0A0004
 
#define MCF_CCM_RCON   0xFC0A0008
 
#define MCF_CCM_CIR   0xFC0A000A
 
#define MCF_CCM_MISCCR   0xFC0A0010
 
#define MCF_CCM_CDR   0xFC0A0012
 
#define MCF_CCM_UHCSR   0xFC0A0014
 
#define MCF_CCM_UOCSR   0xFC0A0016
 
#define MCF_CCM_CCR_RESERVED   (0x0001)
 
#define MCF_CCM_CCR_PLL_MODE   (0x0003)
 
#define MCF_CCM_CCR_OSC_MODE   (0x0005)
 
#define MCF_CCM_CCR_BOOTPS(x)   (((x)&0x0003)<<3|0x0001)
 
#define MCF_CCM_CCR_LOAD   (0x0021)
 
#define MCF_CCM_CCR_LIMP   (0x0041)
 
#define MCF_CCM_CCR_CSC(x)   (((x)&0x0003)<<8|0x0001)
 
#define MCF_CCM_RCON_RESERVED   (0x0001)
 
#define MCF_CCM_RCON_PLL_MODE   (0x0003)
 
#define MCF_CCM_RCON_OSC_MODE   (0x0005)
 
#define MCF_CCM_RCON_BOOTPS(x)   (((x)&0x0003)<<3|0x0001)
 
#define MCF_CCM_RCON_LOAD   (0x0021)
 
#define MCF_CCM_RCON_LIMP   (0x0041)
 
#define MCF_CCM_RCON_CSC(x)   (((x)&0x0003)<<8|0x0001)
 
#define MCF_CCM_CIR_PRN(x)   (((x)&0x003F)<<0)
 
#define MCF_CCM_CIR_PIN(x)   (((x)&0x03FF)<<6)
 
#define MCF_CCM_MISCCR_USBSRC   (0x0001)
 
#define MCF_CCM_MISCCR_USBDIV   (0x0002)
 
#define MCF_CCM_MISCCR_SSI_SRC   (0x0010)
 
#define MCF_CCM_MISCCR_TIM_DMA   (0x0020)
 
#define MCF_CCM_MISCCR_SSI_PUS   (0x0040)
 
#define MCF_CCM_MISCCR_SSI_PUE   (0x0080)
 
#define MCF_CCM_MISCCR_LCD_CHEN   (0x0100)
 
#define MCF_CCM_MISCCR_LIMP   (0x1000)
 
#define MCF_CCM_MISCCR_PLL_LOCK   (0x2000)
 
#define MCF_CCM_CDR_SSIDIV(x)   (((x)&0x000F)<<0)
 
#define MCF_CCM_CDR_LPDIV(x)   (((x)&0x000F)<<8)
 
#define MCF_CCM_UHCSR_XPDE   (0x0001)
 
#define MCF_CCM_UHCSR_UHMIE   (0x0002)
 
#define MCF_CCM_UHCSR_WKUP   (0x0004)
 
#define MCF_CCM_UHCSR_PORTIND(x)   (((x)&0x0003)<<14)
 
#define MCF_CCM_UOCSR_XPDE   (0x0001)
 
#define MCF_CCM_UOCSR_UOMIE   (0x0002)
 
#define MCF_CCM_UOCSR_WKUP   (0x0004)
 
#define MCF_CCM_UOCSR_PWRFLT   (0x0008)
 
#define MCF_CCM_UOCSR_SEND   (0x0010)
 
#define MCF_CCM_UOCSR_VVLD   (0x0020)
 
#define MCF_CCM_UOCSR_BVLD   (0x0040)
 
#define MCF_CCM_UOCSR_AVLD   (0x0080)
 
#define MCF_CCM_UOCSR_DPPU   (0x0100)
 
#define MCF_CCM_UOCSR_DCR_VBUS   (0x0200)
 
#define MCF_CCM_UOCSR_CRG_VBUS   (0x0400)
 
#define MCF_CCM_UOCSR_DRV_VBUS   (0x0800)
 
#define MCF_CCM_UOCSR_DMPD   (0x1000)
 
#define MCF_CCM_UOCSR_DPPD   (0x2000)
 
#define MCF_CCM_UOCSR_PORTIND(x)   (((x)&0x0003)<<14)
 
#define MCF_FBCS0_CSAR   0xFC008000
 
#define MCF_FBCS0_CSMR   0xFC008004
 
#define MCF_FBCS0_CSCR   0xFC008008
 
#define MCF_FBCS1_CSAR   0xFC00800C
 
#define MCF_FBCS1_CSMR   0xFC008010
 
#define MCF_FBCS1_CSCR   0xFC008014
 
#define MCF_FBCS2_CSAR   0xFC008018
 
#define MCF_FBCS2_CSMR   0xFC00801C
 
#define MCF_FBCS2_CSCR   0xFC008020
 
#define MCF_FBCS3_CSAR   0xFC008024
 
#define MCF_FBCS3_CSMR   0xFC008028
 
#define MCF_FBCS3_CSCR   0xFC00802C
 
#define MCF_FBCS4_CSAR   0xFC008030
 
#define MCF_FBCS4_CSMR   0xFC008034
 
#define MCF_FBCS4_CSCR   0xFC008038
 
#define MCF_FBCS5_CSAR   0xFC00803C
 
#define MCF_FBCS5_CSMR   0xFC008040
 
#define MCF_FBCS5_CSCR   0xFC008044
 
#define MCF_FBCS_CSAR_BA(x)   ((x)&0xFFFF0000)
 
#define MCF_FBCS_CSMR_V   (0x00000001)
 
#define MCF_FBCS_CSMR_WP   (0x00000100)
 
#define MCF_FBCS_CSMR_BAM(x)   (((x)&0x0000FFFF)<<16)
 
#define MCF_FBCS_CSMR_BAM_4G   (0xFFFF0000)
 
#define MCF_FBCS_CSMR_BAM_2G   (0x7FFF0000)
 
#define MCF_FBCS_CSMR_BAM_1G   (0x3FFF0000)
 
#define MCF_FBCS_CSMR_BAM_1024M   (0x3FFF0000)
 
#define MCF_FBCS_CSMR_BAM_512M   (0x1FFF0000)
 
#define MCF_FBCS_CSMR_BAM_256M   (0x0FFF0000)
 
#define MCF_FBCS_CSMR_BAM_128M   (0x07FF0000)
 
#define MCF_FBCS_CSMR_BAM_64M   (0x03FF0000)
 
#define MCF_FBCS_CSMR_BAM_32M   (0x01FF0000)
 
#define MCF_FBCS_CSMR_BAM_16M   (0x00FF0000)
 
#define MCF_FBCS_CSMR_BAM_8M   (0x007F0000)
 
#define MCF_FBCS_CSMR_BAM_4M   (0x003F0000)
 
#define MCF_FBCS_CSMR_BAM_2M   (0x001F0000)
 
#define MCF_FBCS_CSMR_BAM_1M   (0x000F0000)
 
#define MCF_FBCS_CSMR_BAM_1024K   (0x000F0000)
 
#define MCF_FBCS_CSMR_BAM_512K   (0x00070000)
 
#define MCF_FBCS_CSMR_BAM_256K   (0x00030000)
 
#define MCF_FBCS_CSMR_BAM_128K   (0x00010000)
 
#define MCF_FBCS_CSMR_BAM_64K   (0x00000000)
 
#define MCF_FBCS_CSCR_BSTW   (0x00000008)
 
#define MCF_FBCS_CSCR_BSTR   (0x00000010)
 
#define MCF_FBCS_CSCR_BEM   (0x00000020)
 
#define MCF_FBCS_CSCR_PS(x)   (((x)&0x00000003)<<6)
 
#define MCF_FBCS_CSCR_AA   (0x00000100)
 
#define MCF_FBCS_CSCR_SBM   (0x00000200)
 
#define MCF_FBCS_CSCR_WS(x)   (((x)&0x0000003F)<<10)
 
#define MCF_FBCS_CSCR_WRAH(x)   (((x)&0x00000003)<<16)
 
#define MCF_FBCS_CSCR_RDAH(x)   (((x)&0x00000003)<<18)
 
#define MCF_FBCS_CSCR_ASET(x)   (((x)&0x00000003)<<20)
 
#define MCF_FBCS_CSCR_SWSEN   (0x00800000)
 
#define MCF_FBCS_CSCR_SWS(x)   (((x)&0x0000003F)<<26)
 
#define MCF_FBCS_CSCR_PS_8   (0x0040)
 
#define MCF_FBCS_CSCR_PS_16   (0x0080)
 
#define MCF_FBCS_CSCR_PS_32   (0x0000)
 
#define MCFGPIO_PODR_FECH   (0xFC0A4000)
 
#define MCFGPIO_PODR_FECL   (0xFC0A4001)
 
#define MCFGPIO_PODR_SSI   (0xFC0A4002)
 
#define MCFGPIO_PODR_BUSCTL   (0xFC0A4003)
 
#define MCFGPIO_PODR_BE   (0xFC0A4004)
 
#define MCFGPIO_PODR_CS   (0xFC0A4005)
 
#define MCFGPIO_PODR_PWM   (0xFC0A4006)
 
#define MCFGPIO_PODR_FECI2C   (0xFC0A4007)
 
#define MCFGPIO_PODR_UART   (0xFC0A4009)
 
#define MCFGPIO_PODR_QSPI   (0xFC0A400A)
 
#define MCFGPIO_PODR_TIMER   (0xFC0A400B)
 
#define MCFGPIO_PODR_LCDDATAH   (0xFC0A400D)
 
#define MCFGPIO_PODR_LCDDATAM   (0xFC0A400E)
 
#define MCFGPIO_PODR_LCDDATAL   (0xFC0A400F)
 
#define MCFGPIO_PODR_LCDCTLH   (0xFC0A4010)
 
#define MCFGPIO_PODR_LCDCTLL   (0xFC0A4011)
 
#define MCFGPIO_PDDR_FECH   (0xFC0A4014)
 
#define MCFGPIO_PDDR_FECL   (0xFC0A4015)
 
#define MCFGPIO_PDDR_SSI   (0xFC0A4016)
 
#define MCFGPIO_PDDR_BUSCTL   (0xFC0A4017)
 
#define MCFGPIO_PDDR_BE   (0xFC0A4018)
 
#define MCFGPIO_PDDR_CS   (0xFC0A4019)
 
#define MCFGPIO_PDDR_PWM   (0xFC0A401A)
 
#define MCFGPIO_PDDR_FECI2C   (0xFC0A401B)
 
#define MCFGPIO_PDDR_UART   (0xFC0A401C)
 
#define MCFGPIO_PDDR_QSPI   (0xFC0A401E)
 
#define MCFGPIO_PDDR_TIMER   (0xFC0A401F)
 
#define MCFGPIO_PDDR_LCDDATAH   (0xFC0A4021)
 
#define MCFGPIO_PDDR_LCDDATAM   (0xFC0A4022)
 
#define MCFGPIO_PDDR_LCDDATAL   (0xFC0A4023)
 
#define MCFGPIO_PDDR_LCDCTLH   (0xFC0A4024)
 
#define MCFGPIO_PDDR_LCDCTLL   (0xFC0A4025)
 
#define MCFGPIO_PPDSDR_FECH   (0xFC0A4028)
 
#define MCFGPIO_PPDSDR_FECL   (0xFC0A4029)
 
#define MCFGPIO_PPDSDR_SSI   (0xFC0A402A)
 
#define MCFGPIO_PPDSDR_BUSCTL   (0xFC0A402B)
 
#define MCFGPIO_PPDSDR_BE   (0xFC0A402C)
 
#define MCFGPIO_PPDSDR_CS   (0xFC0A402D)
 
#define MCFGPIO_PPDSDR_PWM   (0xFC0A402E)
 
#define MCFGPIO_PPDSDR_FECI2C   (0xFC0A402F)
 
#define MCFGPIO_PPDSDR_UART   (0xFC0A4031)
 
#define MCFGPIO_PPDSDR_QSPI   (0xFC0A4032)
 
#define MCFGPIO_PPDSDR_TIMER   (0xFC0A4033)
 
#define MCFGPIO_PPDSDR_LCDDATAH   (0xFC0A4035)
 
#define MCFGPIO_PPDSDR_LCDDATAM   (0xFC0A4036)
 
#define MCFGPIO_PPDSDR_LCDDATAL   (0xFC0A4037)
 
#define MCFGPIO_PPDSDR_LCDCTLH   (0xFC0A4038)
 
#define MCFGPIO_PPDSDR_LCDCTLL   (0xFC0A4039)
 
#define MCFGPIO_PCLRR_FECH   (0xFC0A403C)
 
#define MCFGPIO_PCLRR_FECL   (0xFC0A403D)
 
#define MCFGPIO_PCLRR_SSI   (0xFC0A403E)
 
#define MCFGPIO_PCLRR_BUSCTL   (0xFC0A403F)
 
#define MCFGPIO_PCLRR_BE   (0xFC0A4040)
 
#define MCFGPIO_PCLRR_CS   (0xFC0A4041)
 
#define MCFGPIO_PCLRR_PWM   (0xFC0A4042)
 
#define MCFGPIO_PCLRR_FECI2C   (0xFC0A4043)
 
#define MCFGPIO_PCLRR_UART   (0xFC0A4045)
 
#define MCFGPIO_PCLRR_QSPI   (0xFC0A4046)
 
#define MCFGPIO_PCLRR_TIMER   (0xFC0A4047)
 
#define MCFGPIO_PCLRR_LCDDATAH   (0xFC0A4049)
 
#define MCFGPIO_PCLRR_LCDDATAM   (0xFC0A404A)
 
#define MCFGPIO_PCLRR_LCDDATAL   (0xFC0A404B)
 
#define MCFGPIO_PCLRR_LCDCTLH   (0xFC0A404C)
 
#define MCFGPIO_PCLRR_LCDCTLL   (0xFC0A404D)
 
#define MCFGPIO_PAR_FEC   (0xFC0A4050)
 
#define MCFGPIO_PAR_PWM   (0xFC0A4051)
 
#define MCFGPIO_PAR_BUSCTL   (0xFC0A4052)
 
#define MCFGPIO_PAR_FECI2C   (0xFC0A4053)
 
#define MCFGPIO_PAR_BE   (0xFC0A4054)
 
#define MCFGPIO_PAR_CS   (0xFC0A4055)
 
#define MCFGPIO_PAR_SSI   (0xFC0A4056)
 
#define MCFGPIO_PAR_UART   (0xFC0A4058)
 
#define MCFGPIO_PAR_QSPI   (0xFC0A405A)
 
#define MCFGPIO_PAR_TIMER   (0xFC0A405C)
 
#define MCFGPIO_PAR_LCDDATA   (0xFC0A405D)
 
#define MCFGPIO_PAR_LCDCTL   (0xFC0A405E)
 
#define MCFGPIO_PAR_IRQ   (0xFC0A4060)
 
#define MCFGPIO_MSCR_FLEXBUS   (0xFC0A4064)
 
#define MCFGPIO_MSCR_SDRAM   (0xFC0A4065)
 
#define MCFGPIO_DSCR_I2C   (0xFC0A4068)
 
#define MCFGPIO_DSCR_PWM   (0xFC0A4069)
 
#define MCFGPIO_DSCR_FEC   (0xFC0A406A)
 
#define MCFGPIO_DSCR_UART   (0xFC0A406B)
 
#define MCFGPIO_DSCR_QSPI   (0xFC0A406C)
 
#define MCFGPIO_DSCR_TIMER   (0xFC0A406D)
 
#define MCFGPIO_DSCR_SSI   (0xFC0A406E)
 
#define MCFGPIO_DSCR_LCD   (0xFC0A406F)
 
#define MCFGPIO_DSCR_DEBUG   (0xFC0A4070)
 
#define MCFGPIO_DSCR_CLKRST   (0xFC0A4071)
 
#define MCFGPIO_DSCR_IRQ   (0xFC0A4072)
 
#define MCF_GPIO_PODR_FECH_PODR_FECH0   (0x01)
 
#define MCF_GPIO_PODR_FECH_PODR_FECH1   (0x02)
 
#define MCF_GPIO_PODR_FECH_PODR_FECH2   (0x04)
 
#define MCF_GPIO_PODR_FECH_PODR_FECH3   (0x08)
 
#define MCF_GPIO_PODR_FECH_PODR_FECH4   (0x10)
 
#define MCF_GPIO_PODR_FECH_PODR_FECH5   (0x20)
 
#define MCF_GPIO_PODR_FECH_PODR_FECH6   (0x40)
 
#define MCF_GPIO_PODR_FECH_PODR_FECH7   (0x80)
 
#define MCF_GPIO_PODR_FECL_PODR_FECL0   (0x01)
 
#define MCF_GPIO_PODR_FECL_PODR_FECL1   (0x02)
 
#define MCF_GPIO_PODR_FECL_PODR_FECL2   (0x04)
 
#define MCF_GPIO_PODR_FECL_PODR_FECL3   (0x08)
 
#define MCF_GPIO_PODR_FECL_PODR_FECL4   (0x10)
 
#define MCF_GPIO_PODR_FECL_PODR_FECL5   (0x20)
 
#define MCF_GPIO_PODR_FECL_PODR_FECL6   (0x40)
 
#define MCF_GPIO_PODR_FECL_PODR_FECL7   (0x80)
 
#define MCF_GPIO_PODR_SSI_PODR_SSI0   (0x01)
 
#define MCF_GPIO_PODR_SSI_PODR_SSI1   (0x02)
 
#define MCF_GPIO_PODR_SSI_PODR_SSI2   (0x04)
 
#define MCF_GPIO_PODR_SSI_PODR_SSI3   (0x08)
 
#define MCF_GPIO_PODR_SSI_PODR_SSI4   (0x10)
 
#define MCF_GPIO_PODR_BUSCTL_POSDR_BUSCTL0   (0x01)
 
#define MCF_GPIO_PODR_BUSCTL_PODR_BUSCTL1   (0x02)
 
#define MCF_GPIO_PODR_BUSCTL_PODR_BUSCTL2   (0x04)
 
#define MCF_GPIO_PODR_BUSCTL_PODR_BUSCTL3   (0x08)
 
#define MCF_GPIO_PODR_BE_PODR_BE0   (0x01)
 
#define MCF_GPIO_PODR_BE_PODR_BE1   (0x02)
 
#define MCF_GPIO_PODR_BE_PODR_BE2   (0x04)
 
#define MCF_GPIO_PODR_BE_PODR_BE3   (0x08)
 
#define MCF_GPIO_PODR_CS_PODR_CS1   (0x02)
 
#define MCF_GPIO_PODR_CS_PODR_CS2   (0x04)
 
#define MCF_GPIO_PODR_CS_PODR_CS3   (0x08)
 
#define MCF_GPIO_PODR_CS_PODR_CS4   (0x10)
 
#define MCF_GPIO_PODR_CS_PODR_CS5   (0x20)
 
#define MCF_GPIO_PODR_PWM_PODR_PWM2   (0x04)
 
#define MCF_GPIO_PODR_PWM_PODR_PWM3   (0x08)
 
#define MCF_GPIO_PODR_PWM_PODR_PWM4   (0x10)
 
#define MCF_GPIO_PODR_PWM_PODR_PWM5   (0x20)
 
#define MCF_GPIO_PODR_FECI2C_PODR_FECI2C0   (0x01)
 
#define MCF_GPIO_PODR_FECI2C_PODR_FECI2C1   (0x02)
 
#define MCF_GPIO_PODR_FECI2C_PODR_FECI2C2   (0x04)
 
#define MCF_GPIO_PODR_FECI2C_PODR_FECI2C3   (0x08)
 
#define MCF_GPIO_PODR_UART_PODR_UART0   (0x01)
 
#define MCF_GPIO_PODR_UART_PODR_UART1   (0x02)
 
#define MCF_GPIO_PODR_UART_PODR_UART2   (0x04)
 
#define MCF_GPIO_PODR_UART_PODR_UART3   (0x08)
 
#define MCF_GPIO_PODR_UART_PODR_UART4   (0x10)
 
#define MCF_GPIO_PODR_UART_PODR_UART5   (0x20)
 
#define MCF_GPIO_PODR_UART_PODR_UART6   (0x40)
 
#define MCF_GPIO_PODR_UART_PODR_UART7   (0x80)
 
#define MCF_GPIO_PODR_QSPI_PODR_QSPI0   (0x01)
 
#define MCF_GPIO_PODR_QSPI_PODR_QSPI1   (0x02)
 
#define MCF_GPIO_PODR_QSPI_PODR_QSPI2   (0x04)
 
#define MCF_GPIO_PODR_QSPI_PODR_QSPI3   (0x08)
 
#define MCF_GPIO_PODR_QSPI_PODR_QSPI4   (0x10)
 
#define MCF_GPIO_PODR_QSPI_PODR_QSPI5   (0x20)
 
#define MCF_GPIO_PODR_TIMER_PODR_TIMER0   (0x01)
 
#define MCF_GPIO_PODR_TIMER_PODR_TIMER1   (0x02)
 
#define MCF_GPIO_PODR_TIMER_PODR_TIMER2   (0x04)
 
#define MCF_GPIO_PODR_TIMER_PODR_TIMER3   (0x08)
 
#define MCF_GPIO_PODR_LCDDATAH_PODR_LCDDATAH0   (0x01)
 
#define MCF_GPIO_PODR_LCDDATAH_PODR_LCDDATAH1   (0x02)
 
#define MCF_GPIO_PODR_LCDDATAM_PODR_LCDDATAM0   (0x01)
 
#define MCF_GPIO_PODR_LCDDATAM_PODR_LCDDATAM1   (0x02)
 
#define MCF_GPIO_PODR_LCDDATAM_PODR_LCDDATAM2   (0x04)
 
#define MCF_GPIO_PODR_LCDDATAM_PODR_LCDDATAM3   (0x08)
 
#define MCF_GPIO_PODR_LCDDATAM_PODR_LCDDATAM4   (0x10)
 
#define MCF_GPIO_PODR_LCDDATAM_PODR_LCDDATAM5   (0x20)
 
#define MCF_GPIO_PODR_LCDDATAM_PODR_LCDDATAM6   (0x40)
 
#define MCF_GPIO_PODR_LCDDATAM_PODR_LCDDATAM7   (0x80)
 
#define MCF_GPIO_PODR_LCDDATAL_PODR_LCDDATAL0   (0x01)
 
#define MCF_GPIO_PODR_LCDDATAL_PODR_LCDDATAL1   (0x02)
 
#define MCF_GPIO_PODR_LCDDATAL_PODR_LCDDATAL2   (0x04)
 
#define MCF_GPIO_PODR_LCDDATAL_PODR_LCDDATAL3   (0x08)
 
#define MCF_GPIO_PODR_LCDDATAL_PODR_LCDDATAL4   (0x10)
 
#define MCF_GPIO_PODR_LCDDATAL_PODR_LCDDATAL5   (0x20)
 
#define MCF_GPIO_PODR_LCDDATAL_PODR_LCDDATAL6   (0x40)
 
#define MCF_GPIO_PODR_LCDDATAL_PODR_LCDDATAL7   (0x80)
 
#define MCF_GPIO_PODR_LCDCTLH_PODR_LCDCTLH0   (0x01)
 
#define MCF_GPIO_PODR_LCDCTLL_PODR_LCDCTLL0   (0x01)
 
#define MCF_GPIO_PODR_LCDCTLL_PODR_LCDCTLL1   (0x02)
 
#define MCF_GPIO_PODR_LCDCTLL_PODR_LCDCTLL2   (0x04)
 
#define MCF_GPIO_PODR_LCDCTLL_PODR_LCDCTLL3   (0x08)
 
#define MCF_GPIO_PODR_LCDCTLL_PODR_LCDCTLL4   (0x10)
 
#define MCF_GPIO_PODR_LCDCTLL_PODR_LCDCTLL5   (0x20)
 
#define MCF_GPIO_PODR_LCDCTLL_PODR_LCDCTLL6   (0x40)
 
#define MCF_GPIO_PODR_LCDCTLL_PODR_LCDCTLL7   (0x80)
 
#define MCF_GPIO_PDDR_FECH_PDDR_FECH0   (0x01)
 
#define MCF_GPIO_PDDR_FECH_PDDR_FECH1   (0x02)
 
#define MCF_GPIO_PDDR_FECH_PDDR_FECH2   (0x04)
 
#define MCF_GPIO_PDDR_FECH_PDDR_FECH3   (0x08)
 
#define MCF_GPIO_PDDR_FECH_PDDR_FECH4   (0x10)
 
#define MCF_GPIO_PDDR_FECH_PDDR_FECH5   (0x20)
 
#define MCF_GPIO_PDDR_FECH_PDDR_FECH6   (0x40)
 
#define MCF_GPIO_PDDR_FECH_PDDR_FECH7   (0x80)
 
#define MCF_GPIO_PDDR_FECL_PDDR_FECL0   (0x01)
 
#define MCF_GPIO_PDDR_FECL_PDDR_FECL1   (0x02)
 
#define MCF_GPIO_PDDR_FECL_PDDR_FECL2   (0x04)
 
#define MCF_GPIO_PDDR_FECL_PDDR_FECL3   (0x08)
 
#define MCF_GPIO_PDDR_FECL_PDDR_FECL4   (0x10)
 
#define MCF_GPIO_PDDR_FECL_PDDR_FECL5   (0x20)
 
#define MCF_GPIO_PDDR_FECL_PDDR_FECL6   (0x40)
 
#define MCF_GPIO_PDDR_FECL_PDDR_FECL7   (0x80)
 
#define MCF_GPIO_PDDR_SSI_PDDR_SSI0   (0x01)
 
#define MCF_GPIO_PDDR_SSI_PDDR_SSI1   (0x02)
 
#define MCF_GPIO_PDDR_SSI_PDDR_SSI2   (0x04)
 
#define MCF_GPIO_PDDR_SSI_PDDR_SSI3   (0x08)
 
#define MCF_GPIO_PDDR_SSI_PDDR_SSI4   (0x10)
 
#define MCF_GPIO_PDDR_BUSCTL_POSDR_BUSCTL0   (0x01)
 
#define MCF_GPIO_PDDR_BUSCTL_PDDR_BUSCTL1   (0x02)
 
#define MCF_GPIO_PDDR_BUSCTL_PDDR_BUSCTL2   (0x04)
 
#define MCF_GPIO_PDDR_BUSCTL_PDDR_BUSCTL3   (0x08)
 
#define MCF_GPIO_PDDR_BE_PDDR_BE0   (0x01)
 
#define MCF_GPIO_PDDR_BE_PDDR_BE1   (0x02)
 
#define MCF_GPIO_PDDR_BE_PDDR_BE2   (0x04)
 
#define MCF_GPIO_PDDR_BE_PDDR_BE3   (0x08)
 
#define MCF_GPIO_PDDR_CS_PDDR_CS1   (0x02)
 
#define MCF_GPIO_PDDR_CS_PDDR_CS2   (0x04)
 
#define MCF_GPIO_PDDR_CS_PDDR_CS3   (0x08)
 
#define MCF_GPIO_PDDR_CS_PDDR_CS4   (0x10)
 
#define MCF_GPIO_PDDR_CS_PDDR_CS5   (0x20)
 
#define MCF_GPIO_PDDR_PWM_PDDR_PWM2   (0x04)
 
#define MCF_GPIO_PDDR_PWM_PDDR_PWM3   (0x08)
 
#define MCF_GPIO_PDDR_PWM_PDDR_PWM4   (0x10)
 
#define MCF_GPIO_PDDR_PWM_PDDR_PWM5   (0x20)
 
#define MCF_GPIO_PDDR_FECI2C_PDDR_FECI2C0   (0x01)
 
#define MCF_GPIO_PDDR_FECI2C_PDDR_FECI2C1   (0x02)
 
#define MCF_GPIO_PDDR_FECI2C_PDDR_FECI2C2   (0x04)
 
#define MCF_GPIO_PDDR_FECI2C_PDDR_FECI2C3   (0x08)
 
#define MCF_GPIO_PDDR_UART_PDDR_UART0   (0x01)
 
#define MCF_GPIO_PDDR_UART_PDDR_UART1   (0x02)
 
#define MCF_GPIO_PDDR_UART_PDDR_UART2   (0x04)
 
#define MCF_GPIO_PDDR_UART_PDDR_UART3   (0x08)
 
#define MCF_GPIO_PDDR_UART_PDDR_UART4   (0x10)
 
#define MCF_GPIO_PDDR_UART_PDDR_UART5   (0x20)
 
#define MCF_GPIO_PDDR_UART_PDDR_UART6   (0x40)
 
#define MCF_GPIO_PDDR_UART_PDDR_UART7   (0x80)
 
#define MCF_GPIO_PDDR_QSPI_PDDR_QSPI0   (0x01)
 
#define MCF_GPIO_PDDR_QSPI_PDDR_QSPI1   (0x02)
 
#define MCF_GPIO_PDDR_QSPI_PDDR_QSPI2   (0x04)
 
#define MCF_GPIO_PDDR_QSPI_PDDR_QSPI3   (0x08)
 
#define MCF_GPIO_PDDR_QSPI_PDDR_QSPI4   (0x10)
 
#define MCF_GPIO_PDDR_QSPI_PDDR_QSPI5   (0x20)
 
#define MCF_GPIO_PDDR_TIMER_PDDR_TIMER0   (0x01)
 
#define MCF_GPIO_PDDR_TIMER_PDDR_TIMER1   (0x02)
 
#define MCF_GPIO_PDDR_TIMER_PDDR_TIMER2   (0x04)
 
#define MCF_GPIO_PDDR_TIMER_PDDR_TIMER3   (0x08)
 
#define MCF_GPIO_PDDR_LCDDATAH_PDDR_LCDDATAH0   (0x01)
 
#define MCF_GPIO_PDDR_LCDDATAH_PDDR_LCDDATAH1   (0x02)
 
#define MCF_GPIO_PDDR_LCDDATAM_PDDR_LCDDATAM0   (0x01)
 
#define MCF_GPIO_PDDR_LCDDATAM_PDDR_LCDDATAM1   (0x02)
 
#define MCF_GPIO_PDDR_LCDDATAM_PDDR_LCDDATAM2   (0x04)
 
#define MCF_GPIO_PDDR_LCDDATAM_PDDR_LCDDATAM3   (0x08)
 
#define MCF_GPIO_PDDR_LCDDATAM_PDDR_LCDDATAM4   (0x10)
 
#define MCF_GPIO_PDDR_LCDDATAM_PDDR_LCDDATAM5   (0x20)
 
#define MCF_GPIO_PDDR_LCDDATAM_PDDR_LCDDATAM6   (0x40)
 
#define MCF_GPIO_PDDR_LCDDATAM_PDDR_LCDDATAM7   (0x80)
 
#define MCF_GPIO_PDDR_LCDDATAL_PDDR_LCDDATAL0   (0x01)
 
#define MCF_GPIO_PDDR_LCDDATAL_PDDR_LCDDATAL1   (0x02)
 
#define MCF_GPIO_PDDR_LCDDATAL_PDDR_LCDDATAL2   (0x04)
 
#define MCF_GPIO_PDDR_LCDDATAL_PDDR_LCDDATAL3   (0x08)
 
#define MCF_GPIO_PDDR_LCDDATAL_PDDR_LCDDATAL4   (0x10)
 
#define MCF_GPIO_PDDR_LCDDATAL_PDDR_LCDDATAL5   (0x20)
 
#define MCF_GPIO_PDDR_LCDDATAL_PDDR_LCDDATAL6   (0x40)
 
#define MCF_GPIO_PDDR_LCDDATAL_PDDR_LCDDATAL7   (0x80)
 
#define MCF_GPIO_PDDR_LCDCTLH_PDDR_LCDCTLH0   (0x01)
 
#define MCF_GPIO_PDDR_LCDCTLL_PDDR_LCDCTLL0   (0x01)
 
#define MCF_GPIO_PDDR_LCDCTLL_PDDR_LCDCTLL1   (0x02)
 
#define MCF_GPIO_PDDR_LCDCTLL_PDDR_LCDCTLL2   (0x04)
 
#define MCF_GPIO_PDDR_LCDCTLL_PDDR_LCDCTLL3   (0x08)
 
#define MCF_GPIO_PDDR_LCDCTLL_PDDR_LCDCTLL4   (0x10)
 
#define MCF_GPIO_PDDR_LCDCTLL_PDDR_LCDCTLL5   (0x20)
 
#define MCF_GPIO_PDDR_LCDCTLL_PDDR_LCDCTLL6   (0x40)
 
#define MCF_GPIO_PDDR_LCDCTLL_PDDR_LCDCTLL7   (0x80)
 
#define MCF_GPIO_PPDSDR_FECH_PPDSDR_FECH0   (0x01)
 
#define MCF_GPIO_PPDSDR_FECH_PPDSDR_FECH1   (0x02)
 
#define MCF_GPIO_PPDSDR_FECH_PPDSDR_FECH2   (0x04)
 
#define MCF_GPIO_PPDSDR_FECH_PPDSDR_FECH3   (0x08)
 
#define MCF_GPIO_PPDSDR_FECH_PPDSDR_FECH4   (0x10)
 
#define MCF_GPIO_PPDSDR_FECH_PPDSDR_FECH5   (0x20)
 
#define MCF_GPIO_PPDSDR_FECH_PPDSDR_FECH6   (0x40)
 
#define MCF_GPIO_PPDSDR_FECH_PPDSDR_FECH7   (0x80)
 
#define MCF_GPIO_PPDSDR_FECL_PPDSDR_FECL0   (0x01)
 
#define MCF_GPIO_PPDSDR_FECL_PPDSDR_FECL1   (0x02)
 
#define MCF_GPIO_PPDSDR_FECL_PPDSDR_FECL2   (0x04)
 
#define MCF_GPIO_PPDSDR_FECL_PPDSDR_FECL3   (0x08)
 
#define MCF_GPIO_PPDSDR_FECL_PPDSDR_FECL4   (0x10)
 
#define MCF_GPIO_PPDSDR_FECL_PPDSDR_FECL5   (0x20)
 
#define MCF_GPIO_PPDSDR_FECL_PPDSDR_FECL6   (0x40)
 
#define MCF_GPIO_PPDSDR_FECL_PPDSDR_FECL7   (0x80)
 
#define MCF_GPIO_PPDSDR_SSI_PPDSDR_SSI0   (0x01)
 
#define MCF_GPIO_PPDSDR_SSI_PPDSDR_SSI1   (0x02)
 
#define MCF_GPIO_PPDSDR_SSI_PPDSDR_SSI2   (0x04)
 
#define MCF_GPIO_PPDSDR_SSI_PPDSDR_SSI3   (0x08)
 
#define MCF_GPIO_PPDSDR_SSI_PPDSDR_SSI4   (0x10)
 
#define MCF_GPIO_PPDSDR_BUSCTL_POSDR_BUSCTL0   (0x01)
 
#define MCF_GPIO_PPDSDR_BUSCTL_PPDSDR_BUSCTL1   (0x02)
 
#define MCF_GPIO_PPDSDR_BUSCTL_PPDSDR_BUSCTL2   (0x04)
 
#define MCF_GPIO_PPDSDR_BUSCTL_PPDSDR_BUSCTL3   (0x08)
 
#define MCF_GPIO_PPDSDR_BE_PPDSDR_BE0   (0x01)
 
#define MCF_GPIO_PPDSDR_BE_PPDSDR_BE1   (0x02)
 
#define MCF_GPIO_PPDSDR_BE_PPDSDR_BE2   (0x04)
 
#define MCF_GPIO_PPDSDR_BE_PPDSDR_BE3   (0x08)
 
#define MCF_GPIO_PPDSDR_CS_PPDSDR_CS1   (0x02)
 
#define MCF_GPIO_PPDSDR_CS_PPDSDR_CS2   (0x04)
 
#define MCF_GPIO_PPDSDR_CS_PPDSDR_CS3   (0x08)
 
#define MCF_GPIO_PPDSDR_CS_PPDSDR_CS4   (0x10)
 
#define MCF_GPIO_PPDSDR_CS_PPDSDR_CS5   (0x20)
 
#define MCF_GPIO_PPDSDR_PWM_PPDSDR_PWM2   (0x04)
 
#define MCF_GPIO_PPDSDR_PWM_PPDSDR_PWM3   (0x08)
 
#define MCF_GPIO_PPDSDR_PWM_PPDSDR_PWM4   (0x10)
 
#define MCF_GPIO_PPDSDR_PWM_PPDSDR_PWM5   (0x20)
 
#define MCF_GPIO_PPDSDR_FECI2C_PPDSDR_FECI2C0   (0x01)
 
#define MCF_GPIO_PPDSDR_FECI2C_PPDSDR_FECI2C1   (0x02)
 
#define MCF_GPIO_PPDSDR_FECI2C_PPDSDR_FECI2C2   (0x04)
 
#define MCF_GPIO_PPDSDR_FECI2C_PPDSDR_FECI2C3   (0x08)
 
#define MCF_GPIO_PPDSDR_UART_PPDSDR_UART0   (0x01)
 
#define MCF_GPIO_PPDSDR_UART_PPDSDR_UART1   (0x02)
 
#define MCF_GPIO_PPDSDR_UART_PPDSDR_UART2   (0x04)
 
#define MCF_GPIO_PPDSDR_UART_PPDSDR_UART3   (0x08)
 
#define MCF_GPIO_PPDSDR_UART_PPDSDR_UART4   (0x10)
 
#define MCF_GPIO_PPDSDR_UART_PPDSDR_UART5   (0x20)
 
#define MCF_GPIO_PPDSDR_UART_PPDSDR_UART6   (0x40)
 
#define MCF_GPIO_PPDSDR_UART_PPDSDR_UART7   (0x80)
 
#define MCF_GPIO_PPDSDR_QSPI_PPDSDR_QSPI0   (0x01)
 
#define MCF_GPIO_PPDSDR_QSPI_PPDSDR_QSPI1   (0x02)
 
#define MCF_GPIO_PPDSDR_QSPI_PPDSDR_QSPI2   (0x04)
 
#define MCF_GPIO_PPDSDR_QSPI_PPDSDR_QSPI3   (0x08)
 
#define MCF_GPIO_PPDSDR_QSPI_PPDSDR_QSPI4   (0x10)
 
#define MCF_GPIO_PPDSDR_QSPI_PPDSDR_QSPI5   (0x20)
 
#define MCF_GPIO_PPDSDR_TIMER_PPDSDR_TIMER0   (0x01)
 
#define MCF_GPIO_PPDSDR_TIMER_PPDSDR_TIMER1   (0x02)
 
#define MCF_GPIO_PPDSDR_TIMER_PPDSDR_TIMER2   (0x04)
 
#define MCF_GPIO_PPDSDR_TIMER_PPDSDR_TIMER3   (0x08)
 
#define MCF_GPIO_PPDSDR_LCDDATAH_PPDSDR_LCDDATAH0   (0x01)
 
#define MCF_GPIO_PPDSDR_LCDDATAH_PPDSDR_LCDDATAH1   (0x02)
 
#define MCF_GPIO_PPDSDR_LCDDATAM_PPDSDR_LCDDATAM0   (0x01)
 
#define MCF_GPIO_PPDSDR_LCDDATAM_PPDSDR_LCDDATAM1   (0x02)
 
#define MCF_GPIO_PPDSDR_LCDDATAM_PPDSDR_LCDDATAM2   (0x04)
 
#define MCF_GPIO_PPDSDR_LCDDATAM_PPDSDR_LCDDATAM3   (0x08)
 
#define MCF_GPIO_PPDSDR_LCDDATAM_PPDSDR_LCDDATAM4   (0x10)
 
#define MCF_GPIO_PPDSDR_LCDDATAM_PPDSDR_LCDDATAM5   (0x20)
 
#define MCF_GPIO_PPDSDR_LCDDATAM_PPDSDR_LCDDATAM6   (0x40)
 
#define MCF_GPIO_PPDSDR_LCDDATAM_PPDSDR_LCDDATAM7   (0x80)
 
#define MCF_GPIO_PPDSDR_LCDDATAL_PPDSDR_LCDDATAL0   (0x01)
 
#define MCF_GPIO_PPDSDR_LCDDATAL_PPDSDR_LCDDATAL1   (0x02)
 
#define MCF_GPIO_PPDSDR_LCDDATAL_PPDSDR_LCDDATAL2   (0x04)
 
#define MCF_GPIO_PPDSDR_LCDDATAL_PPDSDR_LCDDATAL3   (0x08)
 
#define MCF_GPIO_PPDSDR_LCDDATAL_PPDSDR_LCDDATAL4   (0x10)
 
#define MCF_GPIO_PPDSDR_LCDDATAL_PPDSDR_LCDDATAL5   (0x20)
 
#define MCF_GPIO_PPDSDR_LCDDATAL_PPDSDR_LCDDATAL6   (0x40)
 
#define MCF_GPIO_PPDSDR_LCDDATAL_PPDSDR_LCDDATAL7   (0x80)
 
#define MCF_GPIO_PPDSDR_LCDCTLH_PPDSDR_LCDCTLH0   (0x01)
 
#define MCF_GPIO_PPDSDR_LCDCTLL_PPDSDR_LCDCTLL0   (0x01)
 
#define MCF_GPIO_PPDSDR_LCDCTLL_PPDSDR_LCDCTLL1   (0x02)
 
#define MCF_GPIO_PPDSDR_LCDCTLL_PPDSDR_LCDCTLL2   (0x04)
 
#define MCF_GPIO_PPDSDR_LCDCTLL_PPDSDR_LCDCTLL3   (0x08)
 
#define MCF_GPIO_PPDSDR_LCDCTLL_PPDSDR_LCDCTLL4   (0x10)
 
#define MCF_GPIO_PPDSDR_LCDCTLL_PPDSDR_LCDCTLL5   (0x20)
 
#define MCF_GPIO_PPDSDR_LCDCTLL_PPDSDR_LCDCTLL6   (0x40)
 
#define MCF_GPIO_PPDSDR_LCDCTLL_PPDSDR_LCDCTLL7   (0x80)
 
#define MCF_GPIO_PCLRR_FECH_PCLRR_FECH0   (0x01)
 
#define MCF_GPIO_PCLRR_FECH_PCLRR_FECH1   (0x02)
 
#define MCF_GPIO_PCLRR_FECH_PCLRR_FECH2   (0x04)
 
#define MCF_GPIO_PCLRR_FECH_PCLRR_FECH3   (0x08)
 
#define MCF_GPIO_PCLRR_FECH_PCLRR_FECH4   (0x10)
 
#define MCF_GPIO_PCLRR_FECH_PCLRR_FECH5   (0x20)
 
#define MCF_GPIO_PCLRR_FECH_PCLRR_FECH6   (0x40)
 
#define MCF_GPIO_PCLRR_FECH_PCLRR_FECH7   (0x80)
 
#define MCF_GPIO_PCLRR_FECL_PCLRR_FECL0   (0x01)
 
#define MCF_GPIO_PCLRR_FECL_PCLRR_FECL1   (0x02)
 
#define MCF_GPIO_PCLRR_FECL_PCLRR_FECL2   (0x04)
 
#define MCF_GPIO_PCLRR_FECL_PCLRR_FECL3   (0x08)
 
#define MCF_GPIO_PCLRR_FECL_PCLRR_FECL4   (0x10)
 
#define MCF_GPIO_PCLRR_FECL_PCLRR_FECL5   (0x20)
 
#define MCF_GPIO_PCLRR_FECL_PCLRR_FECL6   (0x40)
 
#define MCF_GPIO_PCLRR_FECL_PCLRR_FECL7   (0x80)
 
#define MCF_GPIO_PCLRR_SSI_PCLRR_SSI0   (0x01)
 
#define MCF_GPIO_PCLRR_SSI_PCLRR_SSI1   (0x02)
 
#define MCF_GPIO_PCLRR_SSI_PCLRR_SSI2   (0x04)
 
#define MCF_GPIO_PCLRR_SSI_PCLRR_SSI3   (0x08)
 
#define MCF_GPIO_PCLRR_SSI_PCLRR_SSI4   (0x10)
 
#define MCF_GPIO_PCLRR_BUSCTL_POSDR_BUSCTL0   (0x01)
 
#define MCF_GPIO_PCLRR_BUSCTL_PCLRR_BUSCTL1   (0x02)
 
#define MCF_GPIO_PCLRR_BUSCTL_PCLRR_BUSCTL2   (0x04)
 
#define MCF_GPIO_PCLRR_BUSCTL_PCLRR_BUSCTL3   (0x08)
 
#define MCF_GPIO_PCLRR_BE_PCLRR_BE0   (0x01)
 
#define MCF_GPIO_PCLRR_BE_PCLRR_BE1   (0x02)
 
#define MCF_GPIO_PCLRR_BE_PCLRR_BE2   (0x04)
 
#define MCF_GPIO_PCLRR_BE_PCLRR_BE3   (0x08)
 
#define MCF_GPIO_PCLRR_CS_PCLRR_CS1   (0x02)
 
#define MCF_GPIO_PCLRR_CS_PCLRR_CS2   (0x04)
 
#define MCF_GPIO_PCLRR_CS_PCLRR_CS3   (0x08)
 
#define MCF_GPIO_PCLRR_CS_PCLRR_CS4   (0x10)
 
#define MCF_GPIO_PCLRR_CS_PCLRR_CS5   (0x20)
 
#define MCF_GPIO_PCLRR_PWM_PCLRR_PWM2   (0x04)
 
#define MCF_GPIO_PCLRR_PWM_PCLRR_PWM3   (0x08)
 
#define MCF_GPIO_PCLRR_PWM_PCLRR_PWM4   (0x10)
 
#define MCF_GPIO_PCLRR_PWM_PCLRR_PWM5   (0x20)
 
#define MCF_GPIO_PCLRR_FECI2C_PCLRR_FECI2C0   (0x01)
 
#define MCF_GPIO_PCLRR_FECI2C_PCLRR_FECI2C1   (0x02)
 
#define MCF_GPIO_PCLRR_FECI2C_PCLRR_FECI2C2   (0x04)
 
#define MCF_GPIO_PCLRR_FECI2C_PCLRR_FECI2C3   (0x08)
 
#define MCF_GPIO_PCLRR_UART_PCLRR_UART0   (0x01)
 
#define MCF_GPIO_PCLRR_UART_PCLRR_UART1   (0x02)
 
#define MCF_GPIO_PCLRR_UART_PCLRR_UART2   (0x04)
 
#define MCF_GPIO_PCLRR_UART_PCLRR_UART3   (0x08)
 
#define MCF_GPIO_PCLRR_UART_PCLRR_UART4   (0x10)
 
#define MCF_GPIO_PCLRR_UART_PCLRR_UART5   (0x20)
 
#define MCF_GPIO_PCLRR_UART_PCLRR_UART6   (0x40)
 
#define MCF_GPIO_PCLRR_UART_PCLRR_UART7   (0x80)
 
#define MCF_GPIO_PCLRR_QSPI_PCLRR_QSPI0   (0x01)
 
#define MCF_GPIO_PCLRR_QSPI_PCLRR_QSPI1   (0x02)
 
#define MCF_GPIO_PCLRR_QSPI_PCLRR_QSPI2   (0x04)
 
#define MCF_GPIO_PCLRR_QSPI_PCLRR_QSPI3   (0x08)
 
#define MCF_GPIO_PCLRR_QSPI_PCLRR_QSPI4   (0x10)
 
#define MCF_GPIO_PCLRR_QSPI_PCLRR_QSPI5   (0x20)
 
#define MCF_GPIO_PCLRR_TIMER_PCLRR_TIMER0   (0x01)
 
#define MCF_GPIO_PCLRR_TIMER_PCLRR_TIMER1   (0x02)
 
#define MCF_GPIO_PCLRR_TIMER_PCLRR_TIMER2   (0x04)
 
#define MCF_GPIO_PCLRR_TIMER_PCLRR_TIMER3   (0x08)
 
#define MCF_GPIO_PCLRR_LCDDATAH_PCLRR_LCDDATAH0   (0x01)
 
#define MCF_GPIO_PCLRR_LCDDATAH_PCLRR_LCDDATAH1   (0x02)
 
#define MCF_GPIO_PCLRR_LCDDATAM_PCLRR_LCDDATAM0   (0x01)
 
#define MCF_GPIO_PCLRR_LCDDATAM_PCLRR_LCDDATAM1   (0x02)
 
#define MCF_GPIO_PCLRR_LCDDATAM_PCLRR_LCDDATAM2   (0x04)
 
#define MCF_GPIO_PCLRR_LCDDATAM_PCLRR_LCDDATAM3   (0x08)
 
#define MCF_GPIO_PCLRR_LCDDATAM_PCLRR_LCDDATAM4   (0x10)
 
#define MCF_GPIO_PCLRR_LCDDATAM_PCLRR_LCDDATAM5   (0x20)
 
#define MCF_GPIO_PCLRR_LCDDATAM_PCLRR_LCDDATAM6   (0x40)
 
#define MCF_GPIO_PCLRR_LCDDATAM_PCLRR_LCDDATAM7   (0x80)
 
#define MCF_GPIO_PCLRR_LCDDATAL_PCLRR_LCDDATAL0   (0x01)
 
#define MCF_GPIO_PCLRR_LCDDATAL_PCLRR_LCDDATAL1   (0x02)
 
#define MCF_GPIO_PCLRR_LCDDATAL_PCLRR_LCDDATAL2   (0x04)
 
#define MCF_GPIO_PCLRR_LCDDATAL_PCLRR_LCDDATAL3   (0x08)
 
#define MCF_GPIO_PCLRR_LCDDATAL_PCLRR_LCDDATAL4   (0x10)
 
#define MCF_GPIO_PCLRR_LCDDATAL_PCLRR_LCDDATAL5   (0x20)
 
#define MCF_GPIO_PCLRR_LCDDATAL_PCLRR_LCDDATAL6   (0x40)
 
#define MCF_GPIO_PCLRR_LCDDATAL_PCLRR_LCDDATAL7   (0x80)
 
#define MCF_GPIO_PCLRR_LCDCTLH_PCLRR_LCDCTLH0   (0x01)
 
#define MCF_GPIO_PCLRR_LCDCTLL_PCLRR_LCDCTLL0   (0x01)
 
#define MCF_GPIO_PCLRR_LCDCTLL_PCLRR_LCDCTLL1   (0x02)
 
#define MCF_GPIO_PCLRR_LCDCTLL_PCLRR_LCDCTLL2   (0x04)
 
#define MCF_GPIO_PCLRR_LCDCTLL_PCLRR_LCDCTLL3   (0x08)
 
#define MCF_GPIO_PCLRR_LCDCTLL_PCLRR_LCDCTLL4   (0x10)
 
#define MCF_GPIO_PCLRR_LCDCTLL_PCLRR_LCDCTLL5   (0x20)
 
#define MCF_GPIO_PCLRR_LCDCTLL_PCLRR_LCDCTLL6   (0x40)
 
#define MCF_GPIO_PCLRR_LCDCTLL_PCLRR_LCDCTLL7   (0x80)
 
#define MCF_GPIO_PAR_FEC_PAR_FEC_MII(x)   (((x)&0x03)<<0)
 
#define MCF_GPIO_PAR_FEC_PAR_FEC_7W(x)   (((x)&0x03)<<2)
 
#define MCF_GPIO_PAR_FEC_PAR_FEC_7W_GPIO   (0x00)
 
#define MCF_GPIO_PAR_FEC_PAR_FEC_7W_URTS1   (0x04)
 
#define MCF_GPIO_PAR_FEC_PAR_FEC_7W_FEC   (0x0C)
 
#define MCF_GPIO_PAR_FEC_PAR_FEC_MII_GPIO   (0x00)
 
#define MCF_GPIO_PAR_FEC_PAR_FEC_MII_UART   (0x01)
 
#define MCF_GPIO_PAR_FEC_PAR_FEC_MII_FEC   (0x03)
 
#define MCF_GPIO_PAR_PWM_PAR_PWM1(x)   (((x)&0x03)<<0)
 
#define MCF_GPIO_PAR_PWM_PAR_PWM3(x)   (((x)&0x03)<<2)
 
#define MCF_GPIO_PAR_PWM_PAR_PWM5   (0x10)
 
#define MCF_GPIO_PAR_PWM_PAR_PWM7   (0x20)
 
#define MCF_GPIO_PAR_BUSCTL_PAR_TS(x)   (((x)&0x03)<<3)
 
#define MCF_GPIO_PAR_BUSCTL_PAR_RWB   (0x20)
 
#define MCF_GPIO_PAR_BUSCTL_PAR_TA   (0x40)
 
#define MCF_GPIO_PAR_BUSCTL_PAR_OE   (0x80)
 
#define MCF_GPIO_PAR_BUSCTL_PAR_OE_GPIO   (0x00)
 
#define MCF_GPIO_PAR_BUSCTL_PAR_OE_OE   (0x80)
 
#define MCF_GPIO_PAR_BUSCTL_PAR_TA_GPIO   (0x00)
 
#define MCF_GPIO_PAR_BUSCTL_PAR_TA_TA   (0x40)
 
#define MCF_GPIO_PAR_BUSCTL_PAR_RWB_GPIO   (0x00)
 
#define MCF_GPIO_PAR_BUSCTL_PAR_RWB_RWB   (0x20)
 
#define MCF_GPIO_PAR_BUSCTL_PAR_TS_GPIO   (0x00)
 
#define MCF_GPIO_PAR_BUSCTL_PAR_TS_DACK0   (0x10)
 
#define MCF_GPIO_PAR_BUSCTL_PAR_TS_TS   (0x18)
 
#define MCF_GPIO_PAR_FECI2C_PAR_SDA(x)   (((x)&0x03)<<0)
 
#define MCF_GPIO_PAR_FECI2C_PAR_SCL(x)   (((x)&0x03)<<2)
 
#define MCF_GPIO_PAR_FECI2C_PAR_MDIO(x)   (((x)&0x03)<<4)
 
#define MCF_GPIO_PAR_FECI2C_PAR_MDC(x)   (((x)&0x03)<<6)
 
#define MCF_GPIO_PAR_FECI2C_PAR_MDC_GPIO   (0x00)
 
#define MCF_GPIO_PAR_FECI2C_PAR_MDC_UTXD2   (0x40)
 
#define MCF_GPIO_PAR_FECI2C_PAR_MDC_SCL   (0x80)
 
#define MCF_GPIO_PAR_FECI2C_PAR_MDC_EMDC   (0xC0)
 
#define MCF_GPIO_PAR_FECI2C_PAR_MDIO_GPIO   (0x00)
 
#define MCF_GPIO_PAR_FECI2C_PAR_MDIO_URXD2   (0x10)
 
#define MCF_GPIO_PAR_FECI2C_PAR_MDIO_SDA   (0x20)
 
#define MCF_GPIO_PAR_FECI2C_PAR_MDIO_EMDIO   (0x30)
 
#define MCF_GPIO_PAR_FECI2C_PAR_SCL_GPIO   (0x00)
 
#define MCF_GPIO_PAR_FECI2C_PAR_SCL_UTXD2   (0x04)
 
#define MCF_GPIO_PAR_FECI2C_PAR_SCL_SCL   (0x0C)
 
#define MCF_GPIO_PAR_FECI2C_PAR_SDA_GPIO   (0x00)
 
#define MCF_GPIO_PAR_FECI2C_PAR_SDA_URXD2   (0x02)
 
#define MCF_GPIO_PAR_FECI2C_PAR_SDA_SDA   (0x03)
 
#define MCF_GPIO_PAR_BE_PAR_BE0   (0x01)
 
#define MCF_GPIO_PAR_BE_PAR_BE1   (0x02)
 
#define MCF_GPIO_PAR_BE_PAR_BE2   (0x04)
 
#define MCF_GPIO_PAR_BE_PAR_BE3   (0x08)
 
#define MCF_GPIO_PAR_CS_PAR_CS1   (0x02)
 
#define MCF_GPIO_PAR_CS_PAR_CS2   (0x04)
 
#define MCF_GPIO_PAR_CS_PAR_CS3   (0x08)
 
#define MCF_GPIO_PAR_CS_PAR_CS4   (0x10)
 
#define MCF_GPIO_PAR_CS_PAR_CS5   (0x20)
 
#define MCF_GPIO_PAR_CS_PAR_CS_CS1_GPIO   (0x00)
 
#define MCF_GPIO_PAR_CS_PAR_CS_CS1_SDCS1   (0x01)
 
#define MCF_GPIO_PAR_CS_PAR_CS_CS1_CS1   (0x03)
 
#define MCF_GPIO_PAR_SSI_PAR_MCLK   (0x0080)
 
#define MCF_GPIO_PAR_SSI_PAR_TXD(x)   (((x)&0x0003)<<8)
 
#define MCF_GPIO_PAR_SSI_PAR_RXD(x)   (((x)&0x0003)<<10)
 
#define MCF_GPIO_PAR_SSI_PAR_FS(x)   (((x)&0x0003)<<12)
 
#define MCF_GPIO_PAR_SSI_PAR_BCLK(x)   (((x)&0x0003)<<14)
 
#define MCF_GPIO_PAR_UART_PAR_UTXD0   (0x0001)
 
#define MCF_GPIO_PAR_UART_PAR_URXD0   (0x0002)
 
#define MCF_GPIO_PAR_UART_PAR_URTS0   (0x0004)
 
#define MCF_GPIO_PAR_UART_PAR_UCTS0   (0x0008)
 
#define MCF_GPIO_PAR_UART_PAR_UTXD1(x)   (((x)&0x0003)<<4)
 
#define MCF_GPIO_PAR_UART_PAR_URXD1(x)   (((x)&0x0003)<<6)
 
#define MCF_GPIO_PAR_UART_PAR_URTS1(x)   (((x)&0x0003)<<8)
 
#define MCF_GPIO_PAR_UART_PAR_UCTS1(x)   (((x)&0x0003)<<10)
 
#define MCF_GPIO_PAR_UART_PAR_UCTS1_GPIO   (0x0000)
 
#define MCF_GPIO_PAR_UART_PAR_UCTS1_SSI_BCLK   (0x0800)
 
#define MCF_GPIO_PAR_UART_PAR_UCTS1_ULPI_D7   (0x0400)
 
#define MCF_GPIO_PAR_UART_PAR_UCTS1_UCTS1   (0x0C00)
 
#define MCF_GPIO_PAR_UART_PAR_URTS1_GPIO   (0x0000)
 
#define MCF_GPIO_PAR_UART_PAR_URTS1_SSI_FS   (0x0200)
 
#define MCF_GPIO_PAR_UART_PAR_URTS1_ULPI_D6   (0x0100)
 
#define MCF_GPIO_PAR_UART_PAR_URTS1_URTS1   (0x0300)
 
#define MCF_GPIO_PAR_UART_PAR_URXD1_GPIO   (0x0000)
 
#define MCF_GPIO_PAR_UART_PAR_URXD1_SSI_RXD   (0x0080)
 
#define MCF_GPIO_PAR_UART_PAR_URXD1_ULPI_D5   (0x0040)
 
#define MCF_GPIO_PAR_UART_PAR_URXD1_URXD1   (0x00C0)
 
#define MCF_GPIO_PAR_UART_PAR_UTXD1_GPIO   (0x0000)
 
#define MCF_GPIO_PAR_UART_PAR_UTXD1_SSI_TXD   (0x0020)
 
#define MCF_GPIO_PAR_UART_PAR_UTXD1_ULPI_D4   (0x0010)
 
#define MCF_GPIO_PAR_UART_PAR_UTXD1_UTXD1   (0x0030)
 
#define MCF_GPIO_PAR_QSPI_PAR_SCK(x)   (((x)&0x0003)<<4)
 
#define MCF_GPIO_PAR_QSPI_PAR_DOUT(x)   (((x)&0x0003)<<6)
 
#define MCF_GPIO_PAR_QSPI_PAR_DIN(x)   (((x)&0x0003)<<8)
 
#define MCF_GPIO_PAR_QSPI_PAR_PCS0(x)   (((x)&0x0003)<<10)
 
#define MCF_GPIO_PAR_QSPI_PAR_PCS1(x)   (((x)&0x0003)<<12)
 
#define MCF_GPIO_PAR_QSPI_PAR_PCS2(x)   (((x)&0x0003)<<14)
 
#define MCF_GPIO_PAR_TIMER_PAR_TIN0(x)   (((x)&0x03)<<0)
 
#define MCF_GPIO_PAR_TIMER_PAR_TIN1(x)   (((x)&0x03)<<2)
 
#define MCF_GPIO_PAR_TIMER_PAR_TIN2(x)   (((x)&0x03)<<4)
 
#define MCF_GPIO_PAR_TIMER_PAR_TIN3(x)   (((x)&0x03)<<6)
 
#define MCF_GPIO_PAR_TIMER_PAR_TIN3_GPIO   (0x00)
 
#define MCF_GPIO_PAR_TIMER_PAR_TIN3_TOUT3   (0x80)
 
#define MCF_GPIO_PAR_TIMER_PAR_TIN3_URXD2   (0x40)
 
#define MCF_GPIO_PAR_TIMER_PAR_TIN3_TIN3   (0xC0)
 
#define MCF_GPIO_PAR_TIMER_PAR_TIN2_GPIO   (0x00)
 
#define MCF_GPIO_PAR_TIMER_PAR_TIN2_TOUT2   (0x20)
 
#define MCF_GPIO_PAR_TIMER_PAR_TIN2_UTXD2   (0x10)
 
#define MCF_GPIO_PAR_TIMER_PAR_TIN2_TIN2   (0x30)
 
#define MCF_GPIO_PAR_TIMER_PAR_TIN1_GPIO   (0x00)
 
#define MCF_GPIO_PAR_TIMER_PAR_TIN1_TOUT1   (0x08)
 
#define MCF_GPIO_PAR_TIMER_PAR_TIN1_DACK1   (0x04)
 
#define MCF_GPIO_PAR_TIMER_PAR_TIN1_TIN1   (0x0C)
 
#define MCF_GPIO_PAR_TIMER_PAR_TIN0_GPIO   (0x00)
 
#define MCF_GPIO_PAR_TIMER_PAR_TIN0_TOUT0   (0x02)
 
#define MCF_GPIO_PAR_TIMER_PAR_TIN0_DREQ0   (0x01)
 
#define MCF_GPIO_PAR_TIMER_PAR_TIN0_TIN0   (0x03)
 
#define MCF_GPIO_PAR_LCDDATA_PAR_LD7_0(x)   (((x)&0x03)<<0)
 
#define MCF_GPIO_PAR_LCDDATA_PAR_LD15_8(x)   (((x)&0x03)<<2)
 
#define MCF_GPIO_PAR_LCDDATA_PAR_LD16(x)   (((x)&0x03)<<4)
 
#define MCF_GPIO_PAR_LCDDATA_PAR_LD17(x)   (((x)&0x03)<<6)
 
#define MCF_GPIO_PAR_LCDCTL_PAR_CLS   (0x0001)
 
#define MCF_GPIO_PAR_LCDCTL_PAR_PS   (0x0002)
 
#define MCF_GPIO_PAR_LCDCTL_PAR_REV   (0x0004)
 
#define MCF_GPIO_PAR_LCDCTL_PAR_SPL_SPR   (0x0008)
 
#define MCF_GPIO_PAR_LCDCTL_PAR_CONTRAST   (0x0010)
 
#define MCF_GPIO_PAR_LCDCTL_PAR_LSCLK   (0x0020)
 
#define MCF_GPIO_PAR_LCDCTL_PAR_LP_HSYNC   (0x0040)
 
#define MCF_GPIO_PAR_LCDCTL_PAR_FLM_VSYNC   (0x0080)
 
#define MCF_GPIO_PAR_LCDCTL_PAR_ACD_OE   (0x0100)
 
#define MCF_GPIO_PAR_IRQ_PAR_IRQ1(x)   (((x)&0x0003)<<4)
 
#define MCF_GPIO_PAR_IRQ_PAR_IRQ2(x)   (((x)&0x0003)<<6)
 
#define MCF_GPIO_PAR_IRQ_PAR_IRQ4(x)   (((x)&0x0003)<<8)
 
#define MCF_GPIO_PAR_IRQ_PAR_IRQ5(x)   (((x)&0x0003)<<10)
 
#define MCF_GPIO_PAR_IRQ_PAR_IRQ6(x)   (((x)&0x0003)<<12)
 
#define MCF_GPIO_MSCR_FLEXBUS_MSCR_ADDRCTL(x)   (((x)&0x03)<<0)
 
#define MCF_GPIO_MSCR_FLEXBUS_MSCR_DLOWER(x)   (((x)&0x03)<<2)
 
#define MCF_GPIO_MSCR_FLEXBUS_MSCR_DUPPER(x)   (((x)&0x03)<<4)
 
#define MCF_GPIO_MSCR_SDRAM_MSCR_SDRAM(x)   (((x)&0x03)<<0)
 
#define MCF_GPIO_MSCR_SDRAM_MSCR_SDCLK(x)   (((x)&0x03)<<2)
 
#define MCF_GPIO_MSCR_SDRAM_MSCR_SDCLKB(x)   (((x)&0x03)<<4)
 
#define MCF_GPIO_DSCR_I2C_I2C_DSE(x)   (((x)&0x03)<<0)
 
#define MCF_GPIO_DSCR_PWM_PWM_DSE(x)   (((x)&0x03)<<0)
 
#define MCF_GPIO_DSCR_FEC_FEC_DSE(x)   (((x)&0x03)<<0)
 
#define MCF_GPIO_DSCR_UART_UART0_DSE(x)   (((x)&0x03)<<0)
 
#define MCF_GPIO_DSCR_UART_UART1_DSE(x)   (((x)&0x03)<<2)
 
#define MCF_GPIO_DSCR_QSPI_QSPI_DSE(x)   (((x)&0x03)<<0)
 
#define MCF_GPIO_DSCR_TIMER_TIMER_DSE(x)   (((x)&0x03)<<0)
 
#define MCF_GPIO_DSCR_SSI_SSI_DSE(x)   (((x)&0x03)<<0)
 
#define MCF_GPIO_DSCR_LCD_LCD_DSE(x)   (((x)&0x03)<<0)
 
#define MCF_GPIO_DSCR_DEBUG_DEBUG_DSE(x)   (((x)&0x03)<<0)
 
#define MCF_GPIO_DSCR_CLKRST_CLKRST_DSE(x)   (((x)&0x03)<<0)
 
#define MCF_GPIO_DSCR_IRQ_IRQ_DSE(x)   (((x)&0x03)<<0)
 
#define MCFGPIO_PODR   MCFGPIO_PODR_FECH
 
#define MCFGPIO_PDDR   MCFGPIO_PDDR_FECH
 
#define MCFGPIO_PPDR   MCFGPIO_PPDSDR_FECH
 
#define MCFGPIO_SETR   MCFGPIO_PPDSDR_FECH
 
#define MCFGPIO_CLRR   MCFGPIO_PCLRR_FECH
 
#define MCFGPIO_PIN_MAX   136
 
#define MCFGPIO_IRQ_MAX   8
 
#define MCFGPIO_IRQ_VECBASE   MCFINT_VECBASE
 
#define MCF_PLL_PODR   0xFC0C0000
 
#define MCF_PLL_PLLCR   0xFC0C0004
 
#define MCF_PLL_PMDR   0xFC0C0008
 
#define MCF_PLL_PFDR   0xFC0C000C
 
#define MCF_PLL_PODR_BUSDIV(x)   (((x)&0x0F)<<0)
 
#define MCF_PLL_PODR_CPUDIV(x)   (((x)&0x0F)<<4)
 
#define MCF_PLL_PLLCR_DITHDEV(x)   (((x)&0x07)<<0)
 
#define MCF_PLL_PLLCR_DITHEN   (0x80)
 
#define MCF_PLL_PMDR_MODDIV(x)   (((x)&0xFF)<<0)
 
#define MCF_PLL_PFDR_MFD(x)   (((x)&0xFF)<<0)
 
#define MCF_SCM_MPR   0xFC000000
 
#define MCF_SCM_PACRA   0xFC000020
 
#define MCF_SCM_PACRB   0xFC000024
 
#define MCF_SCM_PACRC   0xFC000028
 
#define MCF_SCM_PACRD   0xFC00002C
 
#define MCF_SCM_PACRE   0xFC000040
 
#define MCF_SCM_PACRF   0xFC000044
 
#define MCF_SCM_BCR   0xFC040024
 
#define MCF_SDRAMC_SDMR   0xFC0B8000
 
#define MCF_SDRAMC_SDCR   0xFC0B8004
 
#define MCF_SDRAMC_SDCFG1   0xFC0B8008
 
#define MCF_SDRAMC_SDCFG2   0xFC0B800C
 
#define MCF_SDRAMC_LIMP_FIX   0xFC0B8080
 
#define MCF_SDRAMC_SDDS   0xFC0B8100
 
#define MCF_SDRAMC_SDCS0   0xFC0B8110
 
#define MCF_SDRAMC_SDCS1   0xFC0B8114
 
#define MCF_SDRAMC_SDCS2   0xFC0B8118
 
#define MCF_SDRAMC_SDCS3   0xFC0B811C
 
#define MCF_SDRAMC_SDMR_CMD   (0x00010000)
 
#define MCF_SDRAMC_SDMR_AD(x)   (((x)&0x00000FFF)<<18)
 
#define MCF_SDRAMC_SDMR_BNKAD(x)   (((x)&0x00000003)<<30)
 
#define MCF_SDRAMC_SDMR_BNKAD_LMR   (0x00000000)
 
#define MCF_SDRAMC_SDMR_BNKAD_LEMR   (0x40000000)
 
#define MCF_SDRAMC_SDCR_IPALL   (0x00000002)
 
#define MCF_SDRAMC_SDCR_IREF   (0x00000004)
 
#define MCF_SDRAMC_SDCR_DQS_OE(x)   (((x)&0x0000000F)<<8)
 
#define MCF_SDRAMC_SDCR_PS(x)   (((x)&0x00000003)<<12)
 
#define MCF_SDRAMC_SDCR_RCNT(x)   (((x)&0x0000003F)<<16)
 
#define MCF_SDRAMC_SDCR_OE_RULE   (0x00400000)
 
#define MCF_SDRAMC_SDCR_MUX(x)   (((x)&0x00000003)<<24)
 
#define MCF_SDRAMC_SDCR_REF   (0x10000000)
 
#define MCF_SDRAMC_SDCR_DDR   (0x20000000)
 
#define MCF_SDRAMC_SDCR_CKE   (0x40000000)
 
#define MCF_SDRAMC_SDCR_MODE_EN   (0x80000000)
 
#define MCF_SDRAMC_SDCR_PS_16   (0x00002000)
 
#define MCF_SDRAMC_SDCR_PS_32   (0x00000000)
 
#define MCF_SDRAMC_SDCFG1_WTLAT(x)   (((x)&0x00000007)<<4)
 
#define MCF_SDRAMC_SDCFG1_REF2ACT(x)   (((x)&0x0000000F)<<8)
 
#define MCF_SDRAMC_SDCFG1_PRE2ACT(x)   (((x)&0x00000007)<<12)
 
#define MCF_SDRAMC_SDCFG1_ACT2RW(x)   (((x)&0x00000007)<<16)
 
#define MCF_SDRAMC_SDCFG1_RDLAT(x)   (((x)&0x0000000F)<<20)
 
#define MCF_SDRAMC_SDCFG1_SWT2RD(x)   (((x)&0x00000007)<<24)
 
#define MCF_SDRAMC_SDCFG1_SRD2RW(x)   (((x)&0x0000000F)<<28)
 
#define MCF_SDRAMC_SDCFG2_BL(x)   (((x)&0x0000000F)<<16)
 
#define MCF_SDRAMC_SDCFG2_BRD2WT(x)   (((x)&0x0000000F)<<20)
 
#define MCF_SDRAMC_SDCFG2_BWT2RW(x)   (((x)&0x0000000F)<<24)
 
#define MCF_SDRAMC_SDCFG2_BRD2PRE(x)   (((x)&0x0000000F)<<28)
 
#define MCF_SDRAMC_REFRESH   (0x40000000)
 
#define MCF_SDRAMC_SDDS_SB_D(x)   (((x)&0x00000003)<<0)
 
#define MCF_SDRAMC_SDDS_SB_S(x)   (((x)&0x00000003)<<2)
 
#define MCF_SDRAMC_SDDS_SB_A(x)   (((x)&0x00000003)<<4)
 
#define MCF_SDRAMC_SDDS_SB_C(x)   (((x)&0x00000003)<<6)
 
#define MCF_SDRAMC_SDDS_SB_E(x)   (((x)&0x00000003)<<8)
 
#define MCF_SDRAMC_SDCS_CSSZ(x)   (((x)&0x0000001F)<<0)
 
#define MCF_SDRAMC_SDCS_BASE(x)   (((x)&0x00000FFF)<<20)
 
#define MCF_SDRAMC_SDCS_BA(x)   ((x)&0xFFF00000)
 
#define MCF_SDRAMC_SDCS_CSSZ_DIABLE   (0x00000000)
 
#define MCF_SDRAMC_SDCS_CSSZ_1MBYTE   (0x00000013)
 
#define MCF_SDRAMC_SDCS_CSSZ_2MBYTE   (0x00000014)
 
#define MCF_SDRAMC_SDCS_CSSZ_4MBYTE   (0x00000015)
 
#define MCF_SDRAMC_SDCS_CSSZ_8MBYTE   (0x00000016)
 
#define MCF_SDRAMC_SDCS_CSSZ_16MBYTE   (0x00000017)
 
#define MCF_SDRAMC_SDCS_CSSZ_32MBYTE   (0x00000018)
 
#define MCF_SDRAMC_SDCS_CSSZ_64MBYTE   (0x00000019)
 
#define MCF_SDRAMC_SDCS_CSSZ_128MBYTE   (0x0000001A)
 
#define MCF_SDRAMC_SDCS_CSSZ_256MBYTE   (0x0000001B)
 
#define MCF_SDRAMC_SDCS_CSSZ_512MBYTE   (0x0000001C)
 
#define MCF_SDRAMC_SDCS_CSSZ_1GBYTE   (0x0000001D)
 
#define MCF_SDRAMC_SDCS_CSSZ_2GBYTE   (0x0000001E)
 
#define MCF_SDRAMC_SDCS_CSSZ_4GBYTE   (0x0000001F)
 
#define MCFEPORT_EPPAR   (0xFC094000)
 
#define MCFEPORT_EPDDR   (0xFC094002)
 
#define MCFEPORT_EPIER   (0xFC094003)
 
#define MCFEPORT_EPDR   (0xFC094004)
 
#define MCFEPORT_EPPDR   (0xFC094005)
 
#define MCFEPORT_EPFR   (0xFC094006)
 

Macro Definition Documentation

#define CPU_INSTR_PER_JIFFY   3

Definition at line 13 of file m532xsim.h.

#define CPU_NAME   "COLDFIRE(m532x)"

Definition at line 12 of file m532xsim.h.

#define MCF_BUSCLK   (MCF_CLK / 3)

Definition at line 14 of file m532xsim.h.

#define MCF_CCM_CCR   0xFC0A0004

Definition at line 180 of file m532xsim.h.

#define MCF_CCM_CCR_BOOTPS (   x)    (((x)&0x0003)<<3|0x0001)

Definition at line 192 of file m532xsim.h.

#define MCF_CCM_CCR_CSC (   x)    (((x)&0x0003)<<8|0x0001)

Definition at line 195 of file m532xsim.h.

#define MCF_CCM_CCR_LIMP   (0x0041)

Definition at line 194 of file m532xsim.h.

#define MCF_CCM_CCR_LOAD   (0x0021)

Definition at line 193 of file m532xsim.h.

#define MCF_CCM_CCR_OSC_MODE   (0x0005)

Definition at line 191 of file m532xsim.h.

#define MCF_CCM_CCR_PLL_MODE   (0x0003)

Definition at line 190 of file m532xsim.h.

#define MCF_CCM_CCR_RESERVED   (0x0001)

Definition at line 189 of file m532xsim.h.

#define MCF_CCM_CDR   0xFC0A0012

Definition at line 184 of file m532xsim.h.

#define MCF_CCM_CDR_LPDIV (   x)    (((x)&0x000F)<<8)

Definition at line 223 of file m532xsim.h.

#define MCF_CCM_CDR_SSIDIV (   x)    (((x)&0x000F)<<0)

Definition at line 222 of file m532xsim.h.

#define MCF_CCM_CIR   0xFC0A000A

Definition at line 182 of file m532xsim.h.

#define MCF_CCM_CIR_PIN (   x)    (((x)&0x03FF)<<6)

Definition at line 208 of file m532xsim.h.

#define MCF_CCM_CIR_PRN (   x)    (((x)&0x003F)<<0)

Definition at line 207 of file m532xsim.h.

#define MCF_CCM_MISCCR   0xFC0A0010

Definition at line 183 of file m532xsim.h.

#define MCF_CCM_MISCCR_LCD_CHEN   (0x0100)

Definition at line 217 of file m532xsim.h.

#define MCF_CCM_MISCCR_LIMP   (0x1000)

Definition at line 218 of file m532xsim.h.

#define MCF_CCM_MISCCR_PLL_LOCK   (0x2000)

Definition at line 219 of file m532xsim.h.

#define MCF_CCM_MISCCR_SSI_PUE   (0x0080)

Definition at line 216 of file m532xsim.h.

#define MCF_CCM_MISCCR_SSI_PUS   (0x0040)

Definition at line 215 of file m532xsim.h.

#define MCF_CCM_MISCCR_SSI_SRC   (0x0010)

Definition at line 213 of file m532xsim.h.

#define MCF_CCM_MISCCR_TIM_DMA   (0x0020)

Definition at line 214 of file m532xsim.h.

#define MCF_CCM_MISCCR_USBDIV   (0x0002)

Definition at line 212 of file m532xsim.h.

#define MCF_CCM_MISCCR_USBSRC   (0x0001)

Definition at line 211 of file m532xsim.h.

#define MCF_CCM_RCON   0xFC0A0008

Definition at line 181 of file m532xsim.h.

#define MCF_CCM_RCON_BOOTPS (   x)    (((x)&0x0003)<<3|0x0001)

Definition at line 201 of file m532xsim.h.

#define MCF_CCM_RCON_CSC (   x)    (((x)&0x0003)<<8|0x0001)

Definition at line 204 of file m532xsim.h.

#define MCF_CCM_RCON_LIMP   (0x0041)

Definition at line 203 of file m532xsim.h.

#define MCF_CCM_RCON_LOAD   (0x0021)

Definition at line 202 of file m532xsim.h.

#define MCF_CCM_RCON_OSC_MODE   (0x0005)

Definition at line 200 of file m532xsim.h.

#define MCF_CCM_RCON_PLL_MODE   (0x0003)

Definition at line 199 of file m532xsim.h.

#define MCF_CCM_RCON_RESERVED   (0x0001)

Definition at line 198 of file m532xsim.h.

#define MCF_CCM_UHCSR   0xFC0A0014

Definition at line 185 of file m532xsim.h.

#define MCF_CCM_UHCSR_PORTIND (   x)    (((x)&0x0003)<<14)

Definition at line 229 of file m532xsim.h.

#define MCF_CCM_UHCSR_UHMIE   (0x0002)

Definition at line 227 of file m532xsim.h.

#define MCF_CCM_UHCSR_WKUP   (0x0004)

Definition at line 228 of file m532xsim.h.

#define MCF_CCM_UHCSR_XPDE   (0x0001)

Definition at line 226 of file m532xsim.h.

#define MCF_CCM_UOCSR   0xFC0A0016

Definition at line 186 of file m532xsim.h.

#define MCF_CCM_UOCSR_AVLD   (0x0080)

Definition at line 239 of file m532xsim.h.

#define MCF_CCM_UOCSR_BVLD   (0x0040)

Definition at line 238 of file m532xsim.h.

#define MCF_CCM_UOCSR_CRG_VBUS   (0x0400)

Definition at line 242 of file m532xsim.h.

#define MCF_CCM_UOCSR_DCR_VBUS   (0x0200)

Definition at line 241 of file m532xsim.h.

#define MCF_CCM_UOCSR_DMPD   (0x1000)

Definition at line 244 of file m532xsim.h.

#define MCF_CCM_UOCSR_DPPD   (0x2000)

Definition at line 245 of file m532xsim.h.

#define MCF_CCM_UOCSR_DPPU   (0x0100)

Definition at line 240 of file m532xsim.h.

#define MCF_CCM_UOCSR_DRV_VBUS   (0x0800)

Definition at line 243 of file m532xsim.h.

#define MCF_CCM_UOCSR_PORTIND (   x)    (((x)&0x0003)<<14)

Definition at line 246 of file m532xsim.h.

#define MCF_CCM_UOCSR_PWRFLT   (0x0008)

Definition at line 235 of file m532xsim.h.

#define MCF_CCM_UOCSR_SEND   (0x0010)

Definition at line 236 of file m532xsim.h.

#define MCF_CCM_UOCSR_UOMIE   (0x0002)

Definition at line 233 of file m532xsim.h.

#define MCF_CCM_UOCSR_VVLD   (0x0020)

Definition at line 237 of file m532xsim.h.

#define MCF_CCM_UOCSR_WKUP   (0x0004)

Definition at line 234 of file m532xsim.h.

#define MCF_CCM_UOCSR_XPDE   (0x0001)

Definition at line 232 of file m532xsim.h.

#define MCF_FBCS0_CSAR   0xFC008000

Definition at line 255 of file m532xsim.h.

#define MCF_FBCS0_CSCR   0xFC008008

Definition at line 257 of file m532xsim.h.

#define MCF_FBCS0_CSMR   0xFC008004

Definition at line 256 of file m532xsim.h.

#define MCF_FBCS1_CSAR   0xFC00800C

Definition at line 258 of file m532xsim.h.

#define MCF_FBCS1_CSCR   0xFC008014

Definition at line 260 of file m532xsim.h.

#define MCF_FBCS1_CSMR   0xFC008010

Definition at line 259 of file m532xsim.h.

#define MCF_FBCS2_CSAR   0xFC008018

Definition at line 261 of file m532xsim.h.

#define MCF_FBCS2_CSCR   0xFC008020

Definition at line 263 of file m532xsim.h.

#define MCF_FBCS2_CSMR   0xFC00801C

Definition at line 262 of file m532xsim.h.

#define MCF_FBCS3_CSAR   0xFC008024

Definition at line 264 of file m532xsim.h.

#define MCF_FBCS3_CSCR   0xFC00802C

Definition at line 266 of file m532xsim.h.

#define MCF_FBCS3_CSMR   0xFC008028

Definition at line 265 of file m532xsim.h.

#define MCF_FBCS4_CSAR   0xFC008030

Definition at line 267 of file m532xsim.h.

#define MCF_FBCS4_CSCR   0xFC008038

Definition at line 269 of file m532xsim.h.

#define MCF_FBCS4_CSMR   0xFC008034

Definition at line 268 of file m532xsim.h.

#define MCF_FBCS5_CSAR   0xFC00803C

Definition at line 270 of file m532xsim.h.

#define MCF_FBCS5_CSCR   0xFC008044

Definition at line 272 of file m532xsim.h.

#define MCF_FBCS5_CSMR   0xFC008040

Definition at line 271 of file m532xsim.h.

#define MCF_FBCS_CSAR_BA (   x)    ((x)&0xFFFF0000)

Definition at line 275 of file m532xsim.h.

#define MCF_FBCS_CSCR_AA   (0x00000100)

Definition at line 306 of file m532xsim.h.

#define MCF_FBCS_CSCR_ASET (   x)    (((x)&0x00000003)<<20)

Definition at line 311 of file m532xsim.h.

#define MCF_FBCS_CSCR_BEM   (0x00000020)

Definition at line 304 of file m532xsim.h.

#define MCF_FBCS_CSCR_BSTR   (0x00000010)

Definition at line 303 of file m532xsim.h.

#define MCF_FBCS_CSCR_BSTW   (0x00000008)

Definition at line 302 of file m532xsim.h.

#define MCF_FBCS_CSCR_PS (   x)    (((x)&0x00000003)<<6)

Definition at line 305 of file m532xsim.h.

#define MCF_FBCS_CSCR_PS_16   (0x0080)

Definition at line 315 of file m532xsim.h.

#define MCF_FBCS_CSCR_PS_32   (0x0000)

Definition at line 316 of file m532xsim.h.

#define MCF_FBCS_CSCR_PS_8   (0x0040)

Definition at line 314 of file m532xsim.h.

#define MCF_FBCS_CSCR_RDAH (   x)    (((x)&0x00000003)<<18)

Definition at line 310 of file m532xsim.h.

#define MCF_FBCS_CSCR_SBM   (0x00000200)

Definition at line 307 of file m532xsim.h.

#define MCF_FBCS_CSCR_SWS (   x)    (((x)&0x0000003F)<<26)

Definition at line 313 of file m532xsim.h.

#define MCF_FBCS_CSCR_SWSEN   (0x00800000)

Definition at line 312 of file m532xsim.h.

#define MCF_FBCS_CSCR_WRAH (   x)    (((x)&0x00000003)<<16)

Definition at line 309 of file m532xsim.h.

#define MCF_FBCS_CSCR_WS (   x)    (((x)&0x0000003F)<<10)

Definition at line 308 of file m532xsim.h.

#define MCF_FBCS_CSMR_BAM (   x)    (((x)&0x0000FFFF)<<16)

Definition at line 280 of file m532xsim.h.

#define MCF_FBCS_CSMR_BAM_1024K   (0x000F0000)

Definition at line 295 of file m532xsim.h.

#define MCF_FBCS_CSMR_BAM_1024M   (0x3FFF0000)

Definition at line 284 of file m532xsim.h.

#define MCF_FBCS_CSMR_BAM_128K   (0x00010000)

Definition at line 298 of file m532xsim.h.

#define MCF_FBCS_CSMR_BAM_128M   (0x07FF0000)

Definition at line 287 of file m532xsim.h.

#define MCF_FBCS_CSMR_BAM_16M   (0x00FF0000)

Definition at line 290 of file m532xsim.h.

#define MCF_FBCS_CSMR_BAM_1G   (0x3FFF0000)

Definition at line 283 of file m532xsim.h.

#define MCF_FBCS_CSMR_BAM_1M   (0x000F0000)

Definition at line 294 of file m532xsim.h.

#define MCF_FBCS_CSMR_BAM_256K   (0x00030000)

Definition at line 297 of file m532xsim.h.

#define MCF_FBCS_CSMR_BAM_256M   (0x0FFF0000)

Definition at line 286 of file m532xsim.h.

#define MCF_FBCS_CSMR_BAM_2G   (0x7FFF0000)

Definition at line 282 of file m532xsim.h.

#define MCF_FBCS_CSMR_BAM_2M   (0x001F0000)

Definition at line 293 of file m532xsim.h.

#define MCF_FBCS_CSMR_BAM_32M   (0x01FF0000)

Definition at line 289 of file m532xsim.h.

#define MCF_FBCS_CSMR_BAM_4G   (0xFFFF0000)

Definition at line 281 of file m532xsim.h.

#define MCF_FBCS_CSMR_BAM_4M   (0x003F0000)

Definition at line 292 of file m532xsim.h.

#define MCF_FBCS_CSMR_BAM_512K   (0x00070000)

Definition at line 296 of file m532xsim.h.

#define MCF_FBCS_CSMR_BAM_512M   (0x1FFF0000)

Definition at line 285 of file m532xsim.h.

#define MCF_FBCS_CSMR_BAM_64K   (0x00000000)

Definition at line 299 of file m532xsim.h.

#define MCF_FBCS_CSMR_BAM_64M   (0x03FF0000)

Definition at line 288 of file m532xsim.h.

#define MCF_FBCS_CSMR_BAM_8M   (0x007F0000)

Definition at line 291 of file m532xsim.h.

#define MCF_FBCS_CSMR_V   (0x00000001)

Definition at line 278 of file m532xsim.h.

#define MCF_FBCS_CSMR_WP   (0x00000100)

Definition at line 279 of file m532xsim.h.

#define MCF_GPIO_DSCR_CLKRST_CLKRST_DSE (   x)    (((x)&0x03)<<0)

Definition at line 1085 of file m532xsim.h.

#define MCF_GPIO_DSCR_DEBUG_DEBUG_DSE (   x)    (((x)&0x03)<<0)

Definition at line 1082 of file m532xsim.h.

#define MCF_GPIO_DSCR_FEC_FEC_DSE (   x)    (((x)&0x03)<<0)

Definition at line 1063 of file m532xsim.h.

#define MCF_GPIO_DSCR_I2C_I2C_DSE (   x)    (((x)&0x03)<<0)

Definition at line 1057 of file m532xsim.h.

#define MCF_GPIO_DSCR_IRQ_IRQ_DSE (   x)    (((x)&0x03)<<0)

Definition at line 1088 of file m532xsim.h.

#define MCF_GPIO_DSCR_LCD_LCD_DSE (   x)    (((x)&0x03)<<0)

Definition at line 1079 of file m532xsim.h.

#define MCF_GPIO_DSCR_PWM_PWM_DSE (   x)    (((x)&0x03)<<0)

Definition at line 1060 of file m532xsim.h.

#define MCF_GPIO_DSCR_QSPI_QSPI_DSE (   x)    (((x)&0x03)<<0)

Definition at line 1070 of file m532xsim.h.

#define MCF_GPIO_DSCR_SSI_SSI_DSE (   x)    (((x)&0x03)<<0)

Definition at line 1076 of file m532xsim.h.

#define MCF_GPIO_DSCR_TIMER_TIMER_DSE (   x)    (((x)&0x03)<<0)

Definition at line 1073 of file m532xsim.h.

#define MCF_GPIO_DSCR_UART_UART0_DSE (   x)    (((x)&0x03)<<0)

Definition at line 1066 of file m532xsim.h.

#define MCF_GPIO_DSCR_UART_UART1_DSE (   x)    (((x)&0x03)<<2)

Definition at line 1067 of file m532xsim.h.

#define MCF_GPIO_MSCR_FLEXBUS_MSCR_ADDRCTL (   x)    (((x)&0x03)<<0)

Definition at line 1047 of file m532xsim.h.

#define MCF_GPIO_MSCR_FLEXBUS_MSCR_DLOWER (   x)    (((x)&0x03)<<2)

Definition at line 1048 of file m532xsim.h.

#define MCF_GPIO_MSCR_FLEXBUS_MSCR_DUPPER (   x)    (((x)&0x03)<<4)

Definition at line 1049 of file m532xsim.h.

#define MCF_GPIO_MSCR_SDRAM_MSCR_SDCLK (   x)    (((x)&0x03)<<2)

Definition at line 1053 of file m532xsim.h.

#define MCF_GPIO_MSCR_SDRAM_MSCR_SDCLKB (   x)    (((x)&0x03)<<4)

Definition at line 1054 of file m532xsim.h.

#define MCF_GPIO_MSCR_SDRAM_MSCR_SDRAM (   x)    (((x)&0x03)<<0)

Definition at line 1052 of file m532xsim.h.

#define MCF_GPIO_PAR_BE_PAR_BE0   (0x01)

Definition at line 944 of file m532xsim.h.

#define MCF_GPIO_PAR_BE_PAR_BE1   (0x02)

Definition at line 945 of file m532xsim.h.

#define MCF_GPIO_PAR_BE_PAR_BE2   (0x04)

Definition at line 946 of file m532xsim.h.

#define MCF_GPIO_PAR_BE_PAR_BE3   (0x08)

Definition at line 947 of file m532xsim.h.

#define MCF_GPIO_PAR_BUSCTL_PAR_OE   (0x80)

Definition at line 912 of file m532xsim.h.

#define MCF_GPIO_PAR_BUSCTL_PAR_OE_GPIO   (0x00)

Definition at line 913 of file m532xsim.h.

#define MCF_GPIO_PAR_BUSCTL_PAR_OE_OE   (0x80)

Definition at line 914 of file m532xsim.h.

#define MCF_GPIO_PAR_BUSCTL_PAR_RWB   (0x20)

Definition at line 910 of file m532xsim.h.

#define MCF_GPIO_PAR_BUSCTL_PAR_RWB_GPIO   (0x00)

Definition at line 917 of file m532xsim.h.

#define MCF_GPIO_PAR_BUSCTL_PAR_RWB_RWB   (0x20)

Definition at line 918 of file m532xsim.h.

#define MCF_GPIO_PAR_BUSCTL_PAR_TA   (0x40)

Definition at line 911 of file m532xsim.h.

#define MCF_GPIO_PAR_BUSCTL_PAR_TA_GPIO   (0x00)

Definition at line 915 of file m532xsim.h.

#define MCF_GPIO_PAR_BUSCTL_PAR_TA_TA   (0x40)

Definition at line 916 of file m532xsim.h.

#define MCF_GPIO_PAR_BUSCTL_PAR_TS (   x)    (((x)&0x03)<<3)

Definition at line 909 of file m532xsim.h.

#define MCF_GPIO_PAR_BUSCTL_PAR_TS_DACK0   (0x10)

Definition at line 920 of file m532xsim.h.

#define MCF_GPIO_PAR_BUSCTL_PAR_TS_GPIO   (0x00)

Definition at line 919 of file m532xsim.h.

#define MCF_GPIO_PAR_BUSCTL_PAR_TS_TS   (0x18)

Definition at line 921 of file m532xsim.h.

#define MCF_GPIO_PAR_CS_PAR_CS1   (0x02)

Definition at line 950 of file m532xsim.h.

#define MCF_GPIO_PAR_CS_PAR_CS2   (0x04)

Definition at line 951 of file m532xsim.h.

#define MCF_GPIO_PAR_CS_PAR_CS3   (0x08)

Definition at line 952 of file m532xsim.h.

#define MCF_GPIO_PAR_CS_PAR_CS4   (0x10)

Definition at line 953 of file m532xsim.h.

#define MCF_GPIO_PAR_CS_PAR_CS5   (0x20)

Definition at line 954 of file m532xsim.h.

#define MCF_GPIO_PAR_CS_PAR_CS_CS1_CS1   (0x03)

Definition at line 957 of file m532xsim.h.

#define MCF_GPIO_PAR_CS_PAR_CS_CS1_GPIO   (0x00)

Definition at line 955 of file m532xsim.h.

#define MCF_GPIO_PAR_CS_PAR_CS_CS1_SDCS1   (0x01)

Definition at line 956 of file m532xsim.h.

#define MCF_GPIO_PAR_FEC_PAR_FEC_7W (   x)    (((x)&0x03)<<2)

Definition at line 894 of file m532xsim.h.

#define MCF_GPIO_PAR_FEC_PAR_FEC_7W_FEC   (0x0C)

Definition at line 897 of file m532xsim.h.

#define MCF_GPIO_PAR_FEC_PAR_FEC_7W_GPIO   (0x00)

Definition at line 895 of file m532xsim.h.

#define MCF_GPIO_PAR_FEC_PAR_FEC_7W_URTS1   (0x04)

Definition at line 896 of file m532xsim.h.

#define MCF_GPIO_PAR_FEC_PAR_FEC_MII (   x)    (((x)&0x03)<<0)

Definition at line 893 of file m532xsim.h.

#define MCF_GPIO_PAR_FEC_PAR_FEC_MII_FEC   (0x03)

Definition at line 900 of file m532xsim.h.

#define MCF_GPIO_PAR_FEC_PAR_FEC_MII_GPIO   (0x00)

Definition at line 898 of file m532xsim.h.

#define MCF_GPIO_PAR_FEC_PAR_FEC_MII_UART   (0x01)

Definition at line 899 of file m532xsim.h.

#define MCF_GPIO_PAR_FECI2C_PAR_MDC (   x)    (((x)&0x03)<<6)

Definition at line 927 of file m532xsim.h.

#define MCF_GPIO_PAR_FECI2C_PAR_MDC_EMDC   (0xC0)

Definition at line 931 of file m532xsim.h.

#define MCF_GPIO_PAR_FECI2C_PAR_MDC_GPIO   (0x00)

Definition at line 928 of file m532xsim.h.

#define MCF_GPIO_PAR_FECI2C_PAR_MDC_SCL   (0x80)

Definition at line 930 of file m532xsim.h.

#define MCF_GPIO_PAR_FECI2C_PAR_MDC_UTXD2   (0x40)

Definition at line 929 of file m532xsim.h.

#define MCF_GPIO_PAR_FECI2C_PAR_MDIO (   x)    (((x)&0x03)<<4)

Definition at line 926 of file m532xsim.h.

#define MCF_GPIO_PAR_FECI2C_PAR_MDIO_EMDIO   (0x30)

Definition at line 935 of file m532xsim.h.

#define MCF_GPIO_PAR_FECI2C_PAR_MDIO_GPIO   (0x00)

Definition at line 932 of file m532xsim.h.

#define MCF_GPIO_PAR_FECI2C_PAR_MDIO_SDA   (0x20)

Definition at line 934 of file m532xsim.h.

#define MCF_GPIO_PAR_FECI2C_PAR_MDIO_URXD2   (0x10)

Definition at line 933 of file m532xsim.h.

#define MCF_GPIO_PAR_FECI2C_PAR_SCL (   x)    (((x)&0x03)<<2)

Definition at line 925 of file m532xsim.h.

#define MCF_GPIO_PAR_FECI2C_PAR_SCL_GPIO   (0x00)

Definition at line 936 of file m532xsim.h.

#define MCF_GPIO_PAR_FECI2C_PAR_SCL_SCL   (0x0C)

Definition at line 938 of file m532xsim.h.

#define MCF_GPIO_PAR_FECI2C_PAR_SCL_UTXD2   (0x04)

Definition at line 937 of file m532xsim.h.

#define MCF_GPIO_PAR_FECI2C_PAR_SDA (   x)    (((x)&0x03)<<0)

Definition at line 924 of file m532xsim.h.

#define MCF_GPIO_PAR_FECI2C_PAR_SDA_GPIO   (0x00)

Definition at line 939 of file m532xsim.h.

#define MCF_GPIO_PAR_FECI2C_PAR_SDA_SDA   (0x03)

Definition at line 941 of file m532xsim.h.

#define MCF_GPIO_PAR_FECI2C_PAR_SDA_URXD2   (0x02)

Definition at line 940 of file m532xsim.h.

#define MCF_GPIO_PAR_IRQ_PAR_IRQ1 (   x)    (((x)&0x0003)<<4)

Definition at line 1040 of file m532xsim.h.

#define MCF_GPIO_PAR_IRQ_PAR_IRQ2 (   x)    (((x)&0x0003)<<6)

Definition at line 1041 of file m532xsim.h.

#define MCF_GPIO_PAR_IRQ_PAR_IRQ4 (   x)    (((x)&0x0003)<<8)

Definition at line 1042 of file m532xsim.h.

#define MCF_GPIO_PAR_IRQ_PAR_IRQ5 (   x)    (((x)&0x0003)<<10)

Definition at line 1043 of file m532xsim.h.

#define MCF_GPIO_PAR_IRQ_PAR_IRQ6 (   x)    (((x)&0x0003)<<12)

Definition at line 1044 of file m532xsim.h.

#define MCF_GPIO_PAR_LCDCTL_PAR_ACD_OE   (0x0100)

Definition at line 1037 of file m532xsim.h.

#define MCF_GPIO_PAR_LCDCTL_PAR_CLS   (0x0001)

Definition at line 1029 of file m532xsim.h.

#define MCF_GPIO_PAR_LCDCTL_PAR_CONTRAST   (0x0010)

Definition at line 1033 of file m532xsim.h.

#define MCF_GPIO_PAR_LCDCTL_PAR_FLM_VSYNC   (0x0080)

Definition at line 1036 of file m532xsim.h.

#define MCF_GPIO_PAR_LCDCTL_PAR_LP_HSYNC   (0x0040)

Definition at line 1035 of file m532xsim.h.

#define MCF_GPIO_PAR_LCDCTL_PAR_LSCLK   (0x0020)

Definition at line 1034 of file m532xsim.h.

#define MCF_GPIO_PAR_LCDCTL_PAR_PS   (0x0002)

Definition at line 1030 of file m532xsim.h.

#define MCF_GPIO_PAR_LCDCTL_PAR_REV   (0x0004)

Definition at line 1031 of file m532xsim.h.

#define MCF_GPIO_PAR_LCDCTL_PAR_SPL_SPR   (0x0008)

Definition at line 1032 of file m532xsim.h.

#define MCF_GPIO_PAR_LCDDATA_PAR_LD15_8 (   x)    (((x)&0x03)<<2)

Definition at line 1024 of file m532xsim.h.

#define MCF_GPIO_PAR_LCDDATA_PAR_LD16 (   x)    (((x)&0x03)<<4)

Definition at line 1025 of file m532xsim.h.

#define MCF_GPIO_PAR_LCDDATA_PAR_LD17 (   x)    (((x)&0x03)<<6)

Definition at line 1026 of file m532xsim.h.

#define MCF_GPIO_PAR_LCDDATA_PAR_LD7_0 (   x)    (((x)&0x03)<<0)

Definition at line 1023 of file m532xsim.h.

#define MCF_GPIO_PAR_PWM_PAR_PWM1 (   x)    (((x)&0x03)<<0)

Definition at line 903 of file m532xsim.h.

#define MCF_GPIO_PAR_PWM_PAR_PWM3 (   x)    (((x)&0x03)<<2)

Definition at line 904 of file m532xsim.h.

#define MCF_GPIO_PAR_PWM_PAR_PWM5   (0x10)

Definition at line 905 of file m532xsim.h.

#define MCF_GPIO_PAR_PWM_PAR_PWM7   (0x20)

Definition at line 906 of file m532xsim.h.

#define MCF_GPIO_PAR_QSPI_PAR_DIN (   x)    (((x)&0x0003)<<8)

Definition at line 995 of file m532xsim.h.

#define MCF_GPIO_PAR_QSPI_PAR_DOUT (   x)    (((x)&0x0003)<<6)

Definition at line 994 of file m532xsim.h.

#define MCF_GPIO_PAR_QSPI_PAR_PCS0 (   x)    (((x)&0x0003)<<10)

Definition at line 996 of file m532xsim.h.

#define MCF_GPIO_PAR_QSPI_PAR_PCS1 (   x)    (((x)&0x0003)<<12)

Definition at line 997 of file m532xsim.h.

#define MCF_GPIO_PAR_QSPI_PAR_PCS2 (   x)    (((x)&0x0003)<<14)

Definition at line 998 of file m532xsim.h.

#define MCF_GPIO_PAR_QSPI_PAR_SCK (   x)    (((x)&0x0003)<<4)

Definition at line 993 of file m532xsim.h.

#define MCF_GPIO_PAR_SSI_PAR_BCLK (   x)    (((x)&0x0003)<<14)

Definition at line 964 of file m532xsim.h.

#define MCF_GPIO_PAR_SSI_PAR_FS (   x)    (((x)&0x0003)<<12)

Definition at line 963 of file m532xsim.h.

#define MCF_GPIO_PAR_SSI_PAR_MCLK   (0x0080)

Definition at line 960 of file m532xsim.h.

#define MCF_GPIO_PAR_SSI_PAR_RXD (   x)    (((x)&0x0003)<<10)

Definition at line 962 of file m532xsim.h.

#define MCF_GPIO_PAR_SSI_PAR_TXD (   x)    (((x)&0x0003)<<8)

Definition at line 961 of file m532xsim.h.

#define MCF_GPIO_PAR_TIMER_PAR_TIN0 (   x)    (((x)&0x03)<<0)

Definition at line 1001 of file m532xsim.h.

#define MCF_GPIO_PAR_TIMER_PAR_TIN0_DREQ0   (0x01)

Definition at line 1019 of file m532xsim.h.

#define MCF_GPIO_PAR_TIMER_PAR_TIN0_GPIO   (0x00)

Definition at line 1017 of file m532xsim.h.

#define MCF_GPIO_PAR_TIMER_PAR_TIN0_TIN0   (0x03)

Definition at line 1020 of file m532xsim.h.

#define MCF_GPIO_PAR_TIMER_PAR_TIN0_TOUT0   (0x02)

Definition at line 1018 of file m532xsim.h.

#define MCF_GPIO_PAR_TIMER_PAR_TIN1 (   x)    (((x)&0x03)<<2)

Definition at line 1002 of file m532xsim.h.

#define MCF_GPIO_PAR_TIMER_PAR_TIN1_DACK1   (0x04)

Definition at line 1015 of file m532xsim.h.

#define MCF_GPIO_PAR_TIMER_PAR_TIN1_GPIO   (0x00)

Definition at line 1013 of file m532xsim.h.

#define MCF_GPIO_PAR_TIMER_PAR_TIN1_TIN1   (0x0C)

Definition at line 1016 of file m532xsim.h.

#define MCF_GPIO_PAR_TIMER_PAR_TIN1_TOUT1   (0x08)

Definition at line 1014 of file m532xsim.h.

#define MCF_GPIO_PAR_TIMER_PAR_TIN2 (   x)    (((x)&0x03)<<4)

Definition at line 1003 of file m532xsim.h.

#define MCF_GPIO_PAR_TIMER_PAR_TIN2_GPIO   (0x00)

Definition at line 1009 of file m532xsim.h.

#define MCF_GPIO_PAR_TIMER_PAR_TIN2_TIN2   (0x30)

Definition at line 1012 of file m532xsim.h.

#define MCF_GPIO_PAR_TIMER_PAR_TIN2_TOUT2   (0x20)

Definition at line 1010 of file m532xsim.h.

#define MCF_GPIO_PAR_TIMER_PAR_TIN2_UTXD2   (0x10)

Definition at line 1011 of file m532xsim.h.

#define MCF_GPIO_PAR_TIMER_PAR_TIN3 (   x)    (((x)&0x03)<<6)

Definition at line 1004 of file m532xsim.h.

#define MCF_GPIO_PAR_TIMER_PAR_TIN3_GPIO   (0x00)

Definition at line 1005 of file m532xsim.h.

#define MCF_GPIO_PAR_TIMER_PAR_TIN3_TIN3   (0xC0)

Definition at line 1008 of file m532xsim.h.

#define MCF_GPIO_PAR_TIMER_PAR_TIN3_TOUT3   (0x80)

Definition at line 1006 of file m532xsim.h.

#define MCF_GPIO_PAR_TIMER_PAR_TIN3_URXD2   (0x40)

Definition at line 1007 of file m532xsim.h.

#define MCF_GPIO_PAR_UART_PAR_UCTS0   (0x0008)

Definition at line 970 of file m532xsim.h.

#define MCF_GPIO_PAR_UART_PAR_UCTS1 (   x)    (((x)&0x0003)<<10)

Definition at line 974 of file m532xsim.h.

#define MCF_GPIO_PAR_UART_PAR_UCTS1_GPIO   (0x0000)

Definition at line 975 of file m532xsim.h.

#define MCF_GPIO_PAR_UART_PAR_UCTS1_SSI_BCLK   (0x0800)

Definition at line 976 of file m532xsim.h.

#define MCF_GPIO_PAR_UART_PAR_UCTS1_UCTS1   (0x0C00)

Definition at line 978 of file m532xsim.h.

#define MCF_GPIO_PAR_UART_PAR_UCTS1_ULPI_D7   (0x0400)

Definition at line 977 of file m532xsim.h.

#define MCF_GPIO_PAR_UART_PAR_URTS0   (0x0004)

Definition at line 969 of file m532xsim.h.

#define MCF_GPIO_PAR_UART_PAR_URTS1 (   x)    (((x)&0x0003)<<8)

Definition at line 973 of file m532xsim.h.

#define MCF_GPIO_PAR_UART_PAR_URTS1_GPIO   (0x0000)

Definition at line 979 of file m532xsim.h.

#define MCF_GPIO_PAR_UART_PAR_URTS1_SSI_FS   (0x0200)

Definition at line 980 of file m532xsim.h.

#define MCF_GPIO_PAR_UART_PAR_URTS1_ULPI_D6   (0x0100)

Definition at line 981 of file m532xsim.h.

#define MCF_GPIO_PAR_UART_PAR_URTS1_URTS1   (0x0300)

Definition at line 982 of file m532xsim.h.

#define MCF_GPIO_PAR_UART_PAR_URXD0   (0x0002)

Definition at line 968 of file m532xsim.h.

#define MCF_GPIO_PAR_UART_PAR_URXD1 (   x)    (((x)&0x0003)<<6)

Definition at line 972 of file m532xsim.h.

#define MCF_GPIO_PAR_UART_PAR_URXD1_GPIO   (0x0000)

Definition at line 983 of file m532xsim.h.

#define MCF_GPIO_PAR_UART_PAR_URXD1_SSI_RXD   (0x0080)

Definition at line 984 of file m532xsim.h.

#define MCF_GPIO_PAR_UART_PAR_URXD1_ULPI_D5   (0x0040)

Definition at line 985 of file m532xsim.h.

#define MCF_GPIO_PAR_UART_PAR_URXD1_URXD1   (0x00C0)

Definition at line 986 of file m532xsim.h.

#define MCF_GPIO_PAR_UART_PAR_UTXD0   (0x0001)

Definition at line 967 of file m532xsim.h.

#define MCF_GPIO_PAR_UART_PAR_UTXD1 (   x)    (((x)&0x0003)<<4)

Definition at line 971 of file m532xsim.h.

#define MCF_GPIO_PAR_UART_PAR_UTXD1_GPIO   (0x0000)

Definition at line 987 of file m532xsim.h.

#define MCF_GPIO_PAR_UART_PAR_UTXD1_SSI_TXD   (0x0020)

Definition at line 988 of file m532xsim.h.

#define MCF_GPIO_PAR_UART_PAR_UTXD1_ULPI_D4   (0x0010)

Definition at line 989 of file m532xsim.h.

#define MCF_GPIO_PAR_UART_PAR_UTXD1_UTXD1   (0x0030)

Definition at line 990 of file m532xsim.h.

#define MCF_GPIO_PCLRR_BE_PCLRR_BE0   (0x01)

Definition at line 807 of file m532xsim.h.

#define MCF_GPIO_PCLRR_BE_PCLRR_BE1   (0x02)

Definition at line 808 of file m532xsim.h.

#define MCF_GPIO_PCLRR_BE_PCLRR_BE2   (0x04)

Definition at line 809 of file m532xsim.h.

#define MCF_GPIO_PCLRR_BE_PCLRR_BE3   (0x08)

Definition at line 810 of file m532xsim.h.

#define MCF_GPIO_PCLRR_BUSCTL_PCLRR_BUSCTL1   (0x02)

Definition at line 802 of file m532xsim.h.

#define MCF_GPIO_PCLRR_BUSCTL_PCLRR_BUSCTL2   (0x04)

Definition at line 803 of file m532xsim.h.

#define MCF_GPIO_PCLRR_BUSCTL_PCLRR_BUSCTL3   (0x08)

Definition at line 804 of file m532xsim.h.

#define MCF_GPIO_PCLRR_BUSCTL_POSDR_BUSCTL0   (0x01)

Definition at line 801 of file m532xsim.h.

#define MCF_GPIO_PCLRR_CS_PCLRR_CS1   (0x02)

Definition at line 813 of file m532xsim.h.

#define MCF_GPIO_PCLRR_CS_PCLRR_CS2   (0x04)

Definition at line 814 of file m532xsim.h.

#define MCF_GPIO_PCLRR_CS_PCLRR_CS3   (0x08)

Definition at line 815 of file m532xsim.h.

#define MCF_GPIO_PCLRR_CS_PCLRR_CS4   (0x10)

Definition at line 816 of file m532xsim.h.

#define MCF_GPIO_PCLRR_CS_PCLRR_CS5   (0x20)

Definition at line 817 of file m532xsim.h.

#define MCF_GPIO_PCLRR_FECH_PCLRR_FECH0   (0x01)

Definition at line 774 of file m532xsim.h.

#define MCF_GPIO_PCLRR_FECH_PCLRR_FECH1   (0x02)

Definition at line 775 of file m532xsim.h.

#define MCF_GPIO_PCLRR_FECH_PCLRR_FECH2   (0x04)

Definition at line 776 of file m532xsim.h.

#define MCF_GPIO_PCLRR_FECH_PCLRR_FECH3   (0x08)

Definition at line 777 of file m532xsim.h.

#define MCF_GPIO_PCLRR_FECH_PCLRR_FECH4   (0x10)

Definition at line 778 of file m532xsim.h.

#define MCF_GPIO_PCLRR_FECH_PCLRR_FECH5   (0x20)

Definition at line 779 of file m532xsim.h.

#define MCF_GPIO_PCLRR_FECH_PCLRR_FECH6   (0x40)

Definition at line 780 of file m532xsim.h.

#define MCF_GPIO_PCLRR_FECH_PCLRR_FECH7   (0x80)

Definition at line 781 of file m532xsim.h.

#define MCF_GPIO_PCLRR_FECI2C_PCLRR_FECI2C0   (0x01)

Definition at line 826 of file m532xsim.h.

#define MCF_GPIO_PCLRR_FECI2C_PCLRR_FECI2C1   (0x02)

Definition at line 827 of file m532xsim.h.

#define MCF_GPIO_PCLRR_FECI2C_PCLRR_FECI2C2   (0x04)

Definition at line 828 of file m532xsim.h.

#define MCF_GPIO_PCLRR_FECI2C_PCLRR_FECI2C3   (0x08)

Definition at line 829 of file m532xsim.h.

#define MCF_GPIO_PCLRR_FECL_PCLRR_FECL0   (0x01)

Definition at line 784 of file m532xsim.h.

#define MCF_GPIO_PCLRR_FECL_PCLRR_FECL1   (0x02)

Definition at line 785 of file m532xsim.h.

#define MCF_GPIO_PCLRR_FECL_PCLRR_FECL2   (0x04)

Definition at line 786 of file m532xsim.h.

#define MCF_GPIO_PCLRR_FECL_PCLRR_FECL3   (0x08)

Definition at line 787 of file m532xsim.h.

#define MCF_GPIO_PCLRR_FECL_PCLRR_FECL4   (0x10)

Definition at line 788 of file m532xsim.h.

#define MCF_GPIO_PCLRR_FECL_PCLRR_FECL5   (0x20)

Definition at line 789 of file m532xsim.h.

#define MCF_GPIO_PCLRR_FECL_PCLRR_FECL6   (0x40)

Definition at line 790 of file m532xsim.h.

#define MCF_GPIO_PCLRR_FECL_PCLRR_FECL7   (0x80)

Definition at line 791 of file m532xsim.h.

#define MCF_GPIO_PCLRR_LCDCTLH_PCLRR_LCDCTLH0   (0x01)

Definition at line 880 of file m532xsim.h.

#define MCF_GPIO_PCLRR_LCDCTLL_PCLRR_LCDCTLL0   (0x01)

Definition at line 883 of file m532xsim.h.

#define MCF_GPIO_PCLRR_LCDCTLL_PCLRR_LCDCTLL1   (0x02)

Definition at line 884 of file m532xsim.h.

#define MCF_GPIO_PCLRR_LCDCTLL_PCLRR_LCDCTLL2   (0x04)

Definition at line 885 of file m532xsim.h.

#define MCF_GPIO_PCLRR_LCDCTLL_PCLRR_LCDCTLL3   (0x08)

Definition at line 886 of file m532xsim.h.

#define MCF_GPIO_PCLRR_LCDCTLL_PCLRR_LCDCTLL4   (0x10)

Definition at line 887 of file m532xsim.h.

#define MCF_GPIO_PCLRR_LCDCTLL_PCLRR_LCDCTLL5   (0x20)

Definition at line 888 of file m532xsim.h.

#define MCF_GPIO_PCLRR_LCDCTLL_PCLRR_LCDCTLL6   (0x40)

Definition at line 889 of file m532xsim.h.

#define MCF_GPIO_PCLRR_LCDCTLL_PCLRR_LCDCTLL7   (0x80)

Definition at line 890 of file m532xsim.h.

#define MCF_GPIO_PCLRR_LCDDATAH_PCLRR_LCDDATAH0   (0x01)

Definition at line 856 of file m532xsim.h.

#define MCF_GPIO_PCLRR_LCDDATAH_PCLRR_LCDDATAH1   (0x02)

Definition at line 857 of file m532xsim.h.

#define MCF_GPIO_PCLRR_LCDDATAL_PCLRR_LCDDATAL0   (0x01)

Definition at line 870 of file m532xsim.h.

#define MCF_GPIO_PCLRR_LCDDATAL_PCLRR_LCDDATAL1   (0x02)

Definition at line 871 of file m532xsim.h.

#define MCF_GPIO_PCLRR_LCDDATAL_PCLRR_LCDDATAL2   (0x04)

Definition at line 872 of file m532xsim.h.

#define MCF_GPIO_PCLRR_LCDDATAL_PCLRR_LCDDATAL3   (0x08)

Definition at line 873 of file m532xsim.h.

#define MCF_GPIO_PCLRR_LCDDATAL_PCLRR_LCDDATAL4   (0x10)

Definition at line 874 of file m532xsim.h.

#define MCF_GPIO_PCLRR_LCDDATAL_PCLRR_LCDDATAL5   (0x20)

Definition at line 875 of file m532xsim.h.

#define MCF_GPIO_PCLRR_LCDDATAL_PCLRR_LCDDATAL6   (0x40)

Definition at line 876 of file m532xsim.h.

#define MCF_GPIO_PCLRR_LCDDATAL_PCLRR_LCDDATAL7   (0x80)

Definition at line 877 of file m532xsim.h.

#define MCF_GPIO_PCLRR_LCDDATAM_PCLRR_LCDDATAM0   (0x01)

Definition at line 860 of file m532xsim.h.

#define MCF_GPIO_PCLRR_LCDDATAM_PCLRR_LCDDATAM1   (0x02)

Definition at line 861 of file m532xsim.h.

#define MCF_GPIO_PCLRR_LCDDATAM_PCLRR_LCDDATAM2   (0x04)

Definition at line 862 of file m532xsim.h.

#define MCF_GPIO_PCLRR_LCDDATAM_PCLRR_LCDDATAM3   (0x08)

Definition at line 863 of file m532xsim.h.

#define MCF_GPIO_PCLRR_LCDDATAM_PCLRR_LCDDATAM4   (0x10)

Definition at line 864 of file m532xsim.h.

#define MCF_GPIO_PCLRR_LCDDATAM_PCLRR_LCDDATAM5   (0x20)

Definition at line 865 of file m532xsim.h.

#define MCF_GPIO_PCLRR_LCDDATAM_PCLRR_LCDDATAM6   (0x40)

Definition at line 866 of file m532xsim.h.

#define MCF_GPIO_PCLRR_LCDDATAM_PCLRR_LCDDATAM7   (0x80)

Definition at line 867 of file m532xsim.h.

#define MCF_GPIO_PCLRR_PWM_PCLRR_PWM2   (0x04)

Definition at line 820 of file m532xsim.h.

#define MCF_GPIO_PCLRR_PWM_PCLRR_PWM3   (0x08)

Definition at line 821 of file m532xsim.h.

#define MCF_GPIO_PCLRR_PWM_PCLRR_PWM4   (0x10)

Definition at line 822 of file m532xsim.h.

#define MCF_GPIO_PCLRR_PWM_PCLRR_PWM5   (0x20)

Definition at line 823 of file m532xsim.h.

#define MCF_GPIO_PCLRR_QSPI_PCLRR_QSPI0   (0x01)

Definition at line 842 of file m532xsim.h.

#define MCF_GPIO_PCLRR_QSPI_PCLRR_QSPI1   (0x02)

Definition at line 843 of file m532xsim.h.

#define MCF_GPIO_PCLRR_QSPI_PCLRR_QSPI2   (0x04)

Definition at line 844 of file m532xsim.h.

#define MCF_GPIO_PCLRR_QSPI_PCLRR_QSPI3   (0x08)

Definition at line 845 of file m532xsim.h.

#define MCF_GPIO_PCLRR_QSPI_PCLRR_QSPI4   (0x10)

Definition at line 846 of file m532xsim.h.

#define MCF_GPIO_PCLRR_QSPI_PCLRR_QSPI5   (0x20)

Definition at line 847 of file m532xsim.h.

#define MCF_GPIO_PCLRR_SSI_PCLRR_SSI0   (0x01)

Definition at line 794 of file m532xsim.h.

#define MCF_GPIO_PCLRR_SSI_PCLRR_SSI1   (0x02)

Definition at line 795 of file m532xsim.h.

#define MCF_GPIO_PCLRR_SSI_PCLRR_SSI2   (0x04)

Definition at line 796 of file m532xsim.h.

#define MCF_GPIO_PCLRR_SSI_PCLRR_SSI3   (0x08)

Definition at line 797 of file m532xsim.h.

#define MCF_GPIO_PCLRR_SSI_PCLRR_SSI4   (0x10)

Definition at line 798 of file m532xsim.h.

#define MCF_GPIO_PCLRR_TIMER_PCLRR_TIMER0   (0x01)

Definition at line 850 of file m532xsim.h.

#define MCF_GPIO_PCLRR_TIMER_PCLRR_TIMER1   (0x02)

Definition at line 851 of file m532xsim.h.

#define MCF_GPIO_PCLRR_TIMER_PCLRR_TIMER2   (0x04)

Definition at line 852 of file m532xsim.h.

#define MCF_GPIO_PCLRR_TIMER_PCLRR_TIMER3   (0x08)

Definition at line 853 of file m532xsim.h.

#define MCF_GPIO_PCLRR_UART_PCLRR_UART0   (0x01)

Definition at line 832 of file m532xsim.h.

#define MCF_GPIO_PCLRR_UART_PCLRR_UART1   (0x02)

Definition at line 833 of file m532xsim.h.

#define MCF_GPIO_PCLRR_UART_PCLRR_UART2   (0x04)

Definition at line 834 of file m532xsim.h.

#define MCF_GPIO_PCLRR_UART_PCLRR_UART3   (0x08)

Definition at line 835 of file m532xsim.h.

#define MCF_GPIO_PCLRR_UART_PCLRR_UART4   (0x10)

Definition at line 836 of file m532xsim.h.

#define MCF_GPIO_PCLRR_UART_PCLRR_UART5   (0x20)

Definition at line 837 of file m532xsim.h.

#define MCF_GPIO_PCLRR_UART_PCLRR_UART6   (0x40)

Definition at line 838 of file m532xsim.h.

#define MCF_GPIO_PCLRR_UART_PCLRR_UART7   (0x80)

Definition at line 839 of file m532xsim.h.

#define MCF_GPIO_PDDR_BE_PDDR_BE0   (0x01)

Definition at line 569 of file m532xsim.h.

#define MCF_GPIO_PDDR_BE_PDDR_BE1   (0x02)

Definition at line 570 of file m532xsim.h.

#define MCF_GPIO_PDDR_BE_PDDR_BE2   (0x04)

Definition at line 571 of file m532xsim.h.

#define MCF_GPIO_PDDR_BE_PDDR_BE3   (0x08)

Definition at line 572 of file m532xsim.h.

#define MCF_GPIO_PDDR_BUSCTL_PDDR_BUSCTL1   (0x02)

Definition at line 564 of file m532xsim.h.

#define MCF_GPIO_PDDR_BUSCTL_PDDR_BUSCTL2   (0x04)

Definition at line 565 of file m532xsim.h.

#define MCF_GPIO_PDDR_BUSCTL_PDDR_BUSCTL3   (0x08)

Definition at line 566 of file m532xsim.h.

#define MCF_GPIO_PDDR_BUSCTL_POSDR_BUSCTL0   (0x01)

Definition at line 563 of file m532xsim.h.

#define MCF_GPIO_PDDR_CS_PDDR_CS1   (0x02)

Definition at line 575 of file m532xsim.h.

#define MCF_GPIO_PDDR_CS_PDDR_CS2   (0x04)

Definition at line 576 of file m532xsim.h.

#define MCF_GPIO_PDDR_CS_PDDR_CS3   (0x08)

Definition at line 577 of file m532xsim.h.

#define MCF_GPIO_PDDR_CS_PDDR_CS4   (0x10)

Definition at line 578 of file m532xsim.h.

#define MCF_GPIO_PDDR_CS_PDDR_CS5   (0x20)

Definition at line 579 of file m532xsim.h.

#define MCF_GPIO_PDDR_FECH_PDDR_FECH0   (0x01)

Definition at line 536 of file m532xsim.h.

#define MCF_GPIO_PDDR_FECH_PDDR_FECH1   (0x02)

Definition at line 537 of file m532xsim.h.

#define MCF_GPIO_PDDR_FECH_PDDR_FECH2   (0x04)

Definition at line 538 of file m532xsim.h.

#define MCF_GPIO_PDDR_FECH_PDDR_FECH3   (0x08)

Definition at line 539 of file m532xsim.h.

#define MCF_GPIO_PDDR_FECH_PDDR_FECH4   (0x10)

Definition at line 540 of file m532xsim.h.

#define MCF_GPIO_PDDR_FECH_PDDR_FECH5   (0x20)

Definition at line 541 of file m532xsim.h.

#define MCF_GPIO_PDDR_FECH_PDDR_FECH6   (0x40)

Definition at line 542 of file m532xsim.h.

#define MCF_GPIO_PDDR_FECH_PDDR_FECH7   (0x80)

Definition at line 543 of file m532xsim.h.

#define MCF_GPIO_PDDR_FECI2C_PDDR_FECI2C0   (0x01)

Definition at line 588 of file m532xsim.h.

#define MCF_GPIO_PDDR_FECI2C_PDDR_FECI2C1   (0x02)

Definition at line 589 of file m532xsim.h.

#define MCF_GPIO_PDDR_FECI2C_PDDR_FECI2C2   (0x04)

Definition at line 590 of file m532xsim.h.

#define MCF_GPIO_PDDR_FECI2C_PDDR_FECI2C3   (0x08)

Definition at line 591 of file m532xsim.h.

#define MCF_GPIO_PDDR_FECL_PDDR_FECL0   (0x01)

Definition at line 546 of file m532xsim.h.

#define MCF_GPIO_PDDR_FECL_PDDR_FECL1   (0x02)

Definition at line 547 of file m532xsim.h.

#define MCF_GPIO_PDDR_FECL_PDDR_FECL2   (0x04)

Definition at line 548 of file m532xsim.h.

#define MCF_GPIO_PDDR_FECL_PDDR_FECL3   (0x08)

Definition at line 549 of file m532xsim.h.

#define MCF_GPIO_PDDR_FECL_PDDR_FECL4   (0x10)

Definition at line 550 of file m532xsim.h.

#define MCF_GPIO_PDDR_FECL_PDDR_FECL5   (0x20)

Definition at line 551 of file m532xsim.h.

#define MCF_GPIO_PDDR_FECL_PDDR_FECL6   (0x40)

Definition at line 552 of file m532xsim.h.

#define MCF_GPIO_PDDR_FECL_PDDR_FECL7   (0x80)

Definition at line 553 of file m532xsim.h.

#define MCF_GPIO_PDDR_LCDCTLH_PDDR_LCDCTLH0   (0x01)

Definition at line 642 of file m532xsim.h.

#define MCF_GPIO_PDDR_LCDCTLL_PDDR_LCDCTLL0   (0x01)

Definition at line 645 of file m532xsim.h.

#define MCF_GPIO_PDDR_LCDCTLL_PDDR_LCDCTLL1   (0x02)

Definition at line 646 of file m532xsim.h.

#define MCF_GPIO_PDDR_LCDCTLL_PDDR_LCDCTLL2   (0x04)

Definition at line 647 of file m532xsim.h.

#define MCF_GPIO_PDDR_LCDCTLL_PDDR_LCDCTLL3   (0x08)

Definition at line 648 of file m532xsim.h.

#define MCF_GPIO_PDDR_LCDCTLL_PDDR_LCDCTLL4   (0x10)

Definition at line 649 of file m532xsim.h.

#define MCF_GPIO_PDDR_LCDCTLL_PDDR_LCDCTLL5   (0x20)

Definition at line 650 of file m532xsim.h.

#define MCF_GPIO_PDDR_LCDCTLL_PDDR_LCDCTLL6   (0x40)

Definition at line 651 of file m532xsim.h.

#define MCF_GPIO_PDDR_LCDCTLL_PDDR_LCDCTLL7   (0x80)

Definition at line 652 of file m532xsim.h.

#define MCF_GPIO_PDDR_LCDDATAH_PDDR_LCDDATAH0   (0x01)

Definition at line 618 of file m532xsim.h.

#define MCF_GPIO_PDDR_LCDDATAH_PDDR_LCDDATAH1   (0x02)

Definition at line 619 of file m532xsim.h.

#define MCF_GPIO_PDDR_LCDDATAL_PDDR_LCDDATAL0   (0x01)

Definition at line 632 of file m532xsim.h.

#define MCF_GPIO_PDDR_LCDDATAL_PDDR_LCDDATAL1   (0x02)

Definition at line 633 of file m532xsim.h.

#define MCF_GPIO_PDDR_LCDDATAL_PDDR_LCDDATAL2   (0x04)

Definition at line 634 of file m532xsim.h.

#define MCF_GPIO_PDDR_LCDDATAL_PDDR_LCDDATAL3   (0x08)

Definition at line 635 of file m532xsim.h.

#define MCF_GPIO_PDDR_LCDDATAL_PDDR_LCDDATAL4   (0x10)

Definition at line 636 of file m532xsim.h.

#define MCF_GPIO_PDDR_LCDDATAL_PDDR_LCDDATAL5   (0x20)

Definition at line 637 of file m532xsim.h.

#define MCF_GPIO_PDDR_LCDDATAL_PDDR_LCDDATAL6   (0x40)

Definition at line 638 of file m532xsim.h.

#define MCF_GPIO_PDDR_LCDDATAL_PDDR_LCDDATAL7   (0x80)

Definition at line 639 of file m532xsim.h.

#define MCF_GPIO_PDDR_LCDDATAM_PDDR_LCDDATAM0   (0x01)

Definition at line 622 of file m532xsim.h.

#define MCF_GPIO_PDDR_LCDDATAM_PDDR_LCDDATAM1   (0x02)

Definition at line 623 of file m532xsim.h.

#define MCF_GPIO_PDDR_LCDDATAM_PDDR_LCDDATAM2   (0x04)

Definition at line 624 of file m532xsim.h.

#define MCF_GPIO_PDDR_LCDDATAM_PDDR_LCDDATAM3   (0x08)

Definition at line 625 of file m532xsim.h.

#define MCF_GPIO_PDDR_LCDDATAM_PDDR_LCDDATAM4   (0x10)

Definition at line 626 of file m532xsim.h.

#define MCF_GPIO_PDDR_LCDDATAM_PDDR_LCDDATAM5   (0x20)

Definition at line 627 of file m532xsim.h.

#define MCF_GPIO_PDDR_LCDDATAM_PDDR_LCDDATAM6   (0x40)

Definition at line 628 of file m532xsim.h.

#define MCF_GPIO_PDDR_LCDDATAM_PDDR_LCDDATAM7   (0x80)

Definition at line 629 of file m532xsim.h.

#define MCF_GPIO_PDDR_PWM_PDDR_PWM2   (0x04)

Definition at line 582 of file m532xsim.h.

#define MCF_GPIO_PDDR_PWM_PDDR_PWM3   (0x08)

Definition at line 583 of file m532xsim.h.

#define MCF_GPIO_PDDR_PWM_PDDR_PWM4   (0x10)

Definition at line 584 of file m532xsim.h.

#define MCF_GPIO_PDDR_PWM_PDDR_PWM5   (0x20)

Definition at line 585 of file m532xsim.h.

#define MCF_GPIO_PDDR_QSPI_PDDR_QSPI0   (0x01)

Definition at line 604 of file m532xsim.h.

#define MCF_GPIO_PDDR_QSPI_PDDR_QSPI1   (0x02)

Definition at line 605 of file m532xsim.h.

#define MCF_GPIO_PDDR_QSPI_PDDR_QSPI2   (0x04)

Definition at line 606 of file m532xsim.h.

#define MCF_GPIO_PDDR_QSPI_PDDR_QSPI3   (0x08)

Definition at line 607 of file m532xsim.h.

#define MCF_GPIO_PDDR_QSPI_PDDR_QSPI4   (0x10)

Definition at line 608 of file m532xsim.h.

#define MCF_GPIO_PDDR_QSPI_PDDR_QSPI5   (0x20)

Definition at line 609 of file m532xsim.h.

#define MCF_GPIO_PDDR_SSI_PDDR_SSI0   (0x01)

Definition at line 556 of file m532xsim.h.

#define MCF_GPIO_PDDR_SSI_PDDR_SSI1   (0x02)

Definition at line 557 of file m532xsim.h.

#define MCF_GPIO_PDDR_SSI_PDDR_SSI2   (0x04)

Definition at line 558 of file m532xsim.h.

#define MCF_GPIO_PDDR_SSI_PDDR_SSI3   (0x08)

Definition at line 559 of file m532xsim.h.

#define MCF_GPIO_PDDR_SSI_PDDR_SSI4   (0x10)

Definition at line 560 of file m532xsim.h.

#define MCF_GPIO_PDDR_TIMER_PDDR_TIMER0   (0x01)

Definition at line 612 of file m532xsim.h.

#define MCF_GPIO_PDDR_TIMER_PDDR_TIMER1   (0x02)

Definition at line 613 of file m532xsim.h.

#define MCF_GPIO_PDDR_TIMER_PDDR_TIMER2   (0x04)

Definition at line 614 of file m532xsim.h.

#define MCF_GPIO_PDDR_TIMER_PDDR_TIMER3   (0x08)

Definition at line 615 of file m532xsim.h.

#define MCF_GPIO_PDDR_UART_PDDR_UART0   (0x01)

Definition at line 594 of file m532xsim.h.

#define MCF_GPIO_PDDR_UART_PDDR_UART1   (0x02)

Definition at line 595 of file m532xsim.h.

#define MCF_GPIO_PDDR_UART_PDDR_UART2   (0x04)

Definition at line 596 of file m532xsim.h.

#define MCF_GPIO_PDDR_UART_PDDR_UART3   (0x08)

Definition at line 597 of file m532xsim.h.

#define MCF_GPIO_PDDR_UART_PDDR_UART4   (0x10)

Definition at line 598 of file m532xsim.h.

#define MCF_GPIO_PDDR_UART_PDDR_UART5   (0x20)

Definition at line 599 of file m532xsim.h.

#define MCF_GPIO_PDDR_UART_PDDR_UART6   (0x40)

Definition at line 600 of file m532xsim.h.

#define MCF_GPIO_PDDR_UART_PDDR_UART7   (0x80)

Definition at line 601 of file m532xsim.h.

#define MCF_GPIO_PODR_BE_PODR_BE0   (0x01)

Definition at line 450 of file m532xsim.h.

#define MCF_GPIO_PODR_BE_PODR_BE1   (0x02)

Definition at line 451 of file m532xsim.h.

#define MCF_GPIO_PODR_BE_PODR_BE2   (0x04)

Definition at line 452 of file m532xsim.h.

#define MCF_GPIO_PODR_BE_PODR_BE3   (0x08)

Definition at line 453 of file m532xsim.h.

#define MCF_GPIO_PODR_BUSCTL_PODR_BUSCTL1   (0x02)

Definition at line 445 of file m532xsim.h.

#define MCF_GPIO_PODR_BUSCTL_PODR_BUSCTL2   (0x04)

Definition at line 446 of file m532xsim.h.

#define MCF_GPIO_PODR_BUSCTL_PODR_BUSCTL3   (0x08)

Definition at line 447 of file m532xsim.h.

#define MCF_GPIO_PODR_BUSCTL_POSDR_BUSCTL0   (0x01)

Definition at line 444 of file m532xsim.h.

#define MCF_GPIO_PODR_CS_PODR_CS1   (0x02)

Definition at line 456 of file m532xsim.h.

#define MCF_GPIO_PODR_CS_PODR_CS2   (0x04)

Definition at line 457 of file m532xsim.h.

#define MCF_GPIO_PODR_CS_PODR_CS3   (0x08)

Definition at line 458 of file m532xsim.h.

#define MCF_GPIO_PODR_CS_PODR_CS4   (0x10)

Definition at line 459 of file m532xsim.h.

#define MCF_GPIO_PODR_CS_PODR_CS5   (0x20)

Definition at line 460 of file m532xsim.h.

#define MCF_GPIO_PODR_FECH_PODR_FECH0   (0x01)

Definition at line 417 of file m532xsim.h.

#define MCF_GPIO_PODR_FECH_PODR_FECH1   (0x02)

Definition at line 418 of file m532xsim.h.

#define MCF_GPIO_PODR_FECH_PODR_FECH2   (0x04)

Definition at line 419 of file m532xsim.h.

#define MCF_GPIO_PODR_FECH_PODR_FECH3   (0x08)

Definition at line 420 of file m532xsim.h.

#define MCF_GPIO_PODR_FECH_PODR_FECH4   (0x10)

Definition at line 421 of file m532xsim.h.

#define MCF_GPIO_PODR_FECH_PODR_FECH5   (0x20)

Definition at line 422 of file m532xsim.h.

#define MCF_GPIO_PODR_FECH_PODR_FECH6   (0x40)

Definition at line 423 of file m532xsim.h.

#define MCF_GPIO_PODR_FECH_PODR_FECH7   (0x80)

Definition at line 424 of file m532xsim.h.

#define MCF_GPIO_PODR_FECI2C_PODR_FECI2C0   (0x01)

Definition at line 469 of file m532xsim.h.

#define MCF_GPIO_PODR_FECI2C_PODR_FECI2C1   (0x02)

Definition at line 470 of file m532xsim.h.

#define MCF_GPIO_PODR_FECI2C_PODR_FECI2C2   (0x04)

Definition at line 471 of file m532xsim.h.

#define MCF_GPIO_PODR_FECI2C_PODR_FECI2C3   (0x08)

Definition at line 472 of file m532xsim.h.

#define MCF_GPIO_PODR_FECL_PODR_FECL0   (0x01)

Definition at line 427 of file m532xsim.h.

#define MCF_GPIO_PODR_FECL_PODR_FECL1   (0x02)

Definition at line 428 of file m532xsim.h.

#define MCF_GPIO_PODR_FECL_PODR_FECL2   (0x04)

Definition at line 429 of file m532xsim.h.

#define MCF_GPIO_PODR_FECL_PODR_FECL3   (0x08)

Definition at line 430 of file m532xsim.h.

#define MCF_GPIO_PODR_FECL_PODR_FECL4   (0x10)

Definition at line 431 of file m532xsim.h.

#define MCF_GPIO_PODR_FECL_PODR_FECL5   (0x20)

Definition at line 432 of file m532xsim.h.

#define MCF_GPIO_PODR_FECL_PODR_FECL6   (0x40)

Definition at line 433 of file m532xsim.h.

#define MCF_GPIO_PODR_FECL_PODR_FECL7   (0x80)

Definition at line 434 of file m532xsim.h.

#define MCF_GPIO_PODR_LCDCTLH_PODR_LCDCTLH0   (0x01)

Definition at line 523 of file m532xsim.h.

#define MCF_GPIO_PODR_LCDCTLL_PODR_LCDCTLL0   (0x01)

Definition at line 526 of file m532xsim.h.

#define MCF_GPIO_PODR_LCDCTLL_PODR_LCDCTLL1   (0x02)

Definition at line 527 of file m532xsim.h.

#define MCF_GPIO_PODR_LCDCTLL_PODR_LCDCTLL2   (0x04)

Definition at line 528 of file m532xsim.h.

#define MCF_GPIO_PODR_LCDCTLL_PODR_LCDCTLL3   (0x08)

Definition at line 529 of file m532xsim.h.

#define MCF_GPIO_PODR_LCDCTLL_PODR_LCDCTLL4   (0x10)

Definition at line 530 of file m532xsim.h.

#define MCF_GPIO_PODR_LCDCTLL_PODR_LCDCTLL5   (0x20)

Definition at line 531 of file m532xsim.h.

#define MCF_GPIO_PODR_LCDCTLL_PODR_LCDCTLL6   (0x40)

Definition at line 532 of file m532xsim.h.

#define MCF_GPIO_PODR_LCDCTLL_PODR_LCDCTLL7   (0x80)

Definition at line 533 of file m532xsim.h.

#define MCF_GPIO_PODR_LCDDATAH_PODR_LCDDATAH0   (0x01)

Definition at line 499 of file m532xsim.h.

#define MCF_GPIO_PODR_LCDDATAH_PODR_LCDDATAH1   (0x02)

Definition at line 500 of file m532xsim.h.

#define MCF_GPIO_PODR_LCDDATAL_PODR_LCDDATAL0   (0x01)

Definition at line 513 of file m532xsim.h.

#define MCF_GPIO_PODR_LCDDATAL_PODR_LCDDATAL1   (0x02)

Definition at line 514 of file m532xsim.h.

#define MCF_GPIO_PODR_LCDDATAL_PODR_LCDDATAL2   (0x04)

Definition at line 515 of file m532xsim.h.

#define MCF_GPIO_PODR_LCDDATAL_PODR_LCDDATAL3   (0x08)

Definition at line 516 of file m532xsim.h.

#define MCF_GPIO_PODR_LCDDATAL_PODR_LCDDATAL4   (0x10)

Definition at line 517 of file m532xsim.h.

#define MCF_GPIO_PODR_LCDDATAL_PODR_LCDDATAL5   (0x20)

Definition at line 518 of file m532xsim.h.

#define MCF_GPIO_PODR_LCDDATAL_PODR_LCDDATAL6   (0x40)

Definition at line 519 of file m532xsim.h.

#define MCF_GPIO_PODR_LCDDATAL_PODR_LCDDATAL7   (0x80)

Definition at line 520 of file m532xsim.h.

#define MCF_GPIO_PODR_LCDDATAM_PODR_LCDDATAM0   (0x01)

Definition at line 503 of file m532xsim.h.

#define MCF_GPIO_PODR_LCDDATAM_PODR_LCDDATAM1   (0x02)

Definition at line 504 of file m532xsim.h.

#define MCF_GPIO_PODR_LCDDATAM_PODR_LCDDATAM2   (0x04)

Definition at line 505 of file m532xsim.h.

#define MCF_GPIO_PODR_LCDDATAM_PODR_LCDDATAM3   (0x08)

Definition at line 506 of file m532xsim.h.

#define MCF_GPIO_PODR_LCDDATAM_PODR_LCDDATAM4   (0x10)

Definition at line 507 of file m532xsim.h.

#define MCF_GPIO_PODR_LCDDATAM_PODR_LCDDATAM5   (0x20)

Definition at line 508 of file m532xsim.h.

#define MCF_GPIO_PODR_LCDDATAM_PODR_LCDDATAM6   (0x40)

Definition at line 509 of file m532xsim.h.

#define MCF_GPIO_PODR_LCDDATAM_PODR_LCDDATAM7   (0x80)

Definition at line 510 of file m532xsim.h.

#define MCF_GPIO_PODR_PWM_PODR_PWM2   (0x04)

Definition at line 463 of file m532xsim.h.

#define MCF_GPIO_PODR_PWM_PODR_PWM3   (0x08)

Definition at line 464 of file m532xsim.h.

#define MCF_GPIO_PODR_PWM_PODR_PWM4   (0x10)

Definition at line 465 of file m532xsim.h.

#define MCF_GPIO_PODR_PWM_PODR_PWM5   (0x20)

Definition at line 466 of file m532xsim.h.

#define MCF_GPIO_PODR_QSPI_PODR_QSPI0   (0x01)

Definition at line 485 of file m532xsim.h.

#define MCF_GPIO_PODR_QSPI_PODR_QSPI1   (0x02)

Definition at line 486 of file m532xsim.h.

#define MCF_GPIO_PODR_QSPI_PODR_QSPI2   (0x04)

Definition at line 487 of file m532xsim.h.

#define MCF_GPIO_PODR_QSPI_PODR_QSPI3   (0x08)

Definition at line 488 of file m532xsim.h.

#define MCF_GPIO_PODR_QSPI_PODR_QSPI4   (0x10)

Definition at line 489 of file m532xsim.h.

#define MCF_GPIO_PODR_QSPI_PODR_QSPI5   (0x20)

Definition at line 490 of file m532xsim.h.

#define MCF_GPIO_PODR_SSI_PODR_SSI0   (0x01)

Definition at line 437 of file m532xsim.h.

#define MCF_GPIO_PODR_SSI_PODR_SSI1   (0x02)

Definition at line 438 of file m532xsim.h.

#define MCF_GPIO_PODR_SSI_PODR_SSI2   (0x04)

Definition at line 439 of file m532xsim.h.

#define MCF_GPIO_PODR_SSI_PODR_SSI3   (0x08)

Definition at line 440 of file m532xsim.h.

#define MCF_GPIO_PODR_SSI_PODR_SSI4   (0x10)

Definition at line 441 of file m532xsim.h.

#define MCF_GPIO_PODR_TIMER_PODR_TIMER0   (0x01)

Definition at line 493 of file m532xsim.h.

#define MCF_GPIO_PODR_TIMER_PODR_TIMER1   (0x02)

Definition at line 494 of file m532xsim.h.

#define MCF_GPIO_PODR_TIMER_PODR_TIMER2   (0x04)

Definition at line 495 of file m532xsim.h.

#define MCF_GPIO_PODR_TIMER_PODR_TIMER3   (0x08)

Definition at line 496 of file m532xsim.h.

#define MCF_GPIO_PODR_UART_PODR_UART0   (0x01)

Definition at line 475 of file m532xsim.h.

#define MCF_GPIO_PODR_UART_PODR_UART1   (0x02)

Definition at line 476 of file m532xsim.h.

#define MCF_GPIO_PODR_UART_PODR_UART2   (0x04)

Definition at line 477 of file m532xsim.h.

#define MCF_GPIO_PODR_UART_PODR_UART3   (0x08)

Definition at line 478 of file m532xsim.h.

#define MCF_GPIO_PODR_UART_PODR_UART4   (0x10)

Definition at line 479 of file m532xsim.h.

#define MCF_GPIO_PODR_UART_PODR_UART5   (0x20)

Definition at line 480 of file m532xsim.h.

#define MCF_GPIO_PODR_UART_PODR_UART6   (0x40)

Definition at line 481 of file m532xsim.h.

#define MCF_GPIO_PODR_UART_PODR_UART7   (0x80)

Definition at line 482 of file m532xsim.h.

#define MCF_GPIO_PPDSDR_BE_PPDSDR_BE0   (0x01)

Definition at line 688 of file m532xsim.h.

#define MCF_GPIO_PPDSDR_BE_PPDSDR_BE1   (0x02)

Definition at line 689 of file m532xsim.h.

#define MCF_GPIO_PPDSDR_BE_PPDSDR_BE2   (0x04)

Definition at line 690 of file m532xsim.h.

#define MCF_GPIO_PPDSDR_BE_PPDSDR_BE3   (0x08)

Definition at line 691 of file m532xsim.h.

#define MCF_GPIO_PPDSDR_BUSCTL_POSDR_BUSCTL0   (0x01)

Definition at line 682 of file m532xsim.h.

#define MCF_GPIO_PPDSDR_BUSCTL_PPDSDR_BUSCTL1   (0x02)

Definition at line 683 of file m532xsim.h.

#define MCF_GPIO_PPDSDR_BUSCTL_PPDSDR_BUSCTL2   (0x04)

Definition at line 684 of file m532xsim.h.

#define MCF_GPIO_PPDSDR_BUSCTL_PPDSDR_BUSCTL3   (0x08)

Definition at line 685 of file m532xsim.h.

#define MCF_GPIO_PPDSDR_CS_PPDSDR_CS1   (0x02)

Definition at line 694 of file m532xsim.h.

#define MCF_GPIO_PPDSDR_CS_PPDSDR_CS2   (0x04)

Definition at line 695 of file m532xsim.h.

#define MCF_GPIO_PPDSDR_CS_PPDSDR_CS3   (0x08)

Definition at line 696 of file m532xsim.h.

#define MCF_GPIO_PPDSDR_CS_PPDSDR_CS4   (0x10)

Definition at line 697 of file m532xsim.h.

#define MCF_GPIO_PPDSDR_CS_PPDSDR_CS5   (0x20)

Definition at line 698 of file m532xsim.h.

#define MCF_GPIO_PPDSDR_FECH_PPDSDR_FECH0   (0x01)

Definition at line 655 of file m532xsim.h.

#define MCF_GPIO_PPDSDR_FECH_PPDSDR_FECH1   (0x02)

Definition at line 656 of file m532xsim.h.

#define MCF_GPIO_PPDSDR_FECH_PPDSDR_FECH2   (0x04)

Definition at line 657 of file m532xsim.h.

#define MCF_GPIO_PPDSDR_FECH_PPDSDR_FECH3   (0x08)

Definition at line 658 of file m532xsim.h.

#define MCF_GPIO_PPDSDR_FECH_PPDSDR_FECH4   (0x10)

Definition at line 659 of file m532xsim.h.

#define MCF_GPIO_PPDSDR_FECH_PPDSDR_FECH5   (0x20)

Definition at line 660 of file m532xsim.h.

#define MCF_GPIO_PPDSDR_FECH_PPDSDR_FECH6   (0x40)

Definition at line 661 of file m532xsim.h.

#define MCF_GPIO_PPDSDR_FECH_PPDSDR_FECH7   (0x80)

Definition at line 662 of file m532xsim.h.

#define MCF_GPIO_PPDSDR_FECI2C_PPDSDR_FECI2C0   (0x01)

Definition at line 707 of file m532xsim.h.

#define MCF_GPIO_PPDSDR_FECI2C_PPDSDR_FECI2C1   (0x02)

Definition at line 708 of file m532xsim.h.

#define MCF_GPIO_PPDSDR_FECI2C_PPDSDR_FECI2C2   (0x04)

Definition at line 709 of file m532xsim.h.

#define MCF_GPIO_PPDSDR_FECI2C_PPDSDR_FECI2C3   (0x08)

Definition at line 710 of file m532xsim.h.

#define MCF_GPIO_PPDSDR_FECL_PPDSDR_FECL0   (0x01)

Definition at line 665 of file m532xsim.h.

#define MCF_GPIO_PPDSDR_FECL_PPDSDR_FECL1   (0x02)

Definition at line 666 of file m532xsim.h.

#define MCF_GPIO_PPDSDR_FECL_PPDSDR_FECL2   (0x04)

Definition at line 667 of file m532xsim.h.

#define MCF_GPIO_PPDSDR_FECL_PPDSDR_FECL3   (0x08)

Definition at line 668 of file m532xsim.h.

#define MCF_GPIO_PPDSDR_FECL_PPDSDR_FECL4   (0x10)

Definition at line 669 of file m532xsim.h.

#define MCF_GPIO_PPDSDR_FECL_PPDSDR_FECL5   (0x20)

Definition at line 670 of file m532xsim.h.

#define MCF_GPIO_PPDSDR_FECL_PPDSDR_FECL6   (0x40)

Definition at line 671 of file m532xsim.h.

#define MCF_GPIO_PPDSDR_FECL_PPDSDR_FECL7   (0x80)

Definition at line 672 of file m532xsim.h.

#define MCF_GPIO_PPDSDR_LCDCTLH_PPDSDR_LCDCTLH0   (0x01)

Definition at line 761 of file m532xsim.h.

#define MCF_GPIO_PPDSDR_LCDCTLL_PPDSDR_LCDCTLL0   (0x01)

Definition at line 764 of file m532xsim.h.

#define MCF_GPIO_PPDSDR_LCDCTLL_PPDSDR_LCDCTLL1   (0x02)

Definition at line 765 of file m532xsim.h.

#define MCF_GPIO_PPDSDR_LCDCTLL_PPDSDR_LCDCTLL2   (0x04)

Definition at line 766 of file m532xsim.h.

#define MCF_GPIO_PPDSDR_LCDCTLL_PPDSDR_LCDCTLL3   (0x08)

Definition at line 767 of file m532xsim.h.

#define MCF_GPIO_PPDSDR_LCDCTLL_PPDSDR_LCDCTLL4   (0x10)

Definition at line 768 of file m532xsim.h.

#define MCF_GPIO_PPDSDR_LCDCTLL_PPDSDR_LCDCTLL5   (0x20)

Definition at line 769 of file m532xsim.h.

#define MCF_GPIO_PPDSDR_LCDCTLL_PPDSDR_LCDCTLL6   (0x40)

Definition at line 770 of file m532xsim.h.

#define MCF_GPIO_PPDSDR_LCDCTLL_PPDSDR_LCDCTLL7   (0x80)

Definition at line 771 of file m532xsim.h.

#define MCF_GPIO_PPDSDR_LCDDATAH_PPDSDR_LCDDATAH0   (0x01)

Definition at line 737 of file m532xsim.h.

#define MCF_GPIO_PPDSDR_LCDDATAH_PPDSDR_LCDDATAH1   (0x02)

Definition at line 738 of file m532xsim.h.

#define MCF_GPIO_PPDSDR_LCDDATAL_PPDSDR_LCDDATAL0   (0x01)

Definition at line 751 of file m532xsim.h.

#define MCF_GPIO_PPDSDR_LCDDATAL_PPDSDR_LCDDATAL1   (0x02)

Definition at line 752 of file m532xsim.h.

#define MCF_GPIO_PPDSDR_LCDDATAL_PPDSDR_LCDDATAL2   (0x04)

Definition at line 753 of file m532xsim.h.

#define MCF_GPIO_PPDSDR_LCDDATAL_PPDSDR_LCDDATAL3   (0x08)

Definition at line 754 of file m532xsim.h.

#define MCF_GPIO_PPDSDR_LCDDATAL_PPDSDR_LCDDATAL4   (0x10)

Definition at line 755 of file m532xsim.h.

#define MCF_GPIO_PPDSDR_LCDDATAL_PPDSDR_LCDDATAL5   (0x20)

Definition at line 756 of file m532xsim.h.

#define MCF_GPIO_PPDSDR_LCDDATAL_PPDSDR_LCDDATAL6   (0x40)

Definition at line 757 of file m532xsim.h.

#define MCF_GPIO_PPDSDR_LCDDATAL_PPDSDR_LCDDATAL7   (0x80)

Definition at line 758 of file m532xsim.h.

#define MCF_GPIO_PPDSDR_LCDDATAM_PPDSDR_LCDDATAM0   (0x01)

Definition at line 741 of file m532xsim.h.

#define MCF_GPIO_PPDSDR_LCDDATAM_PPDSDR_LCDDATAM1   (0x02)

Definition at line 742 of file m532xsim.h.

#define MCF_GPIO_PPDSDR_LCDDATAM_PPDSDR_LCDDATAM2   (0x04)

Definition at line 743 of file m532xsim.h.

#define MCF_GPIO_PPDSDR_LCDDATAM_PPDSDR_LCDDATAM3   (0x08)

Definition at line 744 of file m532xsim.h.

#define MCF_GPIO_PPDSDR_LCDDATAM_PPDSDR_LCDDATAM4   (0x10)

Definition at line 745 of file m532xsim.h.

#define MCF_GPIO_PPDSDR_LCDDATAM_PPDSDR_LCDDATAM5   (0x20)

Definition at line 746 of file m532xsim.h.

#define MCF_GPIO_PPDSDR_LCDDATAM_PPDSDR_LCDDATAM6   (0x40)

Definition at line 747 of file m532xsim.h.

#define MCF_GPIO_PPDSDR_LCDDATAM_PPDSDR_LCDDATAM7   (0x80)

Definition at line 748 of file m532xsim.h.

#define MCF_GPIO_PPDSDR_PWM_PPDSDR_PWM2   (0x04)

Definition at line 701 of file m532xsim.h.

#define MCF_GPIO_PPDSDR_PWM_PPDSDR_PWM3   (0x08)

Definition at line 702 of file m532xsim.h.

#define MCF_GPIO_PPDSDR_PWM_PPDSDR_PWM4   (0x10)

Definition at line 703 of file m532xsim.h.

#define MCF_GPIO_PPDSDR_PWM_PPDSDR_PWM5   (0x20)

Definition at line 704 of file m532xsim.h.

#define MCF_GPIO_PPDSDR_QSPI_PPDSDR_QSPI0   (0x01)

Definition at line 723 of file m532xsim.h.

#define MCF_GPIO_PPDSDR_QSPI_PPDSDR_QSPI1   (0x02)

Definition at line 724 of file m532xsim.h.

#define MCF_GPIO_PPDSDR_QSPI_PPDSDR_QSPI2   (0x04)

Definition at line 725 of file m532xsim.h.

#define MCF_GPIO_PPDSDR_QSPI_PPDSDR_QSPI3   (0x08)

Definition at line 726 of file m532xsim.h.

#define MCF_GPIO_PPDSDR_QSPI_PPDSDR_QSPI4   (0x10)

Definition at line 727 of file m532xsim.h.

#define MCF_GPIO_PPDSDR_QSPI_PPDSDR_QSPI5   (0x20)

Definition at line 728 of file m532xsim.h.

#define MCF_GPIO_PPDSDR_SSI_PPDSDR_SSI0   (0x01)

Definition at line 675 of file m532xsim.h.

#define MCF_GPIO_PPDSDR_SSI_PPDSDR_SSI1   (0x02)

Definition at line 676 of file m532xsim.h.

#define MCF_GPIO_PPDSDR_SSI_PPDSDR_SSI2   (0x04)

Definition at line 677 of file m532xsim.h.

#define MCF_GPIO_PPDSDR_SSI_PPDSDR_SSI3   (0x08)

Definition at line 678 of file m532xsim.h.

#define MCF_GPIO_PPDSDR_SSI_PPDSDR_SSI4   (0x10)

Definition at line 679 of file m532xsim.h.

#define MCF_GPIO_PPDSDR_TIMER_PPDSDR_TIMER0   (0x01)

Definition at line 731 of file m532xsim.h.

#define MCF_GPIO_PPDSDR_TIMER_PPDSDR_TIMER1   (0x02)

Definition at line 732 of file m532xsim.h.

#define MCF_GPIO_PPDSDR_TIMER_PPDSDR_TIMER2   (0x04)

Definition at line 733 of file m532xsim.h.

#define MCF_GPIO_PPDSDR_TIMER_PPDSDR_TIMER3   (0x08)

Definition at line 734 of file m532xsim.h.

#define MCF_GPIO_PPDSDR_UART_PPDSDR_UART0   (0x01)

Definition at line 713 of file m532xsim.h.

#define MCF_GPIO_PPDSDR_UART_PPDSDR_UART1   (0x02)

Definition at line 714 of file m532xsim.h.

#define MCF_GPIO_PPDSDR_UART_PPDSDR_UART2   (0x04)

Definition at line 715 of file m532xsim.h.

#define MCF_GPIO_PPDSDR_UART_PPDSDR_UART3   (0x08)

Definition at line 716 of file m532xsim.h.

#define MCF_GPIO_PPDSDR_UART_PPDSDR_UART4   (0x10)

Definition at line 717 of file m532xsim.h.

#define MCF_GPIO_PPDSDR_UART_PPDSDR_UART5   (0x20)

Definition at line 718 of file m532xsim.h.

#define MCF_GPIO_PPDSDR_UART_PPDSDR_UART6   (0x40)

Definition at line 719 of file m532xsim.h.

#define MCF_GPIO_PPDSDR_UART_PPDSDR_UART7   (0x80)

Definition at line 720 of file m532xsim.h.

#define MCF_IRQ_FECENTC0   (MCFINT_VECBASE + MCFINT_FECENTC0)

Definition at line 33 of file m532xsim.h.

#define MCF_IRQ_FECRX0   (MCFINT_VECBASE + MCFINT_FECRX0)

Definition at line 31 of file m532xsim.h.

#define MCF_IRQ_FECTX0   (MCFINT_VECBASE + MCFINT_FECTX0)

Definition at line 32 of file m532xsim.h.

#define MCF_IRQ_PROFILER   (64 + 33) /* Timer1 */

Definition at line 92 of file m532xsim.h.

#define MCF_IRQ_QSPI   (MCFINT_VECBASE + MCFINT_QSPI)

Definition at line 35 of file m532xsim.h.

#define MCF_IRQ_TIMER   (64 + 32) /* Timer0 */

Definition at line 91 of file m532xsim.h.

#define MCF_IRQ_UART0   (MCFINT_VECBASE + MCFINT_UART0)

Definition at line 27 of file m532xsim.h.

#define MCF_IRQ_UART1   (MCFINT_VECBASE + MCFINT_UART1)

Definition at line 28 of file m532xsim.h.

#define MCF_IRQ_UART2   (MCFINT_VECBASE + MCFINT_UART2)

Definition at line 29 of file m532xsim.h.

#define MCF_PLL_PFDR   0xFC0C000C

Definition at line 1113 of file m532xsim.h.

#define MCF_PLL_PFDR_MFD (   x)    (((x)&0xFF)<<0)

Definition at line 1127 of file m532xsim.h.

#define MCF_PLL_PLLCR   0xFC0C0004

Definition at line 1111 of file m532xsim.h.

#define MCF_PLL_PLLCR_DITHDEV (   x)    (((x)&0x07)<<0)

Definition at line 1120 of file m532xsim.h.

#define MCF_PLL_PLLCR_DITHEN   (0x80)

Definition at line 1121 of file m532xsim.h.

#define MCF_PLL_PMDR   0xFC0C0008

Definition at line 1112 of file m532xsim.h.

#define MCF_PLL_PMDR_MODDIV (   x)    (((x)&0xFF)<<0)

Definition at line 1124 of file m532xsim.h.

#define MCF_PLL_PODR   0xFC0C0000

Definition at line 1110 of file m532xsim.h.

#define MCF_PLL_PODR_BUSDIV (   x)    (((x)&0x0F)<<0)

Definition at line 1116 of file m532xsim.h.

#define MCF_PLL_PODR_CPUDIV (   x)    (((x)&0x0F)<<4)

Definition at line 1117 of file m532xsim.h.

#define MCF_RCR   0xFC0A0000

Definition at line 131 of file m532xsim.h.

#define MCF_RCR_FRCSTOUT   0x40 /* Force external reset */

Definition at line 135 of file m532xsim.h.

#define MCF_RCR_SWRESET   0x80 /* Software reset bit */

Definition at line 134 of file m532xsim.h.

#define MCF_RSR   0xFC0A0001

Definition at line 132 of file m532xsim.h.

#define MCF_SCM_BCR   0xFC040024

Definition at line 1144 of file m532xsim.h.

#define MCF_SCM_MPR   0xFC000000

Definition at line 1136 of file m532xsim.h.

#define MCF_SCM_PACRA   0xFC000020

Definition at line 1137 of file m532xsim.h.

#define MCF_SCM_PACRB   0xFC000024

Definition at line 1138 of file m532xsim.h.

#define MCF_SCM_PACRC   0xFC000028

Definition at line 1139 of file m532xsim.h.

#define MCF_SCM_PACRD   0xFC00002C

Definition at line 1140 of file m532xsim.h.

#define MCF_SCM_PACRE   0xFC000040

Definition at line 1141 of file m532xsim.h.

#define MCF_SCM_PACRF   0xFC000044

Definition at line 1142 of file m532xsim.h.

#define MCF_SDRAMC_LIMP_FIX   0xFC0B8080

Definition at line 1157 of file m532xsim.h.

#define MCF_SDRAMC_REFRESH   (0x40000000)

Definition at line 1202 of file m532xsim.h.

#define MCF_SDRAMC_SDCFG1   0xFC0B8008

Definition at line 1155 of file m532xsim.h.

#define MCF_SDRAMC_SDCFG1_ACT2RW (   x)    (((x)&0x00000007)<<16)

Definition at line 1190 of file m532xsim.h.

#define MCF_SDRAMC_SDCFG1_PRE2ACT (   x)    (((x)&0x00000007)<<12)

Definition at line 1189 of file m532xsim.h.

#define MCF_SDRAMC_SDCFG1_RDLAT (   x)    (((x)&0x0000000F)<<20)

Definition at line 1191 of file m532xsim.h.

#define MCF_SDRAMC_SDCFG1_REF2ACT (   x)    (((x)&0x0000000F)<<8)

Definition at line 1188 of file m532xsim.h.

#define MCF_SDRAMC_SDCFG1_SRD2RW (   x)    (((x)&0x0000000F)<<28)

Definition at line 1193 of file m532xsim.h.

#define MCF_SDRAMC_SDCFG1_SWT2RD (   x)    (((x)&0x00000007)<<24)

Definition at line 1192 of file m532xsim.h.

#define MCF_SDRAMC_SDCFG1_WTLAT (   x)    (((x)&0x00000007)<<4)

Definition at line 1187 of file m532xsim.h.

#define MCF_SDRAMC_SDCFG2   0xFC0B800C

Definition at line 1156 of file m532xsim.h.

#define MCF_SDRAMC_SDCFG2_BL (   x)    (((x)&0x0000000F)<<16)

Definition at line 1196 of file m532xsim.h.

#define MCF_SDRAMC_SDCFG2_BRD2PRE (   x)    (((x)&0x0000000F)<<28)

Definition at line 1199 of file m532xsim.h.

#define MCF_SDRAMC_SDCFG2_BRD2WT (   x)    (((x)&0x0000000F)<<20)

Definition at line 1197 of file m532xsim.h.

#define MCF_SDRAMC_SDCFG2_BWT2RW (   x)    (((x)&0x0000000F)<<24)

Definition at line 1198 of file m532xsim.h.

#define MCF_SDRAMC_SDCR   0xFC0B8004

Definition at line 1154 of file m532xsim.h.

#define MCF_SDRAMC_SDCR_CKE   (0x40000000)

Definition at line 1181 of file m532xsim.h.

#define MCF_SDRAMC_SDCR_DDR   (0x20000000)

Definition at line 1180 of file m532xsim.h.

#define MCF_SDRAMC_SDCR_DQS_OE (   x)    (((x)&0x0000000F)<<8)

Definition at line 1174 of file m532xsim.h.

#define MCF_SDRAMC_SDCR_IPALL   (0x00000002)

Definition at line 1172 of file m532xsim.h.

#define MCF_SDRAMC_SDCR_IREF   (0x00000004)

Definition at line 1173 of file m532xsim.h.

#define MCF_SDRAMC_SDCR_MODE_EN   (0x80000000)

Definition at line 1182 of file m532xsim.h.

#define MCF_SDRAMC_SDCR_MUX (   x)    (((x)&0x00000003)<<24)

Definition at line 1178 of file m532xsim.h.

#define MCF_SDRAMC_SDCR_OE_RULE   (0x00400000)

Definition at line 1177 of file m532xsim.h.

#define MCF_SDRAMC_SDCR_PS (   x)    (((x)&0x00000003)<<12)

Definition at line 1175 of file m532xsim.h.

#define MCF_SDRAMC_SDCR_PS_16   (0x00002000)

Definition at line 1183 of file m532xsim.h.

#define MCF_SDRAMC_SDCR_PS_32   (0x00000000)

Definition at line 1184 of file m532xsim.h.

#define MCF_SDRAMC_SDCR_RCNT (   x)    (((x)&0x0000003F)<<16)

Definition at line 1176 of file m532xsim.h.

#define MCF_SDRAMC_SDCR_REF   (0x10000000)

Definition at line 1179 of file m532xsim.h.

#define MCF_SDRAMC_SDCS0   0xFC0B8110

Definition at line 1159 of file m532xsim.h.

#define MCF_SDRAMC_SDCS1   0xFC0B8114

Definition at line 1160 of file m532xsim.h.

#define MCF_SDRAMC_SDCS2   0xFC0B8118

Definition at line 1161 of file m532xsim.h.

#define MCF_SDRAMC_SDCS3   0xFC0B811C

Definition at line 1162 of file m532xsim.h.

#define MCF_SDRAMC_SDCS_BA (   x)    ((x)&0xFFF00000)

Definition at line 1214 of file m532xsim.h.

#define MCF_SDRAMC_SDCS_BASE (   x)    (((x)&0x00000FFF)<<20)

Definition at line 1213 of file m532xsim.h.

#define MCF_SDRAMC_SDCS_CSSZ (   x)    (((x)&0x0000001F)<<0)

Definition at line 1212 of file m532xsim.h.

#define MCF_SDRAMC_SDCS_CSSZ_128MBYTE   (0x0000001A)

Definition at line 1223 of file m532xsim.h.

#define MCF_SDRAMC_SDCS_CSSZ_16MBYTE   (0x00000017)

Definition at line 1220 of file m532xsim.h.

#define MCF_SDRAMC_SDCS_CSSZ_1GBYTE   (0x0000001D)

Definition at line 1226 of file m532xsim.h.

#define MCF_SDRAMC_SDCS_CSSZ_1MBYTE   (0x00000013)

Definition at line 1216 of file m532xsim.h.

#define MCF_SDRAMC_SDCS_CSSZ_256MBYTE   (0x0000001B)

Definition at line 1224 of file m532xsim.h.

#define MCF_SDRAMC_SDCS_CSSZ_2GBYTE   (0x0000001E)

Definition at line 1227 of file m532xsim.h.

#define MCF_SDRAMC_SDCS_CSSZ_2MBYTE   (0x00000014)

Definition at line 1217 of file m532xsim.h.

#define MCF_SDRAMC_SDCS_CSSZ_32MBYTE   (0x00000018)

Definition at line 1221 of file m532xsim.h.

#define MCF_SDRAMC_SDCS_CSSZ_4GBYTE   (0x0000001F)

Definition at line 1228 of file m532xsim.h.

#define MCF_SDRAMC_SDCS_CSSZ_4MBYTE   (0x00000015)

Definition at line 1218 of file m532xsim.h.

#define MCF_SDRAMC_SDCS_CSSZ_512MBYTE   (0x0000001C)

Definition at line 1225 of file m532xsim.h.

#define MCF_SDRAMC_SDCS_CSSZ_64MBYTE   (0x00000019)

Definition at line 1222 of file m532xsim.h.

#define MCF_SDRAMC_SDCS_CSSZ_8MBYTE   (0x00000016)

Definition at line 1219 of file m532xsim.h.

#define MCF_SDRAMC_SDCS_CSSZ_DIABLE   (0x00000000)

Definition at line 1215 of file m532xsim.h.

#define MCF_SDRAMC_SDDS   0xFC0B8100

Definition at line 1158 of file m532xsim.h.

#define MCF_SDRAMC_SDDS_SB_A (   x)    (((x)&0x00000003)<<4)

Definition at line 1207 of file m532xsim.h.

#define MCF_SDRAMC_SDDS_SB_C (   x)    (((x)&0x00000003)<<6)

Definition at line 1208 of file m532xsim.h.

#define MCF_SDRAMC_SDDS_SB_D (   x)    (((x)&0x00000003)<<0)

Definition at line 1205 of file m532xsim.h.

#define MCF_SDRAMC_SDDS_SB_E (   x)    (((x)&0x00000003)<<8)

Definition at line 1209 of file m532xsim.h.

#define MCF_SDRAMC_SDDS_SB_S (   x)    (((x)&0x00000003)<<2)

Definition at line 1206 of file m532xsim.h.

#define MCF_SDRAMC_SDMR   0xFC0B8000

Definition at line 1153 of file m532xsim.h.

#define MCF_SDRAMC_SDMR_AD (   x)    (((x)&0x00000FFF)<<18)

Definition at line 1166 of file m532xsim.h.

#define MCF_SDRAMC_SDMR_BNKAD (   x)    (((x)&0x00000003)<<30)

Definition at line 1167 of file m532xsim.h.

#define MCF_SDRAMC_SDMR_BNKAD_LEMR   (0x40000000)

Definition at line 1169 of file m532xsim.h.

#define MCF_SDRAMC_SDMR_BNKAD_LMR   (0x00000000)

Definition at line 1168 of file m532xsim.h.

#define MCF_SDRAMC_SDMR_CMD   (0x00010000)

Definition at line 1165 of file m532xsim.h.

#define MCF_WTM_WCR   0xFC098000

Definition at line 37 of file m532xsim.h.

#define MCFEPORT_EPDDR   (0xFC094002)

Definition at line 1234 of file m532xsim.h.

#define MCFEPORT_EPDR   (0xFC094004)

Definition at line 1236 of file m532xsim.h.

#define MCFEPORT_EPFR   (0xFC094006)

Definition at line 1238 of file m532xsim.h.

#define MCFEPORT_EPIER   (0xFC094003)

Definition at line 1235 of file m532xsim.h.

#define MCFEPORT_EPPAR   (0xFC094000)

Definition at line 1233 of file m532xsim.h.

#define MCFEPORT_EPPDR   (0xFC094005)

Definition at line 1237 of file m532xsim.h.

#define MCFFEC_BASE0   0xFC030000 /* Base address of FEC0 */

Definition at line 104 of file m532xsim.h.

#define MCFFEC_SIZE0   0x800 /* Size of FEC0 region */

Definition at line 105 of file m532xsim.h.

#define MCFGPIO_CLRR   MCFGPIO_PCLRR_FECH

Definition at line 1097 of file m532xsim.h.

#define MCFGPIO_DSCR_CLKRST   (0xFC0A4071)

Definition at line 413 of file m532xsim.h.

#define MCFGPIO_DSCR_DEBUG   (0xFC0A4070)

Definition at line 412 of file m532xsim.h.

#define MCFGPIO_DSCR_FEC   (0xFC0A406A)

Definition at line 406 of file m532xsim.h.

#define MCFGPIO_DSCR_I2C   (0xFC0A4068)

Definition at line 404 of file m532xsim.h.

#define MCFGPIO_DSCR_IRQ   (0xFC0A4072)

Definition at line 414 of file m532xsim.h.

#define MCFGPIO_DSCR_LCD   (0xFC0A406F)

Definition at line 411 of file m532xsim.h.

#define MCFGPIO_DSCR_PWM   (0xFC0A4069)

Definition at line 405 of file m532xsim.h.

#define MCFGPIO_DSCR_QSPI   (0xFC0A406C)

Definition at line 408 of file m532xsim.h.

#define MCFGPIO_DSCR_SSI   (0xFC0A406E)

Definition at line 410 of file m532xsim.h.

#define MCFGPIO_DSCR_TIMER   (0xFC0A406D)

Definition at line 409 of file m532xsim.h.

#define MCFGPIO_DSCR_UART   (0xFC0A406B)

Definition at line 407 of file m532xsim.h.

#define MCFGPIO_IRQ_MAX   8

Definition at line 1100 of file m532xsim.h.

#define MCFGPIO_IRQ_VECBASE   MCFINT_VECBASE

Definition at line 1101 of file m532xsim.h.

#define MCFGPIO_MSCR_FLEXBUS   (0xFC0A4064)

Definition at line 402 of file m532xsim.h.

#define MCFGPIO_MSCR_SDRAM   (0xFC0A4065)

Definition at line 403 of file m532xsim.h.

#define MCFGPIO_PAR_BE   (0xFC0A4054)

Definition at line 393 of file m532xsim.h.

#define MCFGPIO_PAR_BUSCTL   (0xFC0A4052)

Definition at line 391 of file m532xsim.h.

#define MCFGPIO_PAR_CS   (0xFC0A4055)

Definition at line 394 of file m532xsim.h.

#define MCFGPIO_PAR_FEC   (0xFC0A4050)

Definition at line 389 of file m532xsim.h.

#define MCFGPIO_PAR_FECI2C   (0xFC0A4053)

Definition at line 392 of file m532xsim.h.

#define MCFGPIO_PAR_IRQ   (0xFC0A4060)

Definition at line 401 of file m532xsim.h.

#define MCFGPIO_PAR_LCDCTL   (0xFC0A405E)

Definition at line 400 of file m532xsim.h.

#define MCFGPIO_PAR_LCDDATA   (0xFC0A405D)

Definition at line 399 of file m532xsim.h.

#define MCFGPIO_PAR_PWM   (0xFC0A4051)

Definition at line 390 of file m532xsim.h.

#define MCFGPIO_PAR_QSPI   (0xFC0A405A)

Definition at line 397 of file m532xsim.h.

#define MCFGPIO_PAR_SSI   (0xFC0A4056)

Definition at line 395 of file m532xsim.h.

#define MCFGPIO_PAR_TIMER   (0xFC0A405C)

Definition at line 398 of file m532xsim.h.

#define MCFGPIO_PAR_UART   (0xFC0A4058)

Definition at line 396 of file m532xsim.h.

#define MCFGPIO_PCLRR_BE   (0xFC0A4040)

Definition at line 377 of file m532xsim.h.

#define MCFGPIO_PCLRR_BUSCTL   (0xFC0A403F)

Definition at line 376 of file m532xsim.h.

#define MCFGPIO_PCLRR_CS   (0xFC0A4041)

Definition at line 378 of file m532xsim.h.

#define MCFGPIO_PCLRR_FECH   (0xFC0A403C)

Definition at line 373 of file m532xsim.h.

#define MCFGPIO_PCLRR_FECI2C   (0xFC0A4043)

Definition at line 380 of file m532xsim.h.

#define MCFGPIO_PCLRR_FECL   (0xFC0A403D)

Definition at line 374 of file m532xsim.h.

#define MCFGPIO_PCLRR_LCDCTLH   (0xFC0A404C)

Definition at line 387 of file m532xsim.h.

#define MCFGPIO_PCLRR_LCDCTLL   (0xFC0A404D)

Definition at line 388 of file m532xsim.h.

#define MCFGPIO_PCLRR_LCDDATAH   (0xFC0A4049)

Definition at line 384 of file m532xsim.h.

#define MCFGPIO_PCLRR_LCDDATAL   (0xFC0A404B)

Definition at line 386 of file m532xsim.h.

#define MCFGPIO_PCLRR_LCDDATAM   (0xFC0A404A)

Definition at line 385 of file m532xsim.h.

#define MCFGPIO_PCLRR_PWM   (0xFC0A4042)

Definition at line 379 of file m532xsim.h.

#define MCFGPIO_PCLRR_QSPI   (0xFC0A4046)

Definition at line 382 of file m532xsim.h.

#define MCFGPIO_PCLRR_SSI   (0xFC0A403E)

Definition at line 375 of file m532xsim.h.

#define MCFGPIO_PCLRR_TIMER   (0xFC0A4047)

Definition at line 383 of file m532xsim.h.

#define MCFGPIO_PCLRR_UART   (0xFC0A4045)

Definition at line 381 of file m532xsim.h.

#define MCFGPIO_PDDR   MCFGPIO_PDDR_FECH

Definition at line 1094 of file m532xsim.h.

#define MCFGPIO_PDDR_BE   (0xFC0A4018)

Definition at line 345 of file m532xsim.h.

#define MCFGPIO_PDDR_BUSCTL   (0xFC0A4017)

Definition at line 344 of file m532xsim.h.

#define MCFGPIO_PDDR_CS   (0xFC0A4019)

Definition at line 346 of file m532xsim.h.

#define MCFGPIO_PDDR_FECH   (0xFC0A4014)

Definition at line 341 of file m532xsim.h.

#define MCFGPIO_PDDR_FECI2C   (0xFC0A401B)

Definition at line 348 of file m532xsim.h.

#define MCFGPIO_PDDR_FECL   (0xFC0A4015)

Definition at line 342 of file m532xsim.h.

#define MCFGPIO_PDDR_LCDCTLH   (0xFC0A4024)

Definition at line 355 of file m532xsim.h.

#define MCFGPIO_PDDR_LCDCTLL   (0xFC0A4025)

Definition at line 356 of file m532xsim.h.

#define MCFGPIO_PDDR_LCDDATAH   (0xFC0A4021)

Definition at line 352 of file m532xsim.h.

#define MCFGPIO_PDDR_LCDDATAL   (0xFC0A4023)

Definition at line 354 of file m532xsim.h.

#define MCFGPIO_PDDR_LCDDATAM   (0xFC0A4022)

Definition at line 353 of file m532xsim.h.

#define MCFGPIO_PDDR_PWM   (0xFC0A401A)

Definition at line 347 of file m532xsim.h.

#define MCFGPIO_PDDR_QSPI   (0xFC0A401E)

Definition at line 350 of file m532xsim.h.

#define MCFGPIO_PDDR_SSI   (0xFC0A4016)

Definition at line 343 of file m532xsim.h.

#define MCFGPIO_PDDR_TIMER   (0xFC0A401F)

Definition at line 351 of file m532xsim.h.

#define MCFGPIO_PDDR_UART   (0xFC0A401C)

Definition at line 349 of file m532xsim.h.

#define MCFGPIO_PIN_MAX   136

Definition at line 1099 of file m532xsim.h.

#define MCFGPIO_PODR   MCFGPIO_PODR_FECH

Definition at line 1093 of file m532xsim.h.

#define MCFGPIO_PODR_BE   (0xFC0A4004)

Definition at line 329 of file m532xsim.h.

#define MCFGPIO_PODR_BUSCTL   (0xFC0A4003)

Definition at line 328 of file m532xsim.h.

#define MCFGPIO_PODR_CS   (0xFC0A4005)

Definition at line 330 of file m532xsim.h.

#define MCFGPIO_PODR_FECH   (0xFC0A4000)

Definition at line 325 of file m532xsim.h.

#define MCFGPIO_PODR_FECI2C   (0xFC0A4007)

Definition at line 332 of file m532xsim.h.

#define MCFGPIO_PODR_FECL   (0xFC0A4001)

Definition at line 326 of file m532xsim.h.

#define MCFGPIO_PODR_LCDCTLH   (0xFC0A4010)

Definition at line 339 of file m532xsim.h.

#define MCFGPIO_PODR_LCDCTLL   (0xFC0A4011)

Definition at line 340 of file m532xsim.h.

#define MCFGPIO_PODR_LCDDATAH   (0xFC0A400D)

Definition at line 336 of file m532xsim.h.

#define MCFGPIO_PODR_LCDDATAL   (0xFC0A400F)

Definition at line 338 of file m532xsim.h.

#define MCFGPIO_PODR_LCDDATAM   (0xFC0A400E)

Definition at line 337 of file m532xsim.h.

#define MCFGPIO_PODR_PWM   (0xFC0A4006)

Definition at line 331 of file m532xsim.h.

#define MCFGPIO_PODR_QSPI   (0xFC0A400A)

Definition at line 334 of file m532xsim.h.

#define MCFGPIO_PODR_SSI   (0xFC0A4002)

Definition at line 327 of file m532xsim.h.

#define MCFGPIO_PODR_TIMER   (0xFC0A400B)

Definition at line 335 of file m532xsim.h.

#define MCFGPIO_PODR_UART   (0xFC0A4009)

Definition at line 333 of file m532xsim.h.

#define MCFGPIO_PPDR   MCFGPIO_PPDSDR_FECH

Definition at line 1095 of file m532xsim.h.

#define MCFGPIO_PPDSDR_BE   (0xFC0A402C)

Definition at line 361 of file m532xsim.h.

#define MCFGPIO_PPDSDR_BUSCTL   (0xFC0A402B)

Definition at line 360 of file m532xsim.h.

#define MCFGPIO_PPDSDR_CS   (0xFC0A402D)

Definition at line 362 of file m532xsim.h.

#define MCFGPIO_PPDSDR_FECH   (0xFC0A4028)

Definition at line 357 of file m532xsim.h.

#define MCFGPIO_PPDSDR_FECI2C   (0xFC0A402F)

Definition at line 364 of file m532xsim.h.

#define MCFGPIO_PPDSDR_FECL   (0xFC0A4029)

Definition at line 358 of file m532xsim.h.

#define MCFGPIO_PPDSDR_LCDCTLH   (0xFC0A4038)

Definition at line 371 of file m532xsim.h.

#define MCFGPIO_PPDSDR_LCDCTLL   (0xFC0A4039)

Definition at line 372 of file m532xsim.h.

#define MCFGPIO_PPDSDR_LCDDATAH   (0xFC0A4035)

Definition at line 368 of file m532xsim.h.

#define MCFGPIO_PPDSDR_LCDDATAL   (0xFC0A4037)

Definition at line 370 of file m532xsim.h.

#define MCFGPIO_PPDSDR_LCDDATAM   (0xFC0A4036)

Definition at line 369 of file m532xsim.h.

#define MCFGPIO_PPDSDR_PWM   (0xFC0A402E)

Definition at line 363 of file m532xsim.h.

#define MCFGPIO_PPDSDR_QSPI   (0xFC0A4032)

Definition at line 366 of file m532xsim.h.

#define MCFGPIO_PPDSDR_SSI   (0xFC0A402A)

Definition at line 359 of file m532xsim.h.

#define MCFGPIO_PPDSDR_TIMER   (0xFC0A4033)

Definition at line 367 of file m532xsim.h.

#define MCFGPIO_PPDSDR_UART   (0xFC0A4031)

Definition at line 365 of file m532xsim.h.

#define MCFGPIO_SETR   MCFGPIO_PPDSDR_FECH

Definition at line 1096 of file m532xsim.h.

#define MCFINT_FECENTC0   42 /* Interrupt number for FEC */

Definition at line 25 of file m532xsim.h.

#define MCFINT_FECRX0   36 /* Interrupt number for FEC */

Definition at line 23 of file m532xsim.h.

#define MCFINT_FECTX0   40 /* Interrupt number for FEC */

Definition at line 24 of file m532xsim.h.

#define MCFINT_QSPI   31 /* Interrupt number for QSPI */

Definition at line 22 of file m532xsim.h.

#define MCFINT_UART0   26 /* Interrupt number for UART0 */

Definition at line 19 of file m532xsim.h.

#define MCFINT_UART1   27 /* Interrupt number for UART1 */

Definition at line 20 of file m532xsim.h.

#define MCFINT_UART2   28 /* Interrupt number for UART2 */

Definition at line 21 of file m532xsim.h.

#define MCFINT_VECBASE   64

Definition at line 18 of file m532xsim.h.

#define MCFINTC0_CIMR   0xFC04801D

Definition at line 76 of file m532xsim.h.

#define MCFINTC0_ICR0   0xFC048040

Definition at line 77 of file m532xsim.h.

#define MCFINTC0_SIMR   0xFC04801C

Definition at line 75 of file m532xsim.h.

#define MCFINTC1_CIMR   0xFC04C01D

Definition at line 79 of file m532xsim.h.

#define MCFINTC1_ICR0   0xFC04C040

Definition at line 80 of file m532xsim.h.

#define MCFINTC1_SIMR   0xFC04C01C

Definition at line 78 of file m532xsim.h.

#define MCFINTC2_CIMR   (0)

Definition at line 82 of file m532xsim.h.

#define MCFINTC2_ICR0   (0)

Definition at line 83 of file m532xsim.h.

#define MCFINTC2_SIMR   (0)

Definition at line 81 of file m532xsim.h.

#define MCFPM_LPCR   0xec090007

Definition at line 149 of file m532xsim.h.

#define MCFPM_PPMCR0   0xfc04002d

Definition at line 143 of file m532xsim.h.

#define MCFPM_PPMCR1   0xfc04002f

Definition at line 145 of file m532xsim.h.

#define MCFPM_PPMHR0   0xfc040030

Definition at line 146 of file m532xsim.h.

#define MCFPM_PPMHR1   0xfc040038

Definition at line 148 of file m532xsim.h.

#define MCFPM_PPMLR0   0xfc040034

Definition at line 147 of file m532xsim.h.

#define MCFPM_PPMSR0   0xfc04002c

Definition at line 142 of file m532xsim.h.

#define MCFPM_PPMSR1   0xfc04002e

Definition at line 144 of file m532xsim.h.

#define MCFPM_WCR   0xfc040013

Definition at line 141 of file m532xsim.h.

#define MCFQSPI_BASE   0xFC058000 /* Base address of QSPI */

Definition at line 110 of file m532xsim.h.

#define MCFQSPI_CS0   84

Definition at line 113 of file m532xsim.h.

#define MCFQSPI_CS1   85

Definition at line 114 of file m532xsim.h.

#define MCFQSPI_CS2   86

Definition at line 115 of file m532xsim.h.

#define MCFQSPI_SIZE   0x40 /* Size of QSPI region */

Definition at line 111 of file m532xsim.h.

#define MCFSIM_DMA0ICR   MCFSIM_ICR6 /* DMA 0 ICR */

Definition at line 69 of file m532xsim.h.

#define MCFSIM_DMA1ICR   MCFSIM_ICR7 /* DMA 1 ICR */

Definition at line 70 of file m532xsim.h.

#define MCFSIM_DMA2ICR   MCFSIM_ICR8 /* DMA 2 ICR */

Definition at line 71 of file m532xsim.h.

#define MCFSIM_DMA3ICR   MCFSIM_ICR9 /* DMA 3 ICR */

Definition at line 72 of file m532xsim.h.

#define MCFSIM_ICR0   0xFC048040

Definition at line 48 of file m532xsim.h.

#define MCFSIM_ICR1   0xFC048041

Definition at line 49 of file m532xsim.h.

#define MCFSIM_ICR10   0xFC04804A

Definition at line 58 of file m532xsim.h.

#define MCFSIM_ICR11   0xFC04804B

Definition at line 59 of file m532xsim.h.

#define MCFSIM_ICR2   0xFC048042

Definition at line 50 of file m532xsim.h.

#define MCFSIM_ICR3   0xFC048043

Definition at line 51 of file m532xsim.h.

#define MCFSIM_ICR4   0xFC048044

Definition at line 52 of file m532xsim.h.

#define MCFSIM_ICR5   0xFC048045

Definition at line 53 of file m532xsim.h.

#define MCFSIM_ICR6   0xFC048046

Definition at line 54 of file m532xsim.h.

#define MCFSIM_ICR7   0xFC048047

Definition at line 55 of file m532xsim.h.

#define MCFSIM_ICR8   0xFC048048

Definition at line 56 of file m532xsim.h.

#define MCFSIM_ICR9   0xFC048049

Definition at line 57 of file m532xsim.h.

#define MCFSIM_ICR_TIMER1   (0xFC048040+32)

Definition at line 85 of file m532xsim.h.

#define MCFSIM_ICR_TIMER2   (0xFC048040+33)

Definition at line 86 of file m532xsim.h.

#define MCFSIM_IMR   MCFSIM_IMRL

Definition at line 47 of file m532xsim.h.

#define MCFSIM_IMRH   0xFC048008

Definition at line 46 of file m532xsim.h.

#define MCFSIM_IMRL   0xFC04800C

Definition at line 45 of file m532xsim.h.

#define MCFSIM_IPR   MCFSIM_IPRL

Definition at line 44 of file m532xsim.h.

#define MCFSIM_IPRH   0xFC048000

Definition at line 43 of file m532xsim.h.

#define MCFSIM_IPRL   0xFC048004

Definition at line 42 of file m532xsim.h.

#define MCFSIM_SWDICR   MCFSIM_ICR0 /* Watchdog timer ICR */

Definition at line 64 of file m532xsim.h.

#define MCFSIM_TIMER1ICR   MCFSIM_ICR1 /* Timer 1 ICR */

Definition at line 65 of file m532xsim.h.

#define MCFSIM_TIMER2ICR   MCFSIM_ICR2 /* Timer 2 ICR */

Definition at line 66 of file m532xsim.h.

#define MCFSIM_UART1ICR   MCFSIM_ICR4 /* UART 1 ICR */

Definition at line 67 of file m532xsim.h.

#define MCFSIM_UART2ICR   MCFSIM_ICR5 /* UART 2 ICR */

Definition at line 68 of file m532xsim.h.

#define MCFTIMER_BASE1   0xFC070000 /* Base address of TIMER1 */

Definition at line 120 of file m532xsim.h.

#define MCFTIMER_BASE2   0xFC074000 /* Base address of TIMER2 */

Definition at line 121 of file m532xsim.h.

#define MCFTIMER_BASE3   0xFC078000 /* Base address of TIMER3 */

Definition at line 122 of file m532xsim.h.

#define MCFTIMER_BASE4   0xFC07C000 /* Base address of TIMER4 */

Definition at line 123 of file m532xsim.h.

#define MCFUART_BASE0   0xFC060000 /* Base address of UART1 */

Definition at line 97 of file m532xsim.h.

#define MCFUART_BASE1   0xFC064000 /* Base address of UART2 */

Definition at line 98 of file m532xsim.h.

#define MCFUART_BASE2   0xFC068000 /* Base address of UART3 */

Definition at line 99 of file m532xsim.h.

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