Linux Kernel  3.7.1
 All Data Structures Namespaces Files Functions Variables Typedefs Enumerations Enumerator Macros Groups Pages
stamp.c
Go to the documentation of this file.
1 /*
2  * Copyright 2004-2009 Analog Devices Inc.
3  * 2005 National ICT Australia (NICTA)
4  * Aidan Williams <[email protected]>
5  *
6  * Licensed under the GPL-2 or later.
7  */
8 
9 #include <linux/device.h>
10 #include <linux/export.h>
11 #include <linux/kernel.h>
12 #include <linux/platform_device.h>
13 #include <linux/io.h>
14 #include <linux/mtd/mtd.h>
15 #include <linux/mtd/nand.h>
16 #include <linux/mtd/partitions.h>
17 #include <linux/mtd/plat-ram.h>
18 #include <linux/mtd/physmap.h>
19 #include <linux/spi/spi.h>
20 #include <linux/spi/flash.h>
21 #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
22 #include <linux/usb/isp1362.h>
23 #endif
24 #include <linux/i2c.h>
25 #include <linux/i2c/adp5588.h>
26 #include <linux/etherdevice.h>
27 #include <linux/ata_platform.h>
28 #include <linux/irq.h>
29 #include <linux/interrupt.h>
30 #include <linux/usb/sl811.h>
31 #include <linux/spi/mmc_spi.h>
32 #include <linux/leds.h>
33 #include <linux/input.h>
34 #include <asm/dma.h>
35 #include <asm/bfin5xx_spi.h>
36 #include <asm/reboot.h>
37 #include <asm/portmux.h>
38 #include <asm/dpmc.h>
39 #include <asm/bfin_sport.h>
40 #ifdef CONFIG_REGULATOR_FIXED_VOLTAGE
41 #include <linux/regulator/fixed.h>
42 #endif
43 #include <linux/regulator/machine.h>
44 #include <linux/regulator/consumer.h>
45 #include <linux/regulator/userspace-consumer.h>
46 
47 /*
48  * Name the Board for the /proc/cpuinfo
49  */
50 const char bfin_board_name[] = "ADI BF537-STAMP";
51 
52 /*
53  * Driver needs to know address, irq and flag pin.
54  */
55 
56 #if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
57 #include <linux/usb/isp1760.h>
58 static struct resource bfin_isp1760_resources[] = {
59  [0] = {
60  .start = 0x203C0000,
61  .end = 0x203C0000 + 0x000fffff,
62  .flags = IORESOURCE_MEM,
63  },
64  [1] = {
65  .start = IRQ_PF7,
66  .end = IRQ_PF7,
67  .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
68  },
69 };
70 
71 static struct isp1760_platform_data isp1760_priv = {
72  .is_isp1761 = 0,
73  .bus_width_16 = 1,
74  .port1_otg = 0,
75  .analog_oc = 0,
76  .dack_polarity_high = 0,
77  .dreq_polarity_high = 0,
78 };
79 
80 static struct platform_device bfin_isp1760_device = {
81  .name = "isp1760",
82  .id = 0,
83  .dev = {
84  .platform_data = &isp1760_priv,
85  },
86  .num_resources = ARRAY_SIZE(bfin_isp1760_resources),
87  .resource = bfin_isp1760_resources,
88 };
89 #endif
90 
91 #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
92 #include <linux/gpio_keys.h>
93 
94 static struct gpio_keys_button bfin_gpio_keys_table[] = {
95  {BTN_0, GPIO_PF2, 1, "gpio-keys: BTN0"},
96  {BTN_1, GPIO_PF3, 1, "gpio-keys: BTN1"},
97  {BTN_2, GPIO_PF4, 1, "gpio-keys: BTN2"},
98  {BTN_3, GPIO_PF5, 1, "gpio-keys: BTN3"},
99 };
100 
101 static struct gpio_keys_platform_data bfin_gpio_keys_data = {
102  .buttons = bfin_gpio_keys_table,
103  .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
104 };
105 
106 static struct platform_device bfin_device_gpiokeys = {
107  .name = "gpio-keys",
108  .dev = {
109  .platform_data = &bfin_gpio_keys_data,
110  },
111 };
112 #endif
113 
114 #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
115 static struct resource bfin_pcmcia_cf_resources[] = {
116  {
117  .start = 0x20310000, /* IO PORT */
118  .end = 0x20312000,
119  .flags = IORESOURCE_MEM,
120  }, {
121  .start = 0x20311000, /* Attribute Memory */
122  .end = 0x20311FFF,
123  .flags = IORESOURCE_MEM,
124  }, {
125  .start = IRQ_PF4,
126  .end = IRQ_PF4,
127  .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
128  }, {
129  .start = 6, /* Card Detect PF6 */
130  .end = 6,
131  .flags = IORESOURCE_IRQ,
132  },
133 };
134 
135 static struct platform_device bfin_pcmcia_cf_device = {
136  .name = "bfin_cf_pcmcia",
137  .id = -1,
138  .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources),
139  .resource = bfin_pcmcia_cf_resources,
140 };
141 #endif
142 
143 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
144 static struct platform_device rtc_device = {
145  .name = "rtc-bfin",
146  .id = -1,
147 };
148 #endif
149 
150 #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
151 #include <linux/smc91x.h>
152 
153 static struct smc91x_platdata smc91x_info = {
154  .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
155  .leda = RPC_LED_100_10,
156  .ledb = RPC_LED_TX_RX,
157 };
158 
159 static struct resource smc91x_resources[] = {
160  {
161  .name = "smc91x-regs",
162  .start = 0x20300300,
163  .end = 0x20300300 + 16,
164  .flags = IORESOURCE_MEM,
165  }, {
166 
167  .start = IRQ_PF7,
168  .end = IRQ_PF7,
169  .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
170  },
171 };
172 static struct platform_device smc91x_device = {
173  .name = "smc91x",
174  .id = 0,
175  .num_resources = ARRAY_SIZE(smc91x_resources),
176  .resource = smc91x_resources,
177  .dev = {
178  .platform_data = &smc91x_info,
179  },
180 };
181 #endif
182 
183 #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
184 static struct resource dm9000_resources[] = {
185  [0] = {
186  .start = 0x203FB800,
187  .end = 0x203FB800 + 1,
188  .flags = IORESOURCE_MEM,
189  },
190  [1] = {
191  .start = 0x203FB804,
192  .end = 0x203FB804 + 1,
193  .flags = IORESOURCE_MEM,
194  },
195  [2] = {
196  .start = IRQ_PF9,
197  .end = IRQ_PF9,
198  .flags = (IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE),
199  },
200 };
201 
202 static struct platform_device dm9000_device = {
203  .name = "dm9000",
204  .id = -1,
205  .num_resources = ARRAY_SIZE(dm9000_resources),
206  .resource = dm9000_resources,
207 };
208 #endif
209 
210 #if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
211 static struct resource sl811_hcd_resources[] = {
212  {
213  .start = 0x20340000,
214  .end = 0x20340000,
215  .flags = IORESOURCE_MEM,
216  }, {
217  .start = 0x20340004,
218  .end = 0x20340004,
219  .flags = IORESOURCE_MEM,
220  }, {
221  .start = IRQ_PF4,
222  .end = IRQ_PF4,
223  .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
224  },
225 };
226 
227 #if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
228 void sl811_port_power(struct device *dev, int is_on)
229 {
230  gpio_request(CONFIG_USB_SL811_BFIN_GPIO_VBUS, "usb:SL811_VBUS");
231  gpio_direction_output(CONFIG_USB_SL811_BFIN_GPIO_VBUS, is_on);
232 }
233 #endif
234 
235 static struct sl811_platform_data sl811_priv = {
236  .potpg = 10,
237  .power = 250, /* == 500mA */
238 #if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
239  .port_power = &sl811_port_power,
240 #endif
241 };
242 
243 static struct platform_device sl811_hcd_device = {
244  .name = "sl811-hcd",
245  .id = 0,
246  .dev = {
247  .platform_data = &sl811_priv,
248  },
249  .num_resources = ARRAY_SIZE(sl811_hcd_resources),
250  .resource = sl811_hcd_resources,
251 };
252 #endif
253 
254 #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
255 static struct resource isp1362_hcd_resources[] = {
256  {
257  .start = 0x20360000,
258  .end = 0x20360000,
259  .flags = IORESOURCE_MEM,
260  }, {
261  .start = 0x20360004,
262  .end = 0x20360004,
263  .flags = IORESOURCE_MEM,
264  }, {
265  .start = IRQ_PF3,
266  .end = IRQ_PF3,
267  .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
268  },
269 };
270 
271 static struct isp1362_platform_data isp1362_priv = {
272  .sel15Kres = 1,
273  .clknotstop = 0,
274  .oc_enable = 0,
275  .int_act_high = 0,
276  .int_edge_triggered = 0,
277  .remote_wakeup_connected = 0,
278  .no_power_switching = 1,
279  .power_switching_mode = 0,
280 };
281 
282 static struct platform_device isp1362_hcd_device = {
283  .name = "isp1362-hcd",
284  .id = 0,
285  .dev = {
286  .platform_data = &isp1362_priv,
287  },
288  .num_resources = ARRAY_SIZE(isp1362_hcd_resources),
289  .resource = isp1362_hcd_resources,
290 };
291 #endif
292 
293 #if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)
294 static unsigned short bfin_can_peripherals[] = {
295  P_CAN0_RX, P_CAN0_TX, 0
296 };
297 
298 static struct resource bfin_can_resources[] = {
299  {
300  .start = 0xFFC02A00,
301  .end = 0xFFC02FFF,
302  .flags = IORESOURCE_MEM,
303  },
304  {
305  .start = IRQ_CAN_RX,
306  .end = IRQ_CAN_RX,
307  .flags = IORESOURCE_IRQ,
308  },
309  {
310  .start = IRQ_CAN_TX,
311  .end = IRQ_CAN_TX,
312  .flags = IORESOURCE_IRQ,
313  },
314  {
315  .start = IRQ_CAN_ERROR,
316  .end = IRQ_CAN_ERROR,
317  .flags = IORESOURCE_IRQ,
318  },
319 };
320 
321 static struct platform_device bfin_can_device = {
322  .name = "bfin_can",
323  .num_resources = ARRAY_SIZE(bfin_can_resources),
324  .resource = bfin_can_resources,
325  .dev = {
326  .platform_data = &bfin_can_peripherals, /* Passed to driver */
327  },
328 };
329 #endif
330 
331 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
332 #include <linux/bfin_mac.h>
333 static const unsigned short bfin_mac_peripherals[] = P_MII0;
334 
335 static struct bfin_phydev_platform_data bfin_phydev_data[] = {
336  {
337  .addr = 1,
338  .irq = PHY_POLL, /* IRQ_MAC_PHYINT */
339  },
340 };
341 
342 static struct bfin_mii_bus_platform_data bfin_mii_bus_data = {
343  .phydev_number = 1,
344  .phydev_data = bfin_phydev_data,
345  .phy_mode = PHY_INTERFACE_MODE_MII,
346  .mac_peripherals = bfin_mac_peripherals,
347 };
348 
349 static struct platform_device bfin_mii_bus = {
350  .name = "bfin_mii_bus",
351  .dev = {
352  .platform_data = &bfin_mii_bus_data,
353  }
354 };
355 
356 static struct platform_device bfin_mac_device = {
357  .name = "bfin_mac",
358  .dev = {
359  .platform_data = &bfin_mii_bus,
360  }
361 };
362 #endif
363 
364 #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
365 static struct resource net2272_bfin_resources[] = {
366  {
367  .start = 0x20300000,
368  .end = 0x20300000 + 0x100,
369  .flags = IORESOURCE_MEM,
370  }, {
371  .start = 1,
372  .flags = IORESOURCE_BUS,
373  }, {
374  .start = IRQ_PF7,
375  .end = IRQ_PF7,
376  .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
377  },
378 };
379 
380 static struct platform_device net2272_bfin_device = {
381  .name = "net2272",
382  .id = -1,
383  .num_resources = ARRAY_SIZE(net2272_bfin_resources),
384  .resource = net2272_bfin_resources,
385 };
386 #endif
387 
388 #if defined(CONFIG_MTD_NAND_PLATFORM) || defined(CONFIG_MTD_NAND_PLATFORM_MODULE)
389 const char *part_probes[] = { "cmdlinepart", "RedBoot", NULL };
390 
391 static struct mtd_partition bfin_plat_nand_partitions[] = {
392  {
393  .name = "linux kernel(nand)",
394  .size = 0x400000,
395  .offset = 0,
396  }, {
397  .name = "file system(nand)",
398  .size = MTDPART_SIZ_FULL,
399  .offset = MTDPART_OFS_APPEND,
400  },
401 };
402 
403 #define BFIN_NAND_PLAT_CLE 2
404 #define BFIN_NAND_PLAT_ALE 1
405 static void bfin_plat_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
406 {
407  struct nand_chip *this = mtd->priv;
408 
409  if (cmd == NAND_CMD_NONE)
410  return;
411 
412  if (ctrl & NAND_CLE)
413  writeb(cmd, this->IO_ADDR_W + (1 << BFIN_NAND_PLAT_CLE));
414  else
415  writeb(cmd, this->IO_ADDR_W + (1 << BFIN_NAND_PLAT_ALE));
416 }
417 
418 #define BFIN_NAND_PLAT_READY GPIO_PF3
419 static int bfin_plat_nand_dev_ready(struct mtd_info *mtd)
420 {
421  return gpio_get_value(BFIN_NAND_PLAT_READY);
422 }
423 
424 static struct platform_nand_data bfin_plat_nand_data = {
425  .chip = {
426  .nr_chips = 1,
427  .chip_delay = 30,
428  .part_probe_types = part_probes,
429  .partitions = bfin_plat_nand_partitions,
430  .nr_partitions = ARRAY_SIZE(bfin_plat_nand_partitions),
431  },
432  .ctrl = {
433  .cmd_ctrl = bfin_plat_nand_cmd_ctrl,
434  .dev_ready = bfin_plat_nand_dev_ready,
435  },
436 };
437 
438 #define MAX(x, y) (x > y ? x : y)
439 static struct resource bfin_plat_nand_resources = {
440  .start = 0x20212000,
441  .end = 0x20212000 + (1 << MAX(BFIN_NAND_PLAT_CLE, BFIN_NAND_PLAT_ALE)),
442  .flags = IORESOURCE_MEM,
443 };
444 
445 static struct platform_device bfin_async_nand_device = {
446  .name = "gen_nand",
447  .id = -1,
448  .num_resources = 1,
449  .resource = &bfin_plat_nand_resources,
450  .dev = {
451  .platform_data = &bfin_plat_nand_data,
452  },
453 };
454 
455 static void bfin_plat_nand_init(void)
456 {
457  gpio_request(BFIN_NAND_PLAT_READY, "bfin_nand_plat");
458 }
459 #else
460 static void bfin_plat_nand_init(void) {}
461 #endif
462 
463 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
464 static struct mtd_partition stamp_partitions[] = {
465  {
466  .name = "bootloader(nor)",
467  .size = 0x40000,
468  .offset = 0,
469  }, {
470  .name = "linux kernel(nor)",
471  .size = 0x180000,
472  .offset = MTDPART_OFS_APPEND,
473  }, {
474  .name = "file system(nor)",
475  .size = 0x400000 - 0x40000 - 0x180000 - 0x10000,
476  .offset = MTDPART_OFS_APPEND,
477  }, {
478  .name = "MAC Address(nor)",
479  .size = MTDPART_SIZ_FULL,
480  .offset = 0x3F0000,
481  .mask_flags = MTD_WRITEABLE,
482  }
483 };
484 
485 static struct physmap_flash_data stamp_flash_data = {
486  .width = 2,
487  .parts = stamp_partitions,
488  .nr_parts = ARRAY_SIZE(stamp_partitions),
489 #ifdef CONFIG_ROMKERNEL
490  .probe_type = "map_rom",
491 #endif
492 };
493 
494 static struct resource stamp_flash_resource = {
495  .start = 0x20000000,
496  .end = 0x203fffff,
497  .flags = IORESOURCE_MEM,
498 };
499 
500 static struct platform_device stamp_flash_device = {
501  .name = "physmap-flash",
502  .id = 0,
503  .dev = {
504  .platform_data = &stamp_flash_data,
505  },
506  .num_resources = 1,
507  .resource = &stamp_flash_resource,
508 };
509 #endif
510 
511 #if defined(CONFIG_MTD_M25P80) \
512  || defined(CONFIG_MTD_M25P80_MODULE)
513 static struct mtd_partition bfin_spi_flash_partitions[] = {
514  {
515  .name = "bootloader(spi)",
516  .size = 0x00040000,
517  .offset = 0,
518  .mask_flags = MTD_CAP_ROM
519  }, {
520  .name = "linux kernel(spi)",
521  .size = 0x180000,
522  .offset = MTDPART_OFS_APPEND,
523  }, {
524  .name = "file system(spi)",
525  .size = MTDPART_SIZ_FULL,
526  .offset = MTDPART_OFS_APPEND,
527  }
528 };
529 
530 static struct flash_platform_data bfin_spi_flash_data = {
531  .name = "m25p80",
532  .parts = bfin_spi_flash_partitions,
533  .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
534  /* .type = "m25p64", */
535 };
536 
537 /* SPI flash chip (m25p64) */
538 static struct bfin5xx_spi_chip spi_flash_chip_info = {
539  .enable_dma = 0, /* use dma transfer with this chip*/
540 };
541 #endif
542 
543 #if defined(CONFIG_INPUT_AD714X_SPI) || defined(CONFIG_INPUT_AD714X_SPI_MODULE)
544 #include <linux/input/ad714x.h>
545 
546 static struct ad714x_slider_plat ad7147_spi_slider_plat[] = {
547  {
548  .start_stage = 0,
549  .end_stage = 7,
550  .max_coord = 128,
551  },
552 };
553 
554 static struct ad714x_button_plat ad7147_spi_button_plat[] = {
555  {
556  .keycode = BTN_FORWARD,
557  .l_mask = 0,
558  .h_mask = 0x600,
559  },
560  {
561  .keycode = BTN_LEFT,
562  .l_mask = 0,
563  .h_mask = 0x500,
564  },
565  {
566  .keycode = BTN_MIDDLE,
567  .l_mask = 0,
568  .h_mask = 0x800,
569  },
570  {
571  .keycode = BTN_RIGHT,
572  .l_mask = 0x100,
573  .h_mask = 0x400,
574  },
575  {
576  .keycode = BTN_BACK,
577  .l_mask = 0x200,
578  .h_mask = 0x400,
579  },
580 };
581 static struct ad714x_platform_data ad7147_spi_platform_data = {
582  .slider_num = 1,
583  .button_num = 5,
584  .slider = ad7147_spi_slider_plat,
585  .button = ad7147_spi_button_plat,
586  .stage_cfg_reg = {
587  {0xFBFF, 0x1FFF, 0, 0x2626, 1600, 1600, 1600, 1600},
588  {0xEFFF, 0x1FFF, 0, 0x2626, 1650, 1650, 1650, 1650},
589  {0xFFFF, 0x1FFE, 0, 0x2626, 1650, 1650, 1650, 1650},
590  {0xFFFF, 0x1FFB, 0, 0x2626, 1650, 1650, 1650, 1650},
591  {0xFFFF, 0x1FEF, 0, 0x2626, 1650, 1650, 1650, 1650},
592  {0xFFFF, 0x1FBF, 0, 0x2626, 1650, 1650, 1650, 1650},
593  {0xFFFF, 0x1EFF, 0, 0x2626, 1650, 1650, 1650, 1650},
594  {0xFFFF, 0x1BFF, 0, 0x2626, 1600, 1600, 1600, 1600},
595  {0xFF7B, 0x3FFF, 0x506, 0x2626, 1100, 1100, 1150, 1150},
596  {0xFDFE, 0x3FFF, 0x606, 0x2626, 1100, 1100, 1150, 1150},
597  {0xFEBA, 0x1FFF, 0x1400, 0x2626, 1200, 1200, 1300, 1300},
598  {0xFFEF, 0x1FFF, 0x0, 0x2626, 1100, 1100, 1150, 1150},
599  },
600  .sys_cfg_reg = {0x2B2, 0x0, 0x3233, 0x819, 0x832, 0xCFF, 0xCFF, 0x0},
601 };
602 #endif
603 
604 #if defined(CONFIG_INPUT_AD714X_I2C) || defined(CONFIG_INPUT_AD714X_I2C_MODULE)
605 #include <linux/input/ad714x.h>
606 static struct ad714x_button_plat ad7142_i2c_button_plat[] = {
607  {
608  .keycode = BTN_1,
609  .l_mask = 0,
610  .h_mask = 0x1,
611  },
612  {
613  .keycode = BTN_2,
614  .l_mask = 0,
615  .h_mask = 0x2,
616  },
617  {
618  .keycode = BTN_3,
619  .l_mask = 0,
620  .h_mask = 0x4,
621  },
622  {
623  .keycode = BTN_4,
624  .l_mask = 0x0,
625  .h_mask = 0x8,
626  },
627 };
628 static struct ad714x_platform_data ad7142_i2c_platform_data = {
629  .button_num = 4,
630  .button = ad7142_i2c_button_plat,
631  .stage_cfg_reg = {
632  /* fixme: figure out right setting for all comoponent according
633  * to hardware feature of EVAL-AD7142EB board */
634  {0xE7FF, 0x3FFF, 0x0005, 0x2626, 0x01F4, 0x01F4, 0x028A, 0x028A},
635  {0xFDBF, 0x3FFF, 0x0001, 0x2626, 0x01F4, 0x01F4, 0x028A, 0x028A},
636  {0xFFFF, 0x2DFF, 0x0001, 0x2626, 0x01F4, 0x01F4, 0x028A, 0x028A},
637  {0xFFFF, 0x37BF, 0x0001, 0x2626, 0x01F4, 0x01F4, 0x028A, 0x028A},
638  {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
639  {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
640  {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
641  {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
642  {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
643  {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
644  {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
645  {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
646  },
647  .sys_cfg_reg = {0x0B2, 0x0, 0x690, 0x664, 0x290F, 0xF, 0xF, 0x0},
648 };
649 #endif
650 
651 #if defined(CONFIG_AD2S90) || defined(CONFIG_AD2S90_MODULE)
652 static struct bfin5xx_spi_chip ad2s90_spi_chip_info = {
653  .enable_dma = 0,
654 };
655 #endif
656 
657 #if defined(CONFIG_AD2S120X) || defined(CONFIG_AD2S120X_MODULE)
658 static unsigned short ad2s120x_platform_data[] = {
659  /* used as SAMPLE and RDVEL */
660  GPIO_PF5, GPIO_PF6, 0
661 };
662 
663 static struct bfin5xx_spi_chip ad2s120x_spi_chip_info = {
664  .enable_dma = 0,
665 };
666 #endif
667 
668 #if defined(CONFIG_AD2S1210) || defined(CONFIG_AD2S1210_MODULE)
669 static unsigned short ad2s1210_platform_data[] = {
670  /* use as SAMPLE, A0, A1 */
671  GPIO_PF7, GPIO_PF8, GPIO_PF9,
672 # if defined(CONFIG_AD2S1210_GPIO_INPUT) || defined(CONFIG_AD2S1210_GPIO_OUTPUT)
673  /* the RES0 and RES1 pins */
674  GPIO_PF4, GPIO_PF5,
675 # endif
676  0,
677 };
678 
679 static struct bfin5xx_spi_chip ad2s1210_spi_chip_info = {
680  .enable_dma = 0,
681 };
682 #endif
683 
684 #if defined(CONFIG_AD7314) || defined(CONFIG_AD7314_MODULE)
685 static struct bfin5xx_spi_chip ad7314_spi_chip_info = {
686  .enable_dma = 0,
687 };
688 #endif
689 
690 #if defined(CONFIG_AD7816) || defined(CONFIG_AD7816_MODULE)
691 static unsigned short ad7816_platform_data[] = {
692  GPIO_PF4, /* rdwr_pin */
693  GPIO_PF5, /* convert_pin */
694  GPIO_PF7, /* busy_pin */
695  0,
696 };
697 
698 static struct bfin5xx_spi_chip ad7816_spi_chip_info = {
699  .enable_dma = 0,
700 };
701 #endif
702 
703 #if defined(CONFIG_ADT7310) || defined(CONFIG_ADT7310_MODULE)
704 static unsigned long adt7310_platform_data[3] = {
705 /* INT bound temperature alarm event. line 1 */
706  IRQ_PG4, IRQF_TRIGGER_LOW,
707 /* CT bound temperature alarm event irq_flags. line 0 */
708  IRQF_TRIGGER_LOW,
709 };
710 
711 static struct bfin5xx_spi_chip adt7310_spi_chip_info = {
712  .enable_dma = 0,
713 };
714 #endif
715 
716 #if defined(CONFIG_AD7298) || defined(CONFIG_AD7298_MODULE)
717 static unsigned short ad7298_platform_data[] = {
718  GPIO_PF7, /* busy_pin */
719  0,
720 };
721 #endif
722 
723 #if defined(CONFIG_ADT7316_SPI) || defined(CONFIG_ADT7316_SPI_MODULE)
724 static unsigned long adt7316_spi_data[2] = {
725  IRQF_TRIGGER_LOW, /* interrupt flags */
726  GPIO_PF7, /* ldac_pin, 0 means DAC/LDAC registers control DAC update */
727 };
728 
729 static struct bfin5xx_spi_chip adt7316_spi_chip_info = {
730  .enable_dma = 0,
731 };
732 #endif
733 
734 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
735 #define MMC_SPI_CARD_DETECT_INT IRQ_PF5
736 
737 static int bfin_mmc_spi_init(struct device *dev,
738  irqreturn_t (*detect_int)(int, void *), void *data)
739 {
740  return request_irq(MMC_SPI_CARD_DETECT_INT, detect_int,
741  IRQF_TRIGGER_FALLING, "mmc-spi-detect", data);
742 }
743 
744 static void bfin_mmc_spi_exit(struct device *dev, void *data)
745 {
746  free_irq(MMC_SPI_CARD_DETECT_INT, data);
747 }
748 
749 static struct mmc_spi_platform_data bfin_mmc_spi_pdata = {
750  .init = bfin_mmc_spi_init,
751  .exit = bfin_mmc_spi_exit,
752  .detect_delay = 100, /* msecs */
753 };
754 
755 static struct bfin5xx_spi_chip mmc_spi_chip_info = {
756  .enable_dma = 0,
757  .pio_interrupt = 0,
758 };
759 #endif
760 
761 #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
762 #include <linux/spi/ad7877.h>
763 static const struct ad7877_platform_data bfin_ad7877_ts_info = {
764  .model = 7877,
765  .vref_delay_usecs = 50, /* internal, no capacitor */
766  .x_plate_ohms = 419,
767  .y_plate_ohms = 486,
768  .pressure_max = 1000,
769  .pressure_min = 0,
770  .stopacq_polarity = 1,
771  .first_conversion_delay = 3,
772  .acquisition_time = 1,
773  .averaging = 1,
774  .pen_down_acc_interval = 1,
775 };
776 #endif
777 
778 #if defined(CONFIG_TOUCHSCREEN_AD7879) || defined(CONFIG_TOUCHSCREEN_AD7879_MODULE)
779 #include <linux/spi/ad7879.h>
780 static const struct ad7879_platform_data bfin_ad7879_ts_info = {
781  .model = 7879, /* Model = AD7879 */
782  .x_plate_ohms = 620, /* 620 Ohm from the touch datasheet */
783  .pressure_max = 10000,
784  .pressure_min = 0,
785  .first_conversion_delay = 3, /* wait 512us before do a first conversion */
786  .acquisition_time = 1, /* 4us acquisition time per sample */
787  .median = 2, /* do 8 measurements */
788  .averaging = 1, /* take the average of 4 middle samples */
789  .pen_down_acc_interval = 255, /* 9.4 ms */
790  .gpio_export = 1, /* Export GPIO to gpiolib */
791  .gpio_base = -1, /* Dynamic allocation */
792 };
793 #endif
794 
795 #if defined(CONFIG_INPUT_ADXL34X) || defined(CONFIG_INPUT_ADXL34X_MODULE)
796 #include <linux/input/adxl34x.h>
797 static const struct adxl34x_platform_data adxl34x_info = {
798  .x_axis_offset = 0,
799  .y_axis_offset = 0,
800  .z_axis_offset = 0,
801  .tap_threshold = 0x31,
802  .tap_duration = 0x10,
803  .tap_latency = 0x60,
804  .tap_window = 0xF0,
805  .tap_axis_control = ADXL_TAP_X_EN | ADXL_TAP_Y_EN | ADXL_TAP_Z_EN,
806  .act_axis_control = 0xFF,
807  .activity_threshold = 5,
808  .inactivity_threshold = 3,
809  .inactivity_time = 4,
810  .free_fall_threshold = 0x7,
811  .free_fall_time = 0x20,
812  .data_rate = 0x8,
813  .data_range = ADXL_FULL_RES,
814 
815  .ev_type = EV_ABS,
816  .ev_code_x = ABS_X, /* EV_REL */
817  .ev_code_y = ABS_Y, /* EV_REL */
818  .ev_code_z = ABS_Z, /* EV_REL */
819 
820  .ev_code_tap = {BTN_TOUCH, BTN_TOUCH, BTN_TOUCH}, /* EV_KEY x,y,z */
821 
822 /* .ev_code_ff = KEY_F,*/ /* EV_KEY */
823 /* .ev_code_act_inactivity = KEY_A,*/ /* EV_KEY */
824  .power_mode = ADXL_AUTO_SLEEP | ADXL_LINK,
825  .fifo_mode = ADXL_FIFO_STREAM,
826  .orientation_enable = ADXL_EN_ORIENTATION_3D,
827  .deadzone_angle = ADXL_DEADZONE_ANGLE_10p8,
828  .divisor_length = ADXL_LP_FILTER_DIVISOR_16,
829  /* EV_KEY {+Z, +Y, +X, -X, -Y, -Z} */
830  .ev_codes_orient_3d = {BTN_Z, BTN_Y, BTN_X, BTN_A, BTN_B, BTN_C},
831 };
832 #endif
833 
834 #if defined(CONFIG_ENC28J60) || defined(CONFIG_ENC28J60_MODULE)
835 static struct bfin5xx_spi_chip enc28j60_spi_chip_info = {
836  .enable_dma = 1,
837 };
838 #endif
839 
840 #if defined(CONFIG_ADF702X) || defined(CONFIG_ADF702X_MODULE)
841 #include <linux/spi/adf702x.h>
842 #define TXREG 0x0160A470
843 static const u32 adf7021_regs[] = {
844  0x09608FA0,
845  0x00575011,
846  0x00A7F092,
847  0x2B141563,
848  0x81F29E94,
849  0x00003155,
850  0x050A4F66,
851  0x00000007,
852  0x00000008,
853  0x000231E9,
854  0x3296354A,
855  0x891A2B3B,
856  0x00000D9C,
857  0x0000000D,
858  0x0000000E,
859  0x0000000F,
860 };
861 
862 static struct adf702x_platform_data adf7021_platform_data = {
863  .regs_base = (void *)SPORT1_TCR1,
864  .dma_ch_rx = CH_SPORT1_RX,
865  .dma_ch_tx = CH_SPORT1_TX,
866  .irq_sport_err = IRQ_SPORT1_ERROR,
867  .gpio_int_rfs = GPIO_PF8,
868  .pin_req = {P_SPORT1_DTPRI, P_SPORT1_RFS, P_SPORT1_DRPRI,
869  P_SPORT1_RSCLK, P_SPORT1_TSCLK, 0},
870  .adf702x_model = MODEL_ADF7021,
871  .adf702x_regs = adf7021_regs,
872  .tx_reg = TXREG,
873 };
874 static inline void adf702x_mac_init(void)
875 {
876  eth_random_addr(adf7021_platform_data.mac_addr);
877 }
878 #else
879 static inline void adf702x_mac_init(void) {}
880 #endif
881 
882 #if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
883 #include <linux/spi/ads7846.h>
884 static int ads7873_get_pendown_state(void)
885 {
886  return gpio_get_value(GPIO_PF6);
887 }
888 
889 static struct ads7846_platform_data __initdata ad7873_pdata = {
890  .model = 7873, /* AD7873 */
891  .x_max = 0xfff,
892  .y_max = 0xfff,
893  .x_plate_ohms = 620,
894  .debounce_max = 1,
895  .debounce_rep = 0,
896  .debounce_tol = (~0),
897  .get_pendown_state = ads7873_get_pendown_state,
898 };
899 #endif
900 
901 #if defined(CONFIG_MTD_DATAFLASH) \
902  || defined(CONFIG_MTD_DATAFLASH_MODULE)
903 
904 static struct mtd_partition bfin_spi_dataflash_partitions[] = {
905  {
906  .name = "bootloader(spi)",
907  .size = 0x00040000,
908  .offset = 0,
909  .mask_flags = MTD_CAP_ROM
910  }, {
911  .name = "linux kernel(spi)",
912  .size = 0x180000,
913  .offset = MTDPART_OFS_APPEND,
914  }, {
915  .name = "file system(spi)",
916  .size = MTDPART_SIZ_FULL,
917  .offset = MTDPART_OFS_APPEND,
918  }
919 };
920 
921 static struct flash_platform_data bfin_spi_dataflash_data = {
922  .name = "SPI Dataflash",
923  .parts = bfin_spi_dataflash_partitions,
924  .nr_parts = ARRAY_SIZE(bfin_spi_dataflash_partitions),
925 };
926 
927 /* DataFlash chip */
928 static struct bfin5xx_spi_chip data_flash_chip_info = {
929  .enable_dma = 0, /* use dma transfer with this chip*/
930 };
931 #endif
932 
933 #if defined(CONFIG_AD7476) || defined(CONFIG_AD7476_MODULE)
934 static struct bfin5xx_spi_chip spi_ad7476_chip_info = {
935  .enable_dma = 0, /* use dma transfer with this chip*/
936 };
937 #endif
938 
939 static struct spi_board_info bfin_spi_board_info[] __initdata = {
940 #if defined(CONFIG_MTD_M25P80) \
941  || defined(CONFIG_MTD_M25P80_MODULE)
942  {
943  /* the modalias must be the same as spi device driver name */
944  .modalias = "m25p80", /* Name of spi_driver for this device */
945  .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
946  .bus_num = 0, /* Framework bus number */
947  .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
948  .platform_data = &bfin_spi_flash_data,
949  .controller_data = &spi_flash_chip_info,
950  .mode = SPI_MODE_3,
951  },
952 #endif
953 #if defined(CONFIG_MTD_DATAFLASH) \
954  || defined(CONFIG_MTD_DATAFLASH_MODULE)
955  { /* DataFlash chip */
956  .modalias = "mtd_dataflash",
957  .max_speed_hz = 33250000, /* max spi clock (SCK) speed in HZ */
958  .bus_num = 0, /* Framework bus number */
959  .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
960  .platform_data = &bfin_spi_dataflash_data,
961  .controller_data = &data_flash_chip_info,
962  .mode = SPI_MODE_3,
963  },
964 #endif
965 
966 #if defined(CONFIG_SND_BF5XX_SOC_AD1836) \
967  || defined(CONFIG_SND_BF5XX_SOC_AD1836_MODULE)
968  {
969  .modalias = "ad1836",
970  .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
971  .bus_num = 0,
972  .chip_select = 4,
973  .platform_data = "ad1836", /* only includes chip name for the moment */
974  .mode = SPI_MODE_3,
975  },
976 #endif
977 
978 #ifdef CONFIG_SND_SOC_AD193X_SPI
979  {
980  .modalias = "ad193x",
981  .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
982  .bus_num = 0,
983  .chip_select = 5,
984  .mode = SPI_MODE_3,
985  },
986 #endif
987 
988 #if defined(CONFIG_SND_SOC_ADAV80X) || defined(CONFIG_SND_SOC_ADV80X_MODULE)
989  {
990  .modalias = "adav801",
991  .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
992  .bus_num = 0,
993  .chip_select = 1,
994  .mode = SPI_MODE_3,
995  },
996 #endif
997 
998 #if defined(CONFIG_INPUT_AD714X_SPI) || defined(CONFIG_INPUT_AD714X_SPI_MODULE)
999  {
1000  .modalias = "ad714x_captouch",
1001  .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1002  .irq = IRQ_PF4,
1003  .bus_num = 0,
1004  .chip_select = 5,
1005  .mode = SPI_MODE_3,
1006  .platform_data = &ad7147_spi_platform_data,
1007  },
1008 #endif
1009 
1010 #if defined(CONFIG_AD2S90) || defined(CONFIG_AD2S90_MODULE)
1011  {
1012  .modalias = "ad2s90",
1013  .bus_num = 0,
1014  .chip_select = 3, /* change it for your board */
1015  .mode = SPI_MODE_3,
1016  .platform_data = NULL,
1017  .controller_data = &ad2s90_spi_chip_info,
1018  },
1019 #endif
1020 
1021 #if defined(CONFIG_AD2S120X) || defined(CONFIG_AD2S120X_MODULE)
1022  {
1023  .modalias = "ad2s120x",
1024  .bus_num = 0,
1025  .chip_select = 4, /* CS, change it for your board */
1026  .platform_data = ad2s120x_platform_data,
1027  .controller_data = &ad2s120x_spi_chip_info,
1028  },
1029 #endif
1030 
1031 #if defined(CONFIG_AD2S1210) || defined(CONFIG_AD2S1210_MODULE)
1032  {
1033  .modalias = "ad2s1210",
1034  .max_speed_hz = 8192000,
1035  .bus_num = 0,
1036  .chip_select = 4, /* CS, change it for your board */
1037  .platform_data = ad2s1210_platform_data,
1038  .controller_data = &ad2s1210_spi_chip_info,
1039  },
1040 #endif
1041 
1042 #if defined(CONFIG_AD7314) || defined(CONFIG_AD7314_MODULE)
1043  {
1044  .modalias = "ad7314",
1045  .max_speed_hz = 1000000,
1046  .bus_num = 0,
1047  .chip_select = 4, /* CS, change it for your board */
1048  .controller_data = &ad7314_spi_chip_info,
1049  .mode = SPI_MODE_1,
1050  },
1051 #endif
1052 
1053 #if defined(CONFIG_AD7816) || defined(CONFIG_AD7816_MODULE)
1054  {
1055  .modalias = "ad7818",
1056  .max_speed_hz = 1000000,
1057  .bus_num = 0,
1058  .chip_select = 4, /* CS, change it for your board */
1059  .platform_data = ad7816_platform_data,
1060  .controller_data = &ad7816_spi_chip_info,
1061  .mode = SPI_MODE_3,
1062  },
1063 #endif
1064 
1065 #if defined(CONFIG_ADT7310) || defined(CONFIG_ADT7310_MODULE)
1066  {
1067  .modalias = "adt7310",
1068  .max_speed_hz = 1000000,
1069  .irq = IRQ_PG5, /* CT alarm event. Line 0 */
1070  .bus_num = 0,
1071  .chip_select = 4, /* CS, change it for your board */
1072  .platform_data = adt7310_platform_data,
1073  .controller_data = &adt7310_spi_chip_info,
1074  .mode = SPI_MODE_3,
1075  },
1076 #endif
1077 
1078 #if defined(CONFIG_AD7298) || defined(CONFIG_AD7298_MODULE)
1079  {
1080  .modalias = "ad7298",
1081  .max_speed_hz = 1000000,
1082  .bus_num = 0,
1083  .chip_select = 4, /* CS, change it for your board */
1084  .platform_data = ad7298_platform_data,
1085  .mode = SPI_MODE_3,
1086  },
1087 #endif
1088 
1089 #if defined(CONFIG_ADT7316_SPI) || defined(CONFIG_ADT7316_SPI_MODULE)
1090  {
1091  .modalias = "adt7316",
1092  .max_speed_hz = 1000000,
1093  .irq = IRQ_PG5, /* interrupt line */
1094  .bus_num = 0,
1095  .chip_select = 4, /* CS, change it for your board */
1096  .platform_data = adt7316_spi_data,
1097  .controller_data = &adt7316_spi_chip_info,
1098  .mode = SPI_MODE_3,
1099  },
1100 #endif
1101 
1102 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
1103  {
1104  .modalias = "mmc_spi",
1105  .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
1106  .bus_num = 0,
1107  .chip_select = 4,
1108  .platform_data = &bfin_mmc_spi_pdata,
1109  .controller_data = &mmc_spi_chip_info,
1110  .mode = SPI_MODE_3,
1111  },
1112 #endif
1113 #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
1114  {
1115  .modalias = "ad7877",
1116  .platform_data = &bfin_ad7877_ts_info,
1117  .irq = IRQ_PF6,
1118  .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
1119  .bus_num = 0,
1120  .chip_select = 1,
1121  },
1122 #endif
1123 #if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
1124  {
1125  .modalias = "ad7879",
1126  .platform_data = &bfin_ad7879_ts_info,
1127  .irq = IRQ_PF7,
1128  .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
1129  .bus_num = 0,
1130  .chip_select = 1,
1131  .mode = SPI_CPHA | SPI_CPOL,
1132  },
1133 #endif
1134 #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
1135  {
1136  .modalias = "spidev",
1137  .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
1138  .bus_num = 0,
1139  .chip_select = 1,
1140  },
1141 #endif
1142 #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
1143  {
1144  .modalias = "bfin-lq035q1-spi",
1145  .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
1146  .bus_num = 0,
1147  .chip_select = 2,
1148  .mode = SPI_CPHA | SPI_CPOL,
1149  },
1150 #endif
1151 #if defined(CONFIG_ENC28J60) || defined(CONFIG_ENC28J60_MODULE)
1152  {
1153  .modalias = "enc28j60",
1154  .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
1155  .irq = IRQ_PF6,
1156  .bus_num = 0,
1157  .chip_select = GPIO_PF10 + MAX_CTRL_CS, /* GPIO controlled SSEL */
1158  .controller_data = &enc28j60_spi_chip_info,
1159  .mode = SPI_MODE_0,
1160  },
1161 #endif
1162 #if defined(CONFIG_INPUT_ADXL34X_SPI) || defined(CONFIG_INPUT_ADXL34X_SPI_MODULE)
1163  {
1164  .modalias = "adxl34x",
1165  .platform_data = &adxl34x_info,
1166  .irq = IRQ_PF6,
1167  .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
1168  .bus_num = 0,
1169  .chip_select = 2,
1170  .mode = SPI_MODE_3,
1171  },
1172 #endif
1173 #if defined(CONFIG_ADF702X) || defined(CONFIG_ADF702X_MODULE)
1174  {
1175  .modalias = "adf702x",
1176  .max_speed_hz = 16000000, /* max spi clock (SCK) speed in HZ */
1177  .bus_num = 0,
1178  .chip_select = GPIO_PF10 + MAX_CTRL_CS, /* GPIO controlled SSEL */
1179  .platform_data = &adf7021_platform_data,
1180  .mode = SPI_MODE_0,
1181  },
1182 #endif
1183 #if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
1184  {
1185  .modalias = "ads7846",
1186  .max_speed_hz = 2000000, /* max spi clock (SCK) speed in HZ */
1187  .bus_num = 0,
1188  .irq = IRQ_PF6,
1189  .chip_select = GPIO_PF10 + MAX_CTRL_CS, /* GPIO controlled SSEL */
1190  .platform_data = &ad7873_pdata,
1191  .mode = SPI_MODE_0,
1192  },
1193 #endif
1194 #if defined(CONFIG_AD7476) \
1195  || defined(CONFIG_AD7476_MODULE)
1196  {
1197  .modalias = "ad7476", /* Name of spi_driver for this device */
1198  .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
1199  .bus_num = 0, /* Framework bus number */
1200  .chip_select = 1, /* Framework chip select. */
1201  .platform_data = NULL, /* No spi_driver specific config */
1202  .controller_data = &spi_ad7476_chip_info,
1203  .mode = SPI_MODE_3,
1204  },
1205 #endif
1206 #if defined(CONFIG_ADE7753) \
1207  || defined(CONFIG_ADE7753_MODULE)
1208  {
1209  .modalias = "ade7753",
1210  .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1211  .bus_num = 0,
1212  .chip_select = 1, /* CS, change it for your board */
1213  .platform_data = NULL, /* No spi_driver specific config */
1214  .mode = SPI_MODE_1,
1215  },
1216 #endif
1217 #if defined(CONFIG_ADE7754) \
1218  || defined(CONFIG_ADE7754_MODULE)
1219  {
1220  .modalias = "ade7754",
1221  .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1222  .bus_num = 0,
1223  .chip_select = 1, /* CS, change it for your board */
1224  .platform_data = NULL, /* No spi_driver specific config */
1225  .mode = SPI_MODE_1,
1226  },
1227 #endif
1228 #if defined(CONFIG_ADE7758) \
1229  || defined(CONFIG_ADE7758_MODULE)
1230  {
1231  .modalias = "ade7758",
1232  .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1233  .bus_num = 0,
1234  .chip_select = 1, /* CS, change it for your board */
1235  .platform_data = NULL, /* No spi_driver specific config */
1236  .mode = SPI_MODE_1,
1237  },
1238 #endif
1239 #if defined(CONFIG_ADE7759) \
1240  || defined(CONFIG_ADE7759_MODULE)
1241  {
1242  .modalias = "ade7759",
1243  .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1244  .bus_num = 0,
1245  .chip_select = 1, /* CS, change it for your board */
1246  .platform_data = NULL, /* No spi_driver specific config */
1247  .mode = SPI_MODE_1,
1248  },
1249 #endif
1250 #if defined(CONFIG_ADE7854_SPI) \
1251  || defined(CONFIG_ADE7854_SPI_MODULE)
1252  {
1253  .modalias = "ade7854",
1254  .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1255  .bus_num = 0,
1256  .chip_select = 1, /* CS, change it for your board */
1257  .platform_data = NULL, /* No spi_driver specific config */
1258  .mode = SPI_MODE_3,
1259  },
1260 #endif
1261 #if defined(CONFIG_ADIS16060) \
1262  || defined(CONFIG_ADIS16060_MODULE)
1263  {
1264  .modalias = "adis16060_r",
1265  .max_speed_hz = 2900000, /* max spi clock (SCK) speed in HZ */
1266  .bus_num = 0,
1267  .chip_select = MAX_CTRL_CS + 1, /* CS for read, change it for your board */
1268  .platform_data = NULL, /* No spi_driver specific config */
1269  .mode = SPI_MODE_0,
1270  },
1271  {
1272  .modalias = "adis16060_w",
1273  .max_speed_hz = 2900000, /* max spi clock (SCK) speed in HZ */
1274  .bus_num = 0,
1275  .chip_select = 2, /* CS for write, change it for your board */
1276  .platform_data = NULL, /* No spi_driver specific config */
1277  .mode = SPI_MODE_1,
1278  },
1279 #endif
1280 #if defined(CONFIG_ADIS16130) \
1281  || defined(CONFIG_ADIS16130_MODULE)
1282  {
1283  .modalias = "adis16130",
1284  .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1285  .bus_num = 0,
1286  .chip_select = 1, /* CS for read, change it for your board */
1287  .platform_data = NULL, /* No spi_driver specific config */
1288  .mode = SPI_MODE_3,
1289  },
1290 #endif
1291 #if defined(CONFIG_ADIS16201) \
1292  || defined(CONFIG_ADIS16201_MODULE)
1293  {
1294  .modalias = "adis16201",
1295  .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1296  .bus_num = 0,
1297  .chip_select = 5, /* CS, change it for your board */
1298  .platform_data = NULL, /* No spi_driver specific config */
1299  .mode = SPI_MODE_3,
1300  .irq = IRQ_PF4,
1301  },
1302 #endif
1303 #if defined(CONFIG_ADIS16203) \
1304  || defined(CONFIG_ADIS16203_MODULE)
1305  {
1306  .modalias = "adis16203",
1307  .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1308  .bus_num = 0,
1309  .chip_select = 5, /* CS, change it for your board */
1310  .platform_data = NULL, /* No spi_driver specific config */
1311  .mode = SPI_MODE_3,
1312  .irq = IRQ_PF4,
1313  },
1314 #endif
1315 #if defined(CONFIG_ADIS16204) \
1316  || defined(CONFIG_ADIS16204_MODULE)
1317  {
1318  .modalias = "adis16204",
1319  .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1320  .bus_num = 0,
1321  .chip_select = 5, /* CS, change it for your board */
1322  .platform_data = NULL, /* No spi_driver specific config */
1323  .mode = SPI_MODE_3,
1324  .irq = IRQ_PF4,
1325  },
1326 #endif
1327 #if defined(CONFIG_ADIS16209) \
1328  || defined(CONFIG_ADIS16209_MODULE)
1329  {
1330  .modalias = "adis16209",
1331  .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1332  .bus_num = 0,
1333  .chip_select = 5, /* CS, change it for your board */
1334  .platform_data = NULL, /* No spi_driver specific config */
1335  .mode = SPI_MODE_3,
1336  .irq = IRQ_PF4,
1337  },
1338 #endif
1339 #if defined(CONFIG_ADIS16220) \
1340  || defined(CONFIG_ADIS16220_MODULE)
1341  {
1342  .modalias = "adis16220",
1343  .max_speed_hz = 2000000, /* max spi clock (SCK) speed in HZ */
1344  .bus_num = 0,
1345  .chip_select = 5, /* CS, change it for your board */
1346  .platform_data = NULL, /* No spi_driver specific config */
1347  .mode = SPI_MODE_3,
1348  .irq = IRQ_PF4,
1349  },
1350 #endif
1351 #if defined(CONFIG_ADIS16240) \
1352  || defined(CONFIG_ADIS16240_MODULE)
1353  {
1354  .modalias = "adis16240",
1355  .max_speed_hz = 1500000, /* max spi clock (SCK) speed in HZ */
1356  .bus_num = 0,
1357  .chip_select = 5, /* CS, change it for your board */
1358  .platform_data = NULL, /* No spi_driver specific config */
1359  .mode = SPI_MODE_3,
1360  .irq = IRQ_PF4,
1361  },
1362 #endif
1363 #if defined(CONFIG_ADIS16260) \
1364  || defined(CONFIG_ADIS16260_MODULE)
1365  {
1366  .modalias = "adis16260",
1367  .max_speed_hz = 1500000, /* max spi clock (SCK) speed in HZ */
1368  .bus_num = 0,
1369  .chip_select = 5, /* CS, change it for your board */
1370  .platform_data = NULL, /* No spi_driver specific config */
1371  .mode = SPI_MODE_3,
1372  .irq = IRQ_PF4,
1373  },
1374 #endif
1375 #if defined(CONFIG_ADIS16261) \
1376  || defined(CONFIG_ADIS16261_MODULE)
1377  {
1378  .modalias = "adis16261",
1379  .max_speed_hz = 2500000, /* max spi clock (SCK) speed in HZ */
1380  .bus_num = 0,
1381  .chip_select = 1, /* CS, change it for your board */
1382  .platform_data = NULL, /* No spi_driver specific config */
1383  .mode = SPI_MODE_3,
1384  },
1385 #endif
1386 #if defined(CONFIG_ADIS16300) \
1387  || defined(CONFIG_ADIS16300_MODULE)
1388  {
1389  .modalias = "adis16300",
1390  .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1391  .bus_num = 0,
1392  .chip_select = 5, /* CS, change it for your board */
1393  .platform_data = NULL, /* No spi_driver specific config */
1394  .mode = SPI_MODE_3,
1395  .irq = IRQ_PF4,
1396  },
1397 #endif
1398 #if defined(CONFIG_ADIS16350) \
1399  || defined(CONFIG_ADIS16350_MODULE)
1400  {
1401  .modalias = "adis16364",
1402  .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1403  .bus_num = 0,
1404  .chip_select = 5, /* CS, change it for your board */
1405  .platform_data = NULL, /* No spi_driver specific config */
1406  .mode = SPI_MODE_3,
1407  .irq = IRQ_PF4,
1408  },
1409 #endif
1410 #if defined(CONFIG_ADIS16400) \
1411  || defined(CONFIG_ADIS16400_MODULE)
1412  {
1413  .modalias = "adis16400",
1414  .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
1415  .bus_num = 0,
1416  .chip_select = 1, /* CS, change it for your board */
1417  .platform_data = NULL, /* No spi_driver specific config */
1418  .mode = SPI_MODE_3,
1419  },
1420 #endif
1421 };
1422 
1423 #if defined(CONFIG_SPI_BFIN5XX) || defined(CONFIG_SPI_BFIN5XX_MODULE)
1424 /* SPI controller data */
1425 static struct bfin5xx_spi_master bfin_spi0_info = {
1426  .num_chipselect = MAX_CTRL_CS + MAX_BLACKFIN_GPIOS,
1427  .enable_dma = 1, /* master has the ability to do dma transfer */
1428  .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
1429 };
1430 
1431 /* SPI (0) */
1432 static struct resource bfin_spi0_resource[] = {
1433  [0] = {
1434  .start = SPI0_REGBASE,
1435  .end = SPI0_REGBASE + 0xFF,
1436  .flags = IORESOURCE_MEM,
1437  },
1438  [1] = {
1439  .start = CH_SPI,
1440  .end = CH_SPI,
1441  .flags = IORESOURCE_DMA,
1442  },
1443  [2] = {
1444  .start = IRQ_SPI,
1445  .end = IRQ_SPI,
1446  .flags = IORESOURCE_IRQ,
1447  },
1448 };
1449 
1450 static struct platform_device bfin_spi0_device = {
1451  .name = "bfin-spi",
1452  .id = 0, /* Bus number */
1453  .num_resources = ARRAY_SIZE(bfin_spi0_resource),
1454  .resource = bfin_spi0_resource,
1455  .dev = {
1456  .platform_data = &bfin_spi0_info, /* Passed to driver */
1457  },
1458 };
1459 #endif /* spi master and devices */
1460 
1461 #if defined(CONFIG_SPI_BFIN_SPORT) || defined(CONFIG_SPI_BFIN_SPORT_MODULE)
1462 
1463 /* SPORT SPI controller data */
1464 static struct bfin5xx_spi_master bfin_sport_spi0_info = {
1465  .num_chipselect = MAX_BLACKFIN_GPIOS,
1466  .enable_dma = 0, /* master don't support DMA */
1467  .pin_req = {P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_DRPRI,
1468  P_SPORT0_RSCLK, P_SPORT0_TFS, P_SPORT0_RFS, 0},
1469 };
1470 
1471 static struct resource bfin_sport_spi0_resource[] = {
1472  [0] = {
1473  .start = SPORT0_TCR1,
1474  .end = SPORT0_TCR1 + 0xFF,
1475  .flags = IORESOURCE_MEM,
1476  },
1477  [1] = {
1478  .start = IRQ_SPORT0_ERROR,
1479  .end = IRQ_SPORT0_ERROR,
1480  .flags = IORESOURCE_IRQ,
1481  },
1482 };
1483 
1484 static struct platform_device bfin_sport_spi0_device = {
1485  .name = "bfin-sport-spi",
1486  .id = 1, /* Bus number */
1487  .num_resources = ARRAY_SIZE(bfin_sport_spi0_resource),
1488  .resource = bfin_sport_spi0_resource,
1489  .dev = {
1490  .platform_data = &bfin_sport_spi0_info, /* Passed to driver */
1491  },
1492 };
1493 
1494 static struct bfin5xx_spi_master bfin_sport_spi1_info = {
1495  .num_chipselect = MAX_BLACKFIN_GPIOS,
1496  .enable_dma = 0, /* master don't support DMA */
1497  .pin_req = {P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_DRPRI,
1498  P_SPORT1_RSCLK, P_SPORT1_TFS, P_SPORT1_RFS, 0},
1499 };
1500 
1501 static struct resource bfin_sport_spi1_resource[] = {
1502  [0] = {
1503  .start = SPORT1_TCR1,
1504  .end = SPORT1_TCR1 + 0xFF,
1505  .flags = IORESOURCE_MEM,
1506  },
1507  [1] = {
1508  .start = IRQ_SPORT1_ERROR,
1509  .end = IRQ_SPORT1_ERROR,
1510  .flags = IORESOURCE_IRQ,
1511  },
1512 };
1513 
1514 static struct platform_device bfin_sport_spi1_device = {
1515  .name = "bfin-sport-spi",
1516  .id = 2, /* Bus number */
1517  .num_resources = ARRAY_SIZE(bfin_sport_spi1_resource),
1518  .resource = bfin_sport_spi1_resource,
1519  .dev = {
1520  .platform_data = &bfin_sport_spi1_info, /* Passed to driver */
1521  },
1522 };
1523 
1524 #endif /* sport spi master and devices */
1525 
1526 #if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
1527 static struct platform_device bfin_fb_device = {
1528  .name = "bf537_lq035",
1529 };
1530 #endif
1531 
1532 #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
1533 #include <asm/bfin-lq035q1.h>
1534 
1535 static struct bfin_lq035q1fb_disp_info bfin_lq035q1_data = {
1536  .mode = LQ035_NORM | LQ035_RGB | LQ035_RL | LQ035_TB,
1537  .ppi_mode = USE_RGB565_16_BIT_PPI,
1538  .use_bl = 0, /* let something else control the LCD Blacklight */
1539  .gpio_bl = GPIO_PF7,
1540 };
1541 
1542 static struct resource bfin_lq035q1_resources[] = {
1543  {
1544  .start = IRQ_PPI_ERROR,
1545  .end = IRQ_PPI_ERROR,
1546  .flags = IORESOURCE_IRQ,
1547  },
1548 };
1549 
1550 static struct platform_device bfin_lq035q1_device = {
1551  .name = "bfin-lq035q1",
1552  .id = -1,
1553  .num_resources = ARRAY_SIZE(bfin_lq035q1_resources),
1554  .resource = bfin_lq035q1_resources,
1555  .dev = {
1556  .platform_data = &bfin_lq035q1_data,
1557  },
1558 };
1559 #endif
1560 
1561 #if defined(CONFIG_VIDEO_BLACKFIN_CAPTURE) \
1562  || defined(CONFIG_VIDEO_BLACKFIN_CAPTURE_MODULE)
1563 #include <linux/videodev2.h>
1564 #include <media/blackfin/bfin_capture.h>
1565 #include <media/blackfin/ppi.h>
1566 
1567 static const unsigned short ppi_req[] = {
1568  P_PPI0_D0, P_PPI0_D1, P_PPI0_D2, P_PPI0_D3,
1569  P_PPI0_D4, P_PPI0_D5, P_PPI0_D6, P_PPI0_D7,
1570  P_PPI0_CLK, P_PPI0_FS1, P_PPI0_FS2,
1571  0,
1572 };
1573 
1574 static const struct ppi_info ppi_info = {
1575  .type = PPI_TYPE_PPI,
1576  .dma_ch = CH_PPI,
1577  .irq_err = IRQ_PPI_ERROR,
1578  .base = (void __iomem *)PPI_CONTROL,
1579  .pin_req = ppi_req,
1580 };
1581 
1582 #if defined(CONFIG_VIDEO_VS6624) \
1583  || defined(CONFIG_VIDEO_VS6624_MODULE)
1584 static struct v4l2_input vs6624_inputs[] = {
1585  {
1586  .index = 0,
1587  .name = "Camera",
1588  .type = V4L2_INPUT_TYPE_CAMERA,
1589  .std = V4L2_STD_UNKNOWN,
1590  },
1591 };
1592 
1593 static struct bcap_route vs6624_routes[] = {
1594  {
1595  .input = 0,
1596  .output = 0,
1597  },
1598 };
1599 
1600 static const unsigned vs6624_ce_pin = GPIO_PF10;
1601 
1602 static struct bfin_capture_config bfin_capture_data = {
1603  .card_name = "BF537",
1604  .inputs = vs6624_inputs,
1605  .num_inputs = ARRAY_SIZE(vs6624_inputs),
1606  .routes = vs6624_routes,
1607  .i2c_adapter_id = 0,
1608  .board_info = {
1609  .type = "vs6624",
1610  .addr = 0x10,
1611  .platform_data = (void *)&vs6624_ce_pin,
1612  },
1613  .ppi_info = &ppi_info,
1614  .ppi_control = (PACK_EN | DLEN_8 | XFR_TYPE | 0x0020),
1615 };
1616 #endif
1617 
1618 static struct platform_device bfin_capture_device = {
1619  .name = "bfin_capture",
1620  .dev = {
1621  .platform_data = &bfin_capture_data,
1622  },
1623 };
1624 #endif
1625 
1626 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
1627 #ifdef CONFIG_SERIAL_BFIN_UART0
1628 static struct resource bfin_uart0_resources[] = {
1629  {
1630  .start = UART0_THR,
1631  .end = UART0_GCTL+2,
1632  .flags = IORESOURCE_MEM,
1633  },
1634  {
1635  .start = IRQ_UART0_TX,
1636  .end = IRQ_UART0_TX,
1637  .flags = IORESOURCE_IRQ,
1638  },
1639  {
1640  .start = IRQ_UART0_RX,
1641  .end = IRQ_UART0_RX,
1642  .flags = IORESOURCE_IRQ,
1643  },
1644  {
1645  .start = IRQ_UART0_ERROR,
1646  .end = IRQ_UART0_ERROR,
1647  .flags = IORESOURCE_IRQ,
1648  },
1649  {
1650  .start = CH_UART0_TX,
1651  .end = CH_UART0_TX,
1652  .flags = IORESOURCE_DMA,
1653  },
1654  {
1655  .start = CH_UART0_RX,
1656  .end = CH_UART0_RX,
1657  .flags = IORESOURCE_DMA,
1658  },
1659 #ifdef CONFIG_BFIN_UART0_CTSRTS
1660  { /* CTS pin */
1661  .start = GPIO_PG7,
1662  .end = GPIO_PG7,
1663  .flags = IORESOURCE_IO,
1664  },
1665  { /* RTS pin */
1666  .start = GPIO_PG6,
1667  .end = GPIO_PG6,
1668  .flags = IORESOURCE_IO,
1669  },
1670 #endif
1671 };
1672 
1673 static unsigned short bfin_uart0_peripherals[] = {
1674  P_UART0_TX, P_UART0_RX, 0
1675 };
1676 
1677 static struct platform_device bfin_uart0_device = {
1678  .name = "bfin-uart",
1679  .id = 0,
1680  .num_resources = ARRAY_SIZE(bfin_uart0_resources),
1681  .resource = bfin_uart0_resources,
1682  .dev = {
1683  .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
1684  },
1685 };
1686 #endif
1687 #ifdef CONFIG_SERIAL_BFIN_UART1
1688 static struct resource bfin_uart1_resources[] = {
1689  {
1690  .start = UART1_THR,
1691  .end = UART1_GCTL+2,
1692  .flags = IORESOURCE_MEM,
1693  },
1694  {
1695  .start = IRQ_UART1_TX,
1696  .end = IRQ_UART1_TX,
1697  .flags = IORESOURCE_IRQ,
1698  },
1699  {
1700  .start = IRQ_UART1_RX,
1701  .end = IRQ_UART1_RX,
1702  .flags = IORESOURCE_IRQ,
1703  },
1704  {
1705  .start = IRQ_UART1_ERROR,
1706  .end = IRQ_UART1_ERROR,
1707  .flags = IORESOURCE_IRQ,
1708  },
1709  {
1710  .start = CH_UART1_TX,
1711  .end = CH_UART1_TX,
1712  .flags = IORESOURCE_DMA,
1713  },
1714  {
1715  .start = CH_UART1_RX,
1716  .end = CH_UART1_RX,
1717  .flags = IORESOURCE_DMA,
1718  },
1719 };
1720 
1721 static unsigned short bfin_uart1_peripherals[] = {
1722  P_UART1_TX, P_UART1_RX, 0
1723 };
1724 
1725 static struct platform_device bfin_uart1_device = {
1726  .name = "bfin-uart",
1727  .id = 1,
1728  .num_resources = ARRAY_SIZE(bfin_uart1_resources),
1729  .resource = bfin_uart1_resources,
1730  .dev = {
1731  .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
1732  },
1733 };
1734 #endif
1735 #endif
1736 
1737 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
1738 #ifdef CONFIG_BFIN_SIR0
1739 static struct resource bfin_sir0_resources[] = {
1740  {
1741  .start = 0xFFC00400,
1742  .end = 0xFFC004FF,
1743  .flags = IORESOURCE_MEM,
1744  },
1745  {
1746  .start = IRQ_UART0_RX,
1747  .end = IRQ_UART0_RX+1,
1748  .flags = IORESOURCE_IRQ,
1749  },
1750  {
1751  .start = CH_UART0_RX,
1752  .end = CH_UART0_RX+1,
1753  .flags = IORESOURCE_DMA,
1754  },
1755 };
1756 
1757 static struct platform_device bfin_sir0_device = {
1758  .name = "bfin_sir",
1759  .id = 0,
1760  .num_resources = ARRAY_SIZE(bfin_sir0_resources),
1761  .resource = bfin_sir0_resources,
1762 };
1763 #endif
1764 #ifdef CONFIG_BFIN_SIR1
1765 static struct resource bfin_sir1_resources[] = {
1766  {
1767  .start = 0xFFC02000,
1768  .end = 0xFFC020FF,
1769  .flags = IORESOURCE_MEM,
1770  },
1771  {
1772  .start = IRQ_UART1_RX,
1773  .end = IRQ_UART1_RX+1,
1774  .flags = IORESOURCE_IRQ,
1775  },
1776  {
1777  .start = CH_UART1_RX,
1778  .end = CH_UART1_RX+1,
1779  .flags = IORESOURCE_DMA,
1780  },
1781 };
1782 
1783 static struct platform_device bfin_sir1_device = {
1784  .name = "bfin_sir",
1785  .id = 1,
1786  .num_resources = ARRAY_SIZE(bfin_sir1_resources),
1787  .resource = bfin_sir1_resources,
1788 };
1789 #endif
1790 #endif
1791 
1792 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
1793 static const u16 bfin_twi0_pins[] = {P_TWI0_SCL, P_TWI0_SDA, 0};
1794 
1795 static struct resource bfin_twi0_resource[] = {
1796  [0] = {
1797  .start = TWI0_REGBASE,
1798  .end = TWI0_REGBASE,
1799  .flags = IORESOURCE_MEM,
1800  },
1801  [1] = {
1802  .start = IRQ_TWI,
1803  .end = IRQ_TWI,
1804  .flags = IORESOURCE_IRQ,
1805  },
1806 };
1807 
1808 static struct platform_device i2c_bfin_twi_device = {
1809  .name = "i2c-bfin-twi",
1810  .id = 0,
1811  .num_resources = ARRAY_SIZE(bfin_twi0_resource),
1812  .resource = bfin_twi0_resource,
1813  .dev = {
1814  .platform_data = &bfin_twi0_pins,
1815  },
1816 };
1817 #endif
1818 
1819 #if defined(CONFIG_KEYBOARD_ADP5588) || defined(CONFIG_KEYBOARD_ADP5588_MODULE)
1820 static const unsigned short adp5588_keymap[ADP5588_KEYMAPSIZE] = {
1821  [0] = KEY_GRAVE,
1822  [1] = KEY_1,
1823  [2] = KEY_2,
1824  [3] = KEY_3,
1825  [4] = KEY_4,
1826  [5] = KEY_5,
1827  [6] = KEY_6,
1828  [7] = KEY_7,
1829  [8] = KEY_8,
1830  [9] = KEY_9,
1831  [10] = KEY_0,
1832  [11] = KEY_MINUS,
1833  [12] = KEY_EQUAL,
1834  [13] = KEY_BACKSLASH,
1835  [15] = KEY_KP0,
1836  [16] = KEY_Q,
1837  [17] = KEY_W,
1838  [18] = KEY_E,
1839  [19] = KEY_R,
1840  [20] = KEY_T,
1841  [21] = KEY_Y,
1842  [22] = KEY_U,
1843  [23] = KEY_I,
1844  [24] = KEY_O,
1845  [25] = KEY_P,
1846  [26] = KEY_LEFTBRACE,
1847  [27] = KEY_RIGHTBRACE,
1848  [29] = KEY_KP1,
1849  [30] = KEY_KP2,
1850  [31] = KEY_KP3,
1851  [32] = KEY_A,
1852  [33] = KEY_S,
1853  [34] = KEY_D,
1854  [35] = KEY_F,
1855  [36] = KEY_G,
1856  [37] = KEY_H,
1857  [38] = KEY_J,
1858  [39] = KEY_K,
1859  [40] = KEY_L,
1860  [41] = KEY_SEMICOLON,
1861  [42] = KEY_APOSTROPHE,
1862  [43] = KEY_BACKSLASH,
1863  [45] = KEY_KP4,
1864  [46] = KEY_KP5,
1865  [47] = KEY_KP6,
1866  [48] = KEY_102ND,
1867  [49] = KEY_Z,
1868  [50] = KEY_X,
1869  [51] = KEY_C,
1870  [52] = KEY_V,
1871  [53] = KEY_B,
1872  [54] = KEY_N,
1873  [55] = KEY_M,
1874  [56] = KEY_COMMA,
1875  [57] = KEY_DOT,
1876  [58] = KEY_SLASH,
1877  [60] = KEY_KPDOT,
1878  [61] = KEY_KP7,
1879  [62] = KEY_KP8,
1880  [63] = KEY_KP9,
1881  [64] = KEY_SPACE,
1882  [65] = KEY_BACKSPACE,
1883  [66] = KEY_TAB,
1884  [67] = KEY_KPENTER,
1885  [68] = KEY_ENTER,
1886  [69] = KEY_ESC,
1887  [70] = KEY_DELETE,
1888  [74] = KEY_KPMINUS,
1889  [76] = KEY_UP,
1890  [77] = KEY_DOWN,
1891  [78] = KEY_RIGHT,
1892  [79] = KEY_LEFT,
1893 };
1894 
1895 static struct adp5588_kpad_platform_data adp5588_kpad_data = {
1896  .rows = 8,
1897  .cols = 10,
1898  .keymap = adp5588_keymap,
1899  .keymapsize = ARRAY_SIZE(adp5588_keymap),
1900  .repeat = 0,
1901 };
1902 #endif
1903 
1904 #if defined(CONFIG_PMIC_ADP5520) || defined(CONFIG_PMIC_ADP5520_MODULE)
1905 #include <linux/mfd/adp5520.h>
1906 
1907  /*
1908  * ADP5520/5501 Backlight Data
1909  */
1910 
1911 static struct adp5520_backlight_platform_data adp5520_backlight_data = {
1912  .fade_in = ADP5520_FADE_T_1200ms,
1913  .fade_out = ADP5520_FADE_T_1200ms,
1914  .fade_led_law = ADP5520_BL_LAW_LINEAR,
1915  .en_ambl_sens = 1,
1916  .abml_filt = ADP5520_BL_AMBL_FILT_640ms,
1917  .l1_daylight_max = ADP5520_BL_CUR_mA(15),
1918  .l1_daylight_dim = ADP5520_BL_CUR_mA(0),
1919  .l2_office_max = ADP5520_BL_CUR_mA(7),
1920  .l2_office_dim = ADP5520_BL_CUR_mA(0),
1921  .l3_dark_max = ADP5520_BL_CUR_mA(3),
1922  .l3_dark_dim = ADP5520_BL_CUR_mA(0),
1923  .l2_trip = ADP5520_L2_COMP_CURR_uA(700),
1924  .l2_hyst = ADP5520_L2_COMP_CURR_uA(50),
1925  .l3_trip = ADP5520_L3_COMP_CURR_uA(80),
1926  .l3_hyst = ADP5520_L3_COMP_CURR_uA(20),
1927 };
1928 
1929  /*
1930  * ADP5520/5501 LEDs Data
1931  */
1932 
1933 static struct led_info adp5520_leds[] = {
1934  {
1935  .name = "adp5520-led1",
1936  .default_trigger = "none",
1937  .flags = FLAG_ID_ADP5520_LED1_ADP5501_LED0 | ADP5520_LED_OFFT_600ms,
1938  },
1939 #ifdef ADP5520_EN_ALL_LEDS
1940  {
1941  .name = "adp5520-led2",
1942  .default_trigger = "none",
1943  .flags = FLAG_ID_ADP5520_LED2_ADP5501_LED1,
1944  },
1945  {
1946  .name = "adp5520-led3",
1947  .default_trigger = "none",
1948  .flags = FLAG_ID_ADP5520_LED3_ADP5501_LED2,
1949  },
1950 #endif
1951 };
1952 
1953 static struct adp5520_leds_platform_data adp5520_leds_data = {
1954  .num_leds = ARRAY_SIZE(adp5520_leds),
1955  .leds = adp5520_leds,
1956  .fade_in = ADP5520_FADE_T_600ms,
1957  .fade_out = ADP5520_FADE_T_600ms,
1958  .led_on_time = ADP5520_LED_ONT_600ms,
1959 };
1960 
1961  /*
1962  * ADP5520 GPIO Data
1963  */
1964 
1965 static struct adp5520_gpio_platform_data adp5520_gpio_data = {
1966  .gpio_start = 50,
1967  .gpio_en_mask = ADP5520_GPIO_C1 | ADP5520_GPIO_C2 | ADP5520_GPIO_R2,
1968  .gpio_pullup_mask = ADP5520_GPIO_C1 | ADP5520_GPIO_C2 | ADP5520_GPIO_R2,
1969 };
1970 
1971  /*
1972  * ADP5520 Keypad Data
1973  */
1974 
1975 static const unsigned short adp5520_keymap[ADP5520_KEYMAPSIZE] = {
1976  [ADP5520_KEY(0, 0)] = KEY_GRAVE,
1977  [ADP5520_KEY(0, 1)] = KEY_1,
1978  [ADP5520_KEY(0, 2)] = KEY_2,
1979  [ADP5520_KEY(0, 3)] = KEY_3,
1980  [ADP5520_KEY(1, 0)] = KEY_4,
1981  [ADP5520_KEY(1, 1)] = KEY_5,
1982  [ADP5520_KEY(1, 2)] = KEY_6,
1983  [ADP5520_KEY(1, 3)] = KEY_7,
1984  [ADP5520_KEY(2, 0)] = KEY_8,
1985  [ADP5520_KEY(2, 1)] = KEY_9,
1986  [ADP5520_KEY(2, 2)] = KEY_0,
1987  [ADP5520_KEY(2, 3)] = KEY_MINUS,
1988  [ADP5520_KEY(3, 0)] = KEY_EQUAL,
1989  [ADP5520_KEY(3, 1)] = KEY_BACKSLASH,
1990  [ADP5520_KEY(3, 2)] = KEY_BACKSPACE,
1991  [ADP5520_KEY(3, 3)] = KEY_ENTER,
1992 };
1993 
1994 static struct adp5520_keys_platform_data adp5520_keys_data = {
1995  .rows_en_mask = ADP5520_ROW_R3 | ADP5520_ROW_R2 | ADP5520_ROW_R1 | ADP5520_ROW_R0,
1996  .cols_en_mask = ADP5520_COL_C3 | ADP5520_COL_C2 | ADP5520_COL_C1 | ADP5520_COL_C0,
1997  .keymap = adp5520_keymap,
1998  .keymapsize = ARRAY_SIZE(adp5520_keymap),
1999  .repeat = 0,
2000 };
2001 
2002  /*
2003  * ADP5520/5501 Multifunction Device Init Data
2004  */
2005 
2006 static struct adp5520_platform_data adp5520_pdev_data = {
2007  .backlight = &adp5520_backlight_data,
2008  .leds = &adp5520_leds_data,
2009  .gpio = &adp5520_gpio_data,
2010  .keys = &adp5520_keys_data,
2011 };
2012 
2013 #endif
2014 
2015 #if defined(CONFIG_GPIO_ADP5588) || defined(CONFIG_GPIO_ADP5588_MODULE)
2016 static struct adp5588_gpio_platform_data adp5588_gpio_data = {
2017  .gpio_start = 50,
2018  .pullup_dis_mask = 0,
2019 };
2020 #endif
2021 
2022 #if defined(CONFIG_BACKLIGHT_ADP8870) || defined(CONFIG_BACKLIGHT_ADP8870_MODULE)
2023 #include <linux/i2c/adp8870.h>
2024 static struct led_info adp8870_leds[] = {
2025  {
2026  .name = "adp8870-led7",
2027  .default_trigger = "none",
2028  .flags = ADP8870_LED_D7 | ADP8870_LED_OFFT_600ms,
2029  },
2030 };
2031 
2032 
2033 static struct adp8870_backlight_platform_data adp8870_pdata = {
2034  .bl_led_assign = ADP8870_BL_D1 | ADP8870_BL_D2 | ADP8870_BL_D3 |
2035  ADP8870_BL_D4 | ADP8870_BL_D5 | ADP8870_BL_D6, /* 1 = Backlight 0 = Individual LED */
2036  .pwm_assign = 0, /* 1 = Enables PWM mode */
2037 
2038  .bl_fade_in = ADP8870_FADE_T_1200ms, /* Backlight Fade-In Timer */
2039  .bl_fade_out = ADP8870_FADE_T_1200ms, /* Backlight Fade-Out Timer */
2040  .bl_fade_law = ADP8870_FADE_LAW_CUBIC1, /* fade-on/fade-off transfer characteristic */
2041 
2042  .en_ambl_sens = 1, /* 1 = enable ambient light sensor */
2043  .abml_filt = ADP8870_BL_AMBL_FILT_320ms, /* Light sensor filter time */
2044 
2045  .l1_daylight_max = ADP8870_BL_CUR_mA(20), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
2046  .l1_daylight_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
2047  .l2_bright_max = ADP8870_BL_CUR_mA(14), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
2048  .l2_bright_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
2049  .l3_office_max = ADP8870_BL_CUR_mA(6), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
2050  .l3_office_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
2051  .l4_indoor_max = ADP8870_BL_CUR_mA(3), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
2052  .l4_indor_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
2053  .l5_dark_max = ADP8870_BL_CUR_mA(2), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
2054  .l5_dark_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
2055 
2056  .l2_trip = ADP8870_L2_COMP_CURR_uA(710), /* use L2_COMP_CURR_uA(I) 0 <= I <= 1106 uA */
2057  .l2_hyst = ADP8870_L2_COMP_CURR_uA(73), /* use L2_COMP_CURR_uA(I) 0 <= I <= 1106 uA */
2058  .l3_trip = ADP8870_L3_COMP_CURR_uA(389), /* use L3_COMP_CURR_uA(I) 0 <= I <= 551 uA */
2059  .l3_hyst = ADP8870_L3_COMP_CURR_uA(54), /* use L3_COMP_CURR_uA(I) 0 <= I <= 551 uA */
2060  .l4_trip = ADP8870_L4_COMP_CURR_uA(167), /* use L4_COMP_CURR_uA(I) 0 <= I <= 275 uA */
2061  .l4_hyst = ADP8870_L4_COMP_CURR_uA(16), /* use L4_COMP_CURR_uA(I) 0 <= I <= 275 uA */
2062  .l5_trip = ADP8870_L5_COMP_CURR_uA(43), /* use L5_COMP_CURR_uA(I) 0 <= I <= 138 uA */
2063  .l5_hyst = ADP8870_L5_COMP_CURR_uA(11), /* use L6_COMP_CURR_uA(I) 0 <= I <= 138 uA */
2064 
2065  .leds = adp8870_leds,
2066  .num_leds = ARRAY_SIZE(adp8870_leds),
2067  .led_fade_law = ADP8870_FADE_LAW_SQUARE, /* fade-on/fade-off transfer characteristic */
2068  .led_fade_in = ADP8870_FADE_T_600ms,
2069  .led_fade_out = ADP8870_FADE_T_600ms,
2070  .led_on_time = ADP8870_LED_ONT_200ms,
2071 };
2072 #endif
2073 
2074 #if defined(CONFIG_BACKLIGHT_ADP8860) || defined(CONFIG_BACKLIGHT_ADP8860_MODULE)
2075 #include <linux/i2c/adp8860.h>
2076 static struct led_info adp8860_leds[] = {
2077  {
2078  .name = "adp8860-led7",
2079  .default_trigger = "none",
2080  .flags = ADP8860_LED_D7 | ADP8860_LED_OFFT_600ms,
2081  },
2082 };
2083 
2084 static struct adp8860_backlight_platform_data adp8860_pdata = {
2085  .bl_led_assign = ADP8860_BL_D1 | ADP8860_BL_D2 | ADP8860_BL_D3 |
2086  ADP8860_BL_D4 | ADP8860_BL_D5 | ADP8860_BL_D6, /* 1 = Backlight 0 = Individual LED */
2087 
2088  .bl_fade_in = ADP8860_FADE_T_1200ms, /* Backlight Fade-In Timer */
2089  .bl_fade_out = ADP8860_FADE_T_1200ms, /* Backlight Fade-Out Timer */
2090  .bl_fade_law = ADP8860_FADE_LAW_CUBIC1, /* fade-on/fade-off transfer characteristic */
2091 
2092  .en_ambl_sens = 1, /* 1 = enable ambient light sensor */
2093  .abml_filt = ADP8860_BL_AMBL_FILT_320ms, /* Light sensor filter time */
2094 
2095  .l1_daylight_max = ADP8860_BL_CUR_mA(20), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
2096  .l1_daylight_dim = ADP8860_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
2097  .l2_office_max = ADP8860_BL_CUR_mA(6), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
2098  .l2_office_dim = ADP8860_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
2099  .l3_dark_max = ADP8860_BL_CUR_mA(2), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
2100  .l3_dark_dim = ADP8860_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
2101 
2102  .l2_trip = ADP8860_L2_COMP_CURR_uA(710), /* use L2_COMP_CURR_uA(I) 0 <= I <= 1106 uA */
2103  .l2_hyst = ADP8860_L2_COMP_CURR_uA(73), /* use L2_COMP_CURR_uA(I) 0 <= I <= 1106 uA */
2104  .l3_trip = ADP8860_L3_COMP_CURR_uA(43), /* use L3_COMP_CURR_uA(I) 0 <= I <= 138 uA */
2105  .l3_hyst = ADP8860_L3_COMP_CURR_uA(11), /* use L3_COMP_CURR_uA(I) 0 <= I <= 138 uA */
2106 
2107  .leds = adp8860_leds,
2108  .num_leds = ARRAY_SIZE(adp8860_leds),
2109  .led_fade_law = ADP8860_FADE_LAW_SQUARE, /* fade-on/fade-off transfer characteristic */
2110  .led_fade_in = ADP8860_FADE_T_600ms,
2111  .led_fade_out = ADP8860_FADE_T_600ms,
2112  .led_on_time = ADP8860_LED_ONT_200ms,
2113 };
2114 #endif
2115 
2116 #if defined(CONFIG_REGULATOR_AD5398) || defined(CONFIG_REGULATOR_AD5398_MODULE)
2117 static struct regulator_consumer_supply ad5398_consumer = {
2118  .supply = "current",
2119 };
2120 
2121 static struct regulator_init_data ad5398_regulator_data = {
2122  .constraints = {
2123  .name = "current range",
2124  .max_uA = 120000,
2125  .valid_ops_mask = REGULATOR_CHANGE_CURRENT | REGULATOR_CHANGE_STATUS,
2126  },
2127  .num_consumer_supplies = 1,
2128  .consumer_supplies = &ad5398_consumer,
2129 };
2130 
2131 #if defined(CONFIG_REGULATOR_VIRTUAL_CONSUMER) || \
2132  defined(CONFIG_REGULATOR_VIRTUAL_CONSUMER_MODULE)
2133 static struct platform_device ad5398_virt_consumer_device = {
2134  .name = "reg-virt-consumer",
2135  .id = 0,
2136  .dev = {
2137  .platform_data = "current", /* Passed to driver */
2138  },
2139 };
2140 #endif
2141 #if defined(CONFIG_REGULATOR_USERSPACE_CONSUMER) || \
2142  defined(CONFIG_REGULATOR_USERSPACE_CONSUMER_MODULE)
2143 static struct regulator_bulk_data ad5398_bulk_data = {
2144  .supply = "current",
2145 };
2146 
2147 static struct regulator_userspace_consumer_data ad5398_userspace_comsumer_data = {
2148  .name = "ad5398",
2149  .num_supplies = 1,
2150  .supplies = &ad5398_bulk_data,
2151 };
2152 
2153 static struct platform_device ad5398_userspace_consumer_device = {
2154  .name = "reg-userspace-consumer",
2155  .id = 0,
2156  .dev = {
2157  .platform_data = &ad5398_userspace_comsumer_data,
2158  },
2159 };
2160 #endif
2161 #endif
2162 
2163 #if defined(CONFIG_ADT7410) || defined(CONFIG_ADT7410_MODULE)
2164 /* INT bound temperature alarm event. line 1 */
2165 static unsigned long adt7410_platform_data[2] = {
2166  IRQ_PG4, IRQF_TRIGGER_LOW,
2167 };
2168 #endif
2169 
2170 #if defined(CONFIG_ADT7316_I2C) || defined(CONFIG_ADT7316_I2C_MODULE)
2171 /* INT bound temperature alarm event. line 1 */
2172 static unsigned long adt7316_i2c_data[2] = {
2173  IRQF_TRIGGER_LOW, /* interrupt flags */
2174  GPIO_PF4, /* ldac_pin, 0 means DAC/LDAC registers control DAC update */
2175 };
2176 #endif
2177 
2178 static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
2179 #ifdef CONFIG_SND_SOC_AD193X_I2C
2180  {
2181  I2C_BOARD_INFO("ad1937", 0x04),
2182  },
2183 #endif
2184 
2185 #if defined(CONFIG_SND_SOC_ADAV80X) || defined(CONFIG_SND_SOC_ADAV80X_MODULE)
2186  {
2187  I2C_BOARD_INFO("adav803", 0x10),
2188  },
2189 #endif
2190 
2191 #if defined(CONFIG_INPUT_AD714X_I2C) || defined(CONFIG_INPUT_AD714X_I2C_MODULE)
2192  {
2193  I2C_BOARD_INFO("ad7142_captouch", 0x2C),
2194  .irq = IRQ_PG5,
2195  .platform_data = (void *)&ad7142_i2c_platform_data,
2196  },
2197 #endif
2198 
2199 #if defined(CONFIG_AD7150) || defined(CONFIG_AD7150_MODULE)
2200  {
2201  I2C_BOARD_INFO("ad7150", 0x48),
2202  .irq = IRQ_PG5, /* fixme: use real interrupt number */
2203  },
2204 #endif
2205 
2206 #if defined(CONFIG_AD7152) || defined(CONFIG_AD7152_MODULE)
2207  {
2208  I2C_BOARD_INFO("ad7152", 0x48),
2209  },
2210 #endif
2211 
2212 #if defined(CONFIG_AD774X) || defined(CONFIG_AD774X_MODULE)
2213  {
2214  I2C_BOARD_INFO("ad774x", 0x48),
2215  },
2216 #endif
2217 
2218 #if defined(CONFIG_ADE7854_I2C) || defined(CONFIG_ADE7854_I2C_MODULE)
2219  {
2220  I2C_BOARD_INFO("ade7854", 0x38),
2221  },
2222 #endif
2223 
2224 #if defined(CONFIG_ADT75) || defined(CONFIG_ADT75_MODULE)
2225  {
2226  I2C_BOARD_INFO("adt75", 0x9),
2227  .irq = IRQ_PG5,
2228  },
2229 #endif
2230 
2231 #if defined(CONFIG_ADT7410) || defined(CONFIG_ADT7410_MODULE)
2232  {
2233  I2C_BOARD_INFO("adt7410", 0x48),
2234  /* CT critical temperature event. line 0 */
2235  .irq = IRQ_PG5,
2236  .platform_data = (void *)&adt7410_platform_data,
2237  },
2238 #endif
2239 
2240 #if defined(CONFIG_AD7291) || defined(CONFIG_AD7291_MODULE)
2241  {
2242  I2C_BOARD_INFO("ad7291", 0x20),
2243  .irq = IRQ_PG5,
2244  },
2245 #endif
2246 
2247 #if defined(CONFIG_ADT7316_I2C) || defined(CONFIG_ADT7316_I2C_MODULE)
2248  {
2249  I2C_BOARD_INFO("adt7316", 0x48),
2250  .irq = IRQ_PG6,
2251  .platform_data = (void *)&adt7316_i2c_data,
2252  },
2253 #endif
2254 
2255 #if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
2256  {
2257  I2C_BOARD_INFO("pcf8574_lcd", 0x22),
2258  },
2259 #endif
2260 #if defined(CONFIG_INPUT_PCF8574) || defined(CONFIG_INPUT_PCF8574_MODULE)
2261  {
2262  I2C_BOARD_INFO("pcf8574_keypad", 0x27),
2263  .irq = IRQ_PG6,
2264  },
2265 #endif
2266 #if defined(CONFIG_TOUCHSCREEN_AD7879_I2C) || defined(CONFIG_TOUCHSCREEN_AD7879_I2C_MODULE)
2267  {
2268  I2C_BOARD_INFO("ad7879", 0x2F),
2269  .irq = IRQ_PG5,
2270  .platform_data = (void *)&bfin_ad7879_ts_info,
2271  },
2272 #endif
2273 #if defined(CONFIG_KEYBOARD_ADP5588) || defined(CONFIG_KEYBOARD_ADP5588_MODULE)
2274  {
2275  I2C_BOARD_INFO("adp5588-keys", 0x34),
2276  .irq = IRQ_PG0,
2277  .platform_data = (void *)&adp5588_kpad_data,
2278  },
2279 #endif
2280 #if defined(CONFIG_PMIC_ADP5520) || defined(CONFIG_PMIC_ADP5520_MODULE)
2281  {
2282  I2C_BOARD_INFO("pmic-adp5520", 0x32),
2283  .irq = IRQ_PG0,
2284  .platform_data = (void *)&adp5520_pdev_data,
2285  },
2286 #endif
2287 #if defined(CONFIG_INPUT_ADXL34X_I2C) || defined(CONFIG_INPUT_ADXL34X_I2C_MODULE)
2288  {
2289  I2C_BOARD_INFO("adxl34x", 0x53),
2290  .irq = IRQ_PG3,
2291  .platform_data = (void *)&adxl34x_info,
2292  },
2293 #endif
2294 #if defined(CONFIG_GPIO_ADP5588) || defined(CONFIG_GPIO_ADP5588_MODULE)
2295  {
2296  I2C_BOARD_INFO("adp5588-gpio", 0x34),
2297  .platform_data = (void *)&adp5588_gpio_data,
2298  },
2299 #endif
2300 #if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE)
2301  {
2302  I2C_BOARD_INFO("bfin-adv7393", 0x2B),
2303  },
2304 #endif
2305 #if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
2306  {
2307  I2C_BOARD_INFO("bf537-lq035-ad5280", 0x2F),
2308  },
2309 #endif
2310 #if defined(CONFIG_BACKLIGHT_ADP8870) || defined(CONFIG_BACKLIGHT_ADP8870_MODULE)
2311  {
2312  I2C_BOARD_INFO("adp8870", 0x2B),
2313  .platform_data = (void *)&adp8870_pdata,
2314  },
2315 #endif
2316 #if defined(CONFIG_SND_SOC_ADAU1371) || defined(CONFIG_SND_SOC_ADAU1371_MODULE)
2317  {
2318  I2C_BOARD_INFO("adau1371", 0x1A),
2319  },
2320 #endif
2321 #if defined(CONFIG_SND_SOC_ADAU1761) || defined(CONFIG_SND_SOC_ADAU1761_MODULE)
2322  {
2323  I2C_BOARD_INFO("adau1761", 0x38),
2324  },
2325 #endif
2326 #if defined(CONFIG_SND_SOC_ADAU1361) || defined(CONFIG_SND_SOC_ADAU1361_MODULE)
2327  {
2328  I2C_BOARD_INFO("adau1361", 0x38),
2329  },
2330 #endif
2331 #if defined(CONFIG_SND_SOC_ADAU1701) || defined(CONFIG_SND_SOC_ADAU1701_MODULE)
2332  {
2333  I2C_BOARD_INFO("adau1701", 0x34),
2334  },
2335 #endif
2336 #if defined(CONFIG_AD525X_DPOT) || defined(CONFIG_AD525X_DPOT_MODULE)
2337  {
2338  I2C_BOARD_INFO("ad5258", 0x18),
2339  },
2340 #endif
2341 #if defined(CONFIG_SND_SOC_SSM2602) || defined(CONFIG_SND_SOC_SSM2602_MODULE)
2342  {
2343  I2C_BOARD_INFO("ssm2602", 0x1b),
2344  },
2345 #endif
2346 #if defined(CONFIG_REGULATOR_AD5398) || defined(CONFIG_REGULATOR_AD5398_MODULE)
2347  {
2348  I2C_BOARD_INFO("ad5398", 0xC),
2349  .platform_data = (void *)&ad5398_regulator_data,
2350  },
2351 #endif
2352 #if defined(CONFIG_BACKLIGHT_ADP8860) || defined(CONFIG_BACKLIGHT_ADP8860_MODULE)
2353  {
2354  I2C_BOARD_INFO("adp8860", 0x2A),
2355  .platform_data = (void *)&adp8860_pdata,
2356  },
2357 #endif
2358 #if defined(CONFIG_SND_SOC_ADAU1373) || defined(CONFIG_SND_SOC_ADAU1373_MODULE)
2359  {
2360  I2C_BOARD_INFO("adau1373", 0x1A),
2361  },
2362 #endif
2363 #if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
2364  {
2365  I2C_BOARD_INFO("ad5252", 0x2e),
2366  },
2367 #endif
2368 };
2369 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE) \
2370 || defined(CONFIG_BFIN_SPORT) || defined(CONFIG_BFIN_SPORT_MODULE)
2371 unsigned short bfin_sport0_peripherals[] = {
2372  P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
2373  P_SPORT0_DRPRI, P_SPORT0_RSCLK, P_SPORT0_DRSEC, P_SPORT0_DTSEC, 0
2374 };
2375 #endif
2376 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
2377 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
2378 static struct resource bfin_sport0_uart_resources[] = {
2379  {
2380  .start = SPORT0_TCR1,
2381  .end = SPORT0_MRCS3+4,
2382  .flags = IORESOURCE_MEM,
2383  },
2384  {
2385  .start = IRQ_SPORT0_RX,
2386  .end = IRQ_SPORT0_RX+1,
2387  .flags = IORESOURCE_IRQ,
2388  },
2389  {
2390  .start = IRQ_SPORT0_ERROR,
2391  .end = IRQ_SPORT0_ERROR,
2392  .flags = IORESOURCE_IRQ,
2393  },
2394 };
2395 
2396 static struct platform_device bfin_sport0_uart_device = {
2397  .name = "bfin-sport-uart",
2398  .id = 0,
2399  .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
2400  .resource = bfin_sport0_uart_resources,
2401  .dev = {
2402  .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
2403  },
2404 };
2405 #endif
2406 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
2407 static struct resource bfin_sport1_uart_resources[] = {
2408  {
2409  .start = SPORT1_TCR1,
2410  .end = SPORT1_MRCS3+4,
2411  .flags = IORESOURCE_MEM,
2412  },
2413  {
2414  .start = IRQ_SPORT1_RX,
2415  .end = IRQ_SPORT1_RX+1,
2416  .flags = IORESOURCE_IRQ,
2417  },
2418  {
2419  .start = IRQ_SPORT1_ERROR,
2420  .end = IRQ_SPORT1_ERROR,
2421  .flags = IORESOURCE_IRQ,
2422  },
2423 };
2424 
2425 static unsigned short bfin_sport1_peripherals[] = {
2426  P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
2427  P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0
2428 };
2429 
2430 static struct platform_device bfin_sport1_uart_device = {
2431  .name = "bfin-sport-uart",
2432  .id = 1,
2433  .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
2434  .resource = bfin_sport1_uart_resources,
2435  .dev = {
2436  .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
2437  },
2438 };
2439 #endif
2440 #endif
2441 #if defined(CONFIG_BFIN_SPORT) || defined(CONFIG_BFIN_SPORT_MODULE)
2442 static struct resource bfin_sport0_resources[] = {
2443  {
2444  .start = SPORT0_TCR1,
2445  .end = SPORT0_MRCS3+4,
2446  .flags = IORESOURCE_MEM,
2447  },
2448  {
2449  .start = IRQ_SPORT0_RX,
2450  .end = IRQ_SPORT0_RX+1,
2451  .flags = IORESOURCE_IRQ,
2452  },
2453  {
2454  .start = IRQ_SPORT0_TX,
2455  .end = IRQ_SPORT0_TX+1,
2456  .flags = IORESOURCE_IRQ,
2457  },
2458  {
2459  .start = IRQ_SPORT0_ERROR,
2460  .end = IRQ_SPORT0_ERROR,
2461  .flags = IORESOURCE_IRQ,
2462  },
2463  {
2464  .start = CH_SPORT0_TX,
2465  .end = CH_SPORT0_TX,
2466  .flags = IORESOURCE_DMA,
2467  },
2468  {
2469  .start = CH_SPORT0_RX,
2470  .end = CH_SPORT0_RX,
2471  .flags = IORESOURCE_DMA,
2472  },
2473 };
2474 static struct platform_device bfin_sport0_device = {
2475  .name = "bfin_sport_raw",
2476  .id = 0,
2477  .num_resources = ARRAY_SIZE(bfin_sport0_resources),
2478  .resource = bfin_sport0_resources,
2479  .dev = {
2480  .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
2481  },
2482 };
2483 #endif
2484 #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
2485 #define CF_IDE_NAND_CARD_USE_HDD_INTERFACE
2486 /* #define CF_IDE_NAND_CARD_USE_CF_IN_COMMON_MEMORY_MODE */
2487 
2488 #ifdef CF_IDE_NAND_CARD_USE_HDD_INTERFACE
2489 #define PATA_INT IRQ_PF5
2490 static struct pata_platform_info bfin_pata_platform_data = {
2491  .ioport_shift = 1,
2492  .irq_flags = IRQF_TRIGGER_HIGH,
2493 };
2494 
2495 static struct resource bfin_pata_resources[] = {
2496  {
2497  .start = 0x20314020,
2498  .end = 0x2031403F,
2499  .flags = IORESOURCE_MEM,
2500  },
2501  {
2502  .start = 0x2031401C,
2503  .end = 0x2031401F,
2504  .flags = IORESOURCE_MEM,
2505  },
2506  {
2507  .start = PATA_INT,
2508  .end = PATA_INT,
2509  .flags = IORESOURCE_IRQ,
2510  },
2511 };
2512 #elif defined(CF_IDE_NAND_CARD_USE_CF_IN_COMMON_MEMORY_MODE)
2513 static struct pata_platform_info bfin_pata_platform_data = {
2514  .ioport_shift = 0,
2515 };
2516 /* CompactFlash Storage Card Memory Mapped Addressing
2517  * /REG = A11 = 1
2518  */
2519 static struct resource bfin_pata_resources[] = {
2520  {
2521  .start = 0x20211800,
2522  .end = 0x20211807,
2523  .flags = IORESOURCE_MEM,
2524  },
2525  {
2526  .start = 0x2021180E, /* Device Ctl */
2527  .end = 0x2021180E,
2528  .flags = IORESOURCE_MEM,
2529  },
2530 };
2531 #endif
2532 
2533 static struct platform_device bfin_pata_device = {
2534  .name = "pata_platform",
2535  .id = -1,
2536  .num_resources = ARRAY_SIZE(bfin_pata_resources),
2537  .resource = bfin_pata_resources,
2538  .dev = {
2539  .platform_data = &bfin_pata_platform_data,
2540  }
2541 };
2542 #endif
2543 
2544 static const unsigned int cclk_vlev_datasheet[] =
2545 {
2546  VRPAIR(VLEV_085, 250000000),
2547  VRPAIR(VLEV_090, 376000000),
2548  VRPAIR(VLEV_095, 426000000),
2549  VRPAIR(VLEV_100, 426000000),
2550  VRPAIR(VLEV_105, 476000000),
2551  VRPAIR(VLEV_110, 476000000),
2552  VRPAIR(VLEV_115, 476000000),
2553  VRPAIR(VLEV_120, 500000000),
2554  VRPAIR(VLEV_125, 533000000),
2555  VRPAIR(VLEV_130, 600000000),
2556 };
2557 
2558 static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
2559  .tuple_tab = cclk_vlev_datasheet,
2560  .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
2561  .vr_settling_time = 25 /* us */,
2562 };
2563 
2564 static struct platform_device bfin_dpmc = {
2565  .name = "bfin dpmc",
2566  .dev = {
2567  .platform_data = &bfin_dmpc_vreg_data,
2568  },
2569 };
2570 
2571 #if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE) || \
2572  defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE) || \
2573  defined(CONFIG_SND_BF5XX_AC97) || defined(CONFIG_SND_BF5XX_AC97_MODULE)
2574 
2575 #define SPORT_REQ(x) \
2576  [x] = {P_SPORT##x##_TFS, P_SPORT##x##_DTPRI, P_SPORT##x##_TSCLK, \
2577  P_SPORT##x##_RFS, P_SPORT##x##_DRPRI, P_SPORT##x##_RSCLK, 0}
2578 
2579 static const u16 bfin_snd_pin[][7] = {
2580  SPORT_REQ(0),
2581  SPORT_REQ(1),
2582 };
2583 
2584 static struct bfin_snd_platform_data bfin_snd_data[] = {
2585  {
2586  .pin_req = &bfin_snd_pin[0][0],
2587  },
2588  {
2589  .pin_req = &bfin_snd_pin[1][0],
2590  },
2591 };
2592 
2593 #define BFIN_SND_RES(x) \
2594  [x] = { \
2595  { \
2596  .start = SPORT##x##_TCR1, \
2597  .end = SPORT##x##_TCR1, \
2598  .flags = IORESOURCE_MEM \
2599  }, \
2600  { \
2601  .start = CH_SPORT##x##_RX, \
2602  .end = CH_SPORT##x##_RX, \
2603  .flags = IORESOURCE_DMA, \
2604  }, \
2605  { \
2606  .start = CH_SPORT##x##_TX, \
2607  .end = CH_SPORT##x##_TX, \
2608  .flags = IORESOURCE_DMA, \
2609  }, \
2610  { \
2611  .start = IRQ_SPORT##x##_ERROR, \
2612  .end = IRQ_SPORT##x##_ERROR, \
2613  .flags = IORESOURCE_IRQ, \
2614  } \
2615  }
2616 
2617 static struct resource bfin_snd_resources[][4] = {
2618  BFIN_SND_RES(0),
2619  BFIN_SND_RES(1),
2620 };
2621 #endif
2622 
2623 #if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
2624 static struct platform_device bfin_i2s_pcm = {
2625  .name = "bfin-i2s-pcm-audio",
2626  .id = -1,
2627 };
2628 #endif
2629 
2630 #if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
2631 static struct platform_device bfin_tdm_pcm = {
2632  .name = "bfin-tdm-pcm-audio",
2633  .id = -1,
2634 };
2635 #endif
2636 
2637 #if defined(CONFIG_SND_BF5XX_AC97) || defined(CONFIG_SND_BF5XX_AC97_MODULE)
2638 static struct platform_device bfin_ac97_pcm = {
2639  .name = "bfin-ac97-pcm-audio",
2640  .id = -1,
2641 };
2642 #endif
2643 
2644 #if defined(CONFIG_SND_BF5XX_SOC_AD1836) \
2645  || defined(CONFIG_SND_BF5XX_SOC_AD1836_MODULE)
2646 static const char * const ad1836_link[] = {
2647  "bfin-tdm.0",
2648  "spi0.4",
2649 };
2650 static struct platform_device bfin_ad1836_machine = {
2651  .name = "bfin-snd-ad1836",
2652  .id = -1,
2653  .dev = {
2654  .platform_data = (void *)ad1836_link,
2655  },
2656 };
2657 #endif
2658 
2659 #if defined(CONFIG_SND_BF5XX_SOC_AD73311) || \
2660  defined(CONFIG_SND_BF5XX_SOC_AD73311_MODULE)
2661 static const unsigned ad73311_gpio[] = {
2662  GPIO_PF4,
2663 };
2664 
2665 static struct platform_device bfin_ad73311_machine = {
2666  .name = "bfin-snd-ad73311",
2667  .id = 1,
2668  .dev = {
2669  .platform_data = (void *)ad73311_gpio,
2670  },
2671 };
2672 #endif
2673 
2674 #if defined(CONFIG_SND_SOC_AD73311) || defined(CONFIG_SND_SOC_AD73311_MODULE)
2675 static struct platform_device bfin_ad73311_codec_device = {
2676  .name = "ad73311",
2677  .id = -1,
2678 };
2679 #endif
2680 
2681 #if defined(CONFIG_SND_SOC_BFIN_EVAL_ADAV80X) || \
2682  defined(CONFIG_SND_SOC_BFIN_EVAL_ADAV80X_MODULE)
2683 static struct platform_device bfin_eval_adav801_device = {
2684  .name = "bfin-eval-adav801",
2685  .id = -1,
2686 };
2687 #endif
2688 
2689 #if defined(CONFIG_SND_BF5XX_SOC_I2S) || defined(CONFIG_SND_BF5XX_SOC_I2S_MODULE)
2690 static struct platform_device bfin_i2s = {
2691  .name = "bfin-i2s",
2692  .id = CONFIG_SND_BF5XX_SPORT_NUM,
2693  .num_resources = ARRAY_SIZE(bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM]),
2694  .resource = bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM],
2695  .dev = {
2696  .platform_data = &bfin_snd_data[CONFIG_SND_BF5XX_SPORT_NUM],
2697  },
2698 };
2699 #endif
2700 
2701 #if defined(CONFIG_SND_BF5XX_SOC_TDM) || defined(CONFIG_SND_BF5XX_SOC_TDM_MODULE)
2702 static struct platform_device bfin_tdm = {
2703  .name = "bfin-tdm",
2704  .id = CONFIG_SND_BF5XX_SPORT_NUM,
2705  .num_resources = ARRAY_SIZE(bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM]),
2706  .resource = bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM],
2707  .dev = {
2708  .platform_data = &bfin_snd_data[CONFIG_SND_BF5XX_SPORT_NUM],
2709  },
2710 };
2711 #endif
2712 
2713 #if defined(CONFIG_SND_BF5XX_SOC_AC97) || defined(CONFIG_SND_BF5XX_SOC_AC97_MODULE)
2714 static struct platform_device bfin_ac97 = {
2715  .name = "bfin-ac97",
2716  .id = CONFIG_SND_BF5XX_SPORT_NUM,
2717  .num_resources = ARRAY_SIZE(bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM]),
2718  .resource = bfin_snd_resources[CONFIG_SND_BF5XX_SPORT_NUM],
2719  .dev = {
2720  .platform_data = &bfin_snd_data[CONFIG_SND_BF5XX_SPORT_NUM],
2721  },
2722 };
2723 #endif
2724 
2725 #if defined(CONFIG_REGULATOR_FIXED_VOLTAGE) || defined(CONFIG_REGULATOR_FIXED_VOLTAGE_MODULE)
2726 #define REGULATOR_ADP122 "adp122"
2727 #define REGULATOR_ADP122_UV 2500000
2728 
2729 static struct regulator_consumer_supply adp122_consumers = {
2730  .supply = REGULATOR_ADP122,
2731 };
2732 
2733 static struct regulator_init_data adp_switch_regulator_data = {
2734  .constraints = {
2735  .name = REGULATOR_ADP122,
2736  .valid_ops_mask = REGULATOR_CHANGE_STATUS,
2737  .min_uV = REGULATOR_ADP122_UV,
2738  .max_uV = REGULATOR_ADP122_UV,
2739  .min_uA = 0,
2740  .max_uA = 300000,
2741  },
2742  .num_consumer_supplies = 1, /* only 1 */
2743  .consumer_supplies = &adp122_consumers,
2744 };
2745 
2746 static struct fixed_voltage_config adp_switch_pdata = {
2747  .supply_name = REGULATOR_ADP122,
2748  .microvolts = REGULATOR_ADP122_UV,
2749  .gpio = GPIO_PF2,
2750  .enable_high = 1,
2751  .enabled_at_boot = 0,
2752  .init_data = &adp_switch_regulator_data,
2753 };
2754 
2755 static struct platform_device adp_switch_device = {
2756  .name = "reg-fixed-voltage",
2757  .id = 0,
2758  .dev = {
2759  .platform_data = &adp_switch_pdata,
2760  },
2761 };
2762 
2763 #if defined(CONFIG_REGULATOR_USERSPACE_CONSUMER) || \
2764  defined(CONFIG_REGULATOR_USERSPACE_CONSUMER_MODULE)
2765 static struct regulator_bulk_data adp122_bulk_data = {
2766  .supply = REGULATOR_ADP122,
2767 };
2768 
2769 static struct regulator_userspace_consumer_data adp122_userspace_comsumer_data = {
2770  .name = REGULATOR_ADP122,
2771  .num_supplies = 1,
2772  .supplies = &adp122_bulk_data,
2773 };
2774 
2775 static struct platform_device adp122_userspace_consumer_device = {
2776  .name = "reg-userspace-consumer",
2777  .id = 0,
2778  .dev = {
2779  .platform_data = &adp122_userspace_comsumer_data,
2780  },
2781 };
2782 #endif
2783 #endif
2784 
2785 #if defined(CONFIG_IIO_GPIO_TRIGGER) || \
2786  defined(CONFIG_IIO_GPIO_TRIGGER_MODULE)
2787 
2788 static struct resource iio_gpio_trigger_resources[] = {
2789  [0] = {
2790  .start = IRQ_PF5,
2791  .end = IRQ_PF5,
2792  .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
2793  },
2794 };
2795 
2796 static struct platform_device iio_gpio_trigger = {
2797  .name = "iio_gpio_trigger",
2798  .num_resources = ARRAY_SIZE(iio_gpio_trigger_resources),
2799  .resource = iio_gpio_trigger_resources,
2800 };
2801 #endif
2802 
2803 #if defined(CONFIG_SND_SOC_BFIN_EVAL_ADAU1373) || \
2804  defined(CONFIG_SND_SOC_BFIN_EVAL_ADAU1373_MODULE)
2805 static struct platform_device bf5xx_adau1373_device = {
2806  .name = "bfin-eval-adau1373",
2807 };
2808 #endif
2809 
2810 #if defined(CONFIG_SND_SOC_BFIN_EVAL_ADAU1701) || \
2811  defined(CONFIG_SND_SOC_BFIN_EVAL_ADAU1701_MODULE)
2812 static struct platform_device bf5xx_adau1701_device = {
2813  .name = "bfin-eval-adau1701",
2814 };
2815 #endif
2816 
2817 static struct platform_device *stamp_devices[] __initdata = {
2818 
2819  &bfin_dpmc,
2820 #if defined(CONFIG_BFIN_SPORT) || defined(CONFIG_BFIN_SPORT_MODULE)
2821  &bfin_sport0_device,
2822 #endif
2823 #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
2824  &bfin_pcmcia_cf_device,
2825 #endif
2826 
2827 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
2828  &rtc_device,
2829 #endif
2830 
2831 #if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
2832  &sl811_hcd_device,
2833 #endif
2834 
2835 #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
2836  &isp1362_hcd_device,
2837 #endif
2838 
2839 #if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
2840  &bfin_isp1760_device,
2841 #endif
2842 
2843 #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
2844  &smc91x_device,
2845 #endif
2846 
2847 #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
2848  &dm9000_device,
2849 #endif
2850 
2851 #if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)
2852  &bfin_can_device,
2853 #endif
2854 
2855 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
2856  &bfin_mii_bus,
2857  &bfin_mac_device,
2858 #endif
2859 
2860 #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
2861  &net2272_bfin_device,
2862 #endif
2863 
2864 #if defined(CONFIG_SPI_BFIN5XX) || defined(CONFIG_SPI_BFIN5XX_MODULE)
2865  &bfin_spi0_device,
2866 #endif
2867 
2868 #if defined(CONFIG_SPI_BFIN_SPORT) || defined(CONFIG_SPI_BFIN_SPORT_MODULE)
2869  &bfin_sport_spi0_device,
2870  &bfin_sport_spi1_device,
2871 #endif
2872 
2873 #if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
2874  &bfin_fb_device,
2875 #endif
2876 
2877 #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
2878  &bfin_lq035q1_device,
2879 #endif
2880 
2881 #if defined(CONFIG_VIDEO_BLACKFIN_CAPTURE) \
2882  || defined(CONFIG_VIDEO_BLACKFIN_CAPTURE_MODULE)
2883  &bfin_capture_device,
2884 #endif
2885 
2886 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
2887 #ifdef CONFIG_SERIAL_BFIN_UART0
2888  &bfin_uart0_device,
2889 #endif
2890 #ifdef CONFIG_SERIAL_BFIN_UART1
2891  &bfin_uart1_device,
2892 #endif
2893 #endif
2894 
2895 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
2896 #ifdef CONFIG_BFIN_SIR0
2897  &bfin_sir0_device,
2898 #endif
2899 #ifdef CONFIG_BFIN_SIR1
2900  &bfin_sir1_device,
2901 #endif
2902 #endif
2903 
2904 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
2905  &i2c_bfin_twi_device,
2906 #endif
2907 
2908 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
2909 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
2910  &bfin_sport0_uart_device,
2911 #endif
2912 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
2913  &bfin_sport1_uart_device,
2914 #endif
2915 #endif
2916 
2917 #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
2918  &bfin_pata_device,
2919 #endif
2920 
2921 #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
2922  &bfin_device_gpiokeys,
2923 #endif
2924 
2925 #if defined(CONFIG_MTD_NAND_PLATFORM) || defined(CONFIG_MTD_NAND_PLATFORM_MODULE)
2926  &bfin_async_nand_device,
2927 #endif
2928 
2929 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
2930  &stamp_flash_device,
2931 #endif
2932 
2933 #if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
2934  &bfin_i2s_pcm,
2935 #endif
2936 
2937 #if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
2938  &bfin_tdm_pcm,
2939 #endif
2940 
2941 #if defined(CONFIG_SND_BF5XX_AC97) || defined(CONFIG_SND_BF5XX_AC97_MODULE)
2942  &bfin_ac97_pcm,
2943 #endif
2944 
2945 #if defined(CONFIG_SND_BF5XX_SOC_AD1836) || \
2946  defined(CONFIG_SND_BF5XX_SOC_AD1836_MODULE)
2947  &bfin_ad1836_machine,
2948 #endif
2949 
2950 #if defined(CONFIG_SND_BF5XX_SOC_AD73311) || \
2951  defined(CONFIG_SND_BF5XX_SOC_AD73311_MODULE)
2952  &bfin_ad73311_machine,
2953 #endif
2954 
2955 #if defined(CONFIG_SND_SOC_AD73311) || defined(CONFIG_SND_SOC_AD73311_MODULE)
2956  &bfin_ad73311_codec_device,
2957 #endif
2958 
2959 #if defined(CONFIG_SND_BF5XX_SOC_I2S) || defined(CONFIG_SND_BF5XX_SOC_I2S_MODULE)
2960  &bfin_i2s,
2961 #endif
2962 
2963 #if defined(CONFIG_SND_BF5XX_SOC_TDM) || defined(CONFIG_SND_BF5XX_SOC_TDM_MODULE)
2964  &bfin_tdm,
2965 #endif
2966 
2967 #if defined(CONFIG_SND_BF5XX_SOC_AC97) || defined(CONFIG_SND_BF5XX_SOC_AC97_MODULE)
2968  &bfin_ac97,
2969 #endif
2970 
2971 #if defined(CONFIG_REGULATOR_AD5398) || defined(CONFIG_REGULATOR_AD5398_MODULE)
2972 #if defined(CONFIG_REGULATOR_VIRTUAL_CONSUMER) || \
2973  defined(CONFIG_REGULATOR_VIRTUAL_CONSUMER_MODULE)
2974  &ad5398_virt_consumer_device,
2975 #endif
2976 #if defined(CONFIG_REGULATOR_USERSPACE_CONSUMER) || \
2977  defined(CONFIG_REGULATOR_USERSPACE_CONSUMER_MODULE)
2978  &ad5398_userspace_consumer_device,
2979 #endif
2980 #endif
2981 
2982 #if defined(CONFIG_REGULATOR_FIXED_VOLTAGE) || defined(CONFIG_REGULATOR_FIXED_VOLTAGE_MODULE)
2983  &adp_switch_device,
2984 #if defined(CONFIG_REGULATOR_USERSPACE_CONSUMER) || \
2985  defined(CONFIG_REGULATOR_USERSPACE_CONSUMER_MODULE)
2986  &adp122_userspace_consumer_device,
2987 #endif
2988 #endif
2989 
2990 #if defined(CONFIG_IIO_GPIO_TRIGGER) || \
2991  defined(CONFIG_IIO_GPIO_TRIGGER_MODULE)
2992  &iio_gpio_trigger,
2993 #endif
2994 
2995 #if defined(CONFIG_SND_SOC_BFIN_EVAL_ADAU1373) || \
2996  defined(CONFIG_SND_SOC_BFIN_EVAL_ADAU1373_MODULE)
2997  &bf5xx_adau1373_device,
2998 #endif
2999 
3000 #if defined(CONFIG_SND_SOC_BFIN_EVAL_ADAU1701) || \
3001  defined(CONFIG_SND_SOC_BFIN_EVAL_ADAU1701_MODULE)
3002  &bf5xx_adau1701_device,
3003 #endif
3004 
3005 #if defined(CONFIG_SND_SOC_BFIN_EVAL_ADAV80X) || \
3006  defined(CONFIG_SND_SOC_BFIN_EVAL_ADAV80X_MODULE)
3007  &bfin_eval_adav801_device,
3008 #endif
3009 };
3010 
3011 static int __init net2272_init(void)
3012 {
3013 #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
3014  int ret;
3015 
3016  ret = gpio_request(GPIO_PF6, "net2272");
3017  if (ret)
3018  return ret;
3019 
3020  /* Reset the USB chip */
3021  gpio_direction_output(GPIO_PF6, 0);
3022  mdelay(2);
3023  gpio_set_value(GPIO_PF6, 1);
3024 #endif
3025 
3026  return 0;
3027 }
3028 
3029 static int __init stamp_init(void)
3030 {
3031  printk(KERN_INFO "%s(): registering device resources\n", __func__);
3032  bfin_plat_nand_init();
3033  adf702x_mac_init();
3034  platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
3035  i2c_register_board_info(0, bfin_i2c_board_info,
3036  ARRAY_SIZE(bfin_i2c_board_info));
3037  spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
3038 
3039  if (net2272_init())
3040  pr_warning("unable to configure net2272; it probably won't work\n");
3041 
3042  return 0;
3043 }
3044 
3045 arch_initcall(stamp_init);
3046 
3047 
3048 static struct platform_device *stamp_early_devices[] __initdata = {
3049 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
3050 #ifdef CONFIG_SERIAL_BFIN_UART0
3051  &bfin_uart0_device,
3052 #endif
3053 #ifdef CONFIG_SERIAL_BFIN_UART1
3054  &bfin_uart1_device,
3055 #endif
3056 #endif
3057 
3058 #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
3059 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
3060  &bfin_sport0_uart_device,
3061 #endif
3062 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
3063  &bfin_sport1_uart_device,
3064 #endif
3065 #endif
3066 };
3067 
3068 void __init native_machine_early_platform_add_devices(void)
3069 {
3070  printk(KERN_INFO "register early platform devices\n");
3071  early_platform_add_devices(stamp_early_devices,
3072  ARRAY_SIZE(stamp_early_devices));
3073 }
3074 
3075 void native_machine_restart(char *cmd)
3076 {
3077  /* workaround reboot hang when booting from SPI */
3078  if ((bfin_read_SYSCR() & 0x7) == 0x3)
3079  bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
3080 }
3081 
3082 /*
3083  * Currently the MAC address is saved in Flash by U-Boot
3084  */
3085 #define FLASH_MAC 0x203f0000
3086 int bfin_get_ether_addr(char *addr)
3087 {
3088  *(u32 *)(&(addr[0])) = bfin_read32(FLASH_MAC);
3089  *(u16 *)(&(addr[4])) = bfin_read16(FLASH_MAC + 4);
3090  return 0;
3091 }
3092 EXPORT_SYMBOL(bfin_get_ether_addr);
Generated on Thu Jan 10 2013 13:04:38 for Linux Kernel by   doxygen 1.8.2