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Linux Kernel
3.7.1
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Linux Kernel
3.7.1
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#include <mach/irqs.h>Go to the source code of this file.
Macros | |
| #define | MST_ETH_PHYS PXA_CS4_PHYS |
| #define | MST_FPGA_PHYS PXA_CS2_PHYS |
| #define | MST_FPGA_VIRT (0xf0000000) |
| #define | MST_P2V(x) ((x) - MST_FPGA_PHYS + MST_FPGA_VIRT) |
| #define | MST_V2P(x) ((x) - MST_FPGA_VIRT + MST_FPGA_PHYS) |
| #define | __MST_REG(x) (*((volatile unsigned long *)MST_P2V(x))) |
| #define | MST_LEDDAT1 __MST_REG(0x08000010) |
| #define | MST_LEDDAT2 __MST_REG(0x08000014) |
| #define | MST_LEDCTRL __MST_REG(0x08000040) |
| #define | MST_GPSWR __MST_REG(0x08000060) |
| #define | MST_MSCWR1 __MST_REG(0x08000080) |
| #define | MST_MSCWR2 __MST_REG(0x08000084) |
| #define | MST_MSCWR3 __MST_REG(0x08000088) |
| #define | MST_MSCRD __MST_REG(0x08000090) |
| #define | MST_INTMSKENA __MST_REG(0x080000c0) |
| #define | MST_INTSETCLR __MST_REG(0x080000d0) |
| #define | MST_PCMCIA0 __MST_REG(0x080000e0) |
| #define | MST_PCMCIA1 __MST_REG(0x080000e4) |
| #define | MST_MSCWR1_CAMERA_ON (1 << 15) /* Camera interface power control */ |
| #define | MST_MSCWR1_CAMERA_SEL (1 << 14) /* Camera interface mux control */ |
| #define | MST_MSCWR1_LCD_CTL (1 << 13) /* General-purpose LCD control */ |
| #define | MST_MSCWR1_MS_ON (1 << 12) /* Memory Stick power control */ |
| #define | MST_MSCWR1_MMC_ON (1 << 11) /* MultiMediaCard* power control */ |
| #define | MST_MSCWR1_MS_SEL (1 << 10) /* SD/MS multiplexer control */ |
| #define | MST_MSCWR1_BB_SEL (1 << 9) /* PCMCIA/Baseband multiplexer */ |
| #define | MST_MSCWR1_BT_ON (1 << 8) /* Bluetooth UART transceiver */ |
| #define | MST_MSCWR1_BTDTR (1 << 7) /* Bluetooth UART DTR */ |
| #define | MST_MSCWR1_IRDA_MASK (3 << 5) /* IrDA transceiver mode */ |
| #define | MST_MSCWR1_IRDA_FULL (0 << 5) /* full distance power */ |
| #define | MST_MSCWR1_IRDA_OFF (1 << 5) /* shutdown */ |
| #define | MST_MSCWR1_IRDA_MED (2 << 5) /* 2/3 distance power */ |
| #define | MST_MSCWR1_IRDA_LOW (3 << 5) /* 1/3 distance power */ |
| #define | MST_MSCWR1_IRDA_FIR (1 << 4) /* IrDA transceiver SIR/FIR */ |
| #define | MST_MSCWR1_GREENLED (1 << 3) /* LED D1 control */ |
| #define | MST_MSCWR1_PDC_CTL (1 << 2) /* reserved */ |
| #define | MST_MSCWR1_MTR_ON (1 << 1) /* Silent alert motor */ |
| #define | MST_MSCWR1_SYSRESET (1 << 0) /* System reset */ |
| #define | MST_MSCWR2_USB_OTG_RST (1 << 6) /* USB On The Go reset */ |
| #define | MST_MSCWR2_USB_OTG_SEL (1 << 5) /* USB On The Go control */ |
| #define | MST_MSCWR2_nUSBC_SC (1 << 4) /* USB client soft connect control */ |
| #define | MST_MSCWR2_I2S_SPKROFF (1 << 3) /* I2S CODEC amplifier control */ |
| #define | MST_MSCWR2_AC97_SPKROFF (1 << 2) /* AC97 CODEC amplifier control */ |
| #define | MST_MSCWR2_RADIO_PWR (1 << 1) /* Radio module power control */ |
| #define | MST_MSCWR2_RADIO_WAKE (1 << 0) /* Radio module wake-up signal */ |
| #define | MST_MSCWR3_GPIO_RESET_EN (1 << 2) /* Enable GPIO Reset */ |
| #define | MST_MSCWR3_GPIO_RESET (1 << 1) /* Initiate a GPIO Reset */ |
| #define | MST_MSCWR3_COMMS_SW_RESET (1 << 0) /* Communications Processor Reset Control */ |
| #define | MST_MSCRD_nPENIRQ (1 << 9) /* ADI7873* nPENIRQ signal */ |
| #define | MST_MSCRD_nMEMSTK_CD (1 << 8) /* Memory Stick detection signal */ |
| #define | MST_MSCRD_nMMC_CD (1 << 7) /* SD/MMC card detection signal */ |
| #define | MST_MSCRD_nUSIM_CD (1 << 6) /* USIM card detection signal */ |
| #define | MST_MSCRD_USB_CBL (1 << 5) /* USB client cable status */ |
| #define | MST_MSCRD_TS_BUSY (1 << 4) /* ADI7873 busy */ |
| #define | MST_MSCRD_BTDSR (1 << 3) /* Bluetooth UART DSR */ |
| #define | MST_MSCRD_BTRI (1 << 2) /* Bluetooth UART Ring Indicator */ |
| #define | MST_MSCRD_BTDCD (1 << 1) /* Bluetooth UART DCD */ |
| #define | MST_MSCRD_nMMC_WP (1 << 0) /* SD/MMC write-protect status */ |
| #define | MST_INT_S1_IRQ (1 << 15) /* PCMCIA socket 1 IRQ */ |
| #define | MST_INT_S1_STSCHG (1 << 14) /* PCMCIA socket 1 status changed */ |
| #define | MST_INT_S1_CD (1 << 13) /* PCMCIA socket 1 card detection */ |
| #define | MST_INT_S0_IRQ (1 << 11) /* PCMCIA socket 0 IRQ */ |
| #define | MST_INT_S0_STSCHG (1 << 10) /* PCMCIA socket 0 status changed */ |
| #define | MST_INT_S0_CD (1 << 9) /* PCMCIA socket 0 card detection */ |
| #define | MST_INT_nEXBRD_INT (1 << 7) /* Expansion board IRQ */ |
| #define | MST_INT_MSINS (1 << 6) /* Memory Stick* detection */ |
| #define | MST_INT_PENIRQ (1 << 5) /* ADI7873* touch-screen IRQ */ |
| #define | MST_INT_AC97 (1 << 4) /* AC'97 CODEC IRQ */ |
| #define | MST_INT_ETHERNET (1 << 3) /* Ethernet controller IRQ */ |
| #define | MST_INT_USBC (1 << 2) /* USB client cable detection IRQ */ |
| #define | MST_INT_USIM (1 << 1) /* USIM card detection IRQ */ |
| #define | MST_INT_MMC (1 << 0) /* MMC/SD card detection IRQ */ |
| #define | MST_PCMCIA_nIRQ (1 << 10) /* IRQ / ready signal */ |
| #define | MST_PCMCIA_nSPKR_BVD2 (1 << 9) /* VDD sense / digital speaker */ |
| #define | MST_PCMCIA_nSTSCHG_BVD1 (1 << 8) /* VDD sense / card status changed */ |
| #define | MST_PCMCIA_nVS2 (1 << 7) /* VSS voltage sense */ |
| #define | MST_PCMCIA_nVS1 (1 << 6) /* VSS voltage sense */ |
| #define | MST_PCMCIA_nCD (1 << 5) /* Card detection signal */ |
| #define | MST_PCMCIA_RESET (1 << 4) /* Card reset signal */ |
| #define | MST_PCMCIA_PWR_MASK (0x000f) /* MAX1602 power-supply controls */ |
| #define | MST_PCMCIA_PWR_VPP_0 0x0 /* voltage VPP = 0V */ |
| #define | MST_PCMCIA_PWR_VPP_120 0x2 /* voltage VPP = 12V*/ |
| #define | MST_PCMCIA_PWR_VPP_VCC 0x1 /* voltage VPP = VCC */ |
| #define | MST_PCMCIA_PWR_VCC_0 0x0 /* voltage VCC = 0V */ |
| #define | MST_PCMCIA_PWR_VCC_33 0x8 /* voltage VCC = 3.3V */ |
| #define | MST_PCMCIA_PWR_VCC_50 0x4 /* voltage VCC = 5.0V */ |
| #define | MAINSTONE_IRQ(x) (IRQ_BOARD_START + (x)) |
| #define | MAINSTONE_MMC_IRQ MAINSTONE_IRQ(0) |
| #define | MAINSTONE_USIM_IRQ MAINSTONE_IRQ(1) |
| #define | MAINSTONE_USBC_IRQ MAINSTONE_IRQ(2) |
| #define | MAINSTONE_ETHERNET_IRQ MAINSTONE_IRQ(3) |
| #define | MAINSTONE_AC97_IRQ MAINSTONE_IRQ(4) |
| #define | MAINSTONE_PEN_IRQ MAINSTONE_IRQ(5) |
| #define | MAINSTONE_MSINS_IRQ MAINSTONE_IRQ(6) |
| #define | MAINSTONE_EXBRD_IRQ MAINSTONE_IRQ(7) |
| #define | MAINSTONE_S0_CD_IRQ MAINSTONE_IRQ(9) |
| #define | MAINSTONE_S0_STSCHG_IRQ MAINSTONE_IRQ(10) |
| #define | MAINSTONE_S0_IRQ MAINSTONE_IRQ(11) |
| #define | MAINSTONE_S1_CD_IRQ MAINSTONE_IRQ(13) |
| #define | MAINSTONE_S1_STSCHG_IRQ MAINSTONE_IRQ(14) |
| #define | MAINSTONE_S1_IRQ MAINSTONE_IRQ(15) |
| #define | MAINSTONE_NR_IRQS (IRQ_BOARD_START + 16) |
Definition at line 26 of file mainstone.h.
| #define MAINSTONE_AC97_IRQ MAINSTONE_IRQ(4) |
Definition at line 128 of file mainstone.h.
| #define MAINSTONE_ETHERNET_IRQ MAINSTONE_IRQ(3) |
Definition at line 127 of file mainstone.h.
| #define MAINSTONE_EXBRD_IRQ MAINSTONE_IRQ(7) |
Definition at line 131 of file mainstone.h.
| #define MAINSTONE_IRQ | ( | x | ) | (IRQ_BOARD_START + (x)) |
Definition at line 123 of file mainstone.h.
| #define MAINSTONE_MMC_IRQ MAINSTONE_IRQ(0) |
Definition at line 124 of file mainstone.h.
| #define MAINSTONE_MSINS_IRQ MAINSTONE_IRQ(6) |
Definition at line 130 of file mainstone.h.
| #define MAINSTONE_NR_IRQS (IRQ_BOARD_START + 16) |
Definition at line 139 of file mainstone.h.
| #define MAINSTONE_PEN_IRQ MAINSTONE_IRQ(5) |
Definition at line 129 of file mainstone.h.
| #define MAINSTONE_S0_CD_IRQ MAINSTONE_IRQ(9) |
Definition at line 132 of file mainstone.h.
| #define MAINSTONE_S0_IRQ MAINSTONE_IRQ(11) |
Definition at line 134 of file mainstone.h.
| #define MAINSTONE_S0_STSCHG_IRQ MAINSTONE_IRQ(10) |
Definition at line 133 of file mainstone.h.
| #define MAINSTONE_S1_CD_IRQ MAINSTONE_IRQ(13) |
Definition at line 135 of file mainstone.h.
| #define MAINSTONE_S1_IRQ MAINSTONE_IRQ(15) |
Definition at line 137 of file mainstone.h.
| #define MAINSTONE_S1_STSCHG_IRQ MAINSTONE_IRQ(14) |
Definition at line 136 of file mainstone.h.
| #define MAINSTONE_USBC_IRQ MAINSTONE_IRQ(2) |
Definition at line 126 of file mainstone.h.
| #define MAINSTONE_USIM_IRQ MAINSTONE_IRQ(1) |
Definition at line 125 of file mainstone.h.
| #define MST_ETH_PHYS PXA_CS4_PHYS |
Definition at line 18 of file mainstone.h.
| #define MST_FPGA_PHYS PXA_CS2_PHYS |
Definition at line 20 of file mainstone.h.
| #define MST_FPGA_VIRT (0xf0000000) |
Definition at line 21 of file mainstone.h.
| #define MST_GPSWR __MST_REG(0x08000060) |
Definition at line 36 of file mainstone.h.
Definition at line 100 of file mainstone.h.
| #define MST_INT_ETHERNET (1 << 3) /* Ethernet controller IRQ */ |
Definition at line 101 of file mainstone.h.
Definition at line 104 of file mainstone.h.
| #define MST_INT_MSINS (1 << 6) /* Memory Stick* detection */ |
Definition at line 98 of file mainstone.h.
Definition at line 97 of file mainstone.h.
| #define MST_INT_PENIRQ (1 << 5) /* ADI7873* touch-screen IRQ */ |
Definition at line 99 of file mainstone.h.
Definition at line 96 of file mainstone.h.
Definition at line 94 of file mainstone.h.
Definition at line 95 of file mainstone.h.
Definition at line 93 of file mainstone.h.
Definition at line 91 of file mainstone.h.
Definition at line 92 of file mainstone.h.
Definition at line 102 of file mainstone.h.
Definition at line 103 of file mainstone.h.
| #define MST_INTMSKENA __MST_REG(0x080000c0) |
Definition at line 41 of file mainstone.h.
| #define MST_INTSETCLR __MST_REG(0x080000d0) |
Definition at line 42 of file mainstone.h.
| #define MST_LEDCTRL __MST_REG(0x08000040) |
Definition at line 35 of file mainstone.h.
| #define MST_LEDDAT1 __MST_REG(0x08000010) |
Definition at line 33 of file mainstone.h.
| #define MST_LEDDAT2 __MST_REG(0x08000014) |
Definition at line 34 of file mainstone.h.
| #define MST_MSCRD __MST_REG(0x08000090) |
Definition at line 40 of file mainstone.h.
Definition at line 88 of file mainstone.h.
Definition at line 86 of file mainstone.h.
| #define MST_MSCRD_BTRI (1 << 2) /* Bluetooth UART Ring Indicator */ |
Definition at line 87 of file mainstone.h.
| #define MST_MSCRD_nMEMSTK_CD (1 << 8) /* Memory Stick detection signal */ |
Definition at line 81 of file mainstone.h.
Definition at line 82 of file mainstone.h.
Definition at line 89 of file mainstone.h.
| #define MST_MSCRD_nPENIRQ (1 << 9) /* ADI7873* nPENIRQ signal */ |
Definition at line 80 of file mainstone.h.
| #define MST_MSCRD_nUSIM_CD (1 << 6) /* USIM card detection signal */ |
Definition at line 83 of file mainstone.h.
| #define MST_MSCRD_TS_BUSY (1 << 4) /* ADI7873 busy */ |
Definition at line 85 of file mainstone.h.
Definition at line 84 of file mainstone.h.
| #define MST_MSCWR1 __MST_REG(0x08000080) |
Definition at line 37 of file mainstone.h.
| #define MST_MSCWR1_BB_SEL (1 << 9) /* PCMCIA/Baseband multiplexer */ |
Definition at line 52 of file mainstone.h.
| #define MST_MSCWR1_BT_ON (1 << 8) /* Bluetooth UART transceiver */ |
Definition at line 53 of file mainstone.h.
Definition at line 54 of file mainstone.h.
Definition at line 46 of file mainstone.h.
Definition at line 47 of file mainstone.h.
Definition at line 63 of file mainstone.h.
| #define MST_MSCWR1_IRDA_FIR (1 << 4) /* IrDA transceiver SIR/FIR */ |
Definition at line 62 of file mainstone.h.
| #define MST_MSCWR1_IRDA_FULL (0 << 5) /* full distance power */ |
Definition at line 57 of file mainstone.h.
| #define MST_MSCWR1_IRDA_LOW (3 << 5) /* 1/3 distance power */ |
Definition at line 60 of file mainstone.h.
| #define MST_MSCWR1_IRDA_MASK (3 << 5) /* IrDA transceiver mode */ |
Definition at line 56 of file mainstone.h.
| #define MST_MSCWR1_IRDA_MED (2 << 5) /* 2/3 distance power */ |
Definition at line 59 of file mainstone.h.
| #define MST_MSCWR1_IRDA_OFF (1 << 5) /* shutdown */ |
Definition at line 58 of file mainstone.h.
Definition at line 48 of file mainstone.h.
| #define MST_MSCWR1_MMC_ON (1 << 11) /* MultiMediaCard* power control */ |
Definition at line 50 of file mainstone.h.
Definition at line 49 of file mainstone.h.
Definition at line 51 of file mainstone.h.
| #define MST_MSCWR1_MTR_ON (1 << 1) /* Silent alert motor */ |
Definition at line 65 of file mainstone.h.
| #define MST_MSCWR1_PDC_CTL (1 << 2) /* reserved */ |
Definition at line 64 of file mainstone.h.
| #define MST_MSCWR1_SYSRESET (1 << 0) /* System reset */ |
Definition at line 66 of file mainstone.h.
| #define MST_MSCWR2 __MST_REG(0x08000084) |
Definition at line 38 of file mainstone.h.
Definition at line 72 of file mainstone.h.
Definition at line 71 of file mainstone.h.
Definition at line 70 of file mainstone.h.
Definition at line 73 of file mainstone.h.
Definition at line 74 of file mainstone.h.
Definition at line 68 of file mainstone.h.
Definition at line 69 of file mainstone.h.
| #define MST_MSCWR3 __MST_REG(0x08000088) |
Definition at line 39 of file mainstone.h.
Definition at line 78 of file mainstone.h.
Definition at line 77 of file mainstone.h.
Definition at line 76 of file mainstone.h.
| #define MST_P2V | ( | x | ) | ((x) - MST_FPGA_PHYS + MST_FPGA_VIRT) |
Definition at line 22 of file mainstone.h.
| #define MST_PCMCIA0 __MST_REG(0x080000e0) |
Definition at line 43 of file mainstone.h.
| #define MST_PCMCIA1 __MST_REG(0x080000e4) |
Definition at line 44 of file mainstone.h.
| #define MST_PCMCIA_nCD (1 << 5) /* Card detection signal */ |
Definition at line 111 of file mainstone.h.
Definition at line 106 of file mainstone.h.
Definition at line 107 of file mainstone.h.
Definition at line 108 of file mainstone.h.
Definition at line 110 of file mainstone.h.
Definition at line 109 of file mainstone.h.
| #define MST_PCMCIA_PWR_MASK (0x000f) /* MAX1602 power-supply controls */ |
Definition at line 113 of file mainstone.h.
| #define MST_PCMCIA_PWR_VCC_0 0x0 /* voltage VCC = 0V */ |
Definition at line 118 of file mainstone.h.
| #define MST_PCMCIA_PWR_VCC_33 0x8 /* voltage VCC = 3.3V */ |
Definition at line 119 of file mainstone.h.
| #define MST_PCMCIA_PWR_VCC_50 0x4 /* voltage VCC = 5.0V */ |
Definition at line 120 of file mainstone.h.
| #define MST_PCMCIA_PWR_VPP_0 0x0 /* voltage VPP = 0V */ |
Definition at line 115 of file mainstone.h.
| #define MST_PCMCIA_PWR_VPP_120 0x2 /* voltage VPP = 12V*/ |
Definition at line 116 of file mainstone.h.
| #define MST_PCMCIA_PWR_VPP_VCC 0x1 /* voltage VPP = VCC */ |
Definition at line 117 of file mainstone.h.
| #define MST_PCMCIA_RESET (1 << 4) /* Card reset signal */ |
Definition at line 112 of file mainstone.h.
| #define MST_V2P | ( | x | ) | ((x) - MST_FPGA_VIRT + MST_FPGA_PHYS) |
Definition at line 23 of file mainstone.h.
1.8.2