13 #include <linux/types.h>
14 #include <linux/errno.h>
15 #include <linux/kernel.h>
17 #include <linux/sched.h>
19 #include <linux/stddef.h>
24 #include <asm/pgtable.h>
26 #include <asm/machdep.h>
29 #include <asm/sections.h>
33 #include <linux/adb.h>
34 #include <linux/pmu.h>
36 #define MB_FCR32(bay, r) ((bay)->base + ((r) >> 2))
37 #define MB_FCR8(bay, r) (((volatile u8 __iomem *)((bay)->base)) + (r))
39 #define MB_IN32(bay,r) (in_le32(MB_FCR32(bay,r)))
40 #define MB_OUT32(bay,r,v) (out_le32(MB_FCR32(bay,r), (v)))
41 #define MB_BIS(bay,r,v) (MB_OUT32((bay), (r), MB_IN32((bay), r) | (v)))
42 #define MB_BIC(bay,r,v) (MB_OUT32((bay), (r), MB_IN32((bay), r) & ~(v)))
43 #define MB_IN8(bay,r) (in_8(MB_FCR8(bay,r)))
44 #define MB_OUT8(bay,r,v) (out_8(MB_FCR8(bay,r), (v)))
77 static int media_bay_count = 0;
82 #define MB_POLL_DELAY 25
88 #define MB_STABLE_DELAY 100
93 #define MB_POWER_DELAY 200
99 #define MB_RESET_DELAY 50
106 #define MB_SETUP_DELAY 100
112 #define MB_IDE_WAIT 1000
127 #define MB_POWER_SOUND 0x08
128 #define MB_POWER_FLOPPY 0x04
129 #define MB_POWER_ATA 0x02
130 #define MB_POWER_PCI 0x01
131 #define MB_POWER_OFF 0x00
140 return (
MB_IN32(bay, OHARE_MBCR) >> 12) & 7;
146 return (
MB_IN32(bay, HEATHROW_MBCR) >> 12) & 7;
154 new_gpio =
MB_IN8(bay, KL_GPIO_MEDIABAY_IRQ) & KEYLARGO_GPIO_INPUT_DATA;
159 MB_BIS(bay, KEYLARGO_MBCR, KL_MBCR_MB0_ENABLE);
162 MB_BIC(bay, KEYLARGO_MBCR, 0x0000000F);
167 return (
MB_IN32(bay, KEYLARGO_MBCR) >> 4) & 7;
180 MB_BIC(bay, OHARE_FCR, OH_BAY_RESET_N);
181 MB_BIC(bay, OHARE_FCR, OH_BAY_POWER_N);
184 MB_BIC(bay, OHARE_FCR, OH_BAY_DEV_MASK);
185 MB_BIC(bay, OHARE_FCR, OH_FLOPPY_ENABLE);
187 MB_BIS(bay, OHARE_FCR, OH_BAY_POWER_N);
188 MB_BIS(bay, OHARE_FCR, OH_BAY_RESET_N);
189 MB_BIS(bay, OHARE_FCR, OH_IDE1_RESET_N);
191 MB_BIC(bay, OHARE_MBCR, 0x00000F00);
199 MB_BIC(bay, HEATHROW_FCR, HRW_BAY_RESET_N);
200 MB_BIC(bay, HEATHROW_FCR, HRW_BAY_POWER_N);
203 MB_BIC(bay, HEATHROW_FCR, HRW_BAY_DEV_MASK);
204 MB_BIC(bay, HEATHROW_FCR, HRW_SWIM_ENABLE);
206 MB_BIS(bay, HEATHROW_FCR, HRW_BAY_POWER_N);
207 MB_BIS(bay, HEATHROW_FCR, HRW_BAY_RESET_N);
208 MB_BIS(bay, HEATHROW_FCR, HRW_IDE1_RESET_N);
210 MB_BIC(bay, HEATHROW_MBCR, 0x00000F00);
218 MB_BIC(bay, KEYLARGO_MBCR, KL_MBCR_MB0_DEV_RESET);
219 MB_BIC(bay, KEYLARGO_MBCR, KL_MBCR_MB0_DEV_POWER);
222 MB_BIC(bay, KEYLARGO_MBCR, KL_MBCR_MB0_DEV_MASK);
223 MB_BIC(bay, KEYLARGO_FCR1, KL1_EIDE0_ENABLE);
225 MB_BIS(bay, KEYLARGO_MBCR, KL_MBCR_MB0_DEV_POWER);
226 MB_BIS(bay, KEYLARGO_MBCR, KL_MBCR_MB0_DEV_RESET);
227 MB_BIS(bay, KEYLARGO_FCR1, KL1_EIDE0_RESET_N);
229 MB_BIC(bay, KEYLARGO_MBCR, 0x0000000F);
243 MB_BIS(bay, OHARE_FCR, OH_BAY_FLOPPY_ENABLE);
244 MB_BIS(bay, OHARE_FCR, OH_FLOPPY_ENABLE);
247 MB_BIC(bay, OHARE_FCR, OH_IDE1_RESET_N);
248 MB_BIS(bay, OHARE_FCR, OH_BAY_IDE_ENABLE);
251 MB_BIS(bay, OHARE_FCR, OH_BAY_PCI_ENABLE);
263 MB_BIS(bay, HEATHROW_FCR, HRW_BAY_FLOPPY_ENABLE);
264 MB_BIS(bay, HEATHROW_FCR, HRW_SWIM_ENABLE);
267 MB_BIC(bay, HEATHROW_FCR, HRW_IDE1_RESET_N);
268 MB_BIS(bay, HEATHROW_FCR, HRW_BAY_IDE_ENABLE);
271 MB_BIS(bay, HEATHROW_FCR, HRW_BAY_PCI_ENABLE);
282 MB_BIS(bay, KEYLARGO_MBCR, KL_MBCR_MB0_IDE_ENABLE);
283 MB_BIC(bay, KEYLARGO_FCR1, KL1_EIDE0_RESET_N);
284 MB_BIS(bay, KEYLARGO_FCR1, KL1_EIDE0_ENABLE);
287 MB_BIS(bay, KEYLARGO_MBCR, KL_MBCR_MB0_PCI_ENABLE);
290 MB_BIS(bay, KEYLARGO_MBCR, KL_MBCR_MB0_SOUND_ENABLE);
303 MB_BIS(bay, OHARE_FCR, OH_BAY_RESET_N);
308 MB_BIS(bay, KEYLARGO_MBCR, KL_MBCR_MB0_ENABLE);
313 MB_BIS(bay, HEATHROW_FCR, HRW_BAY_RESET_N);
318 MB_BIS(bay, KEYLARGO_MBCR, KL_MBCR_MB0_DEV_RESET);
323 MB_BIS(bay, OHARE_FCR, OH_IDE1_RESET_N);
328 MB_BIS(bay, HEATHROW_FCR, HRW_IDE1_RESET_N);
333 MB_BIS(bay, KEYLARGO_FCR1, KL1_EIDE0_RESET_N);
340 bay->
ops->power(bay, 1);
345 bay->
ops->power(bay, 0);
354 int id = bay->
ops->content(bay);
356 static char *mb_content_types[] = {
359 "an unsupported audio device",
361 "an unsupported PCI device",
379 if ((
id != MB_NO) && (bay->
content_id != MB_NO)) {
384 set_mb_power(bay,
id != MB_NO);
386 if (
id >= MB_NO ||
id < 0)
390 bay->
index, mb_content_types[
id]);
407 bay = macio_get_drvdata(baydev);
425 bay = macio_get_drvdata(baydev);
439 bay = macio_get_drvdata(baydev);
449 static int mb_broadcast_hotplug(
struct device *
dev,
void *
data)
452 struct macio_dev *mdev;
453 struct macio_driver *drv;
462 mdev = to_macio_device(dev);
463 drv = to_macio_driver(dev->
driver);
464 if (dev->
driver && drv->mediabay_event)
465 drv->mediabay_event(mdev, state);
469 static void media_bay_step(
int i)
478 if (bay->
timer != 0) {
488 pr_debug(
"mediabay%d: device not supported (kind:%d)\n",
490 set_mb_power(bay, 0);
498 bay->
ops->un_reset(bay);
501 pr_debug(
"mediabay%d: releasing bay reset (kind:%d)\n",
506 pr_debug(
"mediabay%d: bay is up (kind:%d)\n", i,
510 bay, mb_broadcast_hotplug);
513 pr_debug(
"mediabay%d: releasing ATA reset (kind:%d)\n",
515 bay->
ops->un_reset_ide(bay);
524 bay, mb_broadcast_hotplug);
530 bay, mb_broadcast_hotplug);
531 pr_debug(
"mediabay%d: end of power down\n", i);
542 static int media_bay_task(
void *
x)
547 for (i = 0; i < media_bay_count; ++
i) {
567 ofnode = mdev->ofdev.dev.of_node;
569 if (macio_resource_count(mdev) < 1)
577 base = macio_resource_start(mdev, 0) & 0xffff0000
u;
579 if (regbase ==
NULL) {
584 i = media_bay_count++;
585 bay = &media_bays[
i];
600 set_mb_power(bay, 0);
608 macio_set_drvdata(mdev, bay);
618 static int media_bay_suspend(
struct macio_dev *mdev,
pm_message_t state)
622 if (state.
event != mdev->ofdev.dev.power.power_state.event
626 set_mb_power(bay, 0);
629 mdev->ofdev.dev.power.power_state =
state;
634 static int media_bay_resume(
struct macio_dev *mdev)
638 if (mdev->ofdev.dev.power.power_state.event !=
PM_EVENT_ON) {
639 mdev->ofdev.dev.power.power_state =
PMSG_ON;
647 set_mb_power(bay, 0);
650 printk(
"mediabay%d: Content changed during sleep...\n", bay->
index);
654 set_mb_power(bay, 1);
660 media_bay_step(bay->
index);
672 static const struct mb_ops ohare_mb_ops = {
674 .content = ohare_mb_content,
675 .power = ohare_mb_power,
676 .setup_bus = ohare_mb_setup_bus,
677 .un_reset = ohare_mb_un_reset,
678 .un_reset_ide = ohare_mb_un_reset_ide,
681 static const struct mb_ops heathrow_mb_ops = {
683 .content = heathrow_mb_content,
684 .power = heathrow_mb_power,
685 .setup_bus = heathrow_mb_setup_bus,
686 .un_reset = heathrow_mb_un_reset,
687 .un_reset_ide = heathrow_mb_un_reset_ide,
690 static const struct mb_ops keylargo_mb_ops = {
692 .init = keylargo_mb_init,
693 .content = keylargo_mb_content,
694 .power = keylargo_mb_power,
695 .setup_bus = keylargo_mb_setup_bus,
696 .un_reset = keylargo_mb_un_reset,
697 .un_reset_ide = keylargo_mb_un_reset_ide,
713 .compatible =
"keylargo-media-bay",
714 .data = &keylargo_mb_ops,
718 .compatible =
"heathrow-media-bay",
719 .data = &heathrow_mb_ops,
723 .compatible =
"ohare-media-bay",
724 .data = &ohare_mb_ops,
729 static struct macio_driver media_bay_driver =
733 .of_match_table = media_bay_match,
735 .probe = media_bay_attach,
736 .suspend = media_bay_suspend,
737 .resume = media_bay_resume
740 static int __init media_bay_init(
void)
746 media_bays[
i].content_id = -1;
748 if (!machine_is(powermac))