#include <linux/device.h>
#include <linux/fb.h>
#include <linux/io.h>
#include <linux/jiffies.h>
#include <linux/platform_device.h>
#include <linux/pm_runtime.h>
#include <linux/mmc/host.h>
Go to the source code of this file.
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| #define | tmio_ioread8(addr) readb(addr) |
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| #define | tmio_ioread16(addr) readw(addr) |
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| #define | tmio_ioread16_rep(r, b, l) readsw(r, b, l) |
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| #define | tmio_ioread32(addr) (((u32) readw((addr))) | (((u32) readw((addr) + 2)) << 16)) |
| |
| #define | tmio_iowrite8(val, addr) writeb((val), (addr)) |
| |
| #define | tmio_iowrite16(val, addr) writew((val), (addr)) |
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| #define | tmio_iowrite16_rep(r, b, l) writesw(r, b, l) |
| |
| #define | tmio_iowrite32(val, addr) |
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| #define | CNF_CMD 0x04 |
| |
| #define | CNF_CTL_BASE 0x10 |
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| #define | CNF_INT_PIN 0x3d |
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| #define | CNF_STOP_CLK_CTL 0x40 |
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| #define | CNF_GCLK_CTL 0x41 |
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| #define | CNF_SD_CLK_MODE 0x42 |
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| #define | CNF_PIN_STATUS 0x44 |
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| #define | CNF_PWR_CTL_1 0x48 |
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| #define | CNF_PWR_CTL_2 0x49 |
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| #define | CNF_PWR_CTL_3 0x4a |
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| #define | CNF_CARD_DETECT_MODE 0x4c |
| |
| #define | CNF_SD_SLOT 0x50 |
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| #define | CNF_EXT_GCLK_CTL_1 0xf0 |
| |
| #define | CNF_EXT_GCLK_CTL_2 0xf1 |
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| #define | CNF_EXT_GCLK_CTL_3 0xf9 |
| |
| #define | CNF_SD_LED_EN_1 0xfa |
| |
| #define | CNF_SD_LED_EN_2 0xfe |
| |
| #define | SDCREN 0x2 /* Enable access to MMC CTL regs. (flag in COMMAND_REG)*/ |
| |
| #define | sd_config_write8(base, shift, reg, val) tmio_iowrite8((val), (base) + ((reg) << (shift))) |
| |
| #define | sd_config_write16(base, shift, reg, val) tmio_iowrite16((val), (base) + ((reg) << (shift))) |
| |
| #define | sd_config_write32(base, shift, reg, val) |
| |
| #define | TMIO_MMC_WRPROTECT_DISABLE (1 << 0) |
| |
| #define | TMIO_MMC_BLKSZ_2BYTES (1 << 1) |
| |
| #define | TMIO_MMC_SDIO_IRQ (1 << 2) |
| |
| #define | TMIO_MMC_HAS_COLD_CD (1 << 3) |
| |
| #define | TMIO_MMC_HAS_IDLE_WAIT (1 << 4) |
| |
| #define | TMIO_MMC_USE_GPIO_CD (1 << 5) |
| |
| #define | FBIO_TMIO_ACC_WRITE 0x7C639300 |
| |
| #define | FBIO_TMIO_ACC_SYNC 0x7C639301 |
| |
| #define CNF_CARD_DETECT_MODE 0x4c |
| #define CNF_CTL_BASE 0x10 |
| #define CNF_EXT_GCLK_CTL_1 0xf0 |
| #define CNF_EXT_GCLK_CTL_2 0xf1 |
| #define CNF_EXT_GCLK_CTL_3 0xf9 |
| #define CNF_GCLK_CTL 0x41 |
| #define CNF_PIN_STATUS 0x44 |
| #define CNF_PWR_CTL_1 0x48 |
| #define CNF_PWR_CTL_2 0x49 |
| #define CNF_PWR_CTL_3 0x4a |
| #define CNF_SD_CLK_MODE 0x42 |
| #define CNF_SD_LED_EN_1 0xfa |
| #define CNF_SD_LED_EN_2 0xfe |
| #define CNF_STOP_CLK_CTL 0x40 |
| #define FBIO_TMIO_ACC_SYNC 0x7C639301 |
| #define FBIO_TMIO_ACC_WRITE 0x7C639300 |
| #define sd_config_write32 |
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base, |
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shift, |
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reg, |
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val |
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) |
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Value:do { \
tmio_iowrite16((
val), (base) + ((
reg) << (shift))); \
tmio_iowrite16((
val) >> 16, (base) + ((
reg + 2) << (shift))); \
} while (0)
Definition at line 50 of file tmio.h.
| #define SDCREN 0x2 /* Enable access to MMC CTL regs. (flag in COMMAND_REG)*/ |
| #define tmio_iowrite32 |
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val, |
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addr |
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) |
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Value:
Definition at line 20 of file tmio.h.
| #define TMIO_MMC_BLKSZ_2BYTES (1 << 1) |
| #define TMIO_MMC_HAS_COLD_CD (1 << 3) |
| #define TMIO_MMC_HAS_IDLE_WAIT (1 << 4) |
| #define TMIO_MMC_SDIO_IRQ (1 << 2) |
| #define TMIO_MMC_USE_GPIO_CD (1 << 5) |
| #define TMIO_MMC_WRPROTECT_DISABLE (1 << 0) |
1.8.2