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mthca_dev.h
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1 /*
2  * Copyright (c) 2004, 2005 Topspin Communications. All rights reserved.
3  * Copyright (c) 2005 Sun Microsystems, Inc. All rights reserved.
4  * Copyright (c) 2005, 2006 Cisco Systems. All rights reserved.
5  * Copyright (c) 2005 Mellanox Technologies. All rights reserved.
6  * Copyright (c) 2004 Voltaire, Inc. All rights reserved.
7  *
8  * This software is available to you under a choice of one of two
9  * licenses. You may choose to be licensed under the terms of the GNU
10  * General Public License (GPL) Version 2, available from the file
11  * COPYING in the main directory of this source tree, or the
12  * OpenIB.org BSD license below:
13  *
14  * Redistribution and use in source and binary forms, with or
15  * without modification, are permitted provided that the following
16  * conditions are met:
17  *
18  * - Redistributions of source code must retain the above
19  * copyright notice, this list of conditions and the following
20  * disclaimer.
21  *
22  * - Redistributions in binary form must reproduce the above
23  * copyright notice, this list of conditions and the following
24  * disclaimer in the documentation and/or other materials
25  * provided with the distribution.
26  *
27  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
28  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
29  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
30  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
31  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
32  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
33  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
34  * SOFTWARE.
35  */
36 
37 #ifndef MTHCA_DEV_H
38 #define MTHCA_DEV_H
39 
40 #include <linux/spinlock.h>
41 #include <linux/kernel.h>
42 #include <linux/pci.h>
43 #include <linux/dma-mapping.h>
44 #include <linux/timer.h>
45 #include <linux/mutex.h>
46 #include <linux/list.h>
47 #include <linux/semaphore.h>
48 
49 #include "mthca_provider.h"
50 #include "mthca_doorbell.h"
51 
52 #define DRV_NAME "ib_mthca"
53 #define PFX DRV_NAME ": "
54 #define DRV_VERSION "1.0"
55 #define DRV_RELDATE "April 4, 2008"
56 
57 enum {
58  MTHCA_FLAG_DDR_HIDDEN = 1 << 1,
59  MTHCA_FLAG_SRQ = 1 << 2,
60  MTHCA_FLAG_MSI_X = 1 << 3,
61  MTHCA_FLAG_NO_LAM = 1 << 4,
62  MTHCA_FLAG_FMR = 1 << 5,
63  MTHCA_FLAG_MEMFREE = 1 << 6,
64  MTHCA_FLAG_PCIE = 1 << 7,
65  MTHCA_FLAG_SINAI_OPT = 1 << 8
66 };
67 
68 enum {
69  MTHCA_MAX_PORTS = 2
70 };
71 
72 enum {
73  MTHCA_BOARD_ID_LEN = 64
74 };
75 
76 enum {
77  MTHCA_EQ_CONTEXT_SIZE = 0x40,
78  MTHCA_CQ_CONTEXT_SIZE = 0x40,
79  MTHCA_QP_CONTEXT_SIZE = 0x200,
80  MTHCA_RDB_ENTRY_SIZE = 0x20,
81  MTHCA_AV_SIZE = 0x20,
82  MTHCA_MGM_ENTRY_SIZE = 0x100,
83 
84  /* Arbel FW gives us these, but we need them for Tavor */
85  MTHCA_MPT_ENTRY_SIZE = 0x40,
86  MTHCA_MTT_SEG_SIZE = 0x40,
87 
88  MTHCA_QP_PER_MGM = 4 * (MTHCA_MGM_ENTRY_SIZE / 16 - 2)
89 };
90 
91 enum {
92  MTHCA_EQ_CMD,
93  MTHCA_EQ_ASYNC,
94  MTHCA_EQ_COMP,
95  MTHCA_NUM_EQ
96 };
97 
98 enum {
99  MTHCA_OPCODE_NOP = 0x00,
100  MTHCA_OPCODE_RDMA_WRITE = 0x08,
101  MTHCA_OPCODE_RDMA_WRITE_IMM = 0x09,
102  MTHCA_OPCODE_SEND = 0x0a,
103  MTHCA_OPCODE_SEND_IMM = 0x0b,
104  MTHCA_OPCODE_RDMA_READ = 0x10,
105  MTHCA_OPCODE_ATOMIC_CS = 0x11,
106  MTHCA_OPCODE_ATOMIC_FA = 0x12,
107  MTHCA_OPCODE_BIND_MW = 0x18,
108  MTHCA_OPCODE_INVALID = 0xff
109 };
110 
111 enum {
112  MTHCA_CMD_USE_EVENTS = 1 << 0,
113  MTHCA_CMD_POST_DOORBELLS = 1 << 1
114 };
115 
116 enum {
117  MTHCA_CMD_NUM_DBELL_DWORDS = 8
118 };
119 
120 struct mthca_cmd {
121  struct pci_pool *pool;
122  struct mutex hcr_mutex;
123  struct semaphore poll_sem;
124  struct semaphore event_sem;
125  int max_cmds;
126  spinlock_t context_lock;
127  int free_head;
128  struct mthca_cmd_context *context;
129  u16 token_mask;
130  u32 flags;
131  void __iomem *dbell_map;
132  u16 dbell_offsets[MTHCA_CMD_NUM_DBELL_DWORDS];
133 };
134 
135 struct mthca_limits {
136  int num_ports;
137  int vl_cap;
138  int mtu_cap;
139  int gid_table_len;
140  int pkey_table_len;
141  int local_ca_ack_delay;
142  int num_uars;
143  int max_sg;
144  int num_qps;
145  int max_wqes;
146  int max_desc_sz;
147  int max_qp_init_rdma;
148  int reserved_qps;
149  int num_srqs;
150  int max_srq_wqes;
151  int max_srq_sge;
152  int reserved_srqs;
153  int num_eecs;
154  int reserved_eecs;
155  int num_cqs;
156  int max_cqes;
157  int reserved_cqs;
158  int num_eqs;
159  int reserved_eqs;
160  int num_mpts;
161  int num_mtt_segs;
162  int mtt_seg_size;
163  int fmr_reserved_mtts;
164  int reserved_mtts;
165  int reserved_mrws;
166  int reserved_uars;
167  int num_mgms;
168  int num_amgms;
169  int reserved_mcgs;
170  int num_pds;
171  int reserved_pds;
172  u32 page_size_cap;
173  u32 flags;
174  u16 stat_rate_support;
175  u8 port_width_cap;
176 };
177 
178 struct mthca_alloc {
179  u32 last;
180  u32 top;
181  u32 max;
182  u32 mask;
183  spinlock_t lock;
184  unsigned long *table;
185 };
186 
187 struct mthca_array {
188  struct {
189  void **page;
190  int used;
191  } *page_list;
192 };
193 
194 struct mthca_uar_table {
195  struct mthca_alloc alloc;
196  u64 uarc_base;
197  int uarc_size;
198 };
199 
200 struct mthca_pd_table {
201  struct mthca_alloc alloc;
202 };
203 
204 struct mthca_buddy {
205  unsigned long **bits;
206  int *num_free;
207  int max_order;
208  spinlock_t lock;
209 };
210 
211 struct mthca_mr_table {
212  struct mthca_alloc mpt_alloc;
213  struct mthca_buddy mtt_buddy;
214  struct mthca_buddy *fmr_mtt_buddy;
215  u64 mtt_base;
216  u64 mpt_base;
217  struct mthca_icm_table *mtt_table;
218  struct mthca_icm_table *mpt_table;
219  struct {
220  void __iomem *mpt_base;
221  void __iomem *mtt_base;
222  struct mthca_buddy mtt_buddy;
223  } tavor_fmr;
224 };
225 
226 struct mthca_eq_table {
227  struct mthca_alloc alloc;
228  void __iomem *clr_int;
229  u32 clr_mask;
230  u32 arm_mask;
231  struct mthca_eq eq[MTHCA_NUM_EQ];
232  u64 icm_virt;
233  struct page *icm_page;
234  dma_addr_t icm_dma;
235  int have_irq;
236  u8 inta_pin;
237 };
238 
239 struct mthca_cq_table {
240  struct mthca_alloc alloc;
241  spinlock_t lock;
242  struct mthca_array cq;
243  struct mthca_icm_table *table;
244 };
245 
246 struct mthca_srq_table {
247  struct mthca_alloc alloc;
248  spinlock_t lock;
249  struct mthca_array srq;
250  struct mthca_icm_table *table;
251 };
252 
253 struct mthca_qp_table {
254  struct mthca_alloc alloc;
255  u32 rdb_base;
256  int rdb_shift;
257  int sqp_start;
258  spinlock_t lock;
259  struct mthca_array qp;
260  struct mthca_icm_table *qp_table;
261  struct mthca_icm_table *eqp_table;
262  struct mthca_icm_table *rdb_table;
263 };
264 
265 struct mthca_av_table {
266  struct pci_pool *pool;
267  int num_ddr_avs;
268  u64 ddr_av_base;
269  void __iomem *av_map;
270  struct mthca_alloc alloc;
271 };
272 
273 struct mthca_mcg_table {
274  struct mutex mutex;
275  struct mthca_alloc alloc;
276  struct mthca_icm_table *table;
277 };
278 
279 struct mthca_catas_err {
280  u64 addr;
281  u32 __iomem *map;
282  u32 size;
283  struct timer_list timer;
284  struct list_head list;
285 };
286 
287 extern struct mutex mthca_device_mutex;
288 
289 struct mthca_dev {
290  struct ib_device ib_dev;
291  struct pci_dev *pdev;
292 
293  int hca_type;
294  unsigned long mthca_flags;
295  unsigned long device_cap_flags;
296 
297  u32 rev_id;
298  char board_id[MTHCA_BOARD_ID_LEN];
299 
300  /* firmware info */
301  u64 fw_ver;
302  union {
303  struct {
304  u64 fw_start;
305  u64 fw_end;
306  } tavor;
307  struct {
308  u64 clr_int_base;
309  u64 eq_arm_base;
310  u64 eq_set_ci_base;
311  struct mthca_icm *fw_icm;
312  struct mthca_icm *aux_icm;
313  u16 fw_pages;
314  } arbel;
315  } fw;
316 
317  u64 ddr_start;
318  u64 ddr_end;
319 
320  MTHCA_DECLARE_DOORBELL_LOCK(doorbell_lock)
321  struct mutex cap_mask_mutex;
322 
323  void __iomem *hcr;
324  void __iomem *kar;
325  void __iomem *clr_base;
326  union {
327  struct {
328  void __iomem *ecr_base;
329  } tavor;
330  struct {
331  void __iomem *eq_arm;
332  void __iomem *eq_set_ci_base;
333  } arbel;
334  } eq_regs;
335 
336  struct mthca_cmd cmd;
337  struct mthca_limits limits;
338 
339  struct mthca_uar_table uar_table;
340  struct mthca_pd_table pd_table;
341  struct mthca_mr_table mr_table;
342  struct mthca_eq_table eq_table;
343  struct mthca_cq_table cq_table;
344  struct mthca_srq_table srq_table;
345  struct mthca_qp_table qp_table;
346  struct mthca_av_table av_table;
347  struct mthca_mcg_table mcg_table;
348 
349  struct mthca_catas_err catas_err;
350 
351  struct mthca_uar driver_uar;
352  struct mthca_db_table *db_tab;
353  struct mthca_pd driver_pd;
354  struct mthca_mr driver_mr;
355 
356  struct ib_mad_agent *send_agent[MTHCA_MAX_PORTS][2];
357  struct ib_ah *sm_ah[MTHCA_MAX_PORTS];
358  spinlock_t sm_lock;
359  u8 rate[MTHCA_MAX_PORTS];
360  bool active;
361 };
362 
363 #ifdef CONFIG_INFINIBAND_MTHCA_DEBUG
364 extern int mthca_debug_level;
365 
366 #define mthca_dbg(mdev, format, arg...) \
367  do { \
368  if (mthca_debug_level) \
369  dev_printk(KERN_DEBUG, &mdev->pdev->dev, format, ## arg); \
370  } while (0)
371 
372 #else /* CONFIG_INFINIBAND_MTHCA_DEBUG */
373 
374 #define mthca_dbg(mdev, format, arg...) do { (void) mdev; } while (0)
375 
376 #endif /* CONFIG_INFINIBAND_MTHCA_DEBUG */
377 
378 #define mthca_err(mdev, format, arg...) \
379  dev_err(&mdev->pdev->dev, format, ## arg)
380 #define mthca_info(mdev, format, arg...) \
381  dev_info(&mdev->pdev->dev, format, ## arg)
382 #define mthca_warn(mdev, format, arg...) \
383  dev_warn(&mdev->pdev->dev, format, ## arg)
384 
385 extern void __buggy_use_of_MTHCA_GET(void);
386 extern void __buggy_use_of_MTHCA_PUT(void);
387 
388 #define MTHCA_GET(dest, source, offset) \
389  do { \
390  void *__p = (char *) (source) + (offset); \
391  switch (sizeof (dest)) { \
392  case 1: (dest) = *(u8 *) __p; break; \
393  case 2: (dest) = be16_to_cpup(__p); break; \
394  case 4: (dest) = be32_to_cpup(__p); break; \
395  case 8: (dest) = be64_to_cpup(__p); break; \
396  default: __buggy_use_of_MTHCA_GET(); \
397  } \
398  } while (0)
399 
400 #define MTHCA_PUT(dest, source, offset) \
401  do { \
402  void *__d = ((char *) (dest) + (offset)); \
403  switch (sizeof(source)) { \
404  case 1: *(u8 *) __d = (source); break; \
405  case 2: *(__be16 *) __d = cpu_to_be16(source); break; \
406  case 4: *(__be32 *) __d = cpu_to_be32(source); break; \
407  case 8: *(__be64 *) __d = cpu_to_be64(source); break; \
408  default: __buggy_use_of_MTHCA_PUT(); \
409  } \
410  } while (0)
411 
412 int mthca_reset(struct mthca_dev *mdev);
413 
414 u32 mthca_alloc(struct mthca_alloc *alloc);
415 void mthca_free(struct mthca_alloc *alloc, u32 obj);
416 int mthca_alloc_init(struct mthca_alloc *alloc, u32 num, u32 mask,
417  u32 reserved);
418 void mthca_alloc_cleanup(struct mthca_alloc *alloc);
419 void *mthca_array_get(struct mthca_array *array, int index);
420 int mthca_array_set(struct mthca_array *array, int index, void *value);
421 void mthca_array_clear(struct mthca_array *array, int index);
422 int mthca_array_init(struct mthca_array *array, int nent);
423 void mthca_array_cleanup(struct mthca_array *array, int nent);
424 int mthca_buf_alloc(struct mthca_dev *dev, int size, int max_direct,
425  union mthca_buf *buf, int *is_direct, struct mthca_pd *pd,
426  int hca_write, struct mthca_mr *mr);
427 void mthca_buf_free(struct mthca_dev *dev, int size, union mthca_buf *buf,
428  int is_direct, struct mthca_mr *mr);
429 
430 int mthca_init_uar_table(struct mthca_dev *dev);
431 int mthca_init_pd_table(struct mthca_dev *dev);
432 int mthca_init_mr_table(struct mthca_dev *dev);
433 int mthca_init_eq_table(struct mthca_dev *dev);
434 int mthca_init_cq_table(struct mthca_dev *dev);
435 int mthca_init_srq_table(struct mthca_dev *dev);
436 int mthca_init_qp_table(struct mthca_dev *dev);
437 int mthca_init_av_table(struct mthca_dev *dev);
438 int mthca_init_mcg_table(struct mthca_dev *dev);
439 
440 void mthca_cleanup_uar_table(struct mthca_dev *dev);
441 void mthca_cleanup_pd_table(struct mthca_dev *dev);
442 void mthca_cleanup_mr_table(struct mthca_dev *dev);
443 void mthca_cleanup_eq_table(struct mthca_dev *dev);
444 void mthca_cleanup_cq_table(struct mthca_dev *dev);
445 void mthca_cleanup_srq_table(struct mthca_dev *dev);
446 void mthca_cleanup_qp_table(struct mthca_dev *dev);
447 void mthca_cleanup_av_table(struct mthca_dev *dev);
448 void mthca_cleanup_mcg_table(struct mthca_dev *dev);
449 
450 int mthca_register_device(struct mthca_dev *dev);
451 void mthca_unregister_device(struct mthca_dev *dev);
452 
453 void mthca_start_catas_poll(struct mthca_dev *dev);
454 void mthca_stop_catas_poll(struct mthca_dev *dev);
455 int __mthca_restart_one(struct pci_dev *pdev);
456 int mthca_catas_init(void);
457 void mthca_catas_cleanup(void);
458 
459 int mthca_uar_alloc(struct mthca_dev *dev, struct mthca_uar *uar);
460 void mthca_uar_free(struct mthca_dev *dev, struct mthca_uar *uar);
461 
462 int mthca_pd_alloc(struct mthca_dev *dev, int privileged, struct mthca_pd *pd);
463 void mthca_pd_free(struct mthca_dev *dev, struct mthca_pd *pd);
464 
465 int mthca_write_mtt_size(struct mthca_dev *dev);
466 
467 struct mthca_mtt *mthca_alloc_mtt(struct mthca_dev *dev, int size);
468 void mthca_free_mtt(struct mthca_dev *dev, struct mthca_mtt *mtt);
469 int mthca_write_mtt(struct mthca_dev *dev, struct mthca_mtt *mtt,
470  int start_index, u64 *buffer_list, int list_len);
471 int mthca_mr_alloc(struct mthca_dev *dev, u32 pd, int buffer_size_shift,
472  u64 iova, u64 total_size, u32 access, struct mthca_mr *mr);
473 int mthca_mr_alloc_notrans(struct mthca_dev *dev, u32 pd,
474  u32 access, struct mthca_mr *mr);
475 int mthca_mr_alloc_phys(struct mthca_dev *dev, u32 pd,
476  u64 *buffer_list, int buffer_size_shift,
477  int list_len, u64 iova, u64 total_size,
478  u32 access, struct mthca_mr *mr);
479 void mthca_free_mr(struct mthca_dev *dev, struct mthca_mr *mr);
480 
481 int mthca_fmr_alloc(struct mthca_dev *dev, u32 pd,
482  u32 access, struct mthca_fmr *fmr);
483 int mthca_tavor_map_phys_fmr(struct ib_fmr *ibfmr, u64 *page_list,
484  int list_len, u64 iova);
485 void mthca_tavor_fmr_unmap(struct mthca_dev *dev, struct mthca_fmr *fmr);
486 int mthca_arbel_map_phys_fmr(struct ib_fmr *ibfmr, u64 *page_list,
487  int list_len, u64 iova);
488 void mthca_arbel_fmr_unmap(struct mthca_dev *dev, struct mthca_fmr *fmr);
489 int mthca_free_fmr(struct mthca_dev *dev, struct mthca_fmr *fmr);
490 
491 int mthca_map_eq_icm(struct mthca_dev *dev, u64 icm_virt);
492 void mthca_unmap_eq_icm(struct mthca_dev *dev);
493 
494 int mthca_poll_cq(struct ib_cq *ibcq, int num_entries,
495  struct ib_wc *entry);
496 int mthca_tavor_arm_cq(struct ib_cq *cq, enum ib_cq_notify_flags flags);
497 int mthca_arbel_arm_cq(struct ib_cq *cq, enum ib_cq_notify_flags flags);
498 int mthca_init_cq(struct mthca_dev *dev, int nent,
499  struct mthca_ucontext *ctx, u32 pdn,
500  struct mthca_cq *cq);
501 void mthca_free_cq(struct mthca_dev *dev,
502  struct mthca_cq *cq);
503 void mthca_cq_completion(struct mthca_dev *dev, u32 cqn);
504 void mthca_cq_event(struct mthca_dev *dev, u32 cqn,
505  enum ib_event_type event_type);
506 void mthca_cq_clean(struct mthca_dev *dev, struct mthca_cq *cq, u32 qpn,
507  struct mthca_srq *srq);
508 void mthca_cq_resize_copy_cqes(struct mthca_cq *cq);
509 int mthca_alloc_cq_buf(struct mthca_dev *dev, struct mthca_cq_buf *buf, int nent);
510 void mthca_free_cq_buf(struct mthca_dev *dev, struct mthca_cq_buf *buf, int cqe);
511 
512 int mthca_alloc_srq(struct mthca_dev *dev, struct mthca_pd *pd,
513  struct ib_srq_attr *attr, struct mthca_srq *srq);
514 void mthca_free_srq(struct mthca_dev *dev, struct mthca_srq *srq);
515 int mthca_modify_srq(struct ib_srq *ibsrq, struct ib_srq_attr *attr,
516  enum ib_srq_attr_mask attr_mask, struct ib_udata *udata);
517 int mthca_query_srq(struct ib_srq *srq, struct ib_srq_attr *srq_attr);
518 int mthca_max_srq_sge(struct mthca_dev *dev);
519 void mthca_srq_event(struct mthca_dev *dev, u32 srqn,
520  enum ib_event_type event_type);
521 void mthca_free_srq_wqe(struct mthca_srq *srq, u32 wqe_addr);
522 int mthca_tavor_post_srq_recv(struct ib_srq *srq, struct ib_recv_wr *wr,
523  struct ib_recv_wr **bad_wr);
524 int mthca_arbel_post_srq_recv(struct ib_srq *srq, struct ib_recv_wr *wr,
525  struct ib_recv_wr **bad_wr);
526 
527 void mthca_qp_event(struct mthca_dev *dev, u32 qpn,
528  enum ib_event_type event_type);
529 int mthca_query_qp(struct ib_qp *ibqp, struct ib_qp_attr *qp_attr, int qp_attr_mask,
530  struct ib_qp_init_attr *qp_init_attr);
531 int mthca_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr, int attr_mask,
532  struct ib_udata *udata);
533 int mthca_tavor_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr,
534  struct ib_send_wr **bad_wr);
535 int mthca_tavor_post_receive(struct ib_qp *ibqp, struct ib_recv_wr *wr,
536  struct ib_recv_wr **bad_wr);
537 int mthca_arbel_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr,
538  struct ib_send_wr **bad_wr);
539 int mthca_arbel_post_receive(struct ib_qp *ibqp, struct ib_recv_wr *wr,
540  struct ib_recv_wr **bad_wr);
541 void mthca_free_err_wqe(struct mthca_dev *dev, struct mthca_qp *qp, int is_send,
542  int index, int *dbd, __be32 *new_wqe);
543 int mthca_alloc_qp(struct mthca_dev *dev,
544  struct mthca_pd *pd,
545  struct mthca_cq *send_cq,
546  struct mthca_cq *recv_cq,
547  enum ib_qp_type type,
548  enum ib_sig_type send_policy,
549  struct ib_qp_cap *cap,
550  struct mthca_qp *qp);
551 int mthca_alloc_sqp(struct mthca_dev *dev,
552  struct mthca_pd *pd,
553  struct mthca_cq *send_cq,
554  struct mthca_cq *recv_cq,
555  enum ib_sig_type send_policy,
556  struct ib_qp_cap *cap,
557  int qpn,
558  int port,
559  struct mthca_sqp *sqp);
560 void mthca_free_qp(struct mthca_dev *dev, struct mthca_qp *qp);
561 int mthca_create_ah(struct mthca_dev *dev,
562  struct mthca_pd *pd,
563  struct ib_ah_attr *ah_attr,
564  struct mthca_ah *ah);
565 int mthca_destroy_ah(struct mthca_dev *dev, struct mthca_ah *ah);
566 int mthca_read_ah(struct mthca_dev *dev, struct mthca_ah *ah,
567  struct ib_ud_header *header);
568 int mthca_ah_query(struct ib_ah *ibah, struct ib_ah_attr *attr);
569 int mthca_ah_grh_present(struct mthca_ah *ah);
570 u8 mthca_get_rate(struct mthca_dev *dev, int static_rate, u8 port);
571 enum ib_rate mthca_rate_to_ib(struct mthca_dev *dev, u8 mthca_rate, u8 port);
572 
573 int mthca_multicast_attach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid);
574 int mthca_multicast_detach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid);
575 
576 int mthca_process_mad(struct ib_device *ibdev,
577  int mad_flags,
578  u8 port_num,
579  struct ib_wc *in_wc,
580  struct ib_grh *in_grh,
581  struct ib_mad *in_mad,
582  struct ib_mad *out_mad);
583 int mthca_create_agents(struct mthca_dev *dev);
584 void mthca_free_agents(struct mthca_dev *dev);
585 
586 static inline struct mthca_dev *to_mdev(struct ib_device *ibdev)
587 {
588  return container_of(ibdev, struct mthca_dev, ib_dev);
589 }
590 
591 static inline int mthca_is_memfree(struct mthca_dev *dev)
592 {
593  return dev->mthca_flags & MTHCA_FLAG_MEMFREE;
594 }
595 
596 #endif /* MTHCA_DEV_H */
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