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omap_hwmod_2xxx_ipblock_data.c File Reference
#include <plat/omap_hwmod.h>
#include <plat/serial.h>
#include <linux/platform_data/gpio-omap.h>
#include <plat/dma.h>
#include <plat/dmtimer.h>
#include <linux/platform_data/spi-omap2-mcspi.h>
#include "omap_hwmod_common_data.h"
#include "cm-regbits-24xx.h"
#include "prm-regbits-24xx.h"
#include "wd_timer.h"

Go to the source code of this file.

Variables

struct omap_hwmod_irq_info omap2xxx_timer12_mpu_irqs []
 
struct omap_hwmod_dma_info omap2xxx_dss_sdma_chs []
 
struct omap_hwmod_class omap2_dispc_hwmod_class
 
struct omap_hwmod_class omap2xxx_timer_hwmod_class
 
struct omap_hwmod_class omap2xxx_wd_timer_hwmod_class
 
struct omap_hwmod_class omap2xxx_gpio_hwmod_class
 
struct omap_hwmod_class omap2xxx_dma_hwmod_class
 
struct omap_hwmod_class omap2xxx_mailbox_hwmod_class
 
struct omap_hwmod_class omap2xxx_mcspi_class
 
struct omap_hwmod omap2xxx_l3_main_hwmod
 
struct omap_hwmod omap2xxx_l4_core_hwmod
 
struct omap_hwmod omap2xxx_l4_wkup_hwmod
 
struct omap_hwmod omap2xxx_mpu_hwmod
 
struct omap_hwmod omap2xxx_iva_hwmod
 
struct omap_hwmod omap2xxx_timer1_hwmod
 
struct omap_hwmod omap2xxx_timer2_hwmod
 
struct omap_hwmod omap2xxx_timer3_hwmod
 
struct omap_hwmod omap2xxx_timer4_hwmod
 
struct omap_hwmod omap2xxx_timer5_hwmod
 
struct omap_hwmod omap2xxx_timer6_hwmod
 
struct omap_hwmod omap2xxx_timer7_hwmod
 
struct omap_hwmod omap2xxx_timer8_hwmod
 
struct omap_hwmod omap2xxx_timer9_hwmod
 
struct omap_hwmod omap2xxx_timer10_hwmod
 
struct omap_hwmod omap2xxx_timer11_hwmod
 
struct omap_hwmod omap2xxx_timer12_hwmod
 
struct omap_hwmod omap2xxx_wd_timer2_hwmod
 
struct omap_hwmod omap2xxx_uart1_hwmod
 
struct omap_hwmod omap2xxx_uart2_hwmod
 
struct omap_hwmod omap2xxx_uart3_hwmod
 
struct omap_hwmod omap2xxx_dss_core_hwmod
 
struct omap_hwmod omap2xxx_dss_dispc_hwmod
 
struct omap_hwmod omap2xxx_dss_rfbi_hwmod
 
struct omap_hwmod omap2xxx_dss_venc_hwmod
 
struct omap_gpio_dev_attr omap2xxx_gpio_dev_attr
 
struct omap_hwmod omap2xxx_gpio1_hwmod
 
struct omap_hwmod omap2xxx_gpio2_hwmod
 
struct omap_hwmod omap2xxx_gpio3_hwmod
 
struct omap_hwmod omap2xxx_gpio4_hwmod
 
struct omap_hwmod omap2xxx_mcspi1_hwmod
 
struct omap_hwmod omap2xxx_mcspi2_hwmod
 
struct omap_hwmod omap2xxx_counter_32k_hwmod
 
struct omap_hwmod omap2xxx_gpmc_hwmod
 
struct omap_hwmod omap2xxx_rng_hwmod
 

Variable Documentation

struct omap_hwmod_class omap2_dispc_hwmod_class
Initial value:
= {
.name = "dispc",
.sysc = &omap2_dispc_sysc,
}

Definition at line 49 of file omap_hwmod_2xxx_ipblock_data.c.

struct omap_hwmod omap2xxx_counter_32k_hwmod
Initial value:
= {
.name = "counter_32k",
.main_clk = "func_32k_ck",
.prcm = {
.omap2 = {
.module_offs = WKUP_MOD,
.prcm_reg_id = 1,
.module_bit = OMAP24XX_ST_32KSYNC_SHIFT,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP24XX_ST_32KSYNC_SHIFT,
},
},
.class = &omap2xxx_counter_hwmod_class,
}

Definition at line 766 of file omap_hwmod_2xxx_ipblock_data.c.

struct omap_hwmod_class omap2xxx_dma_hwmod_class
Initial value:
= {
.name = "dma",
.sysc = &omap2xxx_dma_sysc,
}

Definition at line 126 of file omap_hwmod_2xxx_ipblock_data.c.

struct omap_hwmod omap2xxx_dss_core_hwmod
Initial value:
= {
.name = "dss_core",
.class = &omap2_dss_hwmod_class,
.main_clk = "dss1_fck",
.sdma_reqs = omap2xxx_dss_sdma_chs,
.prcm = {
.omap2 = {
.prcm_reg_id = 1,
.module_bit = OMAP24XX_EN_DSS1_SHIFT,
.module_offs = CORE_MOD,
.idlest_reg_id = 1,
.idlest_stdby_bit = OMAP24XX_ST_DSS_SHIFT,
},
},
.opt_clks = dss_opt_clks,
.opt_clks_cnt = ARRAY_SIZE(dss_opt_clks),
.flags = HWMOD_NO_IDLEST | HWMOD_CONTROL_OPT_CLKS_IN_RESET,
}

Definition at line 563 of file omap_hwmod_2xxx_ipblock_data.c.

struct omap_hwmod omap2xxx_dss_dispc_hwmod
Initial value:
= {
.name = "dss_dispc",
.class = &omap2_dispc_hwmod_class,
.mpu_irqs = omap2_dispc_irqs,
.main_clk = "dss1_fck",
.prcm = {
.omap2 = {
.prcm_reg_id = 1,
.module_bit = OMAP24XX_EN_DSS1_SHIFT,
.module_offs = CORE_MOD,
.idlest_reg_id = 1,
.idlest_stdby_bit = OMAP24XX_ST_DSS_SHIFT,
},
},
.flags = HWMOD_NO_IDLEST,
.dev_attr = &omap2_3_dss_dispc_dev_attr
}

Definition at line 582 of file omap_hwmod_2xxx_ipblock_data.c.

struct omap_hwmod omap2xxx_dss_rfbi_hwmod
Initial value:
= {
.name = "dss_rfbi",
.class = &omap2_rfbi_hwmod_class,
.main_clk = "dss1_fck",
.prcm = {
.omap2 = {
.prcm_reg_id = 1,
.module_bit = OMAP24XX_EN_DSS1_SHIFT,
.module_offs = CORE_MOD,
},
},
.opt_clks = dss_rfbi_opt_clks,
.opt_clks_cnt = ARRAY_SIZE(dss_rfbi_opt_clks),
.flags = HWMOD_NO_IDLEST,
}

Definition at line 604 of file omap_hwmod_2xxx_ipblock_data.c.

struct omap_hwmod_dma_info omap2xxx_dss_sdma_chs[]
Initial value:
= {
{ .name = "dispc", .dma_req = 5 },
{ .dma_req = -1 }
}

Definition at line 28 of file omap_hwmod_2xxx_ipblock_data.c.

struct omap_hwmod omap2xxx_dss_venc_hwmod
Initial value:
= {
.name = "dss_venc",
.class = &omap2_venc_hwmod_class,
.main_clk = "dss_54m_fck",
.prcm = {
.omap2 = {
.prcm_reg_id = 1,
.module_bit = OMAP24XX_EN_DSS1_SHIFT,
.module_offs = CORE_MOD,
},
},
.flags = HWMOD_NO_IDLEST,
}

Definition at line 620 of file omap_hwmod_2xxx_ipblock_data.c.

struct omap_hwmod omap2xxx_gpio1_hwmod
Initial value:
= {
.name = "gpio1",
.flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
.mpu_irqs = omap2_gpio1_irqs,
.main_clk = "gpios_fck",
.prcm = {
.omap2 = {
.prcm_reg_id = 1,
.module_bit = OMAP24XX_EN_GPIOS_SHIFT,
.module_offs = WKUP_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP24XX_ST_GPIOS_SHIFT,
},
},
.class = &omap2xxx_gpio_hwmod_class,
.dev_attr = &omap2xxx_gpio_dev_attr,
}

Definition at line 641 of file omap_hwmod_2xxx_ipblock_data.c.

struct omap_hwmod omap2xxx_gpio2_hwmod
Initial value:
= {
.name = "gpio2",
.flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
.mpu_irqs = omap2_gpio2_irqs,
.main_clk = "gpios_fck",
.prcm = {
.omap2 = {
.prcm_reg_id = 1,
.module_bit = OMAP24XX_EN_GPIOS_SHIFT,
.module_offs = WKUP_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP24XX_ST_GPIOS_SHIFT,
},
},
.class = &omap2xxx_gpio_hwmod_class,
.dev_attr = &omap2xxx_gpio_dev_attr,
}

Definition at line 660 of file omap_hwmod_2xxx_ipblock_data.c.

struct omap_hwmod omap2xxx_gpio3_hwmod
Initial value:
= {
.name = "gpio3",
.flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
.mpu_irqs = omap2_gpio3_irqs,
.main_clk = "gpios_fck",
.prcm = {
.omap2 = {
.prcm_reg_id = 1,
.module_bit = OMAP24XX_EN_GPIOS_SHIFT,
.module_offs = WKUP_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP24XX_ST_GPIOS_SHIFT,
},
},
.class = &omap2xxx_gpio_hwmod_class,
.dev_attr = &omap2xxx_gpio_dev_attr,
}

Definition at line 679 of file omap_hwmod_2xxx_ipblock_data.c.

struct omap_hwmod omap2xxx_gpio4_hwmod
Initial value:
= {
.name = "gpio4",
.flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
.mpu_irqs = omap2_gpio4_irqs,
.main_clk = "gpios_fck",
.prcm = {
.omap2 = {
.prcm_reg_id = 1,
.module_bit = OMAP24XX_EN_GPIOS_SHIFT,
.module_offs = WKUP_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP24XX_ST_GPIOS_SHIFT,
},
},
.class = &omap2xxx_gpio_hwmod_class,
.dev_attr = &omap2xxx_gpio_dev_attr,
}

Definition at line 698 of file omap_hwmod_2xxx_ipblock_data.c.

struct omap_gpio_dev_attr omap2xxx_gpio_dev_attr
Initial value:
= {
.bank_width = 32,
.dbck_flag = false,
}

Definition at line 635 of file omap_hwmod_2xxx_ipblock_data.c.

struct omap_hwmod_class omap2xxx_gpio_hwmod_class
Initial value:
= {
.name = "gpio",
.sysc = &omap2xxx_gpio_sysc,
.rev = 0,
}

Definition at line 108 of file omap_hwmod_2xxx_ipblock_data.c.

struct omap_hwmod omap2xxx_gpmc_hwmod
Initial value:
= {
.name = "gpmc",
.class = &omap2xxx_gpmc_hwmod_class,
.mpu_irqs = omap2xxx_gpmc_irqs,
.main_clk = "gpmc_fck",
.flags = (HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET |
HWMOD_NO_IDLEST),
.prcm = {
.omap2 = {
.prcm_reg_id = 3,
.module_bit = OMAP24XX_EN_GPMC_MASK,
.module_offs = CORE_MOD,
},
},
}

Definition at line 787 of file omap_hwmod_2xxx_ipblock_data.c.

struct omap_hwmod omap2xxx_iva_hwmod
Initial value:
= {
.name = "iva",
.class = &iva_hwmod_class,
}

Definition at line 234 of file omap_hwmod_2xxx_ipblock_data.c.

struct omap_hwmod omap2xxx_l3_main_hwmod
Initial value:
= {
.name = "l3_main",
.class = &l3_hwmod_class,
.flags = HWMOD_NO_IDLEST,
}

Definition at line 200 of file omap_hwmod_2xxx_ipblock_data.c.

struct omap_hwmod omap2xxx_l4_core_hwmod
Initial value:
= {
.name = "l4_core",
.class = &l4_hwmod_class,
.flags = HWMOD_NO_IDLEST,
}

Definition at line 207 of file omap_hwmod_2xxx_ipblock_data.c.

struct omap_hwmod omap2xxx_l4_wkup_hwmod
Initial value:
= {
.name = "l4_wkup",
.class = &l4_hwmod_class,
.flags = HWMOD_NO_IDLEST,
}

Definition at line 214 of file omap_hwmod_2xxx_ipblock_data.c.

struct omap_hwmod_class omap2xxx_mailbox_hwmod_class
Initial value:
= {
.name = "mailbox",
.sysc = &omap2xxx_mailbox_sysc,
}

Definition at line 147 of file omap_hwmod_2xxx_ipblock_data.c.

struct omap_hwmod omap2xxx_mcspi1_hwmod
Initial value:
= {
.name = "mcspi1",
.mpu_irqs = omap2_mcspi1_mpu_irqs,
.sdma_reqs = omap2_mcspi1_sdma_reqs,
.main_clk = "mcspi1_fck",
.prcm = {
.omap2 = {
.module_offs = CORE_MOD,
.prcm_reg_id = 1,
.module_bit = OMAP24XX_EN_MCSPI1_SHIFT,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP24XX_ST_MCSPI1_SHIFT,
},
},
.class = &omap2xxx_mcspi_class,
.dev_attr = &omap_mcspi1_dev_attr,
}

Definition at line 721 of file omap_hwmod_2xxx_ipblock_data.c.

struct omap_hwmod omap2xxx_mcspi2_hwmod
Initial value:
= {
.name = "mcspi2",
.mpu_irqs = omap2_mcspi2_mpu_irqs,
.sdma_reqs = omap2_mcspi2_sdma_reqs,
.main_clk = "mcspi2_fck",
.prcm = {
.omap2 = {
.module_offs = CORE_MOD,
.prcm_reg_id = 1,
.module_bit = OMAP24XX_EN_MCSPI2_SHIFT,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP24XX_ST_MCSPI2_SHIFT,
},
},
.class = &omap2xxx_mcspi_class,
.dev_attr = &omap_mcspi2_dev_attr,
}

Definition at line 744 of file omap_hwmod_2xxx_ipblock_data.c.

struct omap_hwmod_class omap2xxx_mcspi_class
Initial value:
= {
.name = "mcspi",
.sysc = &omap2xxx_mcspi_sysc,
.rev = OMAP2_MCSPI_REV,
}

Definition at line 169 of file omap_hwmod_2xxx_ipblock_data.c.

struct omap_hwmod omap2xxx_mpu_hwmod
Initial value:
= {
.name = "mpu",
.mpu_irqs = omap2xxx_mpu_irqs,
.class = &mpu_hwmod_class,
.main_clk = "mpu_ck",
}

Definition at line 226 of file omap_hwmod_2xxx_ipblock_data.c.

struct omap_hwmod omap2xxx_rng_hwmod
Initial value:
= {
.name = "rng",
.mpu_irqs = omap2_rng_mpu_irqs,
.main_clk = "l4_ck",
.prcm = {
.omap2 = {
.module_offs = CORE_MOD,
.prcm_reg_id = 4,
.module_bit = OMAP24XX_EN_RNG_SHIFT,
.idlest_reg_id = 4,
.idlest_idle_bit = OMAP24XX_ST_RNG_SHIFT,
},
},
.flags = HWMOD_INIT_NO_RESET,
.class = &omap2_rng_hwmod_class,
}

Definition at line 832 of file omap_hwmod_2xxx_ipblock_data.c.

struct omap_hwmod omap2xxx_timer10_hwmod
Initial value:
= {
.name = "timer10",
.mpu_irqs = omap2_timer10_mpu_irqs,
.main_clk = "gpt10_fck",
.prcm = {
.omap2 = {
.prcm_reg_id = 1,
.module_bit = OMAP24XX_EN_GPT10_SHIFT,
.module_offs = CORE_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP24XX_ST_GPT10_SHIFT,
},
},
.dev_attr = &capability_pwm_dev_attr,
.class = &omap2xxx_timer_hwmod_class,
}

Definition at line 424 of file omap_hwmod_2xxx_ipblock_data.c.

struct omap_hwmod omap2xxx_timer11_hwmod
Initial value:
= {
.name = "timer11",
.mpu_irqs = omap2_timer11_mpu_irqs,
.main_clk = "gpt11_fck",
.prcm = {
.omap2 = {
.prcm_reg_id = 1,
.module_bit = OMAP24XX_EN_GPT11_SHIFT,
.module_offs = CORE_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP24XX_ST_GPT11_SHIFT,
},
},
.dev_attr = &capability_pwm_dev_attr,
.class = &omap2xxx_timer_hwmod_class,
}

Definition at line 443 of file omap_hwmod_2xxx_ipblock_data.c.

struct omap_hwmod omap2xxx_timer12_hwmod
Initial value:
= {
.name = "timer12",
.mpu_irqs = omap2xxx_timer12_mpu_irqs,
.main_clk = "gpt12_fck",
.prcm = {
.omap2 = {
.prcm_reg_id = 1,
.module_bit = OMAP24XX_EN_GPT12_SHIFT,
.module_offs = CORE_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP24XX_ST_GPT12_SHIFT,
},
},
.dev_attr = &capability_pwm_dev_attr,
.class = &omap2xxx_timer_hwmod_class,
}

Definition at line 462 of file omap_hwmod_2xxx_ipblock_data.c.

struct omap_hwmod_irq_info omap2xxx_timer12_mpu_irqs[]
Initial value:
= {
{ .irq = 48 + OMAP_INTC_START, },
{ .irq = -1 },
}

Definition at line 23 of file omap_hwmod_2xxx_ipblock_data.c.

struct omap_hwmod omap2xxx_timer1_hwmod
Initial value:
= {
.name = "timer1",
.mpu_irqs = omap2_timer1_mpu_irqs,
.main_clk = "gpt1_fck",
.prcm = {
.omap2 = {
.prcm_reg_id = 1,
.module_bit = OMAP24XX_EN_GPT1_SHIFT,
.module_offs = WKUP_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP24XX_ST_GPT1_SHIFT,
},
},
.dev_attr = &capability_alwon_dev_attr,
.class = &omap2xxx_timer_hwmod_class,
}

Definition at line 256 of file omap_hwmod_2xxx_ipblock_data.c.

struct omap_hwmod omap2xxx_timer2_hwmod
Initial value:
= {
.name = "timer2",
.mpu_irqs = omap2_timer2_mpu_irqs,
.main_clk = "gpt2_fck",
.prcm = {
.omap2 = {
.prcm_reg_id = 1,
.module_bit = OMAP24XX_EN_GPT2_SHIFT,
.module_offs = CORE_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP24XX_ST_GPT2_SHIFT,
},
},
.class = &omap2xxx_timer_hwmod_class,
}

Definition at line 275 of file omap_hwmod_2xxx_ipblock_data.c.

struct omap_hwmod omap2xxx_timer3_hwmod
Initial value:
= {
.name = "timer3",
.mpu_irqs = omap2_timer3_mpu_irqs,
.main_clk = "gpt3_fck",
.prcm = {
.omap2 = {
.prcm_reg_id = 1,
.module_bit = OMAP24XX_EN_GPT3_SHIFT,
.module_offs = CORE_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP24XX_ST_GPT3_SHIFT,
},
},
.class = &omap2xxx_timer_hwmod_class,
}

Definition at line 293 of file omap_hwmod_2xxx_ipblock_data.c.

struct omap_hwmod omap2xxx_timer4_hwmod
Initial value:
= {
.name = "timer4",
.mpu_irqs = omap2_timer4_mpu_irqs,
.main_clk = "gpt4_fck",
.prcm = {
.omap2 = {
.prcm_reg_id = 1,
.module_bit = OMAP24XX_EN_GPT4_SHIFT,
.module_offs = CORE_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP24XX_ST_GPT4_SHIFT,
},
},
.class = &omap2xxx_timer_hwmod_class,
}

Definition at line 311 of file omap_hwmod_2xxx_ipblock_data.c.

struct omap_hwmod omap2xxx_timer5_hwmod
Initial value:
= {
.name = "timer5",
.mpu_irqs = omap2_timer5_mpu_irqs,
.main_clk = "gpt5_fck",
.prcm = {
.omap2 = {
.prcm_reg_id = 1,
.module_bit = OMAP24XX_EN_GPT5_SHIFT,
.module_offs = CORE_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP24XX_ST_GPT5_SHIFT,
},
},
.dev_attr = &capability_dsp_dev_attr,
.class = &omap2xxx_timer_hwmod_class,
}

Definition at line 329 of file omap_hwmod_2xxx_ipblock_data.c.

struct omap_hwmod omap2xxx_timer6_hwmod
Initial value:
= {
.name = "timer6",
.mpu_irqs = omap2_timer6_mpu_irqs,
.main_clk = "gpt6_fck",
.prcm = {
.omap2 = {
.prcm_reg_id = 1,
.module_bit = OMAP24XX_EN_GPT6_SHIFT,
.module_offs = CORE_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP24XX_ST_GPT6_SHIFT,
},
},
.dev_attr = &capability_dsp_dev_attr,
.class = &omap2xxx_timer_hwmod_class,
}

Definition at line 348 of file omap_hwmod_2xxx_ipblock_data.c.

struct omap_hwmod omap2xxx_timer7_hwmod
Initial value:
= {
.name = "timer7",
.mpu_irqs = omap2_timer7_mpu_irqs,
.main_clk = "gpt7_fck",
.prcm = {
.omap2 = {
.prcm_reg_id = 1,
.module_bit = OMAP24XX_EN_GPT7_SHIFT,
.module_offs = CORE_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP24XX_ST_GPT7_SHIFT,
},
},
.dev_attr = &capability_dsp_dev_attr,
.class = &omap2xxx_timer_hwmod_class,
}

Definition at line 367 of file omap_hwmod_2xxx_ipblock_data.c.

struct omap_hwmod omap2xxx_timer8_hwmod
Initial value:
= {
.name = "timer8",
.mpu_irqs = omap2_timer8_mpu_irqs,
.main_clk = "gpt8_fck",
.prcm = {
.omap2 = {
.prcm_reg_id = 1,
.module_bit = OMAP24XX_EN_GPT8_SHIFT,
.module_offs = CORE_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP24XX_ST_GPT8_SHIFT,
},
},
.dev_attr = &capability_dsp_dev_attr,
.class = &omap2xxx_timer_hwmod_class,
}

Definition at line 386 of file omap_hwmod_2xxx_ipblock_data.c.

struct omap_hwmod omap2xxx_timer9_hwmod
Initial value:
= {
.name = "timer9",
.mpu_irqs = omap2_timer9_mpu_irqs,
.main_clk = "gpt9_fck",
.prcm = {
.omap2 = {
.prcm_reg_id = 1,
.module_bit = OMAP24XX_EN_GPT9_SHIFT,
.module_offs = CORE_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP24XX_ST_GPT9_SHIFT,
},
},
.dev_attr = &capability_pwm_dev_attr,
.class = &omap2xxx_timer_hwmod_class,
}

Definition at line 405 of file omap_hwmod_2xxx_ipblock_data.c.

struct omap_hwmod_class omap2xxx_timer_hwmod_class
Initial value:
= {
.name = "timer",
.sysc = &omap2xxx_timer_sysc,
}

Definition at line 66 of file omap_hwmod_2xxx_ipblock_data.c.

struct omap_hwmod omap2xxx_uart1_hwmod
Initial value:
= {
.name = "uart1",
.mpu_irqs = omap2_uart1_mpu_irqs,
.sdma_reqs = omap2_uart1_sdma_reqs,
.main_clk = "uart1_fck",
.prcm = {
.omap2 = {
.module_offs = CORE_MOD,
.prcm_reg_id = 1,
.module_bit = OMAP24XX_EN_UART1_SHIFT,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP24XX_EN_UART1_SHIFT,
},
},
.class = &omap2_uart_class,
}

Definition at line 497 of file omap_hwmod_2xxx_ipblock_data.c.

struct omap_hwmod omap2xxx_uart2_hwmod
Initial value:
= {
.name = "uart2",
.mpu_irqs = omap2_uart2_mpu_irqs,
.sdma_reqs = omap2_uart2_sdma_reqs,
.main_clk = "uart2_fck",
.prcm = {
.omap2 = {
.module_offs = CORE_MOD,
.prcm_reg_id = 1,
.module_bit = OMAP24XX_EN_UART2_SHIFT,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP24XX_EN_UART2_SHIFT,
},
},
.class = &omap2_uart_class,
}

Definition at line 516 of file omap_hwmod_2xxx_ipblock_data.c.

struct omap_hwmod omap2xxx_uart3_hwmod
Initial value:
= {
.name = "uart3",
.mpu_irqs = omap2_uart3_mpu_irqs,
.sdma_reqs = omap2_uart3_sdma_reqs,
.main_clk = "uart3_fck",
.prcm = {
.omap2 = {
.module_offs = CORE_MOD,
.prcm_reg_id = 2,
.module_bit = OMAP24XX_EN_UART3_SHIFT,
.idlest_reg_id = 2,
.idlest_idle_bit = OMAP24XX_EN_UART3_SHIFT,
},
},
.class = &omap2_uart_class,
}

Definition at line 535 of file omap_hwmod_2xxx_ipblock_data.c.

struct omap_hwmod omap2xxx_wd_timer2_hwmod
Initial value:
= {
.name = "wd_timer2",
.class = &omap2xxx_wd_timer_hwmod_class,
.main_clk = "mpu_wdt_fck",
.prcm = {
.omap2 = {
.prcm_reg_id = 1,
.module_bit = OMAP24XX_EN_MPU_WDT_SHIFT,
.module_offs = WKUP_MOD,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP24XX_ST_MPU_WDT_SHIFT,
},
},
}

Definition at line 480 of file omap_hwmod_2xxx_ipblock_data.c.

struct omap_hwmod_class omap2xxx_wd_timer_hwmod_class
Initial value:
= {
.name = "wd_timer",
.sysc = &omap2xxx_wd_timer_sysc,
.pre_shutdown = &omap2_wd_timer_disable,
.reset = &omap2_wd_timer_reset,
}

Definition at line 86 of file omap_hwmod_2xxx_ipblock_data.c.

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