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op_model_cell.c File Reference
#include <linux/cpufreq.h>
#include <linux/delay.h>
#include <linux/init.h>
#include <linux/jiffies.h>
#include <linux/kthread.h>
#include <linux/oprofile.h>
#include <linux/percpu.h>
#include <linux/smp.h>
#include <linux/spinlock.h>
#include <linux/timer.h>
#include <asm/cell-pmu.h>
#include <asm/cputable.h>
#include <asm/firmware.h>
#include <asm/io.h>
#include <asm/oprofile_impl.h>
#include <asm/processor.h>
#include <asm/prom.h>
#include <asm/ptrace.h>
#include <asm/reg.h>
#include <asm/rtas.h>
#include <asm/cell-regs.h>
#include "../platforms/cell/interrupt.h"
#include "cell/pr_util.h"

Go to the source code of this file.

Data Structures

struct  pmc_cntrl_data
 
struct  pm_signal
 
struct  pm_cntrl
 

Macros

#define PPU_PROFILING   0
 
#define SPU_PROFILING_CYCLES   1
 
#define SPU_PROFILING_EVENTS   2
 
#define SPU_EVENT_NUM_START   4100
 
#define SPU_EVENT_NUM_STOP   4399
 
#define SPU_PROFILE_EVENT_ADDR   4363 /* spu, address trace, decimal */
 
#define SPU_PROFILE_EVENT_ADDR_MASK_A   0x146 /* sub unit set to zero */
 
#define SPU_PROFILE_EVENT_ADDR_MASK_B   0x186 /* sub unit set to zero */
 
#define NUM_SPUS_PER_NODE   8
 
#define SPU_CYCLES_EVENT_NUM   2 /* event number for SPU_CYCLES */
 
#define PPU_CYCLES_EVENT_NUM   1 /* event number for CYCLES */
 
#define PPU_CYCLES_GRP_NUM
 
#define CBE_COUNT_ALL_CYCLES   0x42800000 /* PPU cycle event specifier */
 
#define NUM_THREADS
 
#define NUM_DEBUG_BUS_WORDS   4
 
#define NUM_INPUT_BUS_WORDS   2
 
#define MAX_SPU_COUNT   0xFFFFFF /* maximum 24 bit LFSR value */
 
#define NUM_INTERVAL_CYC   0xFFFFFFFF - 10
 
#define GET_SUB_UNIT(x)   ((x & 0x0000f000) >> 12)
 
#define GET_BUS_WORD(x)   ((x & 0x000000f0) >> 4)
 
#define GET_BUS_TYPE(x)   ((x & 0x00000300) >> 8)
 
#define GET_POLARITY(x)   ((x & 0x00000002) >> 1)
 
#define GET_COUNT_CYCLES(x)   (x & 0x00000001)
 
#define GET_INPUT_CONTROL(x)   ((x & 0x00000004) >> 2)
 
#define ENTRIES   303
 
#define MAXLFSR   0xFFFFFF
 
#define V2_16   (0x1 << 16)
 
#define V2_19   (0x1 << 19)
 
#define V2_22   (0x1 << 22)
 

Enumerations

enum  {
  SUBFUNC_RESET = 1, SUBFUNC_ACTIVATE = 2, SUBFUNC_DEACTIVATE = 3, PASSTHRU_IGNORE = 0,
  PASSTHRU_ENABLE = 1, PASSTHRU_DISABLE = 2
}
 

Variables

struct op_powerpc_model op_model_cell
 

Macro Definition Documentation

#define CBE_COUNT_ALL_CYCLES   0x42800000 /* PPU cycle event specifier */

Definition at line 57 of file op_model_cell.c.

#define ENTRIES   303

Definition at line 953 of file op_model_cell.c.

#define GET_BUS_TYPE (   x)    ((x & 0x00000300) >> 8)

Definition at line 132 of file op_model_cell.c.

#define GET_BUS_WORD (   x)    ((x & 0x000000f0) >> 4)

Definition at line 131 of file op_model_cell.c.

#define GET_COUNT_CYCLES (   x)    (x & 0x00000001)

Definition at line 134 of file op_model_cell.c.

#define GET_INPUT_CONTROL (   x)    ((x & 0x00000004) >> 2)

Definition at line 135 of file op_model_cell.c.

#define GET_POLARITY (   x)    ((x & 0x00000002) >> 1)

Definition at line 133 of file op_model_cell.c.

#define GET_SUB_UNIT (   x)    ((x & 0x0000f000) >> 12)

Definition at line 130 of file op_model_cell.c.

#define MAX_SPU_COUNT   0xFFFFFF /* maximum 24 bit LFSR value */

Definition at line 63 of file op_model_cell.c.

#define MAXLFSR   0xFFFFFF

Definition at line 954 of file op_model_cell.c.

#define NUM_DEBUG_BUS_WORDS   4

Definition at line 60 of file op_model_cell.c.

#define NUM_INPUT_BUS_WORDS   2

Definition at line 61 of file op_model_cell.c.

#define NUM_INTERVAL_CYC   0xFFFFFFFF - 10

Definition at line 69 of file op_model_cell.c.

#define NUM_SPUS_PER_NODE   8

Definition at line 52 of file op_model_cell.c.

#define NUM_THREADS
Value:
2 /* number of physical threads in
* physical processor
*/

Definition at line 59 of file op_model_cell.c.

#define PPU_CYCLES_EVENT_NUM   1 /* event number for CYCLES */

Definition at line 55 of file op_model_cell.c.

#define PPU_CYCLES_GRP_NUM
Value:
1 /* special group number for identifying
* PPU_CYCLES event
*/

Definition at line 56 of file op_model_cell.c.

#define PPU_PROFILING   0

Definition at line 42 of file op_model_cell.c.

#define SPU_CYCLES_EVENT_NUM   2 /* event number for SPU_CYCLES */

Definition at line 53 of file op_model_cell.c.

#define SPU_EVENT_NUM_START   4100

Definition at line 46 of file op_model_cell.c.

#define SPU_EVENT_NUM_STOP   4399

Definition at line 47 of file op_model_cell.c.

#define SPU_PROFILE_EVENT_ADDR   4363 /* spu, address trace, decimal */

Definition at line 48 of file op_model_cell.c.

#define SPU_PROFILE_EVENT_ADDR_MASK_A   0x146 /* sub unit set to zero */

Definition at line 49 of file op_model_cell.c.

#define SPU_PROFILE_EVENT_ADDR_MASK_B   0x186 /* sub unit set to zero */

Definition at line 50 of file op_model_cell.c.

#define SPU_PROFILING_CYCLES   1

Definition at line 43 of file op_model_cell.c.

#define SPU_PROFILING_EVENTS   2

Definition at line 44 of file op_model_cell.c.

#define V2_16   (0x1 << 16)

Definition at line 1051 of file op_model_cell.c.

#define V2_19   (0x1 << 19)

Definition at line 1052 of file op_model_cell.c.

#define V2_22   (0x1 << 22)

Definition at line 1053 of file op_model_cell.c.

Enumeration Type Documentation

anonymous enum
Enumerator:
SUBFUNC_RESET 
SUBFUNC_ACTIVATE 
SUBFUNC_DEACTIVATE 
PASSTHRU_IGNORE 
PASSTHRU_ENABLE 
PASSTHRU_DISABLE 

Definition at line 103 of file op_model_cell.c.

Variable Documentation

u32 debug_bus_control

Definition at line 125 of file op_model_cell.c.

u32 group_control

Definition at line 124 of file op_model_cell.c.

struct op_powerpc_model op_model_cell
Initial value:
= {
.reg_setup = cell_reg_setup,
.cpu_setup = cell_cpu_setup,
.global_start = cell_global_start,
.global_stop = cell_global_stop,
.sync_start = cell_sync_start,
.sync_stop = cell_sync_stop,
.handle_interrupt = cell_handle_interrupt,
}

Definition at line 1707 of file op_model_cell.c.

u32 pm07_cntrl[NR_PHYS_CTRS]

Definition at line 127 of file op_model_cell.c.

Definition at line 126 of file op_model_cell.c.