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ov519.c
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1 
40 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
41 
42 #define MODULE_NAME "ov519"
43 
44 #include <linux/input.h>
45 #include "gspca.h"
46 
47 /* The jpeg_hdr is used by w996Xcf only */
48 /* The CONEX_CAM define for jpeg.h needs renaming, now its used here too */
49 #define CONEX_CAM
50 #include "jpeg.h"
51 
52 MODULE_AUTHOR("Jean-Francois Moine <http://moinejf.free.fr>");
53 MODULE_DESCRIPTION("OV519 USB Camera Driver");
54 MODULE_LICENSE("GPL");
55 
56 /* global parameters */
57 static int frame_rate;
58 
59 /* Number of times to retry a failed I2C transaction. Increase this if you
60  * are getting "Failed to read sensor ID..." */
61 static int i2c_detect_tries = 10;
62 
63 /* ov519 device descriptor */
64 struct sd {
65  struct gspca_dev gspca_dev; /* !! must be the first item */
66 
67  struct v4l2_ctrl *jpegqual;
68  struct v4l2_ctrl *freq;
69  struct { /* h/vflip control cluster */
70  struct v4l2_ctrl *hflip;
71  struct v4l2_ctrl *vflip;
72  };
73  struct { /* autobrightness/brightness control cluster */
75  struct v4l2_ctrl *brightness;
76  };
77 
79 
80  char bridge;
81 #define BRIDGE_OV511 0
82 #define BRIDGE_OV511PLUS 1
83 #define BRIDGE_OV518 2
84 #define BRIDGE_OV518PLUS 3
85 #define BRIDGE_OV519 4 /* = ov530 */
86 #define BRIDGE_OVFX2 5
87 #define BRIDGE_W9968CF 6
88 #define BRIDGE_MASK 7
89 
90  char invert_led;
91 #define BRIDGE_INVERT_LED 8
92 
95 
96  /* Determined by sensor type */
98 
99 #define QUALITY_MIN 50
100 #define QUALITY_MAX 70
101 #define QUALITY_DEF 50
102 
103  u8 stopped; /* Streaming is temporarily paused */
104  u8 first_frame;
105 
106  u8 frame_rate; /* current Framerate */
107  u8 clockdiv; /* clockdiv override */
108 
109  s8 sensor; /* Type of image sensor chip (SEN_*) */
110 
115 
117 };
118 enum sensors {
135 };
136 
137 /* Note this is a bit of a hack, but the w9968cf driver needs the code for all
138  the ov sensors which is already present here. When we have the time we
139  really should move the sensor drivers to v4l2 sub drivers. */
140 #include "w996Xcf.c"
141 
142 /* table of the disabled controls */
143 struct ctrl_valid {
144  unsigned int has_brightness:1;
145  unsigned int has_contrast:1;
146  unsigned int has_exposure:1;
147  unsigned int has_autogain:1;
148  unsigned int has_sat:1;
149  unsigned int has_hvflip:1;
150  unsigned int has_autobright:1;
151  unsigned int has_freq:1;
152 };
153 
154 static const struct ctrl_valid valid_controls[] = {
155  [SEN_OV2610] = {
156  .has_exposure = 1,
157  .has_autogain = 1,
158  },
159  [SEN_OV2610AE] = {
160  .has_exposure = 1,
161  .has_autogain = 1,
162  },
163  [SEN_OV3610] = {
164  /* No controls */
165  },
166  [SEN_OV6620] = {
167  .has_brightness = 1,
168  .has_contrast = 1,
169  .has_sat = 1,
170  .has_autobright = 1,
171  .has_freq = 1,
172  },
173  [SEN_OV6630] = {
174  .has_brightness = 1,
175  .has_contrast = 1,
176  .has_sat = 1,
177  .has_autobright = 1,
178  .has_freq = 1,
179  },
180  [SEN_OV66308AF] = {
181  .has_brightness = 1,
182  .has_contrast = 1,
183  .has_sat = 1,
184  .has_autobright = 1,
185  .has_freq = 1,
186  },
187  [SEN_OV7610] = {
188  .has_brightness = 1,
189  .has_contrast = 1,
190  .has_sat = 1,
191  .has_autobright = 1,
192  .has_freq = 1,
193  },
194  [SEN_OV7620] = {
195  .has_brightness = 1,
196  .has_contrast = 1,
197  .has_sat = 1,
198  .has_autobright = 1,
199  .has_freq = 1,
200  },
201  [SEN_OV7620AE] = {
202  .has_brightness = 1,
203  .has_contrast = 1,
204  .has_sat = 1,
205  .has_autobright = 1,
206  .has_freq = 1,
207  },
208  [SEN_OV7640] = {
209  .has_brightness = 1,
210  .has_sat = 1,
211  .has_freq = 1,
212  },
213  [SEN_OV7648] = {
214  .has_brightness = 1,
215  .has_sat = 1,
216  .has_freq = 1,
217  },
218  [SEN_OV7660] = {
219  .has_brightness = 1,
220  .has_contrast = 1,
221  .has_sat = 1,
222  .has_hvflip = 1,
223  .has_freq = 1,
224  },
225  [SEN_OV7670] = {
226  .has_brightness = 1,
227  .has_contrast = 1,
228  .has_hvflip = 1,
229  .has_freq = 1,
230  },
231  [SEN_OV76BE] = {
232  .has_brightness = 1,
233  .has_contrast = 1,
234  .has_sat = 1,
235  .has_autobright = 1,
236  .has_freq = 1,
237  },
238  [SEN_OV8610] = {
239  .has_brightness = 1,
240  .has_contrast = 1,
241  .has_sat = 1,
242  .has_autobright = 1,
243  },
244  [SEN_OV9600] = {
245  .has_exposure = 1,
246  .has_autogain = 1,
247  },
248 };
249 
250 static const struct v4l2_pix_format ov519_vga_mode[] = {
252  .bytesperline = 320,
253  .sizeimage = 320 * 240 * 3 / 8 + 590,
254  .colorspace = V4L2_COLORSPACE_JPEG,
255  .priv = 1},
257  .bytesperline = 640,
258  .sizeimage = 640 * 480 * 3 / 8 + 590,
259  .colorspace = V4L2_COLORSPACE_JPEG,
260  .priv = 0},
261 };
262 static const struct v4l2_pix_format ov519_sif_mode[] = {
264  .bytesperline = 160,
265  .sizeimage = 160 * 120 * 3 / 8 + 590,
266  .colorspace = V4L2_COLORSPACE_JPEG,
267  .priv = 3},
269  .bytesperline = 176,
270  .sizeimage = 176 * 144 * 3 / 8 + 590,
271  .colorspace = V4L2_COLORSPACE_JPEG,
272  .priv = 1},
274  .bytesperline = 320,
275  .sizeimage = 320 * 240 * 3 / 8 + 590,
276  .colorspace = V4L2_COLORSPACE_JPEG,
277  .priv = 2},
279  .bytesperline = 352,
280  .sizeimage = 352 * 288 * 3 / 8 + 590,
281  .colorspace = V4L2_COLORSPACE_JPEG,
282  .priv = 0},
283 };
284 
285 /* Note some of the sizeimage values for the ov511 / ov518 may seem
286  larger then necessary, however they need to be this big as the ov511 /
287  ov518 always fills the entire isoc frame, using 0 padding bytes when
288  it doesn't have any data. So with low framerates the amount of data
289  transferred can become quite large (libv4l will remove all the 0 padding
290  in userspace). */
291 static const struct v4l2_pix_format ov518_vga_mode[] = {
293  .bytesperline = 320,
294  .sizeimage = 320 * 240 * 3,
295  .colorspace = V4L2_COLORSPACE_JPEG,
296  .priv = 1},
298  .bytesperline = 640,
299  .sizeimage = 640 * 480 * 2,
300  .colorspace = V4L2_COLORSPACE_JPEG,
301  .priv = 0},
302 };
303 static const struct v4l2_pix_format ov518_sif_mode[] = {
305  .bytesperline = 160,
306  .sizeimage = 70000,
307  .colorspace = V4L2_COLORSPACE_JPEG,
308  .priv = 3},
310  .bytesperline = 176,
311  .sizeimage = 70000,
312  .colorspace = V4L2_COLORSPACE_JPEG,
313  .priv = 1},
315  .bytesperline = 320,
316  .sizeimage = 320 * 240 * 3,
317  .colorspace = V4L2_COLORSPACE_JPEG,
318  .priv = 2},
320  .bytesperline = 352,
321  .sizeimage = 352 * 288 * 3,
322  .colorspace = V4L2_COLORSPACE_JPEG,
323  .priv = 0},
324 };
325 
326 static const struct v4l2_pix_format ov511_vga_mode[] = {
328  .bytesperline = 320,
329  .sizeimage = 320 * 240 * 3,
330  .colorspace = V4L2_COLORSPACE_JPEG,
331  .priv = 1},
333  .bytesperline = 640,
334  .sizeimage = 640 * 480 * 2,
335  .colorspace = V4L2_COLORSPACE_JPEG,
336  .priv = 0},
337 };
338 static const struct v4l2_pix_format ov511_sif_mode[] = {
340  .bytesperline = 160,
341  .sizeimage = 70000,
342  .colorspace = V4L2_COLORSPACE_JPEG,
343  .priv = 3},
345  .bytesperline = 176,
346  .sizeimage = 70000,
347  .colorspace = V4L2_COLORSPACE_JPEG,
348  .priv = 1},
350  .bytesperline = 320,
351  .sizeimage = 320 * 240 * 3,
352  .colorspace = V4L2_COLORSPACE_JPEG,
353  .priv = 2},
355  .bytesperline = 352,
356  .sizeimage = 352 * 288 * 3,
357  .colorspace = V4L2_COLORSPACE_JPEG,
358  .priv = 0},
359 };
360 
361 static const struct v4l2_pix_format ovfx2_vga_mode[] = {
363  .bytesperline = 320,
364  .sizeimage = 320 * 240,
365  .colorspace = V4L2_COLORSPACE_SRGB,
366  .priv = 1},
368  .bytesperline = 640,
369  .sizeimage = 640 * 480,
370  .colorspace = V4L2_COLORSPACE_SRGB,
371  .priv = 0},
372 };
373 static const struct v4l2_pix_format ovfx2_cif_mode[] = {
375  .bytesperline = 160,
376  .sizeimage = 160 * 120,
377  .colorspace = V4L2_COLORSPACE_SRGB,
378  .priv = 3},
380  .bytesperline = 176,
381  .sizeimage = 176 * 144,
382  .colorspace = V4L2_COLORSPACE_SRGB,
383  .priv = 1},
385  .bytesperline = 320,
386  .sizeimage = 320 * 240,
387  .colorspace = V4L2_COLORSPACE_SRGB,
388  .priv = 2},
390  .bytesperline = 352,
391  .sizeimage = 352 * 288,
392  .colorspace = V4L2_COLORSPACE_SRGB,
393  .priv = 0},
394 };
395 static const struct v4l2_pix_format ovfx2_ov2610_mode[] = {
397  .bytesperline = 800,
398  .sizeimage = 800 * 600,
399  .colorspace = V4L2_COLORSPACE_SRGB,
400  .priv = 1},
401  {1600, 1200, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
402  .bytesperline = 1600,
403  .sizeimage = 1600 * 1200,
404  .colorspace = V4L2_COLORSPACE_SRGB},
405 };
406 static const struct v4l2_pix_format ovfx2_ov3610_mode[] = {
408  .bytesperline = 640,
409  .sizeimage = 640 * 480,
410  .colorspace = V4L2_COLORSPACE_SRGB,
411  .priv = 1},
413  .bytesperline = 800,
414  .sizeimage = 800 * 600,
415  .colorspace = V4L2_COLORSPACE_SRGB,
416  .priv = 1},
418  .bytesperline = 1024,
419  .sizeimage = 1024 * 768,
420  .colorspace = V4L2_COLORSPACE_SRGB,
421  .priv = 1},
422  {1600, 1200, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
423  .bytesperline = 1600,
424  .sizeimage = 1600 * 1200,
425  .colorspace = V4L2_COLORSPACE_SRGB,
426  .priv = 0},
427  {2048, 1536, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
428  .bytesperline = 2048,
429  .sizeimage = 2048 * 1536,
430  .colorspace = V4L2_COLORSPACE_SRGB,
431  .priv = 0},
432 };
433 static const struct v4l2_pix_format ovfx2_ov9600_mode[] = {
435  .bytesperline = 640,
436  .sizeimage = 640 * 480,
437  .colorspace = V4L2_COLORSPACE_SRGB,
438  .priv = 1},
439  {1280, 1024, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
440  .bytesperline = 1280,
441  .sizeimage = 1280 * 1024,
442  .colorspace = V4L2_COLORSPACE_SRGB},
443 };
444 
445 /* Registers common to OV511 / OV518 */
446 #define R51x_FIFO_PSIZE 0x30 /* 2 bytes wide w/ OV518(+) */
447 #define R51x_SYS_RESET 0x50
448  /* Reset type flags */
449  #define OV511_RESET_OMNICE 0x08
450 #define R51x_SYS_INIT 0x53
451 #define R51x_SYS_SNAP 0x52
452 #define R51x_SYS_CUST_ID 0x5f
453 #define R51x_COMP_LUT_BEGIN 0x80
454 
455 /* OV511 Camera interface register numbers */
456 #define R511_CAM_DELAY 0x10
457 #define R511_CAM_EDGE 0x11
458 #define R511_CAM_PXCNT 0x12
459 #define R511_CAM_LNCNT 0x13
460 #define R511_CAM_PXDIV 0x14
461 #define R511_CAM_LNDIV 0x15
462 #define R511_CAM_UV_EN 0x16
463 #define R511_CAM_LINE_MODE 0x17
464 #define R511_CAM_OPTS 0x18
465 
466 #define R511_SNAP_FRAME 0x19
467 #define R511_SNAP_PXCNT 0x1a
468 #define R511_SNAP_LNCNT 0x1b
469 #define R511_SNAP_PXDIV 0x1c
470 #define R511_SNAP_LNDIV 0x1d
471 #define R511_SNAP_UV_EN 0x1e
472 #define R511_SNAP_OPTS 0x1f
473 
474 #define R511_DRAM_FLOW_CTL 0x20
475 #define R511_FIFO_OPTS 0x31
476 #define R511_I2C_CTL 0x40
477 #define R511_SYS_LED_CTL 0x55 /* OV511+ only */
478 #define R511_COMP_EN 0x78
479 #define R511_COMP_LUT_EN 0x79
480 
481 /* OV518 Camera interface register numbers */
482 #define R518_GPIO_OUT 0x56 /* OV518(+) only */
483 #define R518_GPIO_CTL 0x57 /* OV518(+) only */
484 
485 /* OV519 Camera interface register numbers */
486 #define OV519_R10_H_SIZE 0x10
487 #define OV519_R11_V_SIZE 0x11
488 #define OV519_R12_X_OFFSETL 0x12
489 #define OV519_R13_X_OFFSETH 0x13
490 #define OV519_R14_Y_OFFSETL 0x14
491 #define OV519_R15_Y_OFFSETH 0x15
492 #define OV519_R16_DIVIDER 0x16
493 #define OV519_R20_DFR 0x20
494 #define OV519_R25_FORMAT 0x25
495 
496 /* OV519 System Controller register numbers */
497 #define OV519_R51_RESET1 0x51
498 #define OV519_R54_EN_CLK1 0x54
499 #define OV519_R57_SNAPSHOT 0x57
500 
501 #define OV519_GPIO_DATA_OUT0 0x71
502 #define OV519_GPIO_IO_CTRL0 0x72
503 
504 /*#define OV511_ENDPOINT_ADDRESS 1 * Isoc endpoint number */
505 
506 /*
507  * The FX2 chip does not give us a zero length read at end of frame.
508  * It does, however, give a short read at the end of a frame, if
509  * necessary, rather than run two frames together.
510  *
511  * By choosing the right bulk transfer size, we are guaranteed to always
512  * get a short read for the last read of each frame. Frame sizes are
513  * always a composite number (width * height, or a multiple) so if we
514  * choose a prime number, we are guaranteed that the last read of a
515  * frame will be short.
516  *
517  * But it isn't that easy: the 2.6 kernel requires a multiple of 4KB,
518  * otherwise EOVERFLOW "babbling" errors occur. I have not been able
519  * to figure out why. [PMiller]
520  *
521  * The constant (13 * 4096) is the largest "prime enough" number less than 64KB.
522  *
523  * It isn't enough to know the number of bytes per frame, in case we
524  * have data dropouts or buffer overruns (even though the FX2 double
525  * buffers, there are some pretty strict real time constraints for
526  * isochronous transfer for larger frame sizes).
527  */
528 /*jfm: this value does not work for 800x600 - see isoc_init */
529 #define OVFX2_BULK_SIZE (13 * 4096)
530 
531 /* I2C registers */
532 #define R51x_I2C_W_SID 0x41
533 #define R51x_I2C_SADDR_3 0x42
534 #define R51x_I2C_SADDR_2 0x43
535 #define R51x_I2C_R_SID 0x44
536 #define R51x_I2C_DATA 0x45
537 #define R518_I2C_CTL 0x47 /* OV518(+) only */
538 #define OVFX2_I2C_ADDR 0x00
539 
540 /* I2C ADDRESSES */
541 #define OV7xx0_SID 0x42
542 #define OV_HIRES_SID 0x60 /* OV9xxx / OV2xxx / OV3xxx */
543 #define OV8xx0_SID 0xa0
544 #define OV6xx0_SID 0xc0
545 
546 /* OV7610 registers */
547 #define OV7610_REG_GAIN 0x00 /* gain setting (5:0) */
548 #define OV7610_REG_BLUE 0x01 /* blue channel balance */
549 #define OV7610_REG_RED 0x02 /* red channel balance */
550 #define OV7610_REG_SAT 0x03 /* saturation */
551 #define OV8610_REG_HUE 0x04 /* 04 reserved */
552 #define OV7610_REG_CNT 0x05 /* Y contrast */
553 #define OV7610_REG_BRT 0x06 /* Y brightness */
554 #define OV7610_REG_COM_C 0x14 /* misc common regs */
555 #define OV7610_REG_ID_HIGH 0x1c /* manufacturer ID MSB */
556 #define OV7610_REG_ID_LOW 0x1d /* manufacturer ID LSB */
557 #define OV7610_REG_COM_I 0x29 /* misc settings */
558 
559 /* OV7660 and OV7670 registers */
560 #define OV7670_R00_GAIN 0x00 /* Gain lower 8 bits (rest in vref) */
561 #define OV7670_R01_BLUE 0x01 /* blue gain */
562 #define OV7670_R02_RED 0x02 /* red gain */
563 #define OV7670_R03_VREF 0x03 /* Pieces of GAIN, VSTART, VSTOP */
564 #define OV7670_R04_COM1 0x04 /* Control 1 */
565 /*#define OV7670_R07_AECHH 0x07 * AEC MS 5 bits */
566 #define OV7670_R0C_COM3 0x0c /* Control 3 */
567 #define OV7670_R0D_COM4 0x0d /* Control 4 */
568 #define OV7670_R0E_COM5 0x0e /* All "reserved" */
569 #define OV7670_R0F_COM6 0x0f /* Control 6 */
570 #define OV7670_R10_AECH 0x10 /* More bits of AEC value */
571 #define OV7670_R11_CLKRC 0x11 /* Clock control */
572 #define OV7670_R12_COM7 0x12 /* Control 7 */
573 #define OV7670_COM7_FMT_VGA 0x00
574 /*#define OV7670_COM7_YUV 0x00 * YUV */
575 #define OV7670_COM7_FMT_QVGA 0x10 /* QVGA format */
576 #define OV7670_COM7_FMT_MASK 0x38
577 #define OV7670_COM7_RESET 0x80 /* Register reset */
578 #define OV7670_R13_COM8 0x13 /* Control 8 */
579 #define OV7670_COM8_AEC 0x01 /* Auto exposure enable */
580 #define OV7670_COM8_AWB 0x02 /* White balance enable */
581 #define OV7670_COM8_AGC 0x04 /* Auto gain enable */
582 #define OV7670_COM8_BFILT 0x20 /* Band filter enable */
583 #define OV7670_COM8_AECSTEP 0x40 /* Unlimited AEC step size */
584 #define OV7670_COM8_FASTAEC 0x80 /* Enable fast AGC/AEC */
585 #define OV7670_R14_COM9 0x14 /* Control 9 - gain ceiling */
586 #define OV7670_R15_COM10 0x15 /* Control 10 */
587 #define OV7670_R17_HSTART 0x17 /* Horiz start high bits */
588 #define OV7670_R18_HSTOP 0x18 /* Horiz stop high bits */
589 #define OV7670_R19_VSTART 0x19 /* Vert start high bits */
590 #define OV7670_R1A_VSTOP 0x1a /* Vert stop high bits */
591 #define OV7670_R1E_MVFP 0x1e /* Mirror / vflip */
592 #define OV7670_MVFP_VFLIP 0x10 /* vertical flip */
593 #define OV7670_MVFP_MIRROR 0x20 /* Mirror image */
594 #define OV7670_R24_AEW 0x24 /* AGC upper limit */
595 #define OV7670_R25_AEB 0x25 /* AGC lower limit */
596 #define OV7670_R26_VPT 0x26 /* AGC/AEC fast mode op region */
597 #define OV7670_R32_HREF 0x32 /* HREF pieces */
598 #define OV7670_R3A_TSLB 0x3a /* lots of stuff */
599 #define OV7670_R3B_COM11 0x3b /* Control 11 */
600 #define OV7670_COM11_EXP 0x02
601 #define OV7670_COM11_HZAUTO 0x10 /* Auto detect 50/60 Hz */
602 #define OV7670_R3C_COM12 0x3c /* Control 12 */
603 #define OV7670_R3D_COM13 0x3d /* Control 13 */
604 #define OV7670_COM13_GAMMA 0x80 /* Gamma enable */
605 #define OV7670_COM13_UVSAT 0x40 /* UV saturation auto adjustment */
606 #define OV7670_R3E_COM14 0x3e /* Control 14 */
607 #define OV7670_R3F_EDGE 0x3f /* Edge enhancement factor */
608 #define OV7670_R40_COM15 0x40 /* Control 15 */
609 /*#define OV7670_COM15_R00FF 0xc0 * 00 to FF */
610 #define OV7670_R41_COM16 0x41 /* Control 16 */
611 #define OV7670_COM16_AWBGAIN 0x08 /* AWB gain enable */
612 /* end of ov7660 common registers */
613 #define OV7670_R55_BRIGHT 0x55 /* Brightness */
614 #define OV7670_R56_CONTRAS 0x56 /* Contrast control */
615 #define OV7670_R69_GFIX 0x69 /* Fix gain control */
616 /*#define OV7670_R8C_RGB444 0x8c * RGB 444 control */
617 #define OV7670_R9F_HAECC1 0x9f /* Hist AEC/AGC control 1 */
618 #define OV7670_RA0_HAECC2 0xa0 /* Hist AEC/AGC control 2 */
619 #define OV7670_RA5_BD50MAX 0xa5 /* 50hz banding step limit */
620 #define OV7670_RA6_HAECC3 0xa6 /* Hist AEC/AGC control 3 */
621 #define OV7670_RA7_HAECC4 0xa7 /* Hist AEC/AGC control 4 */
622 #define OV7670_RA8_HAECC5 0xa8 /* Hist AEC/AGC control 5 */
623 #define OV7670_RA9_HAECC6 0xa9 /* Hist AEC/AGC control 6 */
624 #define OV7670_RAA_HAECC7 0xaa /* Hist AEC/AGC control 7 */
625 #define OV7670_RAB_BD60MAX 0xab /* 60hz banding step limit */
626 
627 struct ov_regvals {
630 };
634 };
635 
636 /* Settings for OV2610 camera chip */
637 static const struct ov_i2c_regvals norm_2610[] = {
638  { 0x12, 0x80 }, /* reset */
639 };
640 
641 static const struct ov_i2c_regvals norm_2610ae[] = {
642  {0x12, 0x80}, /* reset */
643  {0x13, 0xcd},
644  {0x09, 0x01},
645  {0x0d, 0x00},
646  {0x11, 0x80},
647  {0x12, 0x20}, /* 1600x1200 */
648  {0x33, 0x0c},
649  {0x35, 0x90},
650  {0x36, 0x37},
651 /* ms-win traces */
652  {0x11, 0x83}, /* clock / 3 ? */
653  {0x2d, 0x00}, /* 60 Hz filter */
654  {0x24, 0xb0}, /* normal colors */
655  {0x25, 0x90},
656  {0x10, 0x43},
657 };
658 
659 static const struct ov_i2c_regvals norm_3620b[] = {
660  /*
661  * From the datasheet: "Note that after writing to register COMH
662  * (0x12) to change the sensor mode, registers related to the
663  * sensor’s cropping window will be reset back to their default
664  * values."
665  *
666  * "wait 4096 external clock ... to make sure the sensor is
667  * stable and ready to access registers" i.e. 160us at 24MHz
668  */
669  { 0x12, 0x80 }, /* COMH reset */
670  { 0x12, 0x00 }, /* QXGA, master */
671 
672  /*
673  * 11 CLKRC "Clock Rate Control"
674  * [7] internal frequency doublers: on
675  * [6] video port mode: master
676  * [5:0] clock divider: 1
677  */
678  { 0x11, 0x80 },
679 
680  /*
681  * 13 COMI "Common Control I"
682  * = 192 (0xC0) 11000000
683  * COMI[7] "AEC speed selection"
684  * = 1 (0x01) 1....... "Faster AEC correction"
685  * COMI[6] "AEC speed step selection"
686  * = 1 (0x01) .1...... "Big steps, fast"
687  * COMI[5] "Banding filter on off"
688  * = 0 (0x00) ..0..... "Off"
689  * COMI[4] "Banding filter option"
690  * = 0 (0x00) ...0.... "Main clock is 48 MHz and
691  * the PLL is ON"
692  * COMI[3] "Reserved"
693  * = 0 (0x00) ....0...
694  * COMI[2] "AGC auto manual control selection"
695  * = 0 (0x00) .....0.. "Manual"
696  * COMI[1] "AWB auto manual control selection"
697  * = 0 (0x00) ......0. "Manual"
698  * COMI[0] "Exposure control"
699  * = 0 (0x00) .......0 "Manual"
700  */
701  { 0x13, 0xc0 },
702 
703  /*
704  * 09 COMC "Common Control C"
705  * = 8 (0x08) 00001000
706  * COMC[7:5] "Reserved"
707  * = 0 (0x00) 000.....
708  * COMC[4] "Sleep Mode Enable"
709  * = 0 (0x00) ...0.... "Normal mode"
710  * COMC[3:2] "Sensor sampling reset timing selection"
711  * = 2 (0x02) ....10.. "Longer reset time"
712  * COMC[1:0] "Output drive current select"
713  * = 0 (0x00) ......00 "Weakest"
714  */
715  { 0x09, 0x08 },
716 
717  /*
718  * 0C COMD "Common Control D"
719  * = 8 (0x08) 00001000
720  * COMD[7] "Reserved"
721  * = 0 (0x00) 0.......
722  * COMD[6] "Swap MSB and LSB at the output port"
723  * = 0 (0x00) .0...... "False"
724  * COMD[5:3] "Reserved"
725  * = 1 (0x01) ..001...
726  * COMD[2] "Output Average On Off"
727  * = 0 (0x00) .....0.. "Output Normal"
728  * COMD[1] "Sensor precharge voltage selection"
729  * = 0 (0x00) ......0. "Selects internal
730  * reference precharge
731  * voltage"
732  * COMD[0] "Snapshot option"
733  * = 0 (0x00) .......0 "Enable live video output
734  * after snapshot sequence"
735  */
736  { 0x0c, 0x08 },
737 
738  /*
739  * 0D COME "Common Control E"
740  * = 161 (0xA1) 10100001
741  * COME[7] "Output average option"
742  * = 1 (0x01) 1....... "Output average of 4 pixels"
743  * COME[6] "Anti-blooming control"
744  * = 0 (0x00) .0...... "Off"
745  * COME[5:3] "Reserved"
746  * = 4 (0x04) ..100...
747  * COME[2] "Clock output power down pin status"
748  * = 0 (0x00) .....0.. "Tri-state data output pin
749  * on power down"
750  * COME[1] "Data output pin status selection at power down"
751  * = 0 (0x00) ......0. "Tri-state VSYNC, PCLK,
752  * HREF, and CHSYNC pins on
753  * power down"
754  * COME[0] "Auto zero circuit select"
755  * = 1 (0x01) .......1 "On"
756  */
757  { 0x0d, 0xa1 },
758 
759  /*
760  * 0E COMF "Common Control F"
761  * = 112 (0x70) 01110000
762  * COMF[7] "System clock selection"
763  * = 0 (0x00) 0....... "Use 24 MHz system clock"
764  * COMF[6:4] "Reserved"
765  * = 7 (0x07) .111....
766  * COMF[3] "Manual auto negative offset canceling selection"
767  * = 0 (0x00) ....0... "Auto detect negative
768  * offset and cancel it"
769  * COMF[2:0] "Reserved"
770  * = 0 (0x00) .....000
771  */
772  { 0x0e, 0x70 },
773 
774  /*
775  * 0F COMG "Common Control G"
776  * = 66 (0x42) 01000010
777  * COMG[7] "Optical black output selection"
778  * = 0 (0x00) 0....... "Disable"
779  * COMG[6] "Black level calibrate selection"
780  * = 1 (0x01) .1...... "Use optical black pixels
781  * to calibrate"
782  * COMG[5:4] "Reserved"
783  * = 0 (0x00) ..00....
784  * COMG[3] "Channel offset adjustment"
785  * = 0 (0x00) ....0... "Disable offset adjustment"
786  * COMG[2] "ADC black level calibration option"
787  * = 0 (0x00) .....0.. "Use B/G line and G/R
788  * line to calibrate each
789  * channel's black level"
790  * COMG[1] "Reserved"
791  * = 1 (0x01) ......1.
792  * COMG[0] "ADC black level calibration enable"
793  * = 0 (0x00) .......0 "Disable"
794  */
795  { 0x0f, 0x42 },
796 
797  /*
798  * 14 COMJ "Common Control J"
799  * = 198 (0xC6) 11000110
800  * COMJ[7:6] "AGC gain ceiling"
801  * = 3 (0x03) 11...... "8x"
802  * COMJ[5:4] "Reserved"
803  * = 0 (0x00) ..00....
804  * COMJ[3] "Auto banding filter"
805  * = 0 (0x00) ....0... "Banding filter is always
806  * on off depending on
807  * COMI[5] setting"
808  * COMJ[2] "VSYNC drop option"
809  * = 1 (0x01) .....1.. "SYNC is dropped if frame
810  * data is dropped"
811  * COMJ[1] "Frame data drop"
812  * = 1 (0x01) ......1. "Drop frame data if
813  * exposure is not within
814  * tolerance. In AEC mode,
815  * data is normally dropped
816  * when data is out of
817  * range."
818  * COMJ[0] "Reserved"
819  * = 0 (0x00) .......0
820  */
821  { 0x14, 0xc6 },
822 
823  /*
824  * 15 COMK "Common Control K"
825  * = 2 (0x02) 00000010
826  * COMK[7] "CHSYNC pin output swap"
827  * = 0 (0x00) 0....... "CHSYNC"
828  * COMK[6] "HREF pin output swap"
829  * = 0 (0x00) .0...... "HREF"
830  * COMK[5] "PCLK output selection"
831  * = 0 (0x00) ..0..... "PCLK always output"
832  * COMK[4] "PCLK edge selection"
833  * = 0 (0x00) ...0.... "Data valid on falling edge"
834  * COMK[3] "HREF output polarity"
835  * = 0 (0x00) ....0... "positive"
836  * COMK[2] "Reserved"
837  * = 0 (0x00) .....0..
838  * COMK[1] "VSYNC polarity"
839  * = 1 (0x01) ......1. "negative"
840  * COMK[0] "HSYNC polarity"
841  * = 0 (0x00) .......0 "positive"
842  */
843  { 0x15, 0x02 },
844 
845  /*
846  * 33 CHLF "Current Control"
847  * = 9 (0x09) 00001001
848  * CHLF[7:6] "Sensor current control"
849  * = 0 (0x00) 00......
850  * CHLF[5] "Sensor current range control"
851  * = 0 (0x00) ..0..... "normal range"
852  * CHLF[4] "Sensor current"
853  * = 0 (0x00) ...0.... "normal current"
854  * CHLF[3] "Sensor buffer current control"
855  * = 1 (0x01) ....1... "half current"
856  * CHLF[2] "Column buffer current control"
857  * = 0 (0x00) .....0.. "normal current"
858  * CHLF[1] "Analog DSP current control"
859  * = 0 (0x00) ......0. "normal current"
860  * CHLF[1] "ADC current control"
861  * = 0 (0x00) ......0. "normal current"
862  */
863  { 0x33, 0x09 },
864 
865  /*
866  * 34 VBLM "Blooming Control"
867  * = 80 (0x50) 01010000
868  * VBLM[7] "Hard soft reset switch"
869  * = 0 (0x00) 0....... "Hard reset"
870  * VBLM[6:4] "Blooming voltage selection"
871  * = 5 (0x05) .101....
872  * VBLM[3:0] "Sensor current control"
873  * = 0 (0x00) ....0000
874  */
875  { 0x34, 0x50 },
876 
877  /*
878  * 36 VCHG "Sensor Precharge Voltage Control"
879  * = 0 (0x00) 00000000
880  * VCHG[7] "Reserved"
881  * = 0 (0x00) 0.......
882  * VCHG[6:4] "Sensor precharge voltage control"
883  * = 0 (0x00) .000....
884  * VCHG[3:0] "Sensor array common reference"
885  * = 0 (0x00) ....0000
886  */
887  { 0x36, 0x00 },
888 
889  /*
890  * 37 ADC "ADC Reference Control"
891  * = 4 (0x04) 00000100
892  * ADC[7:4] "Reserved"
893  * = 0 (0x00) 0000....
894  * ADC[3] "ADC input signal range"
895  * = 0 (0x00) ....0... "Input signal 1.0x"
896  * ADC[2:0] "ADC range control"
897  * = 4 (0x04) .....100
898  */
899  { 0x37, 0x04 },
900 
901  /*
902  * 38 ACOM "Analog Common Ground"
903  * = 82 (0x52) 01010010
904  * ACOM[7] "Analog gain control"
905  * = 0 (0x00) 0....... "Gain 1x"
906  * ACOM[6] "Analog black level calibration"
907  * = 1 (0x01) .1...... "On"
908  * ACOM[5:0] "Reserved"
909  * = 18 (0x12) ..010010
910  */
911  { 0x38, 0x52 },
912 
913  /*
914  * 3A FREFA "Internal Reference Adjustment"
915  * = 0 (0x00) 00000000
916  * FREFA[7:0] "Range"
917  * = 0 (0x00) 00000000
918  */
919  { 0x3a, 0x00 },
920 
921  /*
922  * 3C FVOPT "Internal Reference Adjustment"
923  * = 31 (0x1F) 00011111
924  * FVOPT[7:0] "Range"
925  * = 31 (0x1F) 00011111
926  */
927  { 0x3c, 0x1f },
928 
929  /*
930  * 44 Undocumented = 0 (0x00) 00000000
931  * 44[7:0] "It's a secret"
932  * = 0 (0x00) 00000000
933  */
934  { 0x44, 0x00 },
935 
936  /*
937  * 40 Undocumented = 0 (0x00) 00000000
938  * 40[7:0] "It's a secret"
939  * = 0 (0x00) 00000000
940  */
941  { 0x40, 0x00 },
942 
943  /*
944  * 41 Undocumented = 0 (0x00) 00000000
945  * 41[7:0] "It's a secret"
946  * = 0 (0x00) 00000000
947  */
948  { 0x41, 0x00 },
949 
950  /*
951  * 42 Undocumented = 0 (0x00) 00000000
952  * 42[7:0] "It's a secret"
953  * = 0 (0x00) 00000000
954  */
955  { 0x42, 0x00 },
956 
957  /*
958  * 43 Undocumented = 0 (0x00) 00000000
959  * 43[7:0] "It's a secret"
960  * = 0 (0x00) 00000000
961  */
962  { 0x43, 0x00 },
963 
964  /*
965  * 45 Undocumented = 128 (0x80) 10000000
966  * 45[7:0] "It's a secret"
967  * = 128 (0x80) 10000000
968  */
969  { 0x45, 0x80 },
970 
971  /*
972  * 48 Undocumented = 192 (0xC0) 11000000
973  * 48[7:0] "It's a secret"
974  * = 192 (0xC0) 11000000
975  */
976  { 0x48, 0xc0 },
977 
978  /*
979  * 49 Undocumented = 25 (0x19) 00011001
980  * 49[7:0] "It's a secret"
981  * = 25 (0x19) 00011001
982  */
983  { 0x49, 0x19 },
984 
985  /*
986  * 4B Undocumented = 128 (0x80) 10000000
987  * 4B[7:0] "It's a secret"
988  * = 128 (0x80) 10000000
989  */
990  { 0x4b, 0x80 },
991 
992  /*
993  * 4D Undocumented = 196 (0xC4) 11000100
994  * 4D[7:0] "It's a secret"
995  * = 196 (0xC4) 11000100
996  */
997  { 0x4d, 0xc4 },
998 
999  /*
1000  * 35 VREF "Reference Voltage Control"
1001  * = 76 (0x4c) 01001100
1002  * VREF[7:5] "Column high reference control"
1003  * = 2 (0x02) 010..... "higher voltage"
1004  * VREF[4:2] "Column low reference control"
1005  * = 3 (0x03) ...011.. "Highest voltage"
1006  * VREF[1:0] "Reserved"
1007  * = 0 (0x00) ......00
1008  */
1009  { 0x35, 0x4c },
1010 
1011  /*
1012  * 3D Undocumented = 0 (0x00) 00000000
1013  * 3D[7:0] "It's a secret"
1014  * = 0 (0x00) 00000000
1015  */
1016  { 0x3d, 0x00 },
1017 
1018  /*
1019  * 3E Undocumented = 0 (0x00) 00000000
1020  * 3E[7:0] "It's a secret"
1021  * = 0 (0x00) 00000000
1022  */
1023  { 0x3e, 0x00 },
1024 
1025  /*
1026  * 3B FREFB "Internal Reference Adjustment"
1027  * = 24 (0x18) 00011000
1028  * FREFB[7:0] "Range"
1029  * = 24 (0x18) 00011000
1030  */
1031  { 0x3b, 0x18 },
1032 
1033  /*
1034  * 33 CHLF "Current Control"
1035  * = 25 (0x19) 00011001
1036  * CHLF[7:6] "Sensor current control"
1037  * = 0 (0x00) 00......
1038  * CHLF[5] "Sensor current range control"
1039  * = 0 (0x00) ..0..... "normal range"
1040  * CHLF[4] "Sensor current"
1041  * = 1 (0x01) ...1.... "double current"
1042  * CHLF[3] "Sensor buffer current control"
1043  * = 1 (0x01) ....1... "half current"
1044  * CHLF[2] "Column buffer current control"
1045  * = 0 (0x00) .....0.. "normal current"
1046  * CHLF[1] "Analog DSP current control"
1047  * = 0 (0x00) ......0. "normal current"
1048  * CHLF[1] "ADC current control"
1049  * = 0 (0x00) ......0. "normal current"
1050  */
1051  { 0x33, 0x19 },
1052 
1053  /*
1054  * 34 VBLM "Blooming Control"
1055  * = 90 (0x5A) 01011010
1056  * VBLM[7] "Hard soft reset switch"
1057  * = 0 (0x00) 0....... "Hard reset"
1058  * VBLM[6:4] "Blooming voltage selection"
1059  * = 5 (0x05) .101....
1060  * VBLM[3:0] "Sensor current control"
1061  * = 10 (0x0A) ....1010
1062  */
1063  { 0x34, 0x5a },
1064 
1065  /*
1066  * 3B FREFB "Internal Reference Adjustment"
1067  * = 0 (0x00) 00000000
1068  * FREFB[7:0] "Range"
1069  * = 0 (0x00) 00000000
1070  */
1071  { 0x3b, 0x00 },
1072 
1073  /*
1074  * 33 CHLF "Current Control"
1075  * = 9 (0x09) 00001001
1076  * CHLF[7:6] "Sensor current control"
1077  * = 0 (0x00) 00......
1078  * CHLF[5] "Sensor current range control"
1079  * = 0 (0x00) ..0..... "normal range"
1080  * CHLF[4] "Sensor current"
1081  * = 0 (0x00) ...0.... "normal current"
1082  * CHLF[3] "Sensor buffer current control"
1083  * = 1 (0x01) ....1... "half current"
1084  * CHLF[2] "Column buffer current control"
1085  * = 0 (0x00) .....0.. "normal current"
1086  * CHLF[1] "Analog DSP current control"
1087  * = 0 (0x00) ......0. "normal current"
1088  * CHLF[1] "ADC current control"
1089  * = 0 (0x00) ......0. "normal current"
1090  */
1091  { 0x33, 0x09 },
1092 
1093  /*
1094  * 34 VBLM "Blooming Control"
1095  * = 80 (0x50) 01010000
1096  * VBLM[7] "Hard soft reset switch"
1097  * = 0 (0x00) 0....... "Hard reset"
1098  * VBLM[6:4] "Blooming voltage selection"
1099  * = 5 (0x05) .101....
1100  * VBLM[3:0] "Sensor current control"
1101  * = 0 (0x00) ....0000
1102  */
1103  { 0x34, 0x50 },
1104 
1105  /*
1106  * 12 COMH "Common Control H"
1107  * = 64 (0x40) 01000000
1108  * COMH[7] "SRST"
1109  * = 0 (0x00) 0....... "No-op"
1110  * COMH[6:4] "Resolution selection"
1111  * = 4 (0x04) .100.... "XGA"
1112  * COMH[3] "Master slave selection"
1113  * = 0 (0x00) ....0... "Master mode"
1114  * COMH[2] "Internal B/R channel option"
1115  * = 0 (0x00) .....0.. "B/R use same channel"
1116  * COMH[1] "Color bar test pattern"
1117  * = 0 (0x00) ......0. "Off"
1118  * COMH[0] "Reserved"
1119  * = 0 (0x00) .......0
1120  */
1121  { 0x12, 0x40 },
1122 
1123  /*
1124  * 17 HREFST "Horizontal window start"
1125  * = 31 (0x1F) 00011111
1126  * HREFST[7:0] "Horizontal window start, 8 MSBs"
1127  * = 31 (0x1F) 00011111
1128  */
1129  { 0x17, 0x1f },
1130 
1131  /*
1132  * 18 HREFEND "Horizontal window end"
1133  * = 95 (0x5F) 01011111
1134  * HREFEND[7:0] "Horizontal Window End, 8 MSBs"
1135  * = 95 (0x5F) 01011111
1136  */
1137  { 0x18, 0x5f },
1138 
1139  /*
1140  * 19 VSTRT "Vertical window start"
1141  * = 0 (0x00) 00000000
1142  * VSTRT[7:0] "Vertical Window Start, 8 MSBs"
1143  * = 0 (0x00) 00000000
1144  */
1145  { 0x19, 0x00 },
1146 
1147  /*
1148  * 1A VEND "Vertical window end"
1149  * = 96 (0x60) 01100000
1150  * VEND[7:0] "Vertical Window End, 8 MSBs"
1151  * = 96 (0x60) 01100000
1152  */
1153  { 0x1a, 0x60 },
1154 
1155  /*
1156  * 32 COMM "Common Control M"
1157  * = 18 (0x12) 00010010
1158  * COMM[7:6] "Pixel clock divide option"
1159  * = 0 (0x00) 00...... "/1"
1160  * COMM[5:3] "Horizontal window end position, 3 LSBs"
1161  * = 2 (0x02) ..010...
1162  * COMM[2:0] "Horizontal window start position, 3 LSBs"
1163  * = 2 (0x02) .....010
1164  */
1165  { 0x32, 0x12 },
1166 
1167  /*
1168  * 03 COMA "Common Control A"
1169  * = 74 (0x4A) 01001010
1170  * COMA[7:4] "AWB Update Threshold"
1171  * = 4 (0x04) 0100....
1172  * COMA[3:2] "Vertical window end line control 2 LSBs"
1173  * = 2 (0x02) ....10..
1174  * COMA[1:0] "Vertical window start line control 2 LSBs"
1175  * = 2 (0x02) ......10
1176  */
1177  { 0x03, 0x4a },
1178 
1179  /*
1180  * 11 CLKRC "Clock Rate Control"
1181  * = 128 (0x80) 10000000
1182  * CLKRC[7] "Internal frequency doublers on off seclection"
1183  * = 1 (0x01) 1....... "On"
1184  * CLKRC[6] "Digital video master slave selection"
1185  * = 0 (0x00) .0...... "Master mode, sensor
1186  * provides PCLK"
1187  * CLKRC[5:0] "Clock divider { CLK = PCLK/(1+CLKRC[5:0]) }"
1188  * = 0 (0x00) ..000000
1189  */
1190  { 0x11, 0x80 },
1191 
1192  /*
1193  * 12 COMH "Common Control H"
1194  * = 0 (0x00) 00000000
1195  * COMH[7] "SRST"
1196  * = 0 (0x00) 0....... "No-op"
1197  * COMH[6:4] "Resolution selection"
1198  * = 0 (0x00) .000.... "QXGA"
1199  * COMH[3] "Master slave selection"
1200  * = 0 (0x00) ....0... "Master mode"
1201  * COMH[2] "Internal B/R channel option"
1202  * = 0 (0x00) .....0.. "B/R use same channel"
1203  * COMH[1] "Color bar test pattern"
1204  * = 0 (0x00) ......0. "Off"
1205  * COMH[0] "Reserved"
1206  * = 0 (0x00) .......0
1207  */
1208  { 0x12, 0x00 },
1209 
1210  /*
1211  * 12 COMH "Common Control H"
1212  * = 64 (0x40) 01000000
1213  * COMH[7] "SRST"
1214  * = 0 (0x00) 0....... "No-op"
1215  * COMH[6:4] "Resolution selection"
1216  * = 4 (0x04) .100.... "XGA"
1217  * COMH[3] "Master slave selection"
1218  * = 0 (0x00) ....0... "Master mode"
1219  * COMH[2] "Internal B/R channel option"
1220  * = 0 (0x00) .....0.. "B/R use same channel"
1221  * COMH[1] "Color bar test pattern"
1222  * = 0 (0x00) ......0. "Off"
1223  * COMH[0] "Reserved"
1224  * = 0 (0x00) .......0
1225  */
1226  { 0x12, 0x40 },
1227 
1228  /*
1229  * 17 HREFST "Horizontal window start"
1230  * = 31 (0x1F) 00011111
1231  * HREFST[7:0] "Horizontal window start, 8 MSBs"
1232  * = 31 (0x1F) 00011111
1233  */
1234  { 0x17, 0x1f },
1235 
1236  /*
1237  * 18 HREFEND "Horizontal window end"
1238  * = 95 (0x5F) 01011111
1239  * HREFEND[7:0] "Horizontal Window End, 8 MSBs"
1240  * = 95 (0x5F) 01011111
1241  */
1242  { 0x18, 0x5f },
1243 
1244  /*
1245  * 19 VSTRT "Vertical window start"
1246  * = 0 (0x00) 00000000
1247  * VSTRT[7:0] "Vertical Window Start, 8 MSBs"
1248  * = 0 (0x00) 00000000
1249  */
1250  { 0x19, 0x00 },
1251 
1252  /*
1253  * 1A VEND "Vertical window end"
1254  * = 96 (0x60) 01100000
1255  * VEND[7:0] "Vertical Window End, 8 MSBs"
1256  * = 96 (0x60) 01100000
1257  */
1258  { 0x1a, 0x60 },
1259 
1260  /*
1261  * 32 COMM "Common Control M"
1262  * = 18 (0x12) 00010010
1263  * COMM[7:6] "Pixel clock divide option"
1264  * = 0 (0x00) 00...... "/1"
1265  * COMM[5:3] "Horizontal window end position, 3 LSBs"
1266  * = 2 (0x02) ..010...
1267  * COMM[2:0] "Horizontal window start position, 3 LSBs"
1268  * = 2 (0x02) .....010
1269  */
1270  { 0x32, 0x12 },
1271 
1272  /*
1273  * 03 COMA "Common Control A"
1274  * = 74 (0x4A) 01001010
1275  * COMA[7:4] "AWB Update Threshold"
1276  * = 4 (0x04) 0100....
1277  * COMA[3:2] "Vertical window end line control 2 LSBs"
1278  * = 2 (0x02) ....10..
1279  * COMA[1:0] "Vertical window start line control 2 LSBs"
1280  * = 2 (0x02) ......10
1281  */
1282  { 0x03, 0x4a },
1283 
1284  /*
1285  * 02 RED "Red Gain Control"
1286  * = 175 (0xAF) 10101111
1287  * RED[7] "Action"
1288  * = 1 (0x01) 1....... "gain = 1/(1+bitrev([6:0]))"
1289  * RED[6:0] "Value"
1290  * = 47 (0x2F) .0101111
1291  */
1292  { 0x02, 0xaf },
1293 
1294  /*
1295  * 2D ADDVSL "VSYNC Pulse Width"
1296  * = 210 (0xD2) 11010010
1297  * ADDVSL[7:0] "VSYNC pulse width, LSB"
1298  * = 210 (0xD2) 11010010
1299  */
1300  { 0x2d, 0xd2 },
1301 
1302  /*
1303  * 00 GAIN = 24 (0x18) 00011000
1304  * GAIN[7:6] "Reserved"
1305  * = 0 (0x00) 00......
1306  * GAIN[5] "Double"
1307  * = 0 (0x00) ..0..... "False"
1308  * GAIN[4] "Double"
1309  * = 1 (0x01) ...1.... "True"
1310  * GAIN[3:0] "Range"
1311  * = 8 (0x08) ....1000
1312  */
1313  { 0x00, 0x18 },
1314 
1315  /*
1316  * 01 BLUE "Blue Gain Control"
1317  * = 240 (0xF0) 11110000
1318  * BLUE[7] "Action"
1319  * = 1 (0x01) 1....... "gain = 1/(1+bitrev([6:0]))"
1320  * BLUE[6:0] "Value"
1321  * = 112 (0x70) .1110000
1322  */
1323  { 0x01, 0xf0 },
1324 
1325  /*
1326  * 10 AEC "Automatic Exposure Control"
1327  * = 10 (0x0A) 00001010
1328  * AEC[7:0] "Automatic Exposure Control, 8 MSBs"
1329  * = 10 (0x0A) 00001010
1330  */
1331  { 0x10, 0x0a },
1332 
1333  { 0xe1, 0x67 },
1334  { 0xe3, 0x03 },
1335  { 0xe4, 0x26 },
1336  { 0xe5, 0x3e },
1337  { 0xf8, 0x01 },
1338  { 0xff, 0x01 },
1339 };
1340 
1341 static const struct ov_i2c_regvals norm_6x20[] = {
1342  { 0x12, 0x80 }, /* reset */
1343  { 0x11, 0x01 },
1344  { 0x03, 0x60 },
1345  { 0x05, 0x7f }, /* For when autoadjust is off */
1346  { 0x07, 0xa8 },
1347  /* The ratio of 0x0c and 0x0d controls the white point */
1348  { 0x0c, 0x24 },
1349  { 0x0d, 0x24 },
1350  { 0x0f, 0x15 }, /* COMS */
1351  { 0x10, 0x75 }, /* AEC Exposure time */
1352  { 0x12, 0x24 }, /* Enable AGC */
1353  { 0x14, 0x04 },
1354  /* 0x16: 0x06 helps frame stability with moving objects */
1355  { 0x16, 0x06 },
1356 /* { 0x20, 0x30 }, * Aperture correction enable */
1357  { 0x26, 0xb2 }, /* BLC enable */
1358  /* 0x28: 0x05 Selects RGB format if RGB on */
1359  { 0x28, 0x05 },
1360  { 0x2a, 0x04 }, /* Disable framerate adjust */
1361 /* { 0x2b, 0xac }, * Framerate; Set 2a[7] first */
1362  { 0x2d, 0x85 },
1363  { 0x33, 0xa0 }, /* Color Processing Parameter */
1364  { 0x34, 0xd2 }, /* Max A/D range */
1365  { 0x38, 0x8b },
1366  { 0x39, 0x40 },
1367 
1368  { 0x3c, 0x39 }, /* Enable AEC mode changing */
1369  { 0x3c, 0x3c }, /* Change AEC mode */
1370  { 0x3c, 0x24 }, /* Disable AEC mode changing */
1371 
1372  { 0x3d, 0x80 },
1373  /* These next two registers (0x4a, 0x4b) are undocumented.
1374  * They control the color balance */
1375  { 0x4a, 0x80 },
1376  { 0x4b, 0x80 },
1377  { 0x4d, 0xd2 }, /* This reduces noise a bit */
1378  { 0x4e, 0xc1 },
1379  { 0x4f, 0x04 },
1380 /* Do 50-53 have any effect? */
1381 /* Toggle 0x12[2] off and on here? */
1382 };
1383 
1384 static const struct ov_i2c_regvals norm_6x30[] = {
1385  { 0x12, 0x80 }, /* Reset */
1386  { 0x00, 0x1f }, /* Gain */
1387  { 0x01, 0x99 }, /* Blue gain */
1388  { 0x02, 0x7c }, /* Red gain */
1389  { 0x03, 0xc0 }, /* Saturation */
1390  { 0x05, 0x0a }, /* Contrast */
1391  { 0x06, 0x95 }, /* Brightness */
1392  { 0x07, 0x2d }, /* Sharpness */
1393  { 0x0c, 0x20 },
1394  { 0x0d, 0x20 },
1395  { 0x0e, 0xa0 }, /* Was 0x20, bit7 enables a 2x gain which we need */
1396  { 0x0f, 0x05 },
1397  { 0x10, 0x9a },
1398  { 0x11, 0x00 }, /* Pixel clock = fastest */
1399  { 0x12, 0x24 }, /* Enable AGC and AWB */
1400  { 0x13, 0x21 },
1401  { 0x14, 0x80 },
1402  { 0x15, 0x01 },
1403  { 0x16, 0x03 },
1404  { 0x17, 0x38 },
1405  { 0x18, 0xea },
1406  { 0x19, 0x04 },
1407  { 0x1a, 0x93 },
1408  { 0x1b, 0x00 },
1409  { 0x1e, 0xc4 },
1410  { 0x1f, 0x04 },
1411  { 0x20, 0x20 },
1412  { 0x21, 0x10 },
1413  { 0x22, 0x88 },
1414  { 0x23, 0xc0 }, /* Crystal circuit power level */
1415  { 0x25, 0x9a }, /* Increase AEC black ratio */
1416  { 0x26, 0xb2 }, /* BLC enable */
1417  { 0x27, 0xa2 },
1418  { 0x28, 0x00 },
1419  { 0x29, 0x00 },
1420  { 0x2a, 0x84 }, /* 60 Hz power */
1421  { 0x2b, 0xa8 }, /* 60 Hz power */
1422  { 0x2c, 0xa0 },
1423  { 0x2d, 0x95 }, /* Enable auto-brightness */
1424  { 0x2e, 0x88 },
1425  { 0x33, 0x26 },
1426  { 0x34, 0x03 },
1427  { 0x36, 0x8f },
1428  { 0x37, 0x80 },
1429  { 0x38, 0x83 },
1430  { 0x39, 0x80 },
1431  { 0x3a, 0x0f },
1432  { 0x3b, 0x3c },
1433  { 0x3c, 0x1a },
1434  { 0x3d, 0x80 },
1435  { 0x3e, 0x80 },
1436  { 0x3f, 0x0e },
1437  { 0x40, 0x00 }, /* White bal */
1438  { 0x41, 0x00 }, /* White bal */
1439  { 0x42, 0x80 },
1440  { 0x43, 0x3f }, /* White bal */
1441  { 0x44, 0x80 },
1442  { 0x45, 0x20 },
1443  { 0x46, 0x20 },
1444  { 0x47, 0x80 },
1445  { 0x48, 0x7f },
1446  { 0x49, 0x00 },
1447  { 0x4a, 0x00 },
1448  { 0x4b, 0x80 },
1449  { 0x4c, 0xd0 },
1450  { 0x4d, 0x10 }, /* U = 0.563u, V = 0.714v */
1451  { 0x4e, 0x40 },
1452  { 0x4f, 0x07 }, /* UV avg., col. killer: max */
1453  { 0x50, 0xff },
1454  { 0x54, 0x23 }, /* Max AGC gain: 18dB */
1455  { 0x55, 0xff },
1456  { 0x56, 0x12 },
1457  { 0x57, 0x81 },
1458  { 0x58, 0x75 },
1459  { 0x59, 0x01 }, /* AGC dark current comp.: +1 */
1460  { 0x5a, 0x2c },
1461  { 0x5b, 0x0f }, /* AWB chrominance levels */
1462  { 0x5c, 0x10 },
1463  { 0x3d, 0x80 },
1464  { 0x27, 0xa6 },
1465  { 0x12, 0x20 }, /* Toggle AWB */
1466  { 0x12, 0x24 },
1467 };
1468 
1469 /* Lawrence Glaister <[email protected]> reports:
1470  *
1471  * Register 0x0f in the 7610 has the following effects:
1472  *
1473  * 0x85 (AEC method 1): Best overall, good contrast range
1474  * 0x45 (AEC method 2): Very overexposed
1475  * 0xa5 (spec sheet default): Ok, but the black level is
1476  * shifted resulting in loss of contrast
1477  * 0x05 (old driver setting): very overexposed, too much
1478  * contrast
1479  */
1480 static const struct ov_i2c_regvals norm_7610[] = {
1481  { 0x10, 0xff },
1482  { 0x16, 0x06 },
1483  { 0x28, 0x24 },
1484  { 0x2b, 0xac },
1485  { 0x12, 0x00 },
1486  { 0x38, 0x81 },
1487  { 0x28, 0x24 }, /* 0c */
1488  { 0x0f, 0x85 }, /* lg's setting */
1489  { 0x15, 0x01 },
1490  { 0x20, 0x1c },
1491  { 0x23, 0x2a },
1492  { 0x24, 0x10 },
1493  { 0x25, 0x8a },
1494  { 0x26, 0xa2 },
1495  { 0x27, 0xc2 },
1496  { 0x2a, 0x04 },
1497  { 0x2c, 0xfe },
1498  { 0x2d, 0x93 },
1499  { 0x30, 0x71 },
1500  { 0x31, 0x60 },
1501  { 0x32, 0x26 },
1502  { 0x33, 0x20 },
1503  { 0x34, 0x48 },
1504  { 0x12, 0x24 },
1505  { 0x11, 0x01 },
1506  { 0x0c, 0x24 },
1507  { 0x0d, 0x24 },
1508 };
1509 
1510 static const struct ov_i2c_regvals norm_7620[] = {
1511  { 0x12, 0x80 }, /* reset */
1512  { 0x00, 0x00 }, /* gain */
1513  { 0x01, 0x80 }, /* blue gain */
1514  { 0x02, 0x80 }, /* red gain */
1515  { 0x03, 0xc0 }, /* OV7670_R03_VREF */
1516  { 0x06, 0x60 },
1517  { 0x07, 0x00 },
1518  { 0x0c, 0x24 },
1519  { 0x0c, 0x24 },
1520  { 0x0d, 0x24 },
1521  { 0x11, 0x01 },
1522  { 0x12, 0x24 },
1523  { 0x13, 0x01 },
1524  { 0x14, 0x84 },
1525  { 0x15, 0x01 },
1526  { 0x16, 0x03 },
1527  { 0x17, 0x2f },
1528  { 0x18, 0xcf },
1529  { 0x19, 0x06 },
1530  { 0x1a, 0xf5 },
1531  { 0x1b, 0x00 },
1532  { 0x20, 0x18 },
1533  { 0x21, 0x80 },
1534  { 0x22, 0x80 },
1535  { 0x23, 0x00 },
1536  { 0x26, 0xa2 },
1537  { 0x27, 0xea },
1538  { 0x28, 0x22 }, /* Was 0x20, bit1 enables a 2x gain which we need */
1539  { 0x29, 0x00 },
1540  { 0x2a, 0x10 },
1541  { 0x2b, 0x00 },
1542  { 0x2c, 0x88 },
1543  { 0x2d, 0x91 },
1544  { 0x2e, 0x80 },
1545  { 0x2f, 0x44 },
1546  { 0x60, 0x27 },
1547  { 0x61, 0x02 },
1548  { 0x62, 0x5f },
1549  { 0x63, 0xd5 },
1550  { 0x64, 0x57 },
1551  { 0x65, 0x83 },
1552  { 0x66, 0x55 },
1553  { 0x67, 0x92 },
1554  { 0x68, 0xcf },
1555  { 0x69, 0x76 },
1556  { 0x6a, 0x22 },
1557  { 0x6b, 0x00 },
1558  { 0x6c, 0x02 },
1559  { 0x6d, 0x44 },
1560  { 0x6e, 0x80 },
1561  { 0x6f, 0x1d },
1562  { 0x70, 0x8b },
1563  { 0x71, 0x00 },
1564  { 0x72, 0x14 },
1565  { 0x73, 0x54 },
1566  { 0x74, 0x00 },
1567  { 0x75, 0x8e },
1568  { 0x76, 0x00 },
1569  { 0x77, 0xff },
1570  { 0x78, 0x80 },
1571  { 0x79, 0x80 },
1572  { 0x7a, 0x80 },
1573  { 0x7b, 0xe2 },
1574  { 0x7c, 0x00 },
1575 };
1576 
1577 /* 7640 and 7648. The defaults should be OK for most registers. */
1578 static const struct ov_i2c_regvals norm_7640[] = {
1579  { 0x12, 0x80 },
1580  { 0x12, 0x14 },
1581 };
1582 
1583 static const struct ov_regvals init_519_ov7660[] = {
1584  { 0x5d, 0x03 }, /* Turn off suspend mode */
1585  { 0x53, 0x9b }, /* 0x9f enables the (unused) microcontroller */
1586  { 0x54, 0x0f }, /* bit2 (jpeg enable) */
1587  { 0xa2, 0x20 }, /* a2-a5 are undocumented */
1588  { 0xa3, 0x18 },
1589  { 0xa4, 0x04 },
1590  { 0xa5, 0x28 },
1591  { 0x37, 0x00 }, /* SetUsbInit */
1592  { 0x55, 0x02 }, /* 4.096 Mhz audio clock */
1593  /* Enable both fields, YUV Input, disable defect comp (why?) */
1594  { 0x20, 0x0c }, /* 0x0d does U <-> V swap */
1595  { 0x21, 0x38 },
1596  { 0x22, 0x1d },
1597  { 0x17, 0x50 }, /* undocumented */
1598  { 0x37, 0x00 }, /* undocumented */
1599  { 0x40, 0xff }, /* I2C timeout counter */
1600  { 0x46, 0x00 }, /* I2C clock prescaler */
1601 };
1602 static const struct ov_i2c_regvals norm_7660[] = {
1604  {OV7670_R11_CLKRC, 0x81},
1605  {0x92, 0x00}, /* DM_LNL */
1606  {0x93, 0x00}, /* DM_LNH */
1607  {0x9d, 0x4c}, /* BD50ST */
1608  {0x9e, 0x3f}, /* BD60ST */
1609  {OV7670_R3B_COM11, 0x02},
1610  {OV7670_R13_COM8, 0xf5},
1611  {OV7670_R10_AECH, 0x00},
1612  {OV7670_R00_GAIN, 0x00},
1613  {OV7670_R01_BLUE, 0x7c},
1614  {OV7670_R02_RED, 0x9d},
1615  {OV7670_R12_COM7, 0x00},
1616  {OV7670_R04_COM1, 00},
1617  {OV7670_R18_HSTOP, 0x01},
1618  {OV7670_R17_HSTART, 0x13},
1619  {OV7670_R32_HREF, 0x92},
1620  {OV7670_R19_VSTART, 0x02},
1621  {OV7670_R1A_VSTOP, 0x7a},
1622  {OV7670_R03_VREF, 0x00},
1623  {OV7670_R0E_COM5, 0x04},
1624  {OV7670_R0F_COM6, 0x62},
1625  {OV7670_R15_COM10, 0x00},
1626  {0x16, 0x02}, /* RSVD */
1627  {0x1b, 0x00}, /* PSHFT */
1628  {OV7670_R1E_MVFP, 0x01},
1629  {0x29, 0x3c}, /* RSVD */
1630  {0x33, 0x00}, /* CHLF */
1631  {0x34, 0x07}, /* ARBLM */
1632  {0x35, 0x84}, /* RSVD */
1633  {0x36, 0x00}, /* RSVD */
1634  {0x37, 0x04}, /* ADC */
1635  {0x39, 0x43}, /* OFON */
1636  {OV7670_R3A_TSLB, 0x00},
1637  {OV7670_R3C_COM12, 0x6c},
1638  {OV7670_R3D_COM13, 0x98},
1639  {OV7670_R3F_EDGE, 0x23},
1640  {OV7670_R40_COM15, 0xc1},
1641  {OV7670_R41_COM16, 0x22},
1642  {0x6b, 0x0a}, /* DBLV */
1643  {0xa1, 0x08}, /* RSVD */
1644  {0x69, 0x80}, /* HV */
1645  {0x43, 0xf0}, /* RSVD.. */
1646  {0x44, 0x10},
1647  {0x45, 0x78},
1648  {0x46, 0xa8},
1649  {0x47, 0x60},
1650  {0x48, 0x80},
1651  {0x59, 0xba},
1652  {0x5a, 0x9a},
1653  {0x5b, 0x22},
1654  {0x5c, 0xb9},
1655  {0x5d, 0x9b},
1656  {0x5e, 0x10},
1657  {0x5f, 0xe0},
1658  {0x60, 0x85},
1659  {0x61, 0x60},
1660  {0x9f, 0x9d}, /* RSVD */
1661  {0xa0, 0xa0}, /* DSPC2 */
1662  {0x4f, 0x60}, /* matrix */
1663  {0x50, 0x64},
1664  {0x51, 0x04},
1665  {0x52, 0x18},
1666  {0x53, 0x3c},
1667  {0x54, 0x54},
1668  {0x55, 0x40},
1669  {0x56, 0x40},
1670  {0x57, 0x40},
1671  {0x58, 0x0d}, /* matrix sign */
1672  {0x8b, 0xcc}, /* RSVD */
1673  {0x8c, 0xcc},
1674  {0x8d, 0xcf},
1675  {0x6c, 0x40}, /* gamma curve */
1676  {0x6d, 0xe0},
1677  {0x6e, 0xa0},
1678  {0x6f, 0x80},
1679  {0x70, 0x70},
1680  {0x71, 0x80},
1681  {0x72, 0x60},
1682  {0x73, 0x60},
1683  {0x74, 0x50},
1684  {0x75, 0x40},
1685  {0x76, 0x38},
1686  {0x77, 0x3c},
1687  {0x78, 0x32},
1688  {0x79, 0x1a},
1689  {0x7a, 0x28},
1690  {0x7b, 0x24},
1691  {0x7c, 0x04}, /* gamma curve */
1692  {0x7d, 0x12},
1693  {0x7e, 0x26},
1694  {0x7f, 0x46},
1695  {0x80, 0x54},
1696  {0x81, 0x64},
1697  {0x82, 0x70},
1698  {0x83, 0x7c},
1699  {0x84, 0x86},
1700  {0x85, 0x8e},
1701  {0x86, 0x9c},
1702  {0x87, 0xab},
1703  {0x88, 0xc4},
1704  {0x89, 0xd1},
1705  {0x8a, 0xe5},
1706  {OV7670_R14_COM9, 0x1e},
1707  {OV7670_R24_AEW, 0x80},
1708  {OV7670_R25_AEB, 0x72},
1709  {OV7670_R26_VPT, 0xb3},
1710  {0x62, 0x80}, /* LCC1 */
1711  {0x63, 0x80}, /* LCC2 */
1712  {0x64, 0x06}, /* LCC3 */
1713  {0x65, 0x00}, /* LCC4 */
1714  {0x66, 0x01}, /* LCC5 */
1715  {0x94, 0x0e}, /* RSVD.. */
1716  {0x95, 0x14},
1720  | 0x10
1721  | OV7670_COM8_AGC
1722  | OV7670_COM8_AWB
1723  | OV7670_COM8_AEC},
1724  {0xa1, 0xc8}
1725 };
1726 static const struct ov_i2c_regvals norm_9600[] = {
1727  {0x12, 0x80},
1728  {0x0c, 0x28},
1729  {0x11, 0x80},
1730  {0x13, 0xb5},
1731  {0x14, 0x3e},
1732  {0x1b, 0x04},
1733  {0x24, 0xb0},
1734  {0x25, 0x90},
1735  {0x26, 0x94},
1736  {0x35, 0x90},
1737  {0x37, 0x07},
1738  {0x38, 0x08},
1739  {0x01, 0x8e},
1740  {0x02, 0x85}
1741 };
1742 
1743 /* 7670. Defaults taken from OmniVision provided data,
1744 * as provided by Jonathan Corbet of OLPC */
1745 static const struct ov_i2c_regvals norm_7670[] = {
1747  { OV7670_R3A_TSLB, 0x04 }, /* OV */
1748  { OV7670_R12_COM7, OV7670_COM7_FMT_VGA }, /* VGA */
1749  { OV7670_R11_CLKRC, 0x01 },
1750 /*
1751  * Set the hardware window. These values from OV don't entirely
1752  * make sense - hstop is less than hstart. But they work...
1753  */
1754  { OV7670_R17_HSTART, 0x13 },
1755  { OV7670_R18_HSTOP, 0x01 },
1756  { OV7670_R32_HREF, 0xb6 },
1757  { OV7670_R19_VSTART, 0x02 },
1758  { OV7670_R1A_VSTOP, 0x7a },
1759  { OV7670_R03_VREF, 0x0a },
1760 
1761  { OV7670_R0C_COM3, 0x00 },
1762  { OV7670_R3E_COM14, 0x00 },
1763 /* Mystery scaling numbers */
1764  { 0x70, 0x3a },
1765  { 0x71, 0x35 },
1766  { 0x72, 0x11 },
1767  { 0x73, 0xf0 },
1768  { 0xa2, 0x02 },
1769 /* { OV7670_R15_COM10, 0x0 }, */
1770 
1771 /* Gamma curve values */
1772  { 0x7a, 0x20 },
1773  { 0x7b, 0x10 },
1774  { 0x7c, 0x1e },
1775  { 0x7d, 0x35 },
1776  { 0x7e, 0x5a },
1777  { 0x7f, 0x69 },
1778  { 0x80, 0x76 },
1779  { 0x81, 0x80 },
1780  { 0x82, 0x88 },
1781  { 0x83, 0x8f },
1782  { 0x84, 0x96 },
1783  { 0x85, 0xa3 },
1784  { 0x86, 0xaf },
1785  { 0x87, 0xc4 },
1786  { 0x88, 0xd7 },
1787  { 0x89, 0xe8 },
1788 
1789 /* AGC and AEC parameters. Note we start by disabling those features,
1790  then turn them only after tweaking the values. */
1793  | OV7670_COM8_BFILT },
1794  { OV7670_R00_GAIN, 0x00 },
1795  { OV7670_R10_AECH, 0x00 },
1796  { OV7670_R0D_COM4, 0x40 }, /* magic reserved bit */
1797  { OV7670_R14_COM9, 0x18 }, /* 4x gain + magic rsvd bit */
1798  { OV7670_RA5_BD50MAX, 0x05 },
1799  { OV7670_RAB_BD60MAX, 0x07 },
1800  { OV7670_R24_AEW, 0x95 },
1801  { OV7670_R25_AEB, 0x33 },
1802  { OV7670_R26_VPT, 0xe3 },
1803  { OV7670_R9F_HAECC1, 0x78 },
1804  { OV7670_RA0_HAECC2, 0x68 },
1805  { 0xa1, 0x03 }, /* magic */
1806  { OV7670_RA6_HAECC3, 0xd8 },
1807  { OV7670_RA7_HAECC4, 0xd8 },
1808  { OV7670_RA8_HAECC5, 0xf0 },
1809  { OV7670_RA9_HAECC6, 0x90 },
1810  { OV7670_RAA_HAECC7, 0x94 },
1814  | OV7670_COM8_AGC
1815  | OV7670_COM8_AEC },
1816 
1817 /* Almost all of these are magic "reserved" values. */
1818  { OV7670_R0E_COM5, 0x61 },
1819  { OV7670_R0F_COM6, 0x4b },
1820  { 0x16, 0x02 },
1821  { OV7670_R1E_MVFP, 0x07 },
1822  { 0x21, 0x02 },
1823  { 0x22, 0x91 },
1824  { 0x29, 0x07 },
1825  { 0x33, 0x0b },
1826  { 0x35, 0x0b },
1827  { 0x37, 0x1d },
1828  { 0x38, 0x71 },
1829  { 0x39, 0x2a },
1830  { OV7670_R3C_COM12, 0x78 },
1831  { 0x4d, 0x40 },
1832  { 0x4e, 0x20 },
1833  { OV7670_R69_GFIX, 0x00 },
1834  { 0x6b, 0x4a },
1835  { 0x74, 0x10 },
1836  { 0x8d, 0x4f },
1837  { 0x8e, 0x00 },
1838  { 0x8f, 0x00 },
1839  { 0x90, 0x00 },
1840  { 0x91, 0x00 },
1841  { 0x96, 0x00 },
1842  { 0x9a, 0x00 },
1843  { 0xb0, 0x84 },
1844  { 0xb1, 0x0c },
1845  { 0xb2, 0x0e },
1846  { 0xb3, 0x82 },
1847  { 0xb8, 0x0a },
1848 
1849 /* More reserved magic, some of which tweaks white balance */
1850  { 0x43, 0x0a },
1851  { 0x44, 0xf0 },
1852  { 0x45, 0x34 },
1853  { 0x46, 0x58 },
1854  { 0x47, 0x28 },
1855  { 0x48, 0x3a },
1856  { 0x59, 0x88 },
1857  { 0x5a, 0x88 },
1858  { 0x5b, 0x44 },
1859  { 0x5c, 0x67 },
1860  { 0x5d, 0x49 },
1861  { 0x5e, 0x0e },
1862  { 0x6c, 0x0a },
1863  { 0x6d, 0x55 },
1864  { 0x6e, 0x11 },
1865  { 0x6f, 0x9f }, /* "9e for advance AWB" */
1866  { 0x6a, 0x40 },
1867  { OV7670_R01_BLUE, 0x40 },
1868  { OV7670_R02_RED, 0x60 },
1872  | OV7670_COM8_AGC
1873  | OV7670_COM8_AEC
1874  | OV7670_COM8_AWB },
1875 
1876 /* Matrix coefficients */
1877  { 0x4f, 0x80 },
1878  { 0x50, 0x80 },
1879  { 0x51, 0x00 },
1880  { 0x52, 0x22 },
1881  { 0x53, 0x5e },
1882  { 0x54, 0x80 },
1883  { 0x58, 0x9e },
1884 
1886  { OV7670_R3F_EDGE, 0x00 },
1887  { 0x75, 0x05 },
1888  { 0x76, 0xe1 },
1889  { 0x4c, 0x00 },
1890  { 0x77, 0x01 },
1893  | 2}, /* was 3 */
1894  { 0x4b, 0x09 },
1895  { 0xc9, 0x60 },
1896  { OV7670_R41_COM16, 0x38 },
1897  { 0x56, 0x40 },
1898 
1899  { 0x34, 0x11 },
1901  { 0xa4, 0x88 },
1902  { 0x96, 0x00 },
1903  { 0x97, 0x30 },
1904  { 0x98, 0x20 },
1905  { 0x99, 0x30 },
1906  { 0x9a, 0x84 },
1907  { 0x9b, 0x29 },
1908  { 0x9c, 0x03 },
1909  { 0x9d, 0x4c },
1910  { 0x9e, 0x3f },
1911  { 0x78, 0x04 },
1912 
1913 /* Extra-weird stuff. Some sort of multiplexor register */
1914  { 0x79, 0x01 },
1915  { 0xc8, 0xf0 },
1916  { 0x79, 0x0f },
1917  { 0xc8, 0x00 },
1918  { 0x79, 0x10 },
1919  { 0xc8, 0x7e },
1920  { 0x79, 0x0a },
1921  { 0xc8, 0x80 },
1922  { 0x79, 0x0b },
1923  { 0xc8, 0x01 },
1924  { 0x79, 0x0c },
1925  { 0xc8, 0x0f },
1926  { 0x79, 0x0d },
1927  { 0xc8, 0x20 },
1928  { 0x79, 0x09 },
1929  { 0xc8, 0x80 },
1930  { 0x79, 0x02 },
1931  { 0xc8, 0xc0 },
1932  { 0x79, 0x03 },
1933  { 0xc8, 0x40 },
1934  { 0x79, 0x05 },
1935  { 0xc8, 0x30 },
1936  { 0x79, 0x26 },
1937 };
1938 
1939 static const struct ov_i2c_regvals norm_8610[] = {
1940  { 0x12, 0x80 },
1941  { 0x00, 0x00 },
1942  { 0x01, 0x80 },
1943  { 0x02, 0x80 },
1944  { 0x03, 0xc0 },
1945  { 0x04, 0x30 },
1946  { 0x05, 0x30 }, /* was 0x10, new from windrv 090403 */
1947  { 0x06, 0x70 }, /* was 0x80, new from windrv 090403 */
1948  { 0x0a, 0x86 },
1949  { 0x0b, 0xb0 },
1950  { 0x0c, 0x20 },
1951  { 0x0d, 0x20 },
1952  { 0x11, 0x01 },
1953  { 0x12, 0x25 },
1954  { 0x13, 0x01 },
1955  { 0x14, 0x04 },
1956  { 0x15, 0x01 }, /* Lin and Win think different about UV order */
1957  { 0x16, 0x03 },
1958  { 0x17, 0x38 }, /* was 0x2f, new from windrv 090403 */
1959  { 0x18, 0xea }, /* was 0xcf, new from windrv 090403 */
1960  { 0x19, 0x02 }, /* was 0x06, new from windrv 090403 */
1961  { 0x1a, 0xf5 },
1962  { 0x1b, 0x00 },
1963  { 0x20, 0xd0 }, /* was 0x90, new from windrv 090403 */
1964  { 0x23, 0xc0 }, /* was 0x00, new from windrv 090403 */
1965  { 0x24, 0x30 }, /* was 0x1d, new from windrv 090403 */
1966  { 0x25, 0x50 }, /* was 0x57, new from windrv 090403 */
1967  { 0x26, 0xa2 },
1968  { 0x27, 0xea },
1969  { 0x28, 0x00 },
1970  { 0x29, 0x00 },
1971  { 0x2a, 0x80 },
1972  { 0x2b, 0xc8 }, /* was 0xcc, new from windrv 090403 */
1973  { 0x2c, 0xac },
1974  { 0x2d, 0x45 }, /* was 0xd5, new from windrv 090403 */
1975  { 0x2e, 0x80 },
1976  { 0x2f, 0x14 }, /* was 0x01, new from windrv 090403 */
1977  { 0x4c, 0x00 },
1978  { 0x4d, 0x30 }, /* was 0x10, new from windrv 090403 */
1979  { 0x60, 0x02 }, /* was 0x01, new from windrv 090403 */
1980  { 0x61, 0x00 }, /* was 0x09, new from windrv 090403 */
1981  { 0x62, 0x5f }, /* was 0xd7, new from windrv 090403 */
1982  { 0x63, 0xff },
1983  { 0x64, 0x53 }, /* new windrv 090403 says 0x57,
1984  * maybe thats wrong */
1985  { 0x65, 0x00 },
1986  { 0x66, 0x55 },
1987  { 0x67, 0xb0 },
1988  { 0x68, 0xc0 }, /* was 0xaf, new from windrv 090403 */
1989  { 0x69, 0x02 },
1990  { 0x6a, 0x22 },
1991  { 0x6b, 0x00 },
1992  { 0x6c, 0x99 }, /* was 0x80, old windrv says 0x00, but
1993  * deleting bit7 colors the first images red */
1994  { 0x6d, 0x11 }, /* was 0x00, new from windrv 090403 */
1995  { 0x6e, 0x11 }, /* was 0x00, new from windrv 090403 */
1996  { 0x6f, 0x01 },
1997  { 0x70, 0x8b },
1998  { 0x71, 0x00 },
1999  { 0x72, 0x14 },
2000  { 0x73, 0x54 },
2001  { 0x74, 0x00 },/* 0x60? - was 0x00, new from windrv 090403 */
2002  { 0x75, 0x0e },
2003  { 0x76, 0x02 }, /* was 0x02, new from windrv 090403 */
2004  { 0x77, 0xff },
2005  { 0x78, 0x80 },
2006  { 0x79, 0x80 },
2007  { 0x7a, 0x80 },
2008  { 0x7b, 0x10 }, /* was 0x13, new from windrv 090403 */
2009  { 0x7c, 0x00 },
2010  { 0x7d, 0x08 }, /* was 0x09, new from windrv 090403 */
2011  { 0x7e, 0x08 }, /* was 0xc0, new from windrv 090403 */
2012  { 0x7f, 0xfb },
2013  { 0x80, 0x28 },
2014  { 0x81, 0x00 },
2015  { 0x82, 0x23 },
2016  { 0x83, 0x0b },
2017  { 0x84, 0x00 },
2018  { 0x85, 0x62 }, /* was 0x61, new from windrv 090403 */
2019  { 0x86, 0xc9 },
2020  { 0x87, 0x00 },
2021  { 0x88, 0x00 },
2022  { 0x89, 0x01 },
2023  { 0x12, 0x20 },
2024  { 0x12, 0x25 }, /* was 0x24, new from windrv 090403 */
2025 };
2026 
2027 static unsigned char ov7670_abs_to_sm(unsigned char v)
2028 {
2029  if (v > 127)
2030  return v & 0x7f;
2031  return (128 - v) | 0x80;
2032 }
2033 
2034 /* Write a OV519 register */
2035 static void reg_w(struct sd *sd, u16 index, u16 value)
2036 {
2037  int ret, req = 0;
2038 
2039  if (sd->gspca_dev.usb_err < 0)
2040  return;
2041 
2042  switch (sd->bridge) {
2043  case BRIDGE_OV511:
2044  case BRIDGE_OV511PLUS:
2045  req = 2;
2046  break;
2047  case BRIDGE_OVFX2:
2048  req = 0x0a;
2049  /* fall through */
2050  case BRIDGE_W9968CF:
2051  PDEBUG(D_USBO, "SET %02x %04x %04x",
2052  req, value, index);
2053  ret = usb_control_msg(sd->gspca_dev.dev,
2054  usb_sndctrlpipe(sd->gspca_dev.dev, 0),
2055  req,
2057  value, index, NULL, 0, 500);
2058  goto leave;
2059  default:
2060  req = 1;
2061  }
2062 
2063  PDEBUG(D_USBO, "SET %02x 0000 %04x %02x",
2064  req, index, value);
2065  sd->gspca_dev.usb_buf[0] = value;
2066  ret = usb_control_msg(sd->gspca_dev.dev,
2067  usb_sndctrlpipe(sd->gspca_dev.dev, 0),
2068  req,
2070  0, index,
2071  sd->gspca_dev.usb_buf, 1, 500);
2072 leave:
2073  if (ret < 0) {
2074  pr_err("reg_w %02x failed %d\n", index, ret);
2075  sd->gspca_dev.usb_err = ret;
2076  return;
2077  }
2078 }
2079 
2080 /* Read from a OV519 register, note not valid for the w9968cf!! */
2081 /* returns: negative is error, pos or zero is data */
2082 static int reg_r(struct sd *sd, u16 index)
2083 {
2084  int ret;
2085  int req;
2086 
2087  if (sd->gspca_dev.usb_err < 0)
2088  return -1;
2089 
2090  switch (sd->bridge) {
2091  case BRIDGE_OV511:
2092  case BRIDGE_OV511PLUS:
2093  req = 3;
2094  break;
2095  case BRIDGE_OVFX2:
2096  req = 0x0b;
2097  break;
2098  default:
2099  req = 1;
2100  }
2101 
2102  ret = usb_control_msg(sd->gspca_dev.dev,
2103  usb_rcvctrlpipe(sd->gspca_dev.dev, 0),
2104  req,
2106  0, index, sd->gspca_dev.usb_buf, 1, 500);
2107 
2108  if (ret >= 0) {
2109  ret = sd->gspca_dev.usb_buf[0];
2110  PDEBUG(D_USBI, "GET %02x 0000 %04x %02x",
2111  req, index, ret);
2112  } else {
2113  pr_err("reg_r %02x failed %d\n", index, ret);
2114  sd->gspca_dev.usb_err = ret;
2115  }
2116 
2117  return ret;
2118 }
2119 
2120 /* Read 8 values from a OV519 register */
2121 static int reg_r8(struct sd *sd,
2122  u16 index)
2123 {
2124  int ret;
2125 
2126  if (sd->gspca_dev.usb_err < 0)
2127  return -1;
2128 
2129  ret = usb_control_msg(sd->gspca_dev.dev,
2130  usb_rcvctrlpipe(sd->gspca_dev.dev, 0),
2131  1, /* REQ_IO */
2133  0, index, sd->gspca_dev.usb_buf, 8, 500);
2134 
2135  if (ret >= 0) {
2136  ret = sd->gspca_dev.usb_buf[0];
2137  } else {
2138  pr_err("reg_r8 %02x failed %d\n", index, ret);
2139  sd->gspca_dev.usb_err = ret;
2140  }
2141 
2142  return ret;
2143 }
2144 
2145 /*
2146  * Writes bits at positions specified by mask to an OV51x reg. Bits that are in
2147  * the same position as 1's in "mask" are cleared and set to "value". Bits
2148  * that are in the same position as 0's in "mask" are preserved, regardless
2149  * of their respective state in "value".
2150  */
2151 static void reg_w_mask(struct sd *sd,
2152  u16 index,
2153  u8 value,
2154  u8 mask)
2155 {
2156  int ret;
2157  u8 oldval;
2158 
2159  if (mask != 0xff) {
2160  value &= mask; /* Enforce mask on value */
2161  ret = reg_r(sd, index);
2162  if (ret < 0)
2163  return;
2164 
2165  oldval = ret & ~mask; /* Clear the masked bits */
2166  value |= oldval; /* Set the desired bits */
2167  }
2168  reg_w(sd, index, value);
2169 }
2170 
2171 /*
2172  * Writes multiple (n) byte value to a single register. Only valid with certain
2173  * registers (0x30 and 0xc4 - 0xce).
2174  */
2175 static void ov518_reg_w32(struct sd *sd, u16 index, u32 value, int n)
2176 {
2177  int ret;
2178 
2179  if (sd->gspca_dev.usb_err < 0)
2180  return;
2181 
2182  *((__le32 *) sd->gspca_dev.usb_buf) = __cpu_to_le32(value);
2183 
2184  ret = usb_control_msg(sd->gspca_dev.dev,
2185  usb_sndctrlpipe(sd->gspca_dev.dev, 0),
2186  1 /* REG_IO */,
2188  0, index,
2189  sd->gspca_dev.usb_buf, n, 500);
2190  if (ret < 0) {
2191  pr_err("reg_w32 %02x failed %d\n", index, ret);
2192  sd->gspca_dev.usb_err = ret;
2193  }
2194 }
2195 
2196 static void ov511_i2c_w(struct sd *sd, u8 reg, u8 value)
2197 {
2198  int rc, retries;
2199 
2200  PDEBUG(D_USBO, "ov511_i2c_w %02x %02x", reg, value);
2201 
2202  /* Three byte write cycle */
2203  for (retries = 6; ; ) {
2204  /* Select camera register */
2205  reg_w(sd, R51x_I2C_SADDR_3, reg);
2206 
2207  /* Write "value" to I2C data port of OV511 */
2208  reg_w(sd, R51x_I2C_DATA, value);
2209 
2210  /* Initiate 3-byte write cycle */
2211  reg_w(sd, R511_I2C_CTL, 0x01);
2212 
2213  do {
2214  rc = reg_r(sd, R511_I2C_CTL);
2215  } while (rc > 0 && ((rc & 1) == 0)); /* Retry until idle */
2216 
2217  if (rc < 0)
2218  return;
2219 
2220  if ((rc & 2) == 0) /* Ack? */
2221  break;
2222  if (--retries < 0) {
2223  PDEBUG(D_USBO, "i2c write retries exhausted");
2224  return;
2225  }
2226  }
2227 }
2228 
2229 static int ov511_i2c_r(struct sd *sd, u8 reg)
2230 {
2231  int rc, value, retries;
2232 
2233  /* Two byte write cycle */
2234  for (retries = 6; ; ) {
2235  /* Select camera register */
2236  reg_w(sd, R51x_I2C_SADDR_2, reg);
2237 
2238  /* Initiate 2-byte write cycle */
2239  reg_w(sd, R511_I2C_CTL, 0x03);
2240 
2241  do {
2242  rc = reg_r(sd, R511_I2C_CTL);
2243  } while (rc > 0 && ((rc & 1) == 0)); /* Retry until idle */
2244 
2245  if (rc < 0)
2246  return rc;
2247 
2248  if ((rc & 2) == 0) /* Ack? */
2249  break;
2250 
2251  /* I2C abort */
2252  reg_w(sd, R511_I2C_CTL, 0x10);
2253 
2254  if (--retries < 0) {
2255  PDEBUG(D_USBI, "i2c write retries exhausted");
2256  return -1;
2257  }
2258  }
2259 
2260  /* Two byte read cycle */
2261  for (retries = 6; ; ) {
2262  /* Initiate 2-byte read cycle */
2263  reg_w(sd, R511_I2C_CTL, 0x05);
2264 
2265  do {
2266  rc = reg_r(sd, R511_I2C_CTL);
2267  } while (rc > 0 && ((rc & 1) == 0)); /* Retry until idle */
2268 
2269  if (rc < 0)
2270  return rc;
2271 
2272  if ((rc & 2) == 0) /* Ack? */
2273  break;
2274 
2275  /* I2C abort */
2276  reg_w(sd, R511_I2C_CTL, 0x10);
2277 
2278  if (--retries < 0) {
2279  PDEBUG(D_USBI, "i2c read retries exhausted");
2280  return -1;
2281  }
2282  }
2283 
2284  value = reg_r(sd, R51x_I2C_DATA);
2285 
2286  PDEBUG(D_USBI, "ov511_i2c_r %02x %02x", reg, value);
2287 
2288  /* This is needed to make i2c_w() work */
2289  reg_w(sd, R511_I2C_CTL, 0x05);
2290 
2291  return value;
2292 }
2293 
2294 /*
2295  * The OV518 I2C I/O procedure is different, hence, this function.
2296  * This is normally only called from i2c_w(). Note that this function
2297  * always succeeds regardless of whether the sensor is present and working.
2298  */
2299 static void ov518_i2c_w(struct sd *sd,
2300  u8 reg,
2301  u8 value)
2302 {
2303  PDEBUG(D_USBO, "ov518_i2c_w %02x %02x", reg, value);
2304 
2305  /* Select camera register */
2306  reg_w(sd, R51x_I2C_SADDR_3, reg);
2307 
2308  /* Write "value" to I2C data port of OV511 */
2309  reg_w(sd, R51x_I2C_DATA, value);
2310 
2311  /* Initiate 3-byte write cycle */
2312  reg_w(sd, R518_I2C_CTL, 0x01);
2313 
2314  /* wait for write complete */
2315  msleep(4);
2316  reg_r8(sd, R518_I2C_CTL);
2317 }
2318 
2319 /*
2320  * returns: negative is error, pos or zero is data
2321  *
2322  * The OV518 I2C I/O procedure is different, hence, this function.
2323  * This is normally only called from i2c_r(). Note that this function
2324  * always succeeds regardless of whether the sensor is present and working.
2325  */
2326 static int ov518_i2c_r(struct sd *sd, u8 reg)
2327 {
2328  int value;
2329 
2330  /* Select camera register */
2331  reg_w(sd, R51x_I2C_SADDR_2, reg);
2332 
2333  /* Initiate 2-byte write cycle */
2334  reg_w(sd, R518_I2C_CTL, 0x03);
2335  reg_r8(sd, R518_I2C_CTL);
2336 
2337  /* Initiate 2-byte read cycle */
2338  reg_w(sd, R518_I2C_CTL, 0x05);
2339  reg_r8(sd, R518_I2C_CTL);
2340 
2341  value = reg_r(sd, R51x_I2C_DATA);
2342  PDEBUG(D_USBI, "ov518_i2c_r %02x %02x", reg, value);
2343  return value;
2344 }
2345 
2346 static void ovfx2_i2c_w(struct sd *sd, u8 reg, u8 value)
2347 {
2348  int ret;
2349 
2350  if (sd->gspca_dev.usb_err < 0)
2351  return;
2352 
2353  ret = usb_control_msg(sd->gspca_dev.dev,
2354  usb_sndctrlpipe(sd->gspca_dev.dev, 0),
2355  0x02,
2357  (u16) value, (u16) reg, NULL, 0, 500);
2358 
2359  if (ret < 0) {
2360  pr_err("ovfx2_i2c_w %02x failed %d\n", reg, ret);
2361  sd->gspca_dev.usb_err = ret;
2362  }
2363 
2364  PDEBUG(D_USBO, "ovfx2_i2c_w %02x %02x", reg, value);
2365 }
2366 
2367 static int ovfx2_i2c_r(struct sd *sd, u8 reg)
2368 {
2369  int ret;
2370 
2371  if (sd->gspca_dev.usb_err < 0)
2372  return -1;
2373 
2374  ret = usb_control_msg(sd->gspca_dev.dev,
2375  usb_rcvctrlpipe(sd->gspca_dev.dev, 0),
2376  0x03,
2378  0, (u16) reg, sd->gspca_dev.usb_buf, 1, 500);
2379 
2380  if (ret >= 0) {
2381  ret = sd->gspca_dev.usb_buf[0];
2382  PDEBUG(D_USBI, "ovfx2_i2c_r %02x %02x", reg, ret);
2383  } else {
2384  pr_err("ovfx2_i2c_r %02x failed %d\n", reg, ret);
2385  sd->gspca_dev.usb_err = ret;
2386  }
2387 
2388  return ret;
2389 }
2390 
2391 static void i2c_w(struct sd *sd, u8 reg, u8 value)
2392 {
2393  if (sd->sensor_reg_cache[reg] == value)
2394  return;
2395 
2396  switch (sd->bridge) {
2397  case BRIDGE_OV511:
2398  case BRIDGE_OV511PLUS:
2399  ov511_i2c_w(sd, reg, value);
2400  break;
2401  case BRIDGE_OV518:
2402  case BRIDGE_OV518PLUS:
2403  case BRIDGE_OV519:
2404  ov518_i2c_w(sd, reg, value);
2405  break;
2406  case BRIDGE_OVFX2:
2407  ovfx2_i2c_w(sd, reg, value);
2408  break;
2409  case BRIDGE_W9968CF:
2410  w9968cf_i2c_w(sd, reg, value);
2411  break;
2412  }
2413 
2414  if (sd->gspca_dev.usb_err >= 0) {
2415  /* Up on sensor reset empty the register cache */
2416  if (reg == 0x12 && (value & 0x80))
2417  memset(sd->sensor_reg_cache, -1,
2418  sizeof(sd->sensor_reg_cache));
2419  else
2420  sd->sensor_reg_cache[reg] = value;
2421  }
2422 }
2423 
2424 static int i2c_r(struct sd *sd, u8 reg)
2425 {
2426  int ret = -1;
2427 
2428  if (sd->sensor_reg_cache[reg] != -1)
2429  return sd->sensor_reg_cache[reg];
2430 
2431  switch (sd->bridge) {
2432  case BRIDGE_OV511:
2433  case BRIDGE_OV511PLUS:
2434  ret = ov511_i2c_r(sd, reg);
2435  break;
2436  case BRIDGE_OV518:
2437  case BRIDGE_OV518PLUS:
2438  case BRIDGE_OV519:
2439  ret = ov518_i2c_r(sd, reg);
2440  break;
2441  case BRIDGE_OVFX2:
2442  ret = ovfx2_i2c_r(sd, reg);
2443  break;
2444  case BRIDGE_W9968CF:
2445  ret = w9968cf_i2c_r(sd, reg);
2446  break;
2447  }
2448 
2449  if (ret >= 0)
2450  sd->sensor_reg_cache[reg] = ret;
2451 
2452  return ret;
2453 }
2454 
2455 /* Writes bits at positions specified by mask to an I2C reg. Bits that are in
2456  * the same position as 1's in "mask" are cleared and set to "value". Bits
2457  * that are in the same position as 0's in "mask" are preserved, regardless
2458  * of their respective state in "value".
2459  */
2460 static void i2c_w_mask(struct sd *sd,
2461  u8 reg,
2462  u8 value,
2463  u8 mask)
2464 {
2465  int rc;
2466  u8 oldval;
2467 
2468  value &= mask; /* Enforce mask on value */
2469  rc = i2c_r(sd, reg);
2470  if (rc < 0)
2471  return;
2472  oldval = rc & ~mask; /* Clear the masked bits */
2473  value |= oldval; /* Set the desired bits */
2474  i2c_w(sd, reg, value);
2475 }
2476 
2477 /* Temporarily stops OV511 from functioning. Must do this before changing
2478  * registers while the camera is streaming */
2479 static inline void ov51x_stop(struct sd *sd)
2480 {
2481  PDEBUG(D_STREAM, "stopping");
2482  sd->stopped = 1;
2483  switch (sd->bridge) {
2484  case BRIDGE_OV511:
2485  case BRIDGE_OV511PLUS:
2486  reg_w(sd, R51x_SYS_RESET, 0x3d);
2487  break;
2488  case BRIDGE_OV518:
2489  case BRIDGE_OV518PLUS:
2490  reg_w_mask(sd, R51x_SYS_RESET, 0x3a, 0x3a);
2491  break;
2492  case BRIDGE_OV519:
2493  reg_w(sd, OV519_R51_RESET1, 0x0f);
2494  reg_w(sd, OV519_R51_RESET1, 0x00);
2495  reg_w(sd, 0x22, 0x00); /* FRAR */
2496  break;
2497  case BRIDGE_OVFX2:
2498  reg_w_mask(sd, 0x0f, 0x00, 0x02);
2499  break;
2500  case BRIDGE_W9968CF:
2501  reg_w(sd, 0x3c, 0x0a05); /* stop USB transfer */
2502  break;
2503  }
2504 }
2505 
2506 /* Restarts OV511 after ov511_stop() is called. Has no effect if it is not
2507  * actually stopped (for performance). */
2508 static inline void ov51x_restart(struct sd *sd)
2509 {
2510  PDEBUG(D_STREAM, "restarting");
2511  if (!sd->stopped)
2512  return;
2513  sd->stopped = 0;
2514 
2515  /* Reinitialize the stream */
2516  switch (sd->bridge) {
2517  case BRIDGE_OV511:
2518  case BRIDGE_OV511PLUS:
2519  reg_w(sd, R51x_SYS_RESET, 0x00);
2520  break;
2521  case BRIDGE_OV518:
2522  case BRIDGE_OV518PLUS:
2523  reg_w(sd, 0x2f, 0x80);
2524  reg_w(sd, R51x_SYS_RESET, 0x00);
2525  break;
2526  case BRIDGE_OV519:
2527  reg_w(sd, OV519_R51_RESET1, 0x0f);
2528  reg_w(sd, OV519_R51_RESET1, 0x00);
2529  reg_w(sd, 0x22, 0x1d); /* FRAR */
2530  break;
2531  case BRIDGE_OVFX2:
2532  reg_w_mask(sd, 0x0f, 0x02, 0x02);
2533  break;
2534  case BRIDGE_W9968CF:
2535  reg_w(sd, 0x3c, 0x8a05); /* USB FIFO enable */
2536  break;
2537  }
2538 }
2539 
2540 static void ov51x_set_slave_ids(struct sd *sd, u8 slave);
2541 
2542 /* This does an initial reset of an OmniVision sensor and ensures that I2C
2543  * is synchronized. Returns <0 on failure.
2544  */
2545 static int init_ov_sensor(struct sd *sd, u8 slave)
2546 {
2547  int i;
2548 
2549  ov51x_set_slave_ids(sd, slave);
2550 
2551  /* Reset the sensor */
2552  i2c_w(sd, 0x12, 0x80);
2553 
2554  /* Wait for it to initialize */
2555  msleep(150);
2556 
2557  for (i = 0; i < i2c_detect_tries; i++) {
2558  if (i2c_r(sd, OV7610_REG_ID_HIGH) == 0x7f &&
2559  i2c_r(sd, OV7610_REG_ID_LOW) == 0xa2) {
2560  PDEBUG(D_PROBE, "I2C synced in %d attempt(s)", i);
2561  return 0;
2562  }
2563 
2564  /* Reset the sensor */
2565  i2c_w(sd, 0x12, 0x80);
2566 
2567  /* Wait for it to initialize */
2568  msleep(150);
2569 
2570  /* Dummy read to sync I2C */
2571  if (i2c_r(sd, 0x00) < 0)
2572  return -1;
2573  }
2574  return -1;
2575 }
2576 
2577 /* Set the read and write slave IDs. The "slave" argument is the write slave,
2578  * and the read slave will be set to (slave + 1).
2579  * This should not be called from outside the i2c I/O functions.
2580  * Sets I2C read and write slave IDs. Returns <0 for error
2581  */
2582 static void ov51x_set_slave_ids(struct sd *sd,
2583  u8 slave)
2584 {
2585  switch (sd->bridge) {
2586  case BRIDGE_OVFX2:
2587  reg_w(sd, OVFX2_I2C_ADDR, slave);
2588  return;
2589  case BRIDGE_W9968CF:
2590  sd->sensor_addr = slave;
2591  return;
2592  }
2593 
2594  reg_w(sd, R51x_I2C_W_SID, slave);
2595  reg_w(sd, R51x_I2C_R_SID, slave + 1);
2596 }
2597 
2598 static void write_regvals(struct sd *sd,
2599  const struct ov_regvals *regvals,
2600  int n)
2601 {
2602  while (--n >= 0) {
2603  reg_w(sd, regvals->reg, regvals->val);
2604  regvals++;
2605  }
2606 }
2607 
2608 static void write_i2c_regvals(struct sd *sd,
2609  const struct ov_i2c_regvals *regvals,
2610  int n)
2611 {
2612  while (--n >= 0) {
2613  i2c_w(sd, regvals->reg, regvals->val);
2614  regvals++;
2615  }
2616 }
2617 
2618 /****************************************************************************
2619  *
2620  * OV511 and sensor configuration
2621  *
2622  ***************************************************************************/
2623 
2624 /* This initializes the OV2x10 / OV3610 / OV3620 / OV9600 */
2625 static void ov_hires_configure(struct sd *sd)
2626 {
2627  int high, low;
2628 
2629  if (sd->bridge != BRIDGE_OVFX2) {
2630  pr_err("error hires sensors only supported with ovfx2\n");
2631  return;
2632  }
2633 
2634  PDEBUG(D_PROBE, "starting ov hires configuration");
2635 
2636  /* Detect sensor (sub)type */
2637  high = i2c_r(sd, 0x0a);
2638  low = i2c_r(sd, 0x0b);
2639  /* info("%x, %x", high, low); */
2640  switch (high) {
2641  case 0x96:
2642  switch (low) {
2643  case 0x40:
2644  PDEBUG(D_PROBE, "Sensor is a OV2610");
2645  sd->sensor = SEN_OV2610;
2646  return;
2647  case 0x41:
2648  PDEBUG(D_PROBE, "Sensor is a OV2610AE");
2649  sd->sensor = SEN_OV2610AE;
2650  return;
2651  case 0xb1:
2652  PDEBUG(D_PROBE, "Sensor is a OV9600");
2653  sd->sensor = SEN_OV9600;
2654  return;
2655  }
2656  break;
2657  case 0x36:
2658  if ((low & 0x0f) == 0x00) {
2659  PDEBUG(D_PROBE, "Sensor is a OV3610");
2660  sd->sensor = SEN_OV3610;
2661  return;
2662  }
2663  break;
2664  }
2665  pr_err("Error unknown sensor type: %02x%02x\n", high, low);
2666 }
2667 
2668 /* This initializes the OV8110, OV8610 sensor. The OV8110 uses
2669  * the same register settings as the OV8610, since they are very similar.
2670  */
2671 static void ov8xx0_configure(struct sd *sd)
2672 {
2673  int rc;
2674 
2675  PDEBUG(D_PROBE, "starting ov8xx0 configuration");
2676 
2677  /* Detect sensor (sub)type */
2678  rc = i2c_r(sd, OV7610_REG_COM_I);
2679  if (rc < 0) {
2680  PDEBUG(D_ERR, "Error detecting sensor type");
2681  return;
2682  }
2683  if ((rc & 3) == 1)
2684  sd->sensor = SEN_OV8610;
2685  else
2686  pr_err("Unknown image sensor version: %d\n", rc & 3);
2687 }
2688 
2689 /* This initializes the OV7610, OV7620, or OV76BE sensor. The OV76BE uses
2690  * the same register settings as the OV7610, since they are very similar.
2691  */
2692 static void ov7xx0_configure(struct sd *sd)
2693 {
2694  int rc, high, low;
2695 
2696  PDEBUG(D_PROBE, "starting OV7xx0 configuration");
2697 
2698  /* Detect sensor (sub)type */
2699  rc = i2c_r(sd, OV7610_REG_COM_I);
2700 
2701  /* add OV7670 here
2702  * it appears to be wrongly detected as a 7610 by default */
2703  if (rc < 0) {
2704  pr_err("Error detecting sensor type\n");
2705  return;
2706  }
2707  if ((rc & 3) == 3) {
2708  /* quick hack to make OV7670s work */
2709  high = i2c_r(sd, 0x0a);
2710  low = i2c_r(sd, 0x0b);
2711  /* info("%x, %x", high, low); */
2712  if (high == 0x76 && (low & 0xf0) == 0x70) {
2713  PDEBUG(D_PROBE, "Sensor is an OV76%02x", low);
2714  sd->sensor = SEN_OV7670;
2715  } else {
2716  PDEBUG(D_PROBE, "Sensor is an OV7610");
2717  sd->sensor = SEN_OV7610;
2718  }
2719  } else if ((rc & 3) == 1) {
2720  /* I don't know what's different about the 76BE yet. */
2721  if (i2c_r(sd, 0x15) & 1) {
2722  PDEBUG(D_PROBE, "Sensor is an OV7620AE");
2723  sd->sensor = SEN_OV7620AE;
2724  } else {
2725  PDEBUG(D_PROBE, "Sensor is an OV76BE");
2726  sd->sensor = SEN_OV76BE;
2727  }
2728  } else if ((rc & 3) == 0) {
2729  /* try to read product id registers */
2730  high = i2c_r(sd, 0x0a);
2731  if (high < 0) {
2732  pr_err("Error detecting camera chip PID\n");
2733  return;
2734  }
2735  low = i2c_r(sd, 0x0b);
2736  if (low < 0) {
2737  pr_err("Error detecting camera chip VER\n");
2738  return;
2739  }
2740  if (high == 0x76) {
2741  switch (low) {
2742  case 0x30:
2743  pr_err("Sensor is an OV7630/OV7635\n");
2744  pr_err("7630 is not supported by this driver\n");
2745  return;
2746  case 0x40:
2747  PDEBUG(D_PROBE, "Sensor is an OV7645");
2748  sd->sensor = SEN_OV7640; /* FIXME */
2749  break;
2750  case 0x45:
2751  PDEBUG(D_PROBE, "Sensor is an OV7645B");
2752  sd->sensor = SEN_OV7640; /* FIXME */
2753  break;
2754  case 0x48:
2755  PDEBUG(D_PROBE, "Sensor is an OV7648");
2756  sd->sensor = SEN_OV7648;
2757  break;
2758  case 0x60:
2759  PDEBUG(D_PROBE, "Sensor is a OV7660");
2760  sd->sensor = SEN_OV7660;
2761  break;
2762  default:
2763  pr_err("Unknown sensor: 0x76%02x\n", low);
2764  return;
2765  }
2766  } else {
2767  PDEBUG(D_PROBE, "Sensor is an OV7620");
2768  sd->sensor = SEN_OV7620;
2769  }
2770  } else {
2771  pr_err("Unknown image sensor version: %d\n", rc & 3);
2772  }
2773 }
2774 
2775 /* This initializes the OV6620, OV6630, OV6630AE, or OV6630AF sensor. */
2776 static void ov6xx0_configure(struct sd *sd)
2777 {
2778  int rc;
2779  PDEBUG(D_PROBE, "starting OV6xx0 configuration");
2780 
2781  /* Detect sensor (sub)type */
2782  rc = i2c_r(sd, OV7610_REG_COM_I);
2783  if (rc < 0) {
2784  pr_err("Error detecting sensor type\n");
2785  return;
2786  }
2787 
2788  /* Ugh. The first two bits are the version bits, but
2789  * the entire register value must be used. I guess OVT
2790  * underestimated how many variants they would make. */
2791  switch (rc) {
2792  case 0x00:
2793  sd->sensor = SEN_OV6630;
2794  pr_warn("WARNING: Sensor is an OV66308. Your camera may have been misdetected in previous driver versions.\n");
2795  break;
2796  case 0x01:
2797  sd->sensor = SEN_OV6620;
2798  PDEBUG(D_PROBE, "Sensor is an OV6620");
2799  break;
2800  case 0x02:
2801  sd->sensor = SEN_OV6630;
2802  PDEBUG(D_PROBE, "Sensor is an OV66308AE");
2803  break;
2804  case 0x03:
2805  sd->sensor = SEN_OV66308AF;
2806  PDEBUG(D_PROBE, "Sensor is an OV66308AF");
2807  break;
2808  case 0x90:
2809  sd->sensor = SEN_OV6630;
2810  pr_warn("WARNING: Sensor is an OV66307. Your camera may have been misdetected in previous driver versions.\n");
2811  break;
2812  default:
2813  pr_err("FATAL: Unknown sensor version: 0x%02x\n", rc);
2814  return;
2815  }
2816 
2817  /* Set sensor-specific vars */
2818  sd->sif = 1;
2819 }
2820 
2821 /* Turns on or off the LED. Only has an effect with OV511+/OV518(+)/OV519 */
2822 static void ov51x_led_control(struct sd *sd, int on)
2823 {
2824  if (sd->invert_led)
2825  on = !on;
2826 
2827  switch (sd->bridge) {
2828  /* OV511 has no LED control */
2829  case BRIDGE_OV511PLUS:
2830  reg_w(sd, R511_SYS_LED_CTL, on);
2831  break;
2832  case BRIDGE_OV518:
2833  case BRIDGE_OV518PLUS:
2834  reg_w_mask(sd, R518_GPIO_OUT, 0x02 * on, 0x02);
2835  break;
2836  case BRIDGE_OV519:
2837  reg_w_mask(sd, OV519_GPIO_DATA_OUT0, on, 1);
2838  break;
2839  }
2840 }
2841 
2842 static void sd_reset_snapshot(struct gspca_dev *gspca_dev)
2843 {
2844  struct sd *sd = (struct sd *) gspca_dev;
2845 
2846  if (!sd->snapshot_needs_reset)
2847  return;
2848 
2849  /* Note it is important that we clear sd->snapshot_needs_reset,
2850  before actually clearing the snapshot state in the bridge
2851  otherwise we might race with the pkt_scan interrupt handler */
2852  sd->snapshot_needs_reset = 0;
2853 
2854  switch (sd->bridge) {
2855  case BRIDGE_OV511:
2856  case BRIDGE_OV511PLUS:
2857  reg_w(sd, R51x_SYS_SNAP, 0x02);
2858  reg_w(sd, R51x_SYS_SNAP, 0x00);
2859  break;
2860  case BRIDGE_OV518:
2861  case BRIDGE_OV518PLUS:
2862  reg_w(sd, R51x_SYS_SNAP, 0x02); /* Reset */
2863  reg_w(sd, R51x_SYS_SNAP, 0x01); /* Enable */
2864  break;
2865  case BRIDGE_OV519:
2866  reg_w(sd, R51x_SYS_RESET, 0x40);
2867  reg_w(sd, R51x_SYS_RESET, 0x00);
2868  break;
2869  }
2870 }
2871 
2872 static void ov51x_upload_quan_tables(struct sd *sd)
2873 {
2874  const unsigned char yQuanTable511[] = {
2875  0, 1, 1, 2, 2, 3, 3, 4,
2876  1, 1, 1, 2, 2, 3, 4, 4,
2877  1, 1, 2, 2, 3, 4, 4, 4,
2878  2, 2, 2, 3, 4, 4, 4, 4,
2879  2, 2, 3, 4, 4, 5, 5, 5,
2880  3, 3, 4, 4, 5, 5, 5, 5,
2881  3, 4, 4, 4, 5, 5, 5, 5,
2882  4, 4, 4, 4, 5, 5, 5, 5
2883  };
2884 
2885  const unsigned char uvQuanTable511[] = {
2886  0, 2, 2, 3, 4, 4, 4, 4,
2887  2, 2, 2, 4, 4, 4, 4, 4,
2888  2, 2, 3, 4, 4, 4, 4, 4,
2889  3, 4, 4, 4, 4, 4, 4, 4,
2890  4, 4, 4, 4, 4, 4, 4, 4,
2891  4, 4, 4, 4, 4, 4, 4, 4,
2892  4, 4, 4, 4, 4, 4, 4, 4,
2893  4, 4, 4, 4, 4, 4, 4, 4
2894  };
2895 
2896  /* OV518 quantization tables are 8x4 (instead of 8x8) */
2897  const unsigned char yQuanTable518[] = {
2898  5, 4, 5, 6, 6, 7, 7, 7,
2899  5, 5, 5, 5, 6, 7, 7, 7,
2900  6, 6, 6, 6, 7, 7, 7, 8,
2901  7, 7, 6, 7, 7, 7, 8, 8
2902  };
2903  const unsigned char uvQuanTable518[] = {
2904  6, 6, 6, 7, 7, 7, 7, 7,
2905  6, 6, 6, 7, 7, 7, 7, 7,
2906  6, 6, 6, 7, 7, 7, 7, 8,
2907  7, 7, 7, 7, 7, 7, 8, 8
2908  };
2909 
2910  const unsigned char *pYTable, *pUVTable;
2911  unsigned char val0, val1;
2912  int i, size, reg = R51x_COMP_LUT_BEGIN;
2913 
2914  PDEBUG(D_PROBE, "Uploading quantization tables");
2915 
2916  if (sd->bridge == BRIDGE_OV511 || sd->bridge == BRIDGE_OV511PLUS) {
2917  pYTable = yQuanTable511;
2918  pUVTable = uvQuanTable511;
2919  size = 32;
2920  } else {
2921  pYTable = yQuanTable518;
2922  pUVTable = uvQuanTable518;
2923  size = 16;
2924  }
2925 
2926  for (i = 0; i < size; i++) {
2927  val0 = *pYTable++;
2928  val1 = *pYTable++;
2929  val0 &= 0x0f;
2930  val1 &= 0x0f;
2931  val0 |= val1 << 4;
2932  reg_w(sd, reg, val0);
2933 
2934  val0 = *pUVTable++;
2935  val1 = *pUVTable++;
2936  val0 &= 0x0f;
2937  val1 &= 0x0f;
2938  val0 |= val1 << 4;
2939  reg_w(sd, reg + size, val0);
2940 
2941  reg++;
2942  }
2943 }
2944 
2945 /* This initializes the OV511/OV511+ and the sensor */
2946 static void ov511_configure(struct gspca_dev *gspca_dev)
2947 {
2948  struct sd *sd = (struct sd *) gspca_dev;
2949 
2950  /* For 511 and 511+ */
2951  const struct ov_regvals init_511[] = {
2952  { R51x_SYS_RESET, 0x7f },
2953  { R51x_SYS_INIT, 0x01 },
2954  { R51x_SYS_RESET, 0x7f },
2955  { R51x_SYS_INIT, 0x01 },
2956  { R51x_SYS_RESET, 0x3f },
2957  { R51x_SYS_INIT, 0x01 },
2958  { R51x_SYS_RESET, 0x3d },
2959  };
2960 
2961  const struct ov_regvals norm_511[] = {
2962  { R511_DRAM_FLOW_CTL, 0x01 },
2963  { R51x_SYS_SNAP, 0x00 },
2964  { R51x_SYS_SNAP, 0x02 },
2965  { R51x_SYS_SNAP, 0x00 },
2966  { R511_FIFO_OPTS, 0x1f },
2967  { R511_COMP_EN, 0x00 },
2968  { R511_COMP_LUT_EN, 0x03 },
2969  };
2970 
2971  const struct ov_regvals norm_511_p[] = {
2972  { R511_DRAM_FLOW_CTL, 0xff },
2973  { R51x_SYS_SNAP, 0x00 },
2974  { R51x_SYS_SNAP, 0x02 },
2975  { R51x_SYS_SNAP, 0x00 },
2976  { R511_FIFO_OPTS, 0xff },
2977  { R511_COMP_EN, 0x00 },
2978  { R511_COMP_LUT_EN, 0x03 },
2979  };
2980 
2981  const struct ov_regvals compress_511[] = {
2982  { 0x70, 0x1f },
2983  { 0x71, 0x05 },
2984  { 0x72, 0x06 },
2985  { 0x73, 0x06 },
2986  { 0x74, 0x14 },
2987  { 0x75, 0x03 },
2988  { 0x76, 0x04 },
2989  { 0x77, 0x04 },
2990  };
2991 
2992  PDEBUG(D_PROBE, "Device custom id %x", reg_r(sd, R51x_SYS_CUST_ID));
2993 
2994  write_regvals(sd, init_511, ARRAY_SIZE(init_511));
2995 
2996  switch (sd->bridge) {
2997  case BRIDGE_OV511:
2998  write_regvals(sd, norm_511, ARRAY_SIZE(norm_511));
2999  break;
3000  case BRIDGE_OV511PLUS:
3001  write_regvals(sd, norm_511_p, ARRAY_SIZE(norm_511_p));
3002  break;
3003  }
3004 
3005  /* Init compression */
3006  write_regvals(sd, compress_511, ARRAY_SIZE(compress_511));
3007 
3008  ov51x_upload_quan_tables(sd);
3009 }
3010 
3011 /* This initializes the OV518/OV518+ and the sensor */
3012 static void ov518_configure(struct gspca_dev *gspca_dev)
3013 {
3014  struct sd *sd = (struct sd *) gspca_dev;
3015 
3016  /* For 518 and 518+ */
3017  const struct ov_regvals init_518[] = {
3018  { R51x_SYS_RESET, 0x40 },
3019  { R51x_SYS_INIT, 0xe1 },
3020  { R51x_SYS_RESET, 0x3e },
3021  { R51x_SYS_INIT, 0xe1 },
3022  { R51x_SYS_RESET, 0x00 },
3023  { R51x_SYS_INIT, 0xe1 },
3024  { 0x46, 0x00 },
3025  { 0x5d, 0x03 },
3026  };
3027 
3028  const struct ov_regvals norm_518[] = {
3029  { R51x_SYS_SNAP, 0x02 }, /* Reset */
3030  { R51x_SYS_SNAP, 0x01 }, /* Enable */
3031  { 0x31, 0x0f },
3032  { 0x5d, 0x03 },
3033  { 0x24, 0x9f },
3034  { 0x25, 0x90 },
3035  { 0x20, 0x00 },
3036  { 0x51, 0x04 },
3037  { 0x71, 0x19 },
3038  { 0x2f, 0x80 },
3039  };
3040 
3041  const struct ov_regvals norm_518_p[] = {
3042  { R51x_SYS_SNAP, 0x02 }, /* Reset */
3043  { R51x_SYS_SNAP, 0x01 }, /* Enable */
3044  { 0x31, 0x0f },
3045  { 0x5d, 0x03 },
3046  { 0x24, 0x9f },
3047  { 0x25, 0x90 },
3048  { 0x20, 0x60 },
3049  { 0x51, 0x02 },
3050  { 0x71, 0x19 },
3051  { 0x40, 0xff },
3052  { 0x41, 0x42 },
3053  { 0x46, 0x00 },
3054  { 0x33, 0x04 },
3055  { 0x21, 0x19 },
3056  { 0x3f, 0x10 },
3057  { 0x2f, 0x80 },
3058  };
3059 
3060  /* First 5 bits of custom ID reg are a revision ID on OV518 */
3061  PDEBUG(D_PROBE, "Device revision %d",
3062  0x1f & reg_r(sd, R51x_SYS_CUST_ID));
3063 
3064  write_regvals(sd, init_518, ARRAY_SIZE(init_518));
3065 
3066  /* Set LED GPIO pin to output mode */
3067  reg_w_mask(sd, R518_GPIO_CTL, 0x00, 0x02);
3068 
3069  switch (sd->bridge) {
3070  case BRIDGE_OV518:
3071  write_regvals(sd, norm_518, ARRAY_SIZE(norm_518));
3072  break;
3073  case BRIDGE_OV518PLUS:
3074  write_regvals(sd, norm_518_p, ARRAY_SIZE(norm_518_p));
3075  break;
3076  }
3077 
3078  ov51x_upload_quan_tables(sd);
3079 
3080  reg_w(sd, 0x2f, 0x80);
3081 }
3082 
3083 static void ov519_configure(struct sd *sd)
3084 {
3085  static const struct ov_regvals init_519[] = {
3086  { 0x5a, 0x6d }, /* EnableSystem */
3087  { 0x53, 0x9b }, /* don't enable the microcontroller */
3088  { OV519_R54_EN_CLK1, 0xff }, /* set bit2 to enable jpeg */
3089  { 0x5d, 0x03 },
3090  { 0x49, 0x01 },
3091  { 0x48, 0x00 },
3092  /* Set LED pin to output mode. Bit 4 must be cleared or sensor
3093  * detection will fail. This deserves further investigation. */
3094  { OV519_GPIO_IO_CTRL0, 0xee },
3095  { OV519_R51_RESET1, 0x0f },
3096  { OV519_R51_RESET1, 0x00 },
3097  { 0x22, 0x00 },
3098  /* windows reads 0x55 at this point*/
3099  };
3100 
3101  write_regvals(sd, init_519, ARRAY_SIZE(init_519));
3102 }
3103 
3104 static void ovfx2_configure(struct sd *sd)
3105 {
3106  static const struct ov_regvals init_fx2[] = {
3107  { 0x00, 0x60 },
3108  { 0x02, 0x01 },
3109  { 0x0f, 0x1d },
3110  { 0xe9, 0x82 },
3111  { 0xea, 0xc7 },
3112  { 0xeb, 0x10 },
3113  { 0xec, 0xf6 },
3114  };
3115 
3116  sd->stopped = 1;
3117 
3118  write_regvals(sd, init_fx2, ARRAY_SIZE(init_fx2));
3119 }
3120 
3121 /* set the mode */
3122 /* This function works for ov7660 only */
3123 static void ov519_set_mode(struct sd *sd)
3124 {
3125  static const struct ov_regvals bridge_ov7660[2][10] = {
3126  {{0x10, 0x14}, {0x11, 0x1e}, {0x12, 0x00}, {0x13, 0x00},
3127  {0x14, 0x00}, {0x15, 0x00}, {0x16, 0x00}, {0x20, 0x0c},
3128  {0x25, 0x01}, {0x26, 0x00}},
3129  {{0x10, 0x28}, {0x11, 0x3c}, {0x12, 0x00}, {0x13, 0x00},
3130  {0x14, 0x00}, {0x15, 0x00}, {0x16, 0x00}, {0x20, 0x0c},
3131  {0x25, 0x03}, {0x26, 0x00}}
3132  };
3133  static const struct ov_i2c_regvals sensor_ov7660[2][3] = {
3134  {{0x12, 0x00}, {0x24, 0x00}, {0x0c, 0x0c}},
3135  {{0x12, 0x00}, {0x04, 0x00}, {0x0c, 0x00}}
3136  };
3137  static const struct ov_i2c_regvals sensor_ov7660_2[] = {
3138  {OV7670_R17_HSTART, 0x13},
3139  {OV7670_R18_HSTOP, 0x01},
3140  {OV7670_R32_HREF, 0x92},
3141  {OV7670_R19_VSTART, 0x02},
3142  {OV7670_R1A_VSTOP, 0x7a},
3143  {OV7670_R03_VREF, 0x00},
3144 /* {0x33, 0x00}, */
3145 /* {0x34, 0x07}, */
3146 /* {0x36, 0x00}, */
3147 /* {0x6b, 0x0a}, */
3148  };
3149 
3150  write_regvals(sd, bridge_ov7660[sd->gspca_dev.curr_mode],
3151  ARRAY_SIZE(bridge_ov7660[0]));
3152  write_i2c_regvals(sd, sensor_ov7660[sd->gspca_dev.curr_mode],
3153  ARRAY_SIZE(sensor_ov7660[0]));
3154  write_i2c_regvals(sd, sensor_ov7660_2,
3155  ARRAY_SIZE(sensor_ov7660_2));
3156 }
3157 
3158 /* set the frame rate */
3159 /* This function works for sensors ov7640, ov7648 ov7660 and ov7670 only */
3160 static void ov519_set_fr(struct sd *sd)
3161 {
3162  int fr;
3163  u8 clock;
3164  /* frame rate table with indices:
3165  * - mode = 0: 320x240, 1: 640x480
3166  * - fr rate = 0: 30, 1: 25, 2: 20, 3: 15, 4: 10, 5: 5
3167  * - reg = 0: bridge a4, 1: bridge 23, 2: sensor 11 (clock)
3168  */
3169  static const u8 fr_tb[2][6][3] = {
3170  {{0x04, 0xff, 0x00},
3171  {0x04, 0x1f, 0x00},
3172  {0x04, 0x1b, 0x00},
3173  {0x04, 0x15, 0x00},
3174  {0x04, 0x09, 0x00},
3175  {0x04, 0x01, 0x00}},
3176  {{0x0c, 0xff, 0x00},
3177  {0x0c, 0x1f, 0x00},
3178  {0x0c, 0x1b, 0x00},
3179  {0x04, 0xff, 0x01},
3180  {0x04, 0x1f, 0x01},
3181  {0x04, 0x1b, 0x01}},
3182  };
3183 
3184  if (frame_rate > 0)
3185  sd->frame_rate = frame_rate;
3186  if (sd->frame_rate >= 30)
3187  fr = 0;
3188  else if (sd->frame_rate >= 25)
3189  fr = 1;
3190  else if (sd->frame_rate >= 20)
3191  fr = 2;
3192  else if (sd->frame_rate >= 15)
3193  fr = 3;
3194  else if (sd->frame_rate >= 10)
3195  fr = 4;
3196  else
3197  fr = 5;
3198  reg_w(sd, 0xa4, fr_tb[sd->gspca_dev.curr_mode][fr][0]);
3199  reg_w(sd, 0x23, fr_tb[sd->gspca_dev.curr_mode][fr][1]);
3200  clock = fr_tb[sd->gspca_dev.curr_mode][fr][2];
3201  if (sd->sensor == SEN_OV7660)
3202  clock |= 0x80; /* enable double clock */
3203  ov518_i2c_w(sd, OV7670_R11_CLKRC, clock);
3204 }
3205 
3206 static void setautogain(struct gspca_dev *gspca_dev, s32 val)
3207 {
3208  struct sd *sd = (struct sd *) gspca_dev;
3209 
3210  i2c_w_mask(sd, 0x13, val ? 0x05 : 0x00, 0x05);
3211 }
3212 
3213 /* this function is called at probe time */
3214 static int sd_config(struct gspca_dev *gspca_dev,
3215  const struct usb_device_id *id)
3216 {
3217  struct sd *sd = (struct sd *) gspca_dev;
3218  struct cam *cam = &gspca_dev->cam;
3219 
3220  sd->bridge = id->driver_info & BRIDGE_MASK;
3221  sd->invert_led = (id->driver_info & BRIDGE_INVERT_LED) != 0;
3222 
3223  switch (sd->bridge) {
3224  case BRIDGE_OV511:
3225  case BRIDGE_OV511PLUS:
3226  cam->cam_mode = ov511_vga_mode;
3227  cam->nmodes = ARRAY_SIZE(ov511_vga_mode);
3228  break;
3229  case BRIDGE_OV518:
3230  case BRIDGE_OV518PLUS:
3231  cam->cam_mode = ov518_vga_mode;
3232  cam->nmodes = ARRAY_SIZE(ov518_vga_mode);
3233  break;
3234  case BRIDGE_OV519:
3235  cam->cam_mode = ov519_vga_mode;
3236  cam->nmodes = ARRAY_SIZE(ov519_vga_mode);
3237  break;
3238  case BRIDGE_OVFX2:
3239  cam->cam_mode = ov519_vga_mode;
3240  cam->nmodes = ARRAY_SIZE(ov519_vga_mode);
3241  cam->bulk_size = OVFX2_BULK_SIZE;
3242  cam->bulk_nurbs = MAX_NURBS;
3243  cam->bulk = 1;
3244  break;
3245  case BRIDGE_W9968CF:
3246  cam->cam_mode = w9968cf_vga_mode;
3247  cam->nmodes = ARRAY_SIZE(w9968cf_vga_mode);
3248  break;
3249  }
3250 
3251  sd->frame_rate = 15;
3252 
3253  return 0;
3254 }
3255 
3256 /* this function is called at probe and resume time */
3257 static int sd_init(struct gspca_dev *gspca_dev)
3258 {
3259  struct sd *sd = (struct sd *) gspca_dev;
3260  struct cam *cam = &gspca_dev->cam;
3261 
3262  switch (sd->bridge) {
3263  case BRIDGE_OV511:
3264  case BRIDGE_OV511PLUS:
3265  ov511_configure(gspca_dev);
3266  break;
3267  case BRIDGE_OV518:
3268  case BRIDGE_OV518PLUS:
3269  ov518_configure(gspca_dev);
3270  break;
3271  case BRIDGE_OV519:
3272  ov519_configure(sd);
3273  break;
3274  case BRIDGE_OVFX2:
3275  ovfx2_configure(sd);
3276  break;
3277  case BRIDGE_W9968CF:
3278  w9968cf_configure(sd);
3279  break;
3280  }
3281 
3282  /* The OV519 must be more aggressive about sensor detection since
3283  * I2C write will never fail if the sensor is not present. We have
3284  * to try to initialize the sensor to detect its presence */
3285  sd->sensor = -1;
3286 
3287  /* Test for 76xx */
3288  if (init_ov_sensor(sd, OV7xx0_SID) >= 0) {
3289  ov7xx0_configure(sd);
3290 
3291  /* Test for 6xx0 */
3292  } else if (init_ov_sensor(sd, OV6xx0_SID) >= 0) {
3293  ov6xx0_configure(sd);
3294 
3295  /* Test for 8xx0 */
3296  } else if (init_ov_sensor(sd, OV8xx0_SID) >= 0) {
3297  ov8xx0_configure(sd);
3298 
3299  /* Test for 3xxx / 2xxx */
3300  } else if (init_ov_sensor(sd, OV_HIRES_SID) >= 0) {
3301  ov_hires_configure(sd);
3302  } else {
3303  pr_err("Can't determine sensor slave IDs\n");
3304  goto error;
3305  }
3306 
3307  if (sd->sensor < 0)
3308  goto error;
3309 
3310  ov51x_led_control(sd, 0); /* turn LED off */
3311 
3312  switch (sd->bridge) {
3313  case BRIDGE_OV511:
3314  case BRIDGE_OV511PLUS:
3315  if (sd->sif) {
3316  cam->cam_mode = ov511_sif_mode;
3317  cam->nmodes = ARRAY_SIZE(ov511_sif_mode);
3318  }
3319  break;
3320  case BRIDGE_OV518:
3321  case BRIDGE_OV518PLUS:
3322  if (sd->sif) {
3323  cam->cam_mode = ov518_sif_mode;
3324  cam->nmodes = ARRAY_SIZE(ov518_sif_mode);
3325  }
3326  break;
3327  case BRIDGE_OV519:
3328  if (sd->sif) {
3329  cam->cam_mode = ov519_sif_mode;
3330  cam->nmodes = ARRAY_SIZE(ov519_sif_mode);
3331  }
3332  break;
3333  case BRIDGE_OVFX2:
3334  switch (sd->sensor) {
3335  case SEN_OV2610:
3336  case SEN_OV2610AE:
3337  cam->cam_mode = ovfx2_ov2610_mode;
3338  cam->nmodes = ARRAY_SIZE(ovfx2_ov2610_mode);
3339  break;
3340  case SEN_OV3610:
3341  cam->cam_mode = ovfx2_ov3610_mode;
3342  cam->nmodes = ARRAY_SIZE(ovfx2_ov3610_mode);
3343  break;
3344  case SEN_OV9600:
3345  cam->cam_mode = ovfx2_ov9600_mode;
3346  cam->nmodes = ARRAY_SIZE(ovfx2_ov9600_mode);
3347  break;
3348  default:
3349  if (sd->sif) {
3350  cam->cam_mode = ov519_sif_mode;
3351  cam->nmodes = ARRAY_SIZE(ov519_sif_mode);
3352  }
3353  break;
3354  }
3355  break;
3356  case BRIDGE_W9968CF:
3357  if (sd->sif)
3358  cam->nmodes = ARRAY_SIZE(w9968cf_vga_mode) - 1;
3359 
3360  /* w9968cf needs initialisation once the sensor is known */
3361  w9968cf_init(sd);
3362  break;
3363  }
3364 
3365  /* initialize the sensor */
3366  switch (sd->sensor) {
3367  case SEN_OV2610:
3368  write_i2c_regvals(sd, norm_2610, ARRAY_SIZE(norm_2610));
3369 
3370  /* Enable autogain, autoexpo, awb, bandfilter */
3371  i2c_w_mask(sd, 0x13, 0x27, 0x27);
3372  break;
3373  case SEN_OV2610AE:
3374  write_i2c_regvals(sd, norm_2610ae, ARRAY_SIZE(norm_2610ae));
3375 
3376  /* enable autoexpo */
3377  i2c_w_mask(sd, 0x13, 0x05, 0x05);
3378  break;
3379  case SEN_OV3610:
3380  write_i2c_regvals(sd, norm_3620b, ARRAY_SIZE(norm_3620b));
3381 
3382  /* Enable autogain, autoexpo, awb, bandfilter */
3383  i2c_w_mask(sd, 0x13, 0x27, 0x27);
3384  break;
3385  case SEN_OV6620:
3386  write_i2c_regvals(sd, norm_6x20, ARRAY_SIZE(norm_6x20));
3387  break;
3388  case SEN_OV6630:
3389  case SEN_OV66308AF:
3390  write_i2c_regvals(sd, norm_6x30, ARRAY_SIZE(norm_6x30));
3391  break;
3392  default:
3393 /* case SEN_OV7610: */
3394 /* case SEN_OV76BE: */
3395  write_i2c_regvals(sd, norm_7610, ARRAY_SIZE(norm_7610));
3396  i2c_w_mask(sd, 0x0e, 0x00, 0x40);
3397  break;
3398  case SEN_OV7620:
3399  case SEN_OV7620AE:
3400  write_i2c_regvals(sd, norm_7620, ARRAY_SIZE(norm_7620));
3401  break;
3402  case SEN_OV7640:
3403  case SEN_OV7648:
3404  write_i2c_regvals(sd, norm_7640, ARRAY_SIZE(norm_7640));
3405  break;
3406  case SEN_OV7660:
3407  i2c_w(sd, OV7670_R12_COM7, OV7670_COM7_RESET);
3408  msleep(14);
3409  reg_w(sd, OV519_R57_SNAPSHOT, 0x23);
3410  write_regvals(sd, init_519_ov7660,
3411  ARRAY_SIZE(init_519_ov7660));
3412  write_i2c_regvals(sd, norm_7660, ARRAY_SIZE(norm_7660));
3413  sd->gspca_dev.curr_mode = 1; /* 640x480 */
3414  ov519_set_mode(sd);
3415  ov519_set_fr(sd);
3416  sd_reset_snapshot(gspca_dev);
3417  ov51x_restart(sd);
3418  ov51x_stop(sd); /* not in win traces */
3419  ov51x_led_control(sd, 0);
3420  break;
3421  case SEN_OV7670:
3422  write_i2c_regvals(sd, norm_7670, ARRAY_SIZE(norm_7670));
3423  break;
3424  case SEN_OV8610:
3425  write_i2c_regvals(sd, norm_8610, ARRAY_SIZE(norm_8610));
3426  break;
3427  case SEN_OV9600:
3428  write_i2c_regvals(sd, norm_9600, ARRAY_SIZE(norm_9600));
3429 
3430  /* enable autoexpo */
3431 /* i2c_w_mask(sd, 0x13, 0x05, 0x05); */
3432  break;
3433  }
3434  return gspca_dev->usb_err;
3435 error:
3436  PDEBUG(D_ERR, "OV519 Config failed");
3437  return -EINVAL;
3438 }
3439 
3440 /* function called at start time before URB creation */
3441 static int sd_isoc_init(struct gspca_dev *gspca_dev)
3442 {
3443  struct sd *sd = (struct sd *) gspca_dev;
3444 
3445  switch (sd->bridge) {
3446  case BRIDGE_OVFX2:
3447  if (gspca_dev->width != 800)
3448  gspca_dev->cam.bulk_size = OVFX2_BULK_SIZE;
3449  else
3450  gspca_dev->cam.bulk_size = 7 * 4096;
3451  break;
3452  }
3453  return 0;
3454 }
3455 
3456 /* Set up the OV511/OV511+ with the given image parameters.
3457  *
3458  * Do not put any sensor-specific code in here (including I2C I/O functions)
3459  */
3460 static void ov511_mode_init_regs(struct sd *sd)
3461 {
3462  int hsegs, vsegs, packet_size, fps, needed;
3463  int interlaced = 0;
3464  struct usb_host_interface *alt;
3465  struct usb_interface *intf;
3466 
3467  intf = usb_ifnum_to_if(sd->gspca_dev.dev, sd->gspca_dev.iface);
3468  alt = usb_altnum_to_altsetting(intf, sd->gspca_dev.alt);
3469  if (!alt) {
3470  pr_err("Couldn't get altsetting\n");
3471  sd->gspca_dev.usb_err = -EIO;
3472  return;
3473  }
3474 
3475  packet_size = le16_to_cpu(alt->endpoint[0].desc.wMaxPacketSize);
3476  reg_w(sd, R51x_FIFO_PSIZE, packet_size >> 5);
3477 
3478  reg_w(sd, R511_CAM_UV_EN, 0x01);
3479  reg_w(sd, R511_SNAP_UV_EN, 0x01);
3480  reg_w(sd, R511_SNAP_OPTS, 0x03);
3481 
3482  /* Here I'm assuming that snapshot size == image size.
3483  * I hope that's always true. --claudio
3484  */
3485  hsegs = (sd->gspca_dev.width >> 3) - 1;
3486  vsegs = (sd->gspca_dev.height >> 3) - 1;
3487 
3488  reg_w(sd, R511_CAM_PXCNT, hsegs);
3489  reg_w(sd, R511_CAM_LNCNT, vsegs);
3490  reg_w(sd, R511_CAM_PXDIV, 0x00);
3491  reg_w(sd, R511_CAM_LNDIV, 0x00);
3492 
3493  /* YUV420, low pass filter on */
3494  reg_w(sd, R511_CAM_OPTS, 0x03);
3495 
3496  /* Snapshot additions */
3497  reg_w(sd, R511_SNAP_PXCNT, hsegs);
3498  reg_w(sd, R511_SNAP_LNCNT, vsegs);
3499  reg_w(sd, R511_SNAP_PXDIV, 0x00);
3500  reg_w(sd, R511_SNAP_LNDIV, 0x00);
3501 
3502  /******** Set the framerate ********/
3503  if (frame_rate > 0)
3504  sd->frame_rate = frame_rate;
3505 
3506  switch (sd->sensor) {
3507  case SEN_OV6620:
3508  /* No framerate control, doesn't like higher rates yet */
3509  sd->clockdiv = 3;
3510  break;
3511 
3512  /* Note once the FIXME's in mode_init_ov_sensor_regs() are fixed
3513  for more sensors we need to do this for them too */
3514  case SEN_OV7620:
3515  case SEN_OV7620AE:
3516  case SEN_OV7640:
3517  case SEN_OV7648:
3518  case SEN_OV76BE:
3519  if (sd->gspca_dev.width == 320)
3520  interlaced = 1;
3521  /* Fall through */
3522  case SEN_OV6630:
3523  case SEN_OV7610:
3524  case SEN_OV7670:
3525  switch (sd->frame_rate) {
3526  case 30:
3527  case 25:
3528  /* Not enough bandwidth to do 640x480 @ 30 fps */
3529  if (sd->gspca_dev.width != 640) {
3530  sd->clockdiv = 0;
3531  break;
3532  }
3533  /* Fall through for 640x480 case */
3534  default:
3535 /* case 20: */
3536 /* case 15: */
3537  sd->clockdiv = 1;
3538  break;
3539  case 10:
3540  sd->clockdiv = 2;
3541  break;
3542  case 5:
3543  sd->clockdiv = 5;
3544  break;
3545  }
3546  if (interlaced) {
3547  sd->clockdiv = (sd->clockdiv + 1) * 2 - 1;
3548  /* Higher then 10 does not work */
3549  if (sd->clockdiv > 10)
3550  sd->clockdiv = 10;
3551  }
3552  break;
3553 
3554  case SEN_OV8610:
3555  /* No framerate control ?? */
3556  sd->clockdiv = 0;
3557  break;
3558  }
3559 
3560  /* Check if we have enough bandwidth to disable compression */
3561  fps = (interlaced ? 60 : 30) / (sd->clockdiv + 1) + 1;
3562  needed = fps * sd->gspca_dev.width * sd->gspca_dev.height * 3 / 2;
3563  /* 1000 isoc packets/sec */
3564  if (needed > 1000 * packet_size) {
3565  /* Enable Y and UV quantization and compression */
3566  reg_w(sd, R511_COMP_EN, 0x07);
3567  reg_w(sd, R511_COMP_LUT_EN, 0x03);
3568  } else {
3569  reg_w(sd, R511_COMP_EN, 0x06);
3570  reg_w(sd, R511_COMP_LUT_EN, 0x00);
3571  }
3572 
3573  reg_w(sd, R51x_SYS_RESET, OV511_RESET_OMNICE);
3574  reg_w(sd, R51x_SYS_RESET, 0);
3575 }
3576 
3577 /* Sets up the OV518/OV518+ with the given image parameters
3578  *
3579  * OV518 needs a completely different approach, until we can figure out what
3580  * the individual registers do. Also, only 15 FPS is supported now.
3581  *
3582  * Do not put any sensor-specific code in here (including I2C I/O functions)
3583  */
3584 static void ov518_mode_init_regs(struct sd *sd)
3585 {
3586  int hsegs, vsegs, packet_size;
3587  struct usb_host_interface *alt;
3588  struct usb_interface *intf;
3589 
3590  intf = usb_ifnum_to_if(sd->gspca_dev.dev, sd->gspca_dev.iface);
3591  alt = usb_altnum_to_altsetting(intf, sd->gspca_dev.alt);
3592  if (!alt) {
3593  pr_err("Couldn't get altsetting\n");
3594  sd->gspca_dev.usb_err = -EIO;
3595  return;
3596  }
3597 
3598  packet_size = le16_to_cpu(alt->endpoint[0].desc.wMaxPacketSize);
3599  ov518_reg_w32(sd, R51x_FIFO_PSIZE, packet_size & ~7, 2);
3600 
3601  /******** Set the mode ********/
3602  reg_w(sd, 0x2b, 0);
3603  reg_w(sd, 0x2c, 0);
3604  reg_w(sd, 0x2d, 0);
3605  reg_w(sd, 0x2e, 0);
3606  reg_w(sd, 0x3b, 0);
3607  reg_w(sd, 0x3c, 0);
3608  reg_w(sd, 0x3d, 0);
3609  reg_w(sd, 0x3e, 0);
3610 
3611  if (sd->bridge == BRIDGE_OV518) {
3612  /* Set 8-bit (YVYU) input format */
3613  reg_w_mask(sd, 0x20, 0x08, 0x08);
3614 
3615  /* Set 12-bit (4:2:0) output format */
3616  reg_w_mask(sd, 0x28, 0x80, 0xf0);
3617  reg_w_mask(sd, 0x38, 0x80, 0xf0);
3618  } else {
3619  reg_w(sd, 0x28, 0x80);
3620  reg_w(sd, 0x38, 0x80);
3621  }
3622 
3623  hsegs = sd->gspca_dev.width / 16;
3624  vsegs = sd->gspca_dev.height / 4;
3625 
3626  reg_w(sd, 0x29, hsegs);
3627  reg_w(sd, 0x2a, vsegs);
3628 
3629  reg_w(sd, 0x39, hsegs);
3630  reg_w(sd, 0x3a, vsegs);
3631 
3632  /* Windows driver does this here; who knows why */
3633  reg_w(sd, 0x2f, 0x80);
3634 
3635  /******** Set the framerate ********/
3636  sd->clockdiv = 1;
3637 
3638  /* Mode independent, but framerate dependent, regs */
3639  /* 0x51: Clock divider; Only works on some cams which use 2 crystals */
3640  reg_w(sd, 0x51, 0x04);
3641  reg_w(sd, 0x22, 0x18);
3642  reg_w(sd, 0x23, 0xff);
3643 
3644  if (sd->bridge == BRIDGE_OV518PLUS) {
3645  switch (sd->sensor) {
3646  case SEN_OV7620AE:
3647  if (sd->gspca_dev.width == 320) {
3648  reg_w(sd, 0x20, 0x00);
3649  reg_w(sd, 0x21, 0x19);
3650  } else {
3651  reg_w(sd, 0x20, 0x60);
3652  reg_w(sd, 0x21, 0x1f);
3653  }
3654  break;
3655  case SEN_OV7620:
3656  reg_w(sd, 0x20, 0x00);
3657  reg_w(sd, 0x21, 0x19);
3658  break;
3659  default:
3660  reg_w(sd, 0x21, 0x19);
3661  }
3662  } else
3663  reg_w(sd, 0x71, 0x17); /* Compression-related? */
3664 
3665  /* FIXME: Sensor-specific */
3666  /* Bit 5 is what matters here. Of course, it is "reserved" */
3667  i2c_w(sd, 0x54, 0x23);
3668 
3669  reg_w(sd, 0x2f, 0x80);
3670 
3671  if (sd->bridge == BRIDGE_OV518PLUS) {
3672  reg_w(sd, 0x24, 0x94);
3673  reg_w(sd, 0x25, 0x90);
3674  ov518_reg_w32(sd, 0xc4, 400, 2); /* 190h */
3675  ov518_reg_w32(sd, 0xc6, 540, 2); /* 21ch */
3676  ov518_reg_w32(sd, 0xc7, 540, 2); /* 21ch */
3677  ov518_reg_w32(sd, 0xc8, 108, 2); /* 6ch */
3678  ov518_reg_w32(sd, 0xca, 131098, 3); /* 2001ah */
3679  ov518_reg_w32(sd, 0xcb, 532, 2); /* 214h */
3680  ov518_reg_w32(sd, 0xcc, 2400, 2); /* 960h */
3681  ov518_reg_w32(sd, 0xcd, 32, 2); /* 20h */
3682  ov518_reg_w32(sd, 0xce, 608, 2); /* 260h */
3683  } else {
3684  reg_w(sd, 0x24, 0x9f);
3685  reg_w(sd, 0x25, 0x90);
3686  ov518_reg_w32(sd, 0xc4, 400, 2); /* 190h */
3687  ov518_reg_w32(sd, 0xc6, 381, 2); /* 17dh */
3688  ov518_reg_w32(sd, 0xc7, 381, 2); /* 17dh */
3689  ov518_reg_w32(sd, 0xc8, 128, 2); /* 80h */
3690  ov518_reg_w32(sd, 0xca, 183331, 3); /* 2cc23h */
3691  ov518_reg_w32(sd, 0xcb, 746, 2); /* 2eah */
3692  ov518_reg_w32(sd, 0xcc, 1750, 2); /* 6d6h */
3693  ov518_reg_w32(sd, 0xcd, 45, 2); /* 2dh */
3694  ov518_reg_w32(sd, 0xce, 851, 2); /* 353h */
3695  }
3696 
3697  reg_w(sd, 0x2f, 0x80);
3698 }
3699 
3700 /* Sets up the OV519 with the given image parameters
3701  *
3702  * OV519 needs a completely different approach, until we can figure out what
3703  * the individual registers do.
3704  *
3705  * Do not put any sensor-specific code in here (including I2C I/O functions)
3706  */
3707 static void ov519_mode_init_regs(struct sd *sd)
3708 {
3709  static const struct ov_regvals mode_init_519_ov7670[] = {
3710  { 0x5d, 0x03 }, /* Turn off suspend mode */
3711  { 0x53, 0x9f }, /* was 9b in 1.65-1.08 */
3712  { OV519_R54_EN_CLK1, 0x0f }, /* bit2 (jpeg enable) */
3713  { 0xa2, 0x20 }, /* a2-a5 are undocumented */
3714  { 0xa3, 0x18 },
3715  { 0xa4, 0x04 },
3716  { 0xa5, 0x28 },
3717  { 0x37, 0x00 }, /* SetUsbInit */
3718  { 0x55, 0x02 }, /* 4.096 Mhz audio clock */
3719  /* Enable both fields, YUV Input, disable defect comp (why?) */
3720  { 0x20, 0x0c },
3721  { 0x21, 0x38 },
3722  { 0x22, 0x1d },
3723  { 0x17, 0x50 }, /* undocumented */
3724  { 0x37, 0x00 }, /* undocumented */
3725  { 0x40, 0xff }, /* I2C timeout counter */
3726  { 0x46, 0x00 }, /* I2C clock prescaler */
3727  { 0x59, 0x04 }, /* new from windrv 090403 */
3728  { 0xff, 0x00 }, /* undocumented */
3729  /* windows reads 0x55 at this point, why? */
3730  };
3731 
3732  static const struct ov_regvals mode_init_519[] = {
3733  { 0x5d, 0x03 }, /* Turn off suspend mode */
3734  { 0x53, 0x9f }, /* was 9b in 1.65-1.08 */
3735  { OV519_R54_EN_CLK1, 0x0f }, /* bit2 (jpeg enable) */
3736  { 0xa2, 0x20 }, /* a2-a5 are undocumented */
3737  { 0xa3, 0x18 },
3738  { 0xa4, 0x04 },
3739  { 0xa5, 0x28 },
3740  { 0x37, 0x00 }, /* SetUsbInit */
3741  { 0x55, 0x02 }, /* 4.096 Mhz audio clock */
3742  /* Enable both fields, YUV Input, disable defect comp (why?) */
3743  { 0x22, 0x1d },
3744  { 0x17, 0x50 }, /* undocumented */
3745  { 0x37, 0x00 }, /* undocumented */
3746  { 0x40, 0xff }, /* I2C timeout counter */
3747  { 0x46, 0x00 }, /* I2C clock prescaler */
3748  { 0x59, 0x04 }, /* new from windrv 090403 */
3749  { 0xff, 0x00 }, /* undocumented */
3750  /* windows reads 0x55 at this point, why? */
3751  };
3752 
3753  /******** Set the mode ********/
3754  switch (sd->sensor) {
3755  default:
3756  write_regvals(sd, mode_init_519, ARRAY_SIZE(mode_init_519));
3757  if (sd->sensor == SEN_OV7640 ||
3758  sd->sensor == SEN_OV7648) {
3759  /* Select 8-bit input mode */
3760  reg_w_mask(sd, OV519_R20_DFR, 0x10, 0x10);
3761  }
3762  break;
3763  case SEN_OV7660:
3764  return; /* done by ov519_set_mode/fr() */
3765  case SEN_OV7670:
3766  write_regvals(sd, mode_init_519_ov7670,
3767  ARRAY_SIZE(mode_init_519_ov7670));
3768  break;
3769  }
3770 
3771  reg_w(sd, OV519_R10_H_SIZE, sd->gspca_dev.width >> 4);
3772  reg_w(sd, OV519_R11_V_SIZE, sd->gspca_dev.height >> 3);
3773  if (sd->sensor == SEN_OV7670 &&
3774  sd->gspca_dev.cam.cam_mode[sd->gspca_dev.curr_mode].priv)
3775  reg_w(sd, OV519_R12_X_OFFSETL, 0x04);
3776  else if (sd->sensor == SEN_OV7648 &&
3777  sd->gspca_dev.cam.cam_mode[sd->gspca_dev.curr_mode].priv)
3778  reg_w(sd, OV519_R12_X_OFFSETL, 0x01);
3779  else
3780  reg_w(sd, OV519_R12_X_OFFSETL, 0x00);
3781  reg_w(sd, OV519_R13_X_OFFSETH, 0x00);
3782  reg_w(sd, OV519_R14_Y_OFFSETL, 0x00);
3783  reg_w(sd, OV519_R15_Y_OFFSETH, 0x00);
3784  reg_w(sd, OV519_R16_DIVIDER, 0x00);
3785  reg_w(sd, OV519_R25_FORMAT, 0x03); /* YUV422 */
3786  reg_w(sd, 0x26, 0x00); /* Undocumented */
3787 
3788  /******** Set the framerate ********/
3789  if (frame_rate > 0)
3790  sd->frame_rate = frame_rate;
3791 
3792 /* FIXME: These are only valid at the max resolution. */
3793  sd->clockdiv = 0;
3794  switch (sd->sensor) {
3795  case SEN_OV7640:
3796  case SEN_OV7648:
3797  switch (sd->frame_rate) {
3798  default:
3799 /* case 30: */
3800  reg_w(sd, 0xa4, 0x0c);
3801  reg_w(sd, 0x23, 0xff);
3802  break;
3803  case 25:
3804  reg_w(sd, 0xa4, 0x0c);
3805  reg_w(sd, 0x23, 0x1f);
3806  break;
3807  case 20:
3808  reg_w(sd, 0xa4, 0x0c);
3809  reg_w(sd, 0x23, 0x1b);
3810  break;
3811  case 15:
3812  reg_w(sd, 0xa4, 0x04);
3813  reg_w(sd, 0x23, 0xff);
3814  sd->clockdiv = 1;
3815  break;
3816  case 10:
3817  reg_w(sd, 0xa4, 0x04);
3818  reg_w(sd, 0x23, 0x1f);
3819  sd->clockdiv = 1;
3820  break;
3821  case 5:
3822  reg_w(sd, 0xa4, 0x04);
3823  reg_w(sd, 0x23, 0x1b);
3824  sd->clockdiv = 1;
3825  break;
3826  }
3827  break;
3828  case SEN_OV8610:
3829  switch (sd->frame_rate) {
3830  default: /* 15 fps */
3831 /* case 15: */
3832  reg_w(sd, 0xa4, 0x06);
3833  reg_w(sd, 0x23, 0xff);
3834  break;
3835  case 10:
3836  reg_w(sd, 0xa4, 0x06);
3837  reg_w(sd, 0x23, 0x1f);
3838  break;
3839  case 5:
3840  reg_w(sd, 0xa4, 0x06);
3841  reg_w(sd, 0x23, 0x1b);
3842  break;
3843  }
3844  break;
3845  case SEN_OV7670: /* guesses, based on 7640 */
3846  PDEBUG(D_STREAM, "Setting framerate to %d fps",
3847  (sd->frame_rate == 0) ? 15 : sd->frame_rate);
3848  reg_w(sd, 0xa4, 0x10);
3849  switch (sd->frame_rate) {
3850  case 30:
3851  reg_w(sd, 0x23, 0xff);
3852  break;
3853  case 20:
3854  reg_w(sd, 0x23, 0x1b);
3855  break;
3856  default:
3857 /* case 15: */
3858  reg_w(sd, 0x23, 0xff);
3859  sd->clockdiv = 1;
3860  break;
3861  }
3862  break;
3863  }
3864 }
3865 
3866 static void mode_init_ov_sensor_regs(struct sd *sd)
3867 {
3868  struct gspca_dev *gspca_dev;
3869  int qvga, xstart, xend, ystart, yend;
3870  u8 v;
3871 
3872  gspca_dev = &sd->gspca_dev;
3873  qvga = gspca_dev->cam.cam_mode[gspca_dev->curr_mode].priv & 1;
3874 
3875  /******** Mode (VGA/QVGA) and sensor specific regs ********/
3876  switch (sd->sensor) {
3877  case SEN_OV2610:
3878  i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
3879  i2c_w_mask(sd, 0x28, qvga ? 0x00 : 0x20, 0x20);
3880  i2c_w(sd, 0x24, qvga ? 0x20 : 0x3a);
3881  i2c_w(sd, 0x25, qvga ? 0x30 : 0x60);
3882  i2c_w_mask(sd, 0x2d, qvga ? 0x40 : 0x00, 0x40);
3883  i2c_w_mask(sd, 0x67, qvga ? 0xf0 : 0x90, 0xf0);
3884  i2c_w_mask(sd, 0x74, qvga ? 0x20 : 0x00, 0x20);
3885  return;
3886  case SEN_OV2610AE: {
3887  u8 v;
3888 
3889  /* frame rates:
3890  * 10fps / 5 fps for 1600x1200
3891  * 40fps / 20fps for 800x600
3892  */
3893  v = 80;
3894  if (qvga) {
3895  if (sd->frame_rate < 25)
3896  v = 0x81;
3897  } else {
3898  if (sd->frame_rate < 10)
3899  v = 0x81;
3900  }
3901  i2c_w(sd, 0x11, v);
3902  i2c_w(sd, 0x12, qvga ? 0x60 : 0x20);
3903  return;
3904  }
3905  case SEN_OV3610:
3906  if (qvga) {
3907  xstart = (1040 - gspca_dev->width) / 2 + (0x1f << 4);
3908  ystart = (776 - gspca_dev->height) / 2;
3909  } else {
3910  xstart = (2076 - gspca_dev->width) / 2 + (0x10 << 4);
3911  ystart = (1544 - gspca_dev->height) / 2;
3912  }
3913  xend = xstart + gspca_dev->width;
3914  yend = ystart + gspca_dev->height;
3915  /* Writing to the COMH register resets the other windowing regs
3916  to their default values, so we must do this first. */
3917  i2c_w_mask(sd, 0x12, qvga ? 0x40 : 0x00, 0xf0);
3918  i2c_w_mask(sd, 0x32,
3919  (((xend >> 1) & 7) << 3) | ((xstart >> 1) & 7),
3920  0x3f);
3921  i2c_w_mask(sd, 0x03,
3922  (((yend >> 1) & 3) << 2) | ((ystart >> 1) & 3),
3923  0x0f);
3924  i2c_w(sd, 0x17, xstart >> 4);
3925  i2c_w(sd, 0x18, xend >> 4);
3926  i2c_w(sd, 0x19, ystart >> 3);
3927  i2c_w(sd, 0x1a, yend >> 3);
3928  return;
3929  case SEN_OV8610:
3930  /* For OV8610 qvga means qsvga */
3931  i2c_w_mask(sd, OV7610_REG_COM_C, qvga ? (1 << 5) : 0, 1 << 5);
3932  i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
3933  i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
3934  i2c_w_mask(sd, 0x2d, 0x00, 0x40); /* from windrv 090403 */
3935  i2c_w_mask(sd, 0x28, 0x20, 0x20); /* progressive mode on */
3936  break;
3937  case SEN_OV7610:
3938  i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
3939  i2c_w(sd, 0x35, qvga ? 0x1e : 0x9e);
3940  i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
3941  i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
3942  break;
3943  case SEN_OV7620:
3944  case SEN_OV7620AE:
3945  case SEN_OV76BE:
3946  i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
3947  i2c_w_mask(sd, 0x28, qvga ? 0x00 : 0x20, 0x20);
3948  i2c_w(sd, 0x24, qvga ? 0x20 : 0x3a);
3949  i2c_w(sd, 0x25, qvga ? 0x30 : 0x60);
3950  i2c_w_mask(sd, 0x2d, qvga ? 0x40 : 0x00, 0x40);
3951  i2c_w_mask(sd, 0x67, qvga ? 0xb0 : 0x90, 0xf0);
3952  i2c_w_mask(sd, 0x74, qvga ? 0x20 : 0x00, 0x20);
3953  i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
3954  i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
3955  if (sd->sensor == SEN_OV76BE)
3956  i2c_w(sd, 0x35, qvga ? 0x1e : 0x9e);
3957  break;
3958  case SEN_OV7640:
3959  case SEN_OV7648:
3960  i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
3961  i2c_w_mask(sd, 0x28, qvga ? 0x00 : 0x20, 0x20);
3962  /* Setting this undocumented bit in qvga mode removes a very
3963  annoying vertical shaking of the image */
3964  i2c_w_mask(sd, 0x2d, qvga ? 0x40 : 0x00, 0x40);
3965  /* Unknown */
3966  i2c_w_mask(sd, 0x67, qvga ? 0xf0 : 0x90, 0xf0);
3967  /* Allow higher automatic gain (to allow higher framerates) */
3968  i2c_w_mask(sd, 0x74, qvga ? 0x20 : 0x00, 0x20);
3969  i2c_w_mask(sd, 0x12, 0x04, 0x04); /* AWB: 1 */
3970  break;
3971  case SEN_OV7670:
3972  /* set COM7_FMT_VGA or COM7_FMT_QVGA
3973  * do we need to set anything else?
3974  * HSTART etc are set in set_ov_sensor_window itself */
3975  i2c_w_mask(sd, OV7670_R12_COM7,
3978  i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
3979  i2c_w_mask(sd, OV7670_R13_COM8, OV7670_COM8_AWB,
3980  OV7670_COM8_AWB);
3981  if (qvga) { /* QVGA from ov7670.c by
3982  * Jonathan Corbet */
3983  xstart = 164;
3984  xend = 28;
3985  ystart = 14;
3986  yend = 494;
3987  } else { /* VGA */
3988  xstart = 158;
3989  xend = 14;
3990  ystart = 10;
3991  yend = 490;
3992  }
3993  /* OV7670 hardware window registers are split across
3994  * multiple locations */
3995  i2c_w(sd, OV7670_R17_HSTART, xstart >> 3);
3996  i2c_w(sd, OV7670_R18_HSTOP, xend >> 3);
3997  v = i2c_r(sd, OV7670_R32_HREF);
3998  v = (v & 0xc0) | ((xend & 0x7) << 3) | (xstart & 0x07);
3999  msleep(10); /* need to sleep between read and write to
4000  * same reg! */
4001  i2c_w(sd, OV7670_R32_HREF, v);
4002 
4003  i2c_w(sd, OV7670_R19_VSTART, ystart >> 2);
4004  i2c_w(sd, OV7670_R1A_VSTOP, yend >> 2);
4005  v = i2c_r(sd, OV7670_R03_VREF);
4006  v = (v & 0xc0) | ((yend & 0x3) << 2) | (ystart & 0x03);
4007  msleep(10); /* need to sleep between read and write to
4008  * same reg! */
4009  i2c_w(sd, OV7670_R03_VREF, v);
4010  break;
4011  case SEN_OV6620:
4012  i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
4013  i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
4014  i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
4015  break;
4016  case SEN_OV6630:
4017  case SEN_OV66308AF:
4018  i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
4019  i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
4020  break;
4021  case SEN_OV9600: {
4022  const struct ov_i2c_regvals *vals;
4023  static const struct ov_i2c_regvals sxga_15[] = {
4024  {0x11, 0x80}, {0x14, 0x3e}, {0x24, 0x85}, {0x25, 0x75}
4025  };
4026  static const struct ov_i2c_regvals sxga_7_5[] = {
4027  {0x11, 0x81}, {0x14, 0x3e}, {0x24, 0x85}, {0x25, 0x75}
4028  };
4029  static const struct ov_i2c_regvals vga_30[] = {
4030  {0x11, 0x81}, {0x14, 0x7e}, {0x24, 0x70}, {0x25, 0x60}
4031  };
4032  static const struct ov_i2c_regvals vga_15[] = {
4033  {0x11, 0x83}, {0x14, 0x3e}, {0x24, 0x80}, {0x25, 0x70}
4034  };
4035 
4036  /* frame rates:
4037  * 15fps / 7.5 fps for 1280x1024
4038  * 30fps / 15fps for 640x480
4039  */
4040  i2c_w_mask(sd, 0x12, qvga ? 0x40 : 0x00, 0x40);
4041  if (qvga)
4042  vals = sd->frame_rate < 30 ? vga_15 : vga_30;
4043  else
4044  vals = sd->frame_rate < 15 ? sxga_7_5 : sxga_15;
4045  write_i2c_regvals(sd, vals, ARRAY_SIZE(sxga_15));
4046  return;
4047  }
4048  default:
4049  return;
4050  }
4051 
4052  /******** Clock programming ********/
4053  i2c_w(sd, 0x11, sd->clockdiv);
4054 }
4055 
4056 /* this function works for bridge ov519 and sensors ov7660 and ov7670 only */
4057 static void sethvflip(struct gspca_dev *gspca_dev, s32 hflip, s32 vflip)
4058 {
4059  struct sd *sd = (struct sd *) gspca_dev;
4060 
4061  if (sd->gspca_dev.streaming)
4062  reg_w(sd, OV519_R51_RESET1, 0x0f); /* block stream */
4063  i2c_w_mask(sd, OV7670_R1E_MVFP,
4064  OV7670_MVFP_MIRROR * hflip | OV7670_MVFP_VFLIP * vflip,
4066  if (sd->gspca_dev.streaming)
4067  reg_w(sd, OV519_R51_RESET1, 0x00); /* restart stream */
4068 }
4069 
4070 static void set_ov_sensor_window(struct sd *sd)
4071 {
4072  struct gspca_dev *gspca_dev;
4073  int qvga, crop;
4074  int hwsbase, hwebase, vwsbase, vwebase, hwscale, vwscale;
4075 
4076  /* mode setup is fully handled in mode_init_ov_sensor_regs for these */
4077  switch (sd->sensor) {
4078  case SEN_OV2610:
4079  case SEN_OV2610AE:
4080  case SEN_OV3610:
4081  case SEN_OV7670:
4082  case SEN_OV9600:
4083  mode_init_ov_sensor_regs(sd);
4084  return;
4085  case SEN_OV7660:
4086  ov519_set_mode(sd);
4087  ov519_set_fr(sd);
4088  return;
4089  }
4090 
4091  gspca_dev = &sd->gspca_dev;
4092  qvga = gspca_dev->cam.cam_mode[gspca_dev->curr_mode].priv & 1;
4093  crop = gspca_dev->cam.cam_mode[gspca_dev->curr_mode].priv & 2;
4094 
4095  /* The different sensor ICs handle setting up of window differently.
4096  * IF YOU SET IT WRONG, YOU WILL GET ALL ZERO ISOC DATA FROM OV51x!! */
4097  switch (sd->sensor) {
4098  case SEN_OV8610:
4099  hwsbase = 0x1e;
4100  hwebase = 0x1e;
4101  vwsbase = 0x02;
4102  vwebase = 0x02;
4103  break;
4104  case SEN_OV7610:
4105  case SEN_OV76BE:
4106  hwsbase = 0x38;
4107  hwebase = 0x3a;
4108  vwsbase = vwebase = 0x05;
4109  break;
4110  case SEN_OV6620:
4111  case SEN_OV6630:
4112  case SEN_OV66308AF:
4113  hwsbase = 0x38;
4114  hwebase = 0x3a;
4115  vwsbase = 0x05;
4116  vwebase = 0x06;
4117  if (sd->sensor == SEN_OV66308AF && qvga)
4118  /* HDG: this fixes U and V getting swapped */
4119  hwsbase++;
4120  if (crop) {
4121  hwsbase += 8;
4122  hwebase += 8;
4123  vwsbase += 11;
4124  vwebase += 11;
4125  }
4126  break;
4127  case SEN_OV7620:
4128  case SEN_OV7620AE:
4129  hwsbase = 0x2f; /* From 7620.SET (spec is wrong) */
4130  hwebase = 0x2f;
4131  vwsbase = vwebase = 0x05;
4132  break;
4133  case SEN_OV7640:
4134  case SEN_OV7648:
4135  hwsbase = 0x1a;
4136  hwebase = 0x1a;
4137  vwsbase = vwebase = 0x03;
4138  break;
4139  default:
4140  return;
4141  }
4142 
4143  switch (sd->sensor) {
4144  case SEN_OV6620:
4145  case SEN_OV6630:
4146  case SEN_OV66308AF:
4147  if (qvga) { /* QCIF */
4148  hwscale = 0;
4149  vwscale = 0;
4150  } else { /* CIF */
4151  hwscale = 1;
4152  vwscale = 1; /* The datasheet says 0;
4153  * it's wrong */
4154  }
4155  break;
4156  case SEN_OV8610:
4157  if (qvga) { /* QSVGA */
4158  hwscale = 1;
4159  vwscale = 1;
4160  } else { /* SVGA */
4161  hwscale = 2;
4162  vwscale = 2;
4163  }
4164  break;
4165  default: /* SEN_OV7xx0 */
4166  if (qvga) { /* QVGA */
4167  hwscale = 1;
4168  vwscale = 0;
4169  } else { /* VGA */
4170  hwscale = 2;
4171  vwscale = 1;
4172  }
4173  }
4174 
4175  mode_init_ov_sensor_regs(sd);
4176 
4177  i2c_w(sd, 0x17, hwsbase);
4178  i2c_w(sd, 0x18, hwebase + (sd->sensor_width >> hwscale));
4179  i2c_w(sd, 0x19, vwsbase);
4180  i2c_w(sd, 0x1a, vwebase + (sd->sensor_height >> vwscale));
4181 }
4182 
4183 /* -- start the camera -- */
4184 static int sd_start(struct gspca_dev *gspca_dev)
4185 {
4186  struct sd *sd = (struct sd *) gspca_dev;
4187 
4188  /* Default for most bridges, allow bridge_mode_init_regs to override */
4189  sd->sensor_width = sd->gspca_dev.width;
4190  sd->sensor_height = sd->gspca_dev.height;
4191 
4192  switch (sd->bridge) {
4193  case BRIDGE_OV511:
4194  case BRIDGE_OV511PLUS:
4195  ov511_mode_init_regs(sd);
4196  break;
4197  case BRIDGE_OV518:
4198  case BRIDGE_OV518PLUS:
4199  ov518_mode_init_regs(sd);
4200  break;
4201  case BRIDGE_OV519:
4202  ov519_mode_init_regs(sd);
4203  break;
4204  /* case BRIDGE_OVFX2: nothing to do */
4205  case BRIDGE_W9968CF:
4206  w9968cf_mode_init_regs(sd);
4207  break;
4208  }
4209 
4210  set_ov_sensor_window(sd);
4211 
4212  /* Force clear snapshot state in case the snapshot button was
4213  pressed while we weren't streaming */
4214  sd->snapshot_needs_reset = 1;
4215  sd_reset_snapshot(gspca_dev);
4216 
4217  sd->first_frame = 3;
4218 
4219  ov51x_restart(sd);
4220  ov51x_led_control(sd, 1);
4221  return gspca_dev->usb_err;
4222 }
4223 
4224 static void sd_stopN(struct gspca_dev *gspca_dev)
4225 {
4226  struct sd *sd = (struct sd *) gspca_dev;
4227 
4228  ov51x_stop(sd);
4229  ov51x_led_control(sd, 0);
4230 }
4231 
4232 static void sd_stop0(struct gspca_dev *gspca_dev)
4233 {
4234  struct sd *sd = (struct sd *) gspca_dev;
4235 
4236  if (!sd->gspca_dev.present)
4237  return;
4238  if (sd->bridge == BRIDGE_W9968CF)
4239  w9968cf_stop0(sd);
4240 
4241 #if defined(CONFIG_INPUT) || defined(CONFIG_INPUT_MODULE)
4242  /* If the last button state is pressed, release it now! */
4243  if (sd->snapshot_pressed) {
4244  input_report_key(gspca_dev->input_dev, KEY_CAMERA, 0);
4245  input_sync(gspca_dev->input_dev);
4246  sd->snapshot_pressed = 0;
4247  }
4248 #endif
4249  if (sd->bridge == BRIDGE_OV519)
4250  reg_w(sd, OV519_R57_SNAPSHOT, 0x23);
4251 }
4252 
4253 static void ov51x_handle_button(struct gspca_dev *gspca_dev, u8 state)
4254 {
4255  struct sd *sd = (struct sd *) gspca_dev;
4256 
4257  if (sd->snapshot_pressed != state) {
4258 #if defined(CONFIG_INPUT) || defined(CONFIG_INPUT_MODULE)
4259  input_report_key(gspca_dev->input_dev, KEY_CAMERA, state);
4260  input_sync(gspca_dev->input_dev);
4261 #endif
4262  if (state)
4263  sd->snapshot_needs_reset = 1;
4264 
4265  sd->snapshot_pressed = state;
4266  } else {
4267  /* On the ov511 / ov519 we need to reset the button state
4268  multiple times, as resetting does not work as long as the
4269  button stays pressed */
4270  switch (sd->bridge) {
4271  case BRIDGE_OV511:
4272  case BRIDGE_OV511PLUS:
4273  case BRIDGE_OV519:
4274  if (state)
4275  sd->snapshot_needs_reset = 1;
4276  break;
4277  }
4278  }
4279 }
4280 
4281 static void ov511_pkt_scan(struct gspca_dev *gspca_dev,
4282  u8 *in, /* isoc packet */
4283  int len) /* iso packet length */
4284 {
4285  struct sd *sd = (struct sd *) gspca_dev;
4286 
4287  /* SOF/EOF packets have 1st to 8th bytes zeroed and the 9th
4288  * byte non-zero. The EOF packet has image width/height in the
4289  * 10th and 11th bytes. The 9th byte is given as follows:
4290  *
4291  * bit 7: EOF
4292  * 6: compression enabled
4293  * 5: 422/420/400 modes
4294  * 4: 422/420/400 modes
4295  * 3: 1
4296  * 2: snapshot button on
4297  * 1: snapshot frame
4298  * 0: even/odd field
4299  */
4300  if (!(in[0] | in[1] | in[2] | in[3] | in[4] | in[5] | in[6] | in[7]) &&
4301  (in[8] & 0x08)) {
4302  ov51x_handle_button(gspca_dev, (in[8] >> 2) & 1);
4303  if (in[8] & 0x80) {
4304  /* Frame end */
4305  if ((in[9] + 1) * 8 != gspca_dev->width ||
4306  (in[10] + 1) * 8 != gspca_dev->height) {
4307  PDEBUG(D_ERR, "Invalid frame size, got: %dx%d,"
4308  " requested: %dx%d\n",
4309  (in[9] + 1) * 8, (in[10] + 1) * 8,
4310  gspca_dev->width, gspca_dev->height);
4311  gspca_dev->last_packet_type = DISCARD_PACKET;
4312  return;
4313  }
4314  /* Add 11 byte footer to frame, might be useful */
4315  gspca_frame_add(gspca_dev, LAST_PACKET, in, 11);
4316  return;
4317  } else {
4318  /* Frame start */
4319  gspca_frame_add(gspca_dev, FIRST_PACKET, in, 0);
4320  sd->packet_nr = 0;
4321  }
4322  }
4323 
4324  /* Ignore the packet number */
4325  len--;
4326 
4327  /* intermediate packet */
4328  gspca_frame_add(gspca_dev, INTER_PACKET, in, len);
4329 }
4330 
4331 static void ov518_pkt_scan(struct gspca_dev *gspca_dev,
4332  u8 *data, /* isoc packet */
4333  int len) /* iso packet length */
4334 {
4335  struct sd *sd = (struct sd *) gspca_dev;
4336 
4337  /* A false positive here is likely, until OVT gives me
4338  * the definitive SOF/EOF format */
4339  if ((!(data[0] | data[1] | data[2] | data[3] | data[5])) && data[6]) {
4340  ov51x_handle_button(gspca_dev, (data[6] >> 1) & 1);
4341  gspca_frame_add(gspca_dev, LAST_PACKET, NULL, 0);
4342  gspca_frame_add(gspca_dev, FIRST_PACKET, NULL, 0);
4343  sd->packet_nr = 0;
4344  }
4345 
4346  if (gspca_dev->last_packet_type == DISCARD_PACKET)
4347  return;
4348 
4349  /* Does this device use packet numbers ? */
4350  if (len & 7) {
4351  len--;
4352  if (sd->packet_nr == data[len])
4353  sd->packet_nr++;
4354  /* The last few packets of the frame (which are all 0's
4355  except that they may contain part of the footer), are
4356  numbered 0 */
4357  else if (sd->packet_nr == 0 || data[len]) {
4358  PDEBUG(D_ERR, "Invalid packet nr: %d (expect: %d)",
4359  (int)data[len], (int)sd->packet_nr);
4360  gspca_dev->last_packet_type = DISCARD_PACKET;
4361  return;
4362  }
4363  }
4364 
4365  /* intermediate packet */
4366  gspca_frame_add(gspca_dev, INTER_PACKET, data, len);
4367 }
4368 
4369 static void ov519_pkt_scan(struct gspca_dev *gspca_dev,
4370  u8 *data, /* isoc packet */
4371  int len) /* iso packet length */
4372 {
4373  /* Header of ov519 is 16 bytes:
4374  * Byte Value Description
4375  * 0 0xff magic
4376  * 1 0xff magic
4377  * 2 0xff magic
4378  * 3 0xXX 0x50 = SOF, 0x51 = EOF
4379  * 9 0xXX 0x01 initial frame without data,
4380  * 0x00 standard frame with image
4381  * 14 Lo in EOF: length of image data / 8
4382  * 15 Hi
4383  */
4384 
4385  if (data[0] == 0xff && data[1] == 0xff && data[2] == 0xff) {
4386  switch (data[3]) {
4387  case 0x50: /* start of frame */
4388  /* Don't check the button state here, as the state
4389  usually (always ?) changes at EOF and checking it
4390  here leads to unnecessary snapshot state resets. */
4391 #define HDRSZ 16
4392  data += HDRSZ;
4393  len -= HDRSZ;
4394 #undef HDRSZ
4395  if (data[0] == 0xff || data[1] == 0xd8)
4396  gspca_frame_add(gspca_dev, FIRST_PACKET,
4397  data, len);
4398  else
4399  gspca_dev->last_packet_type = DISCARD_PACKET;
4400  return;
4401  case 0x51: /* end of frame */
4402  ov51x_handle_button(gspca_dev, data[11] & 1);
4403  if (data[9] != 0)
4404  gspca_dev->last_packet_type = DISCARD_PACKET;
4405  gspca_frame_add(gspca_dev, LAST_PACKET,
4406  NULL, 0);
4407  return;
4408  }
4409  }
4410 
4411  /* intermediate packet */
4412  gspca_frame_add(gspca_dev, INTER_PACKET, data, len);
4413 }
4414 
4415 static void ovfx2_pkt_scan(struct gspca_dev *gspca_dev,
4416  u8 *data, /* isoc packet */
4417  int len) /* iso packet length */
4418 {
4419  struct sd *sd = (struct sd *) gspca_dev;
4420 
4421  gspca_frame_add(gspca_dev, INTER_PACKET, data, len);
4422 
4423  /* A short read signals EOF */
4424  if (len < gspca_dev->cam.bulk_size) {
4425  /* If the frame is short, and it is one of the first ones
4426  the sensor and bridge are still syncing, so drop it. */
4427  if (sd->first_frame) {
4428  sd->first_frame--;
4429  if (gspca_dev->image_len <
4430  sd->gspca_dev.width * sd->gspca_dev.height)
4431  gspca_dev->last_packet_type = DISCARD_PACKET;
4432  }
4433  gspca_frame_add(gspca_dev, LAST_PACKET, NULL, 0);
4434  gspca_frame_add(gspca_dev, FIRST_PACKET, NULL, 0);
4435  }
4436 }
4437 
4438 static void sd_pkt_scan(struct gspca_dev *gspca_dev,
4439  u8 *data, /* isoc packet */
4440  int len) /* iso packet length */
4441 {
4442  struct sd *sd = (struct sd *) gspca_dev;
4443 
4444  switch (sd->bridge) {
4445  case BRIDGE_OV511:
4446  case BRIDGE_OV511PLUS:
4447  ov511_pkt_scan(gspca_dev, data, len);
4448  break;
4449  case BRIDGE_OV518:
4450  case BRIDGE_OV518PLUS:
4451  ov518_pkt_scan(gspca_dev, data, len);
4452  break;
4453  case BRIDGE_OV519:
4454  ov519_pkt_scan(gspca_dev, data, len);
4455  break;
4456  case BRIDGE_OVFX2:
4457  ovfx2_pkt_scan(gspca_dev, data, len);
4458  break;
4459  case BRIDGE_W9968CF:
4460  w9968cf_pkt_scan(gspca_dev, data, len);
4461  break;
4462  }
4463 }
4464 
4465 /* -- management routines -- */
4466 
4467 static void setbrightness(struct gspca_dev *gspca_dev, s32 val)
4468 {
4469  struct sd *sd = (struct sd *) gspca_dev;
4470  static const struct ov_i2c_regvals brit_7660[][7] = {
4471  {{0x0f, 0x6a}, {0x24, 0x40}, {0x25, 0x2b}, {0x26, 0x90},
4472  {0x27, 0xe0}, {0x28, 0xe0}, {0x2c, 0xe0}},
4473  {{0x0f, 0x6a}, {0x24, 0x50}, {0x25, 0x40}, {0x26, 0xa1},
4474  {0x27, 0xc0}, {0x28, 0xc0}, {0x2c, 0xc0}},
4475  {{0x0f, 0x6a}, {0x24, 0x68}, {0x25, 0x58}, {0x26, 0xc2},
4476  {0x27, 0xa0}, {0x28, 0xa0}, {0x2c, 0xa0}},
4477  {{0x0f, 0x6a}, {0x24, 0x70}, {0x25, 0x68}, {0x26, 0xd3},
4478  {0x27, 0x80}, {0x28, 0x80}, {0x2c, 0x80}},
4479  {{0x0f, 0x6a}, {0x24, 0x80}, {0x25, 0x70}, {0x26, 0xd3},
4480  {0x27, 0x20}, {0x28, 0x20}, {0x2c, 0x20}},
4481  {{0x0f, 0x6a}, {0x24, 0x88}, {0x25, 0x78}, {0x26, 0xd3},
4482  {0x27, 0x40}, {0x28, 0x40}, {0x2c, 0x40}},
4483  {{0x0f, 0x6a}, {0x24, 0x90}, {0x25, 0x80}, {0x26, 0xd4},
4484  {0x27, 0x60}, {0x28, 0x60}, {0x2c, 0x60}}
4485  };
4486 
4487  switch (sd->sensor) {
4488  case SEN_OV8610:
4489  case SEN_OV7610:
4490  case SEN_OV76BE:
4491  case SEN_OV6620:
4492  case SEN_OV6630:
4493  case SEN_OV66308AF:
4494  case SEN_OV7640:
4495  case SEN_OV7648:
4496  i2c_w(sd, OV7610_REG_BRT, val);
4497  break;
4498  case SEN_OV7620:
4499  case SEN_OV7620AE:
4500  i2c_w(sd, OV7610_REG_BRT, val);
4501  break;
4502  case SEN_OV7660:
4503  write_i2c_regvals(sd, brit_7660[val],
4504  ARRAY_SIZE(brit_7660[0]));
4505  break;
4506  case SEN_OV7670:
4507 /*win trace
4508  * i2c_w_mask(sd, OV7670_R13_COM8, 0, OV7670_COM8_AEC); */
4509  i2c_w(sd, OV7670_R55_BRIGHT, ov7670_abs_to_sm(val));
4510  break;
4511  }
4512 }
4513 
4514 static void setcontrast(struct gspca_dev *gspca_dev, s32 val)
4515 {
4516  struct sd *sd = (struct sd *) gspca_dev;
4517  static const struct ov_i2c_regvals contrast_7660[][31] = {
4518  {{0x6c, 0xf0}, {0x6d, 0xf0}, {0x6e, 0xf8}, {0x6f, 0xa0},
4519  {0x70, 0x58}, {0x71, 0x38}, {0x72, 0x30}, {0x73, 0x30},
4520  {0x74, 0x28}, {0x75, 0x28}, {0x76, 0x24}, {0x77, 0x24},
4521  {0x78, 0x22}, {0x79, 0x28}, {0x7a, 0x2a}, {0x7b, 0x34},
4522  {0x7c, 0x0f}, {0x7d, 0x1e}, {0x7e, 0x3d}, {0x7f, 0x65},
4523  {0x80, 0x70}, {0x81, 0x77}, {0x82, 0x7d}, {0x83, 0x83},
4524  {0x84, 0x88}, {0x85, 0x8d}, {0x86, 0x96}, {0x87, 0x9f},
4525  {0x88, 0xb0}, {0x89, 0xc4}, {0x8a, 0xd9}},
4526  {{0x6c, 0xf0}, {0x6d, 0xf0}, {0x6e, 0xf8}, {0x6f, 0x94},
4527  {0x70, 0x58}, {0x71, 0x40}, {0x72, 0x30}, {0x73, 0x30},
4528  {0x74, 0x30}, {0x75, 0x30}, {0x76, 0x2c}, {0x77, 0x24},
4529  {0x78, 0x22}, {0x79, 0x28}, {0x7a, 0x2a}, {0x7b, 0x31},
4530  {0x7c, 0x0f}, {0x7d, 0x1e}, {0x7e, 0x3d}, {0x7f, 0x62},
4531  {0x80, 0x6d}, {0x81, 0x75}, {0x82, 0x7b}, {0x83, 0x81},
4532  {0x84, 0x87}, {0x85, 0x8d}, {0x86, 0x98}, {0x87, 0xa1},
4533  {0x88, 0xb2}, {0x89, 0xc6}, {0x8a, 0xdb}},
4534  {{0x6c, 0xf0}, {0x6d, 0xf0}, {0x6e, 0xf0}, {0x6f, 0x84},
4535  {0x70, 0x58}, {0x71, 0x48}, {0x72, 0x40}, {0x73, 0x40},
4536  {0x74, 0x28}, {0x75, 0x28}, {0x76, 0x28}, {0x77, 0x24},
4537  {0x78, 0x26}, {0x79, 0x28}, {0x7a, 0x28}, {0x7b, 0x34},
4538  {0x7c, 0x0f}, {0x7d, 0x1e}, {0x7e, 0x3c}, {0x7f, 0x5d},
4539  {0x80, 0x68}, {0x81, 0x71}, {0x82, 0x79}, {0x83, 0x81},
4540  {0x84, 0x86}, {0x85, 0x8b}, {0x86, 0x95}, {0x87, 0x9e},
4541  {0x88, 0xb1}, {0x89, 0xc5}, {0x8a, 0xd9}},
4542  {{0x6c, 0xf0}, {0x6d, 0xf0}, {0x6e, 0xf0}, {0x6f, 0x70},
4543  {0x70, 0x58}, {0x71, 0x58}, {0x72, 0x48}, {0x73, 0x48},
4544  {0x74, 0x38}, {0x75, 0x40}, {0x76, 0x34}, {0x77, 0x34},
4545  {0x78, 0x2e}, {0x79, 0x28}, {0x7a, 0x24}, {0x7b, 0x22},
4546  {0x7c, 0x0f}, {0x7d, 0x1e}, {0x7e, 0x3c}, {0x7f, 0x58},
4547  {0x80, 0x63}, {0x81, 0x6e}, {0x82, 0x77}, {0x83, 0x80},
4548  {0x84, 0x87}, {0x85, 0x8f}, {0x86, 0x9c}, {0x87, 0xa9},
4549  {0x88, 0xc0}, {0x89, 0xd4}, {0x8a, 0xe6}},
4550  {{0x6c, 0xa0}, {0x6d, 0xf0}, {0x6e, 0x90}, {0x6f, 0x80},
4551  {0x70, 0x70}, {0x71, 0x80}, {0x72, 0x60}, {0x73, 0x60},
4552  {0x74, 0x58}, {0x75, 0x60}, {0x76, 0x4c}, {0x77, 0x38},
4553  {0x78, 0x38}, {0x79, 0x2a}, {0x7a, 0x20}, {0x7b, 0x0e},
4554  {0x7c, 0x0a}, {0x7d, 0x14}, {0x7e, 0x26}, {0x7f, 0x46},
4555  {0x80, 0x54}, {0x81, 0x64}, {0x82, 0x70}, {0x83, 0x7c},
4556  {0x84, 0x87}, {0x85, 0x93}, {0x86, 0xa6}, {0x87, 0xb4},
4557  {0x88, 0xd0}, {0x89, 0xe5}, {0x8a, 0xf5}},
4558  {{0x6c, 0x60}, {0x6d, 0x80}, {0x6e, 0x60}, {0x6f, 0x80},
4559  {0x70, 0x80}, {0x71, 0x80}, {0x72, 0x88}, {0x73, 0x30},
4560  {0x74, 0x70}, {0x75, 0x68}, {0x76, 0x64}, {0x77, 0x50},
4561  {0x78, 0x3c}, {0x79, 0x22}, {0x7a, 0x10}, {0x7b, 0x08},
4562  {0x7c, 0x06}, {0x7d, 0x0e}, {0x7e, 0x1a}, {0x7f, 0x3a},
4563  {0x80, 0x4a}, {0x81, 0x5a}, {0x82, 0x6b}, {0x83, 0x7b},
4564  {0x84, 0x89}, {0x85, 0x96}, {0x86, 0xaf}, {0x87, 0xc3},
4565  {0x88, 0xe1}, {0x89, 0xf2}, {0x8a, 0xfa}},
4566  {{0x6c, 0x20}, {0x6d, 0x40}, {0x6e, 0x20}, {0x6f, 0x60},
4567  {0x70, 0x88}, {0x71, 0xc8}, {0x72, 0xc0}, {0x73, 0xb8},
4568  {0x74, 0xa8}, {0x75, 0xb8}, {0x76, 0x80}, {0x77, 0x5c},
4569  {0x78, 0x26}, {0x79, 0x10}, {0x7a, 0x08}, {0x7b, 0x04},
4570  {0x7c, 0x02}, {0x7d, 0x06}, {0x7e, 0x0a}, {0x7f, 0x22},
4571  {0x80, 0x33}, {0x81, 0x4c}, {0x82, 0x64}, {0x83, 0x7b},
4572  {0x84, 0x90}, {0x85, 0xa7}, {0x86, 0xc7}, {0x87, 0xde},
4573  {0x88, 0xf1}, {0x89, 0xf9}, {0x8a, 0xfd}},
4574  };
4575 
4576  switch (sd->sensor) {
4577  case SEN_OV7610:
4578  case SEN_OV6620:
4579  i2c_w(sd, OV7610_REG_CNT, val);
4580  break;
4581  case SEN_OV6630:
4582  case SEN_OV66308AF:
4583  i2c_w_mask(sd, OV7610_REG_CNT, val >> 4, 0x0f);
4584  break;
4585  case SEN_OV8610: {
4586  static const u8 ctab[] = {
4587  0x03, 0x09, 0x0b, 0x0f, 0x53, 0x6f, 0x35, 0x7f
4588  };
4589 
4590  /* Use Y gamma control instead. Bit 0 enables it. */
4591  i2c_w(sd, 0x64, ctab[val >> 5]);
4592  break;
4593  }
4594  case SEN_OV7620:
4595  case SEN_OV7620AE: {
4596  static const u8 ctab[] = {
4597  0x01, 0x05, 0x09, 0x11, 0x15, 0x35, 0x37, 0x57,
4598  0x5b, 0xa5, 0xa7, 0xc7, 0xc9, 0xcf, 0xef, 0xff
4599  };
4600 
4601  /* Use Y gamma control instead. Bit 0 enables it. */
4602  i2c_w(sd, 0x64, ctab[val >> 4]);
4603  break;
4604  }
4605  case SEN_OV7660:
4606  write_i2c_regvals(sd, contrast_7660[val],
4607  ARRAY_SIZE(contrast_7660[0]));
4608  break;
4609  case SEN_OV7670:
4610  /* check that this isn't just the same as ov7610 */
4611  i2c_w(sd, OV7670_R56_CONTRAS, val >> 1);
4612  break;
4613  }
4614 }
4615 
4616 static void setexposure(struct gspca_dev *gspca_dev, s32 val)
4617 {
4618  struct sd *sd = (struct sd *) gspca_dev;
4619 
4620  i2c_w(sd, 0x10, val);
4621 }
4622 
4623 static void setcolors(struct gspca_dev *gspca_dev, s32 val)
4624 {
4625  struct sd *sd = (struct sd *) gspca_dev;
4626  static const struct ov_i2c_regvals colors_7660[][6] = {
4627  {{0x4f, 0x28}, {0x50, 0x2a}, {0x51, 0x02}, {0x52, 0x0a},
4628  {0x53, 0x19}, {0x54, 0x23}},
4629  {{0x4f, 0x47}, {0x50, 0x4a}, {0x51, 0x03}, {0x52, 0x11},
4630  {0x53, 0x2c}, {0x54, 0x3e}},
4631  {{0x4f, 0x66}, {0x50, 0x6b}, {0x51, 0x05}, {0x52, 0x19},
4632  {0x53, 0x40}, {0x54, 0x59}},
4633  {{0x4f, 0x84}, {0x50, 0x8b}, {0x51, 0x06}, {0x52, 0x20},
4634  {0x53, 0x53}, {0x54, 0x73}},
4635  {{0x4f, 0xa3}, {0x50, 0xab}, {0x51, 0x08}, {0x52, 0x28},
4636  {0x53, 0x66}, {0x54, 0x8e}},
4637  };
4638 
4639  switch (sd->sensor) {
4640  case SEN_OV8610:
4641  case SEN_OV7610:
4642  case SEN_OV76BE:
4643  case SEN_OV6620:
4644  case SEN_OV6630:
4645  case SEN_OV66308AF:
4646  i2c_w(sd, OV7610_REG_SAT, val);
4647  break;
4648  case SEN_OV7620:
4649  case SEN_OV7620AE:
4650  /* Use UV gamma control instead. Bits 0 & 7 are reserved. */
4651 /* rc = ov_i2c_write(sd->dev, 0x62, (val >> 9) & 0x7e);
4652  if (rc < 0)
4653  goto out; */
4654  i2c_w(sd, OV7610_REG_SAT, val);
4655  break;
4656  case SEN_OV7640:
4657  case SEN_OV7648:
4658  i2c_w(sd, OV7610_REG_SAT, val & 0xf0);
4659  break;
4660  case SEN_OV7660:
4661  write_i2c_regvals(sd, colors_7660[val],
4662  ARRAY_SIZE(colors_7660[0]));
4663  break;
4664  case SEN_OV7670:
4665  /* supported later once I work out how to do it
4666  * transparently fail now! */
4667  /* set REG_COM13 values for UV sat auto mode */
4668  break;
4669  }
4670 }
4671 
4672 static void setautobright(struct gspca_dev *gspca_dev, s32 val)
4673 {
4674  struct sd *sd = (struct sd *) gspca_dev;
4675 
4676  i2c_w_mask(sd, 0x2d, val ? 0x10 : 0x00, 0x10);
4677 }
4678 
4679 static void setfreq_i(struct sd *sd, s32 val)
4680 {
4681  if (sd->sensor == SEN_OV7660
4682  || sd->sensor == SEN_OV7670) {
4683  switch (val) {
4684  case 0: /* Banding filter disabled */
4685  i2c_w_mask(sd, OV7670_R13_COM8, 0, OV7670_COM8_BFILT);
4686  break;
4687  case 1: /* 50 hz */
4688  i2c_w_mask(sd, OV7670_R13_COM8, OV7670_COM8_BFILT,
4690  i2c_w_mask(sd, OV7670_R3B_COM11, 0x08, 0x18);
4691  break;
4692  case 2: /* 60 hz */
4693  i2c_w_mask(sd, OV7670_R13_COM8, OV7670_COM8_BFILT,
4695  i2c_w_mask(sd, OV7670_R3B_COM11, 0x00, 0x18);
4696  break;
4697  case 3: /* Auto hz - ov7670 only */
4698  i2c_w_mask(sd, OV7670_R13_COM8, OV7670_COM8_BFILT,
4700  i2c_w_mask(sd, OV7670_R3B_COM11, OV7670_COM11_HZAUTO,
4701  0x18);
4702  break;
4703  }
4704  } else {
4705  switch (val) {
4706  case 0: /* Banding filter disabled */
4707  i2c_w_mask(sd, 0x2d, 0x00, 0x04);
4708  i2c_w_mask(sd, 0x2a, 0x00, 0x80);
4709  break;
4710  case 1: /* 50 hz (filter on and framerate adj) */
4711  i2c_w_mask(sd, 0x2d, 0x04, 0x04);
4712  i2c_w_mask(sd, 0x2a, 0x80, 0x80);
4713  /* 20 fps -> 16.667 fps */
4714  if (sd->sensor == SEN_OV6620 ||
4715  sd->sensor == SEN_OV6630 ||
4716  sd->sensor == SEN_OV66308AF)
4717  i2c_w(sd, 0x2b, 0x5e);
4718  else
4719  i2c_w(sd, 0x2b, 0xac);
4720  break;
4721  case 2: /* 60 hz (filter on, ...) */
4722  i2c_w_mask(sd, 0x2d, 0x04, 0x04);
4723  if (sd->sensor == SEN_OV6620 ||
4724  sd->sensor == SEN_OV6630 ||
4725  sd->sensor == SEN_OV66308AF) {
4726  /* 20 fps -> 15 fps */
4727  i2c_w_mask(sd, 0x2a, 0x80, 0x80);
4728  i2c_w(sd, 0x2b, 0xa8);
4729  } else {
4730  /* no framerate adj. */
4731  i2c_w_mask(sd, 0x2a, 0x00, 0x80);
4732  }
4733  break;
4734  }
4735  }
4736 }
4737 
4738 static void setfreq(struct gspca_dev *gspca_dev, s32 val)
4739 {
4740  struct sd *sd = (struct sd *) gspca_dev;
4741 
4742  setfreq_i(sd, val);
4743 
4744  /* Ugly but necessary */
4745  if (sd->bridge == BRIDGE_W9968CF)
4746  w9968cf_set_crop_window(sd);
4747 }
4748 
4749 static int sd_get_jcomp(struct gspca_dev *gspca_dev,
4750  struct v4l2_jpegcompression *jcomp)
4751 {
4752  struct sd *sd = (struct sd *) gspca_dev;
4753 
4754  if (sd->bridge != BRIDGE_W9968CF)
4755  return -ENOTTY;
4756 
4757  memset(jcomp, 0, sizeof *jcomp);
4758  jcomp->quality = v4l2_ctrl_g_ctrl(sd->jpegqual);
4761  return 0;
4762 }
4763 
4764 static int sd_set_jcomp(struct gspca_dev *gspca_dev,
4765  const struct v4l2_jpegcompression *jcomp)
4766 {
4767  struct sd *sd = (struct sd *) gspca_dev;
4768 
4769  if (sd->bridge != BRIDGE_W9968CF)
4770  return -ENOTTY;
4771 
4772  v4l2_ctrl_s_ctrl(sd->jpegqual, jcomp->quality);
4773  return 0;
4774 }
4775 
4776 static int sd_g_volatile_ctrl(struct v4l2_ctrl *ctrl)
4777 {
4778  struct gspca_dev *gspca_dev =
4779  container_of(ctrl->handler, struct gspca_dev, ctrl_handler);
4780  struct sd *sd = (struct sd *)gspca_dev;
4781 
4782  gspca_dev->usb_err = 0;
4783 
4784  switch (ctrl->id) {
4785  case V4L2_CID_AUTOGAIN:
4786  gspca_dev->exposure->val = i2c_r(sd, 0x10);
4787  break;
4788  }
4789  return 0;
4790 }
4791 
4792 static int sd_s_ctrl(struct v4l2_ctrl *ctrl)
4793 {
4794  struct gspca_dev *gspca_dev =
4795  container_of(ctrl->handler, struct gspca_dev, ctrl_handler);
4796  struct sd *sd = (struct sd *)gspca_dev;
4797 
4798  gspca_dev->usb_err = 0;
4799 
4800  if (!gspca_dev->streaming)
4801  return 0;
4802 
4803  switch (ctrl->id) {
4804  case V4L2_CID_BRIGHTNESS:
4805  setbrightness(gspca_dev, ctrl->val);
4806  break;
4807  case V4L2_CID_CONTRAST:
4808  setcontrast(gspca_dev, ctrl->val);
4809  break;
4811  setfreq(gspca_dev, ctrl->val);
4812  break;
4814  if (ctrl->is_new)
4815  setautobright(gspca_dev, ctrl->val);
4816  if (!ctrl->val && sd->brightness->is_new)
4817  setbrightness(gspca_dev, sd->brightness->val);
4818  break;
4819  case V4L2_CID_SATURATION:
4820  setcolors(gspca_dev, ctrl->val);
4821  break;
4822  case V4L2_CID_HFLIP:
4823  sethvflip(gspca_dev, ctrl->val, sd->vflip->val);
4824  break;
4825  case V4L2_CID_AUTOGAIN:
4826  if (ctrl->is_new)
4827  setautogain(gspca_dev, ctrl->val);
4828  if (!ctrl->val && gspca_dev->exposure->is_new)
4829  setexposure(gspca_dev, gspca_dev->exposure->val);
4830  break;
4832  return -EBUSY; /* Should never happen, as we grab the ctrl */
4833  }
4834  return gspca_dev->usb_err;
4835 }
4836 
4837 static const struct v4l2_ctrl_ops sd_ctrl_ops = {
4838  .g_volatile_ctrl = sd_g_volatile_ctrl,
4839  .s_ctrl = sd_s_ctrl,
4840 };
4841 
4842 static int sd_init_controls(struct gspca_dev *gspca_dev)
4843 {
4844  struct sd *sd = (struct sd *)gspca_dev;
4845  struct v4l2_ctrl_handler *hdl = &gspca_dev->ctrl_handler;
4846 
4847  gspca_dev->vdev.ctrl_handler = hdl;
4848  v4l2_ctrl_handler_init(hdl, 10);
4849  if (valid_controls[sd->sensor].has_brightness)
4850  sd->brightness = v4l2_ctrl_new_std(hdl, &sd_ctrl_ops,
4852  sd->sensor == SEN_OV7660 ? 6 : 255, 1,
4853  sd->sensor == SEN_OV7660 ? 3 : 127);
4854  if (valid_controls[sd->sensor].has_contrast) {
4855  if (sd->sensor == SEN_OV7660)
4856  v4l2_ctrl_new_std(hdl, &sd_ctrl_ops,
4857  V4L2_CID_CONTRAST, 0, 6, 1, 3);
4858  else
4859  v4l2_ctrl_new_std(hdl, &sd_ctrl_ops,
4860  V4L2_CID_CONTRAST, 0, 255, 1,
4861  (sd->sensor == SEN_OV6630 ||
4862  sd->sensor == SEN_OV66308AF) ? 200 : 127);
4863  }
4864  if (valid_controls[sd->sensor].has_sat)
4865  v4l2_ctrl_new_std(hdl, &sd_ctrl_ops,
4867  sd->sensor == SEN_OV7660 ? 4 : 255, 1,
4868  sd->sensor == SEN_OV7660 ? 2 : 127);
4869  if (valid_controls[sd->sensor].has_exposure)
4870  gspca_dev->exposure = v4l2_ctrl_new_std(hdl, &sd_ctrl_ops,
4871  V4L2_CID_EXPOSURE, 0, 255, 1, 127);
4872  if (valid_controls[sd->sensor].has_hvflip) {
4873  sd->hflip = v4l2_ctrl_new_std(hdl, &sd_ctrl_ops,
4874  V4L2_CID_HFLIP, 0, 1, 1, 0);
4875  sd->vflip = v4l2_ctrl_new_std(hdl, &sd_ctrl_ops,
4876  V4L2_CID_VFLIP, 0, 1, 1, 0);
4877  }
4878  if (valid_controls[sd->sensor].has_autobright)
4879  sd->autobright = v4l2_ctrl_new_std(hdl, &sd_ctrl_ops,
4880  V4L2_CID_AUTOBRIGHTNESS, 0, 1, 1, 1);
4881  if (valid_controls[sd->sensor].has_autogain)
4882  gspca_dev->autogain = v4l2_ctrl_new_std(hdl, &sd_ctrl_ops,
4883  V4L2_CID_AUTOGAIN, 0, 1, 1, 1);
4884  if (valid_controls[sd->sensor].has_freq) {
4885  if (sd->sensor == SEN_OV7670)
4886  sd->freq = v4l2_ctrl_new_std_menu(hdl, &sd_ctrl_ops,
4890  else
4891  sd->freq = v4l2_ctrl_new_std_menu(hdl, &sd_ctrl_ops,
4894  }
4895  if (sd->bridge == BRIDGE_W9968CF)
4896  sd->jpegqual = v4l2_ctrl_new_std(hdl, &sd_ctrl_ops,
4899 
4900  if (hdl->error) {
4901  pr_err("Could not initialize controls\n");
4902  return hdl->error;
4903  }
4904  if (gspca_dev->autogain)
4905  v4l2_ctrl_auto_cluster(3, &gspca_dev->autogain, 0, true);
4906  if (sd->autobright)
4907  v4l2_ctrl_auto_cluster(2, &sd->autobright, 0, false);
4908  if (sd->hflip)
4909  v4l2_ctrl_cluster(2, &sd->hflip);
4910  return 0;
4911 }
4912 
4913 /* sub-driver description */
4914 static const struct sd_desc sd_desc = {
4915  .name = MODULE_NAME,
4916  .config = sd_config,
4917  .init = sd_init,
4918  .init_controls = sd_init_controls,
4919  .isoc_init = sd_isoc_init,
4920  .start = sd_start,
4921  .stopN = sd_stopN,
4922  .stop0 = sd_stop0,
4923  .pkt_scan = sd_pkt_scan,
4924  .dq_callback = sd_reset_snapshot,
4925  .get_jcomp = sd_get_jcomp,
4926  .set_jcomp = sd_set_jcomp,
4927 #if defined(CONFIG_INPUT) || defined(CONFIG_INPUT_MODULE)
4928  .other_input = 1,
4929 #endif
4930 };
4931 
4932 /* -- module initialisation -- */
4933 static const struct usb_device_id device_table[] = {
4934  {USB_DEVICE(0x041e, 0x4003), .driver_info = BRIDGE_W9968CF },
4935  {USB_DEVICE(0x041e, 0x4052),
4936  .driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED },
4937  {USB_DEVICE(0x041e, 0x405f), .driver_info = BRIDGE_OV519 },
4938  {USB_DEVICE(0x041e, 0x4060), .driver_info = BRIDGE_OV519 },
4939  {USB_DEVICE(0x041e, 0x4061), .driver_info = BRIDGE_OV519 },
4940  {USB_DEVICE(0x041e, 0x4064), .driver_info = BRIDGE_OV519 },
4941  {USB_DEVICE(0x041e, 0x4067), .driver_info = BRIDGE_OV519 },
4942  {USB_DEVICE(0x041e, 0x4068), .driver_info = BRIDGE_OV519 },
4943  {USB_DEVICE(0x045e, 0x028c),
4944  .driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED },
4945  {USB_DEVICE(0x054c, 0x0154), .driver_info = BRIDGE_OV519 },
4946  {USB_DEVICE(0x054c, 0x0155), .driver_info = BRIDGE_OV519 },
4947  {USB_DEVICE(0x05a9, 0x0511), .driver_info = BRIDGE_OV511 },
4948  {USB_DEVICE(0x05a9, 0x0518), .driver_info = BRIDGE_OV518 },
4949  {USB_DEVICE(0x05a9, 0x0519),
4950  .driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED },
4951  {USB_DEVICE(0x05a9, 0x0530),
4952  .driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED },
4953  {USB_DEVICE(0x05a9, 0x2800), .driver_info = BRIDGE_OVFX2 },
4954  {USB_DEVICE(0x05a9, 0x4519), .driver_info = BRIDGE_OV519 },
4955  {USB_DEVICE(0x05a9, 0x8519), .driver_info = BRIDGE_OV519 },
4956  {USB_DEVICE(0x05a9, 0xa511), .driver_info = BRIDGE_OV511PLUS },
4957  {USB_DEVICE(0x05a9, 0xa518), .driver_info = BRIDGE_OV518PLUS },
4958  {USB_DEVICE(0x0813, 0x0002), .driver_info = BRIDGE_OV511PLUS },
4959  {USB_DEVICE(0x0b62, 0x0059), .driver_info = BRIDGE_OVFX2 },
4960  {USB_DEVICE(0x0e96, 0xc001), .driver_info = BRIDGE_OVFX2 },
4961  {USB_DEVICE(0x1046, 0x9967), .driver_info = BRIDGE_W9968CF },
4962  {USB_DEVICE(0x8020, 0xef04), .driver_info = BRIDGE_OVFX2 },
4963  {}
4964 };
4965 
4966 MODULE_DEVICE_TABLE(usb, device_table);
4967 
4968 /* -- device connect -- */
4969 static int sd_probe(struct usb_interface *intf,
4970  const struct usb_device_id *id)
4971 {
4972  return gspca_dev_probe(intf, id, &sd_desc, sizeof(struct sd),
4973  THIS_MODULE);
4974 }
4975 
4976 static struct usb_driver sd_driver = {
4977  .name = MODULE_NAME,
4978  .id_table = device_table,
4979  .probe = sd_probe,
4980  .disconnect = gspca_disconnect,
4981 #ifdef CONFIG_PM
4982  .suspend = gspca_suspend,
4983  .resume = gspca_resume,
4984  .reset_resume = gspca_resume,
4985 #endif
4986 };
4987 
4988 module_usb_driver(sd_driver);
4989 
4990 module_param(frame_rate, int, 0644);
4991 MODULE_PARM_DESC(frame_rate, "Frame rate (5, 10, 15, 20 or 30 fps)");