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oxygen.c
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1 /*
2  * C-Media CMI8788 driver for C-Media's reference design and similar models
3  *
4  * Copyright (c) Clemens Ladisch <[email protected]>
5  *
6  *
7  * This driver is free software; you can redistribute it and/or modify
8  * it under the terms of the GNU General Public License, version 2.
9  *
10  * This driver is distributed in the hope that it will be useful,
11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13  * GNU General Public License for more details.
14  *
15  * You should have received a copy of the GNU General Public License
16  * along with this driver; if not, write to the Free Software
17  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18  */
19 
20 /*
21  * CMI8788:
22  *
23  * SPI 0 -> 1st AK4396 (front)
24  * SPI 1 -> 2nd AK4396 (surround)
25  * SPI 2 -> 3rd AK4396 (center/LFE)
26  * SPI 3 -> WM8785
27  * SPI 4 -> 4th AK4396 (back)
28  *
29  * GPIO 0 -> DFS0 of AK5385
30  * GPIO 1 -> DFS1 of AK5385
31  *
32  * X-Meridian models:
33  * GPIO 4 -> enable extension S/PDIF input
34  * GPIO 6 -> enable on-board S/PDIF input
35  *
36  * Claro models:
37  * GPIO 6 -> S/PDIF from optical (0) or coaxial (1) input
38  * GPIO 8 -> enable headphone amplifier
39  *
40  * CM9780:
41  *
42  * LINE_OUT -> input of ADC
43  *
44  * AUX_IN <- aux
45  * CD_IN <- CD
46  * MIC_IN <- mic
47  *
48  * GPO 0 -> route line-in (0) or AC97 output (1) to ADC input
49  */
50 
51 #include <linux/delay.h>
52 #include <linux/mutex.h>
53 #include <linux/pci.h>
54 #include <linux/module.h>
55 #include <sound/ac97_codec.h>
56 #include <sound/control.h>
57 #include <sound/core.h>
58 #include <sound/info.h>
59 #include <sound/initval.h>
60 #include <sound/pcm.h>
61 #include <sound/pcm_params.h>
62 #include <sound/tlv.h>
63 #include "oxygen.h"
64 #include "xonar_dg.h"
65 #include "ak4396.h"
66 #include "wm8785.h"
67 
68 MODULE_AUTHOR("Clemens Ladisch <[email protected]>");
69 MODULE_DESCRIPTION("C-Media CMI8788 driver");
70 MODULE_LICENSE("GPL v2");
71 MODULE_SUPPORTED_DEVICE("{{C-Media,CMI8786}"
72  ",{C-Media,CMI8787}"
73  ",{C-Media,CMI8788}}");
74 
75 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;
76 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;
78 
79 module_param_array(index, int, NULL, 0444);
80 MODULE_PARM_DESC(index, "card index");
81 module_param_array(id, charp, NULL, 0444);
82 MODULE_PARM_DESC(id, "ID string");
83 module_param_array(enable, bool, NULL, 0444);
84 MODULE_PARM_DESC(enable, "enable card");
85 
86 enum {
98 };
99 
100 static DEFINE_PCI_DEVICE_TABLE(oxygen_ids) = {
101  /* C-Media's reference design */
102  { OXYGEN_PCI_SUBID(0x10b0, 0x0216), .driver_data = MODEL_CMEDIA_REF },
103  { OXYGEN_PCI_SUBID(0x10b0, 0x0217), .driver_data = MODEL_CMEDIA_REF },
104  { OXYGEN_PCI_SUBID(0x10b0, 0x0218), .driver_data = MODEL_CMEDIA_REF },
105  { OXYGEN_PCI_SUBID(0x10b0, 0x0219), .driver_data = MODEL_CMEDIA_REF },
106  { OXYGEN_PCI_SUBID(0x13f6, 0x0001), .driver_data = MODEL_CMEDIA_REF },
107  { OXYGEN_PCI_SUBID(0x13f6, 0x0010), .driver_data = MODEL_CMEDIA_REF },
108  { OXYGEN_PCI_SUBID(0x13f6, 0x8788), .driver_data = MODEL_CMEDIA_REF },
109  { OXYGEN_PCI_SUBID(0x147a, 0xa017), .driver_data = MODEL_CMEDIA_REF },
110  { OXYGEN_PCI_SUBID(0x1a58, 0x0910), .driver_data = MODEL_CMEDIA_REF },
111  /* Asus Xonar DG */
112  { OXYGEN_PCI_SUBID(0x1043, 0x8467), .driver_data = MODEL_XONAR_DG },
113  /* Asus Xonar DGX */
114  { OXYGEN_PCI_SUBID(0x1043, 0x8521), .driver_data = MODEL_XONAR_DGX },
115  /* PCI 2.0 HD Audio */
116  { OXYGEN_PCI_SUBID(0x13f6, 0x8782), .driver_data = MODEL_2CH_OUTPUT },
117  /* Kuroutoshikou CMI8787-HG2PCI */
118  { OXYGEN_PCI_SUBID(0x13f6, 0xffff), .driver_data = MODEL_HG2PCI },
119  /* TempoTec HiFier Fantasia */
120  { OXYGEN_PCI_SUBID(0x14c3, 0x1710), .driver_data = MODEL_FANTASIA },
121  /* TempoTec HiFier Serenade */
122  { OXYGEN_PCI_SUBID(0x14c3, 0x1711), .driver_data = MODEL_SERENADE },
123  /* AuzenTech X-Meridian */
124  { OXYGEN_PCI_SUBID(0x415a, 0x5431), .driver_data = MODEL_MERIDIAN },
125  /* AuzenTech X-Meridian 2G */
126  { OXYGEN_PCI_SUBID(0x5431, 0x017a), .driver_data = MODEL_MERIDIAN_2G },
127  /* HT-Omega Claro */
128  { OXYGEN_PCI_SUBID(0x7284, 0x9761), .driver_data = MODEL_CLARO },
129  /* HT-Omega Claro halo */
130  { OXYGEN_PCI_SUBID(0x7284, 0x9781), .driver_data = MODEL_CLARO_HALO },
131  { }
132 };
133 MODULE_DEVICE_TABLE(pci, oxygen_ids);
134 
135 
136 #define GPIO_AK5385_DFS_MASK 0x0003
137 #define GPIO_AK5385_DFS_NORMAL 0x0000
138 #define GPIO_AK5385_DFS_DOUBLE 0x0001
139 #define GPIO_AK5385_DFS_QUAD 0x0002
140 
141 #define GPIO_MERIDIAN_DIG_MASK 0x0050
142 #define GPIO_MERIDIAN_DIG_EXT 0x0010
143 #define GPIO_MERIDIAN_DIG_BOARD 0x0040
144 
145 #define GPIO_CLARO_DIG_COAX 0x0040
146 #define GPIO_CLARO_HP 0x0100
147 
148 struct generic_data {
149  unsigned int dacs;
152 };
153 
154 static void ak4396_write(struct oxygen *chip, unsigned int codec,
155  u8 reg, u8 value)
156 {
157  /* maps ALSA channel pair number to SPI output */
158  static const u8 codec_spi_map[4] = {
159  0, 1, 2, 4
160  };
161  struct generic_data *data = chip->model_data;
162 
166  (codec_spi_map[codec] << OXYGEN_SPI_CODEC_SHIFT) |
168  AK4396_WRITE | (reg << 8) | value);
169  data->ak4396_regs[codec][reg] = value;
170 }
171 
172 static void ak4396_write_cached(struct oxygen *chip, unsigned int codec,
173  u8 reg, u8 value)
174 {
175  struct generic_data *data = chip->model_data;
176 
177  if (value != data->ak4396_regs[codec][reg])
178  ak4396_write(chip, codec, reg, value);
179 }
180 
181 static void wm8785_write(struct oxygen *chip, u8 reg, unsigned int value)
182 {
183  struct generic_data *data = chip->model_data;
184 
188  (3 << OXYGEN_SPI_CODEC_SHIFT) |
190  (reg << 9) | value);
191  if (reg < ARRAY_SIZE(data->wm8785_regs))
192  data->wm8785_regs[reg] = value;
193 }
194 
195 static void ak4396_registers_init(struct oxygen *chip)
196 {
197  struct generic_data *data = chip->model_data;
198  unsigned int i;
199 
200  for (i = 0; i < data->dacs; ++i) {
201  ak4396_write(chip, i, AK4396_CONTROL_1,
203  ak4396_write(chip, i, AK4396_CONTROL_2,
204  data->ak4396_regs[0][AK4396_CONTROL_2]);
205  ak4396_write(chip, i, AK4396_CONTROL_3,
206  AK4396_PCM);
207  ak4396_write(chip, i, AK4396_LCH_ATT,
208  chip->dac_volume[i * 2]);
209  ak4396_write(chip, i, AK4396_RCH_ATT,
210  chip->dac_volume[i * 2 + 1]);
211  }
212 }
213 
214 static void ak4396_init(struct oxygen *chip)
215 {
216  struct generic_data *data = chip->model_data;
217 
218  data->dacs = chip->model.dac_channels_pcm / 2;
219  data->ak4396_regs[0][AK4396_CONTROL_2] =
221  ak4396_registers_init(chip);
222  snd_component_add(chip->card, "AK4396");
223 }
224 
225 static void ak5385_init(struct oxygen *chip)
226 {
227  oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, GPIO_AK5385_DFS_MASK);
228  oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA, GPIO_AK5385_DFS_MASK);
229  snd_component_add(chip->card, "AK5385");
230 }
231 
232 static void wm8785_registers_init(struct oxygen *chip)
233 {
234  struct generic_data *data = chip->model_data;
235 
236  wm8785_write(chip, WM8785_R7, 0);
237  wm8785_write(chip, WM8785_R0, data->wm8785_regs[0]);
238  wm8785_write(chip, WM8785_R2, data->wm8785_regs[2]);
239 }
240 
241 static void wm8785_init(struct oxygen *chip)
242 {
243  struct generic_data *data = chip->model_data;
244 
245  data->wm8785_regs[0] =
247  data->wm8785_regs[2] = WM8785_HPFR | WM8785_HPFL;
248  wm8785_registers_init(chip);
249  snd_component_add(chip->card, "WM8785");
250 }
251 
252 static void generic_init(struct oxygen *chip)
253 {
254  ak4396_init(chip);
255  wm8785_init(chip);
256 }
257 
258 static void meridian_init(struct oxygen *chip)
259 {
260  oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL,
264  ak4396_init(chip);
265  ak5385_init(chip);
266 }
267 
268 static void claro_enable_hp(struct oxygen *chip)
269 {
270  msleep(300);
271  oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, GPIO_CLARO_HP);
272  oxygen_set_bits16(chip, OXYGEN_GPIO_DATA, GPIO_CLARO_HP);
273 }
274 
275 static void claro_init(struct oxygen *chip)
276 {
277  oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, GPIO_CLARO_DIG_COAX);
278  oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA, GPIO_CLARO_DIG_COAX);
279  ak4396_init(chip);
280  wm8785_init(chip);
281  claro_enable_hp(chip);
282 }
283 
284 static void claro_halo_init(struct oxygen *chip)
285 {
286  oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, GPIO_CLARO_DIG_COAX);
287  oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA, GPIO_CLARO_DIG_COAX);
288  ak4396_init(chip);
289  ak5385_init(chip);
290  claro_enable_hp(chip);
291 }
292 
293 static void fantasia_init(struct oxygen *chip)
294 {
295  ak4396_init(chip);
296  snd_component_add(chip->card, "CS5340");
297 }
298 
299 static void stereo_output_init(struct oxygen *chip)
300 {
301  ak4396_init(chip);
302 }
303 
304 static void generic_cleanup(struct oxygen *chip)
305 {
306 }
307 
308 static void claro_disable_hp(struct oxygen *chip)
309 {
310  oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA, GPIO_CLARO_HP);
311 }
312 
313 static void claro_cleanup(struct oxygen *chip)
314 {
315  claro_disable_hp(chip);
316 }
317 
318 static void claro_suspend(struct oxygen *chip)
319 {
320  claro_disable_hp(chip);
321 }
322 
323 static void generic_resume(struct oxygen *chip)
324 {
325  ak4396_registers_init(chip);
326  wm8785_registers_init(chip);
327 }
328 
329 static void meridian_resume(struct oxygen *chip)
330 {
331  ak4396_registers_init(chip);
332 }
333 
334 static void claro_resume(struct oxygen *chip)
335 {
336  ak4396_registers_init(chip);
337  claro_enable_hp(chip);
338 }
339 
340 static void stereo_resume(struct oxygen *chip)
341 {
342  ak4396_registers_init(chip);
343 }
344 
345 static void set_ak4396_params(struct oxygen *chip,
346  struct snd_pcm_hw_params *params)
347 {
348  struct generic_data *data = chip->model_data;
349  unsigned int i;
350  u8 value;
351 
352  value = data->ak4396_regs[0][AK4396_CONTROL_2] & ~AK4396_DFS_MASK;
353  if (params_rate(params) <= 54000)
354  value |= AK4396_DFS_NORMAL;
355  else if (params_rate(params) <= 108000)
356  value |= AK4396_DFS_DOUBLE;
357  else
358  value |= AK4396_DFS_QUAD;
359 
360  msleep(1); /* wait for the new MCLK to become stable */
361 
362  if (value != data->ak4396_regs[0][AK4396_CONTROL_2]) {
363  for (i = 0; i < data->dacs; ++i) {
364  ak4396_write(chip, i, AK4396_CONTROL_1,
366  ak4396_write(chip, i, AK4396_CONTROL_2, value);
367  ak4396_write(chip, i, AK4396_CONTROL_1,
369  }
370  }
371 }
372 
373 static void update_ak4396_volume(struct oxygen *chip)
374 {
375  struct generic_data *data = chip->model_data;
376  unsigned int i;
377 
378  for (i = 0; i < data->dacs; ++i) {
379  ak4396_write_cached(chip, i, AK4396_LCH_ATT,
380  chip->dac_volume[i * 2]);
381  ak4396_write_cached(chip, i, AK4396_RCH_ATT,
382  chip->dac_volume[i * 2 + 1]);
383  }
384 }
385 
386 static void update_ak4396_mute(struct oxygen *chip)
387 {
388  struct generic_data *data = chip->model_data;
389  unsigned int i;
390  u8 value;
391 
392  value = data->ak4396_regs[0][AK4396_CONTROL_2] & ~AK4396_SMUTE;
393  if (chip->dac_mute)
394  value |= AK4396_SMUTE;
395  for (i = 0; i < data->dacs; ++i)
396  ak4396_write_cached(chip, i, AK4396_CONTROL_2, value);
397 }
398 
399 static void set_wm8785_params(struct oxygen *chip,
400  struct snd_pcm_hw_params *params)
401 {
402  struct generic_data *data = chip->model_data;
403  unsigned int value;
404 
406  if (params_rate(params) <= 48000)
407  value |= WM8785_OSR_SINGLE;
408  else if (params_rate(params) <= 96000)
409  value |= WM8785_OSR_DOUBLE;
410  else
411  value |= WM8785_OSR_QUAD;
412  if (value != data->wm8785_regs[0]) {
413  wm8785_write(chip, WM8785_R7, 0);
414  wm8785_write(chip, WM8785_R0, value);
415  wm8785_write(chip, WM8785_R2, data->wm8785_regs[2]);
416  }
417 }
418 
419 static void set_ak5385_params(struct oxygen *chip,
420  struct snd_pcm_hw_params *params)
421 {
422  unsigned int value;
423 
424  if (params_rate(params) <= 54000)
425  value = GPIO_AK5385_DFS_NORMAL;
426  else if (params_rate(params) <= 108000)
427  value = GPIO_AK5385_DFS_DOUBLE;
428  else
429  value = GPIO_AK5385_DFS_QUAD;
431  value, GPIO_AK5385_DFS_MASK);
432 }
433 
434 static void set_no_params(struct oxygen *chip, struct snd_pcm_hw_params *params)
435 {
436 }
437 
438 static int rolloff_info(struct snd_kcontrol *ctl,
439  struct snd_ctl_elem_info *info)
440 {
441  static const char *const names[2] = {
442  "Sharp Roll-off", "Slow Roll-off"
443  };
444 
445  return snd_ctl_enum_info(info, 1, 2, names);
446 }
447 
448 static int rolloff_get(struct snd_kcontrol *ctl,
449  struct snd_ctl_elem_value *value)
450 {
451  struct oxygen *chip = ctl->private_data;
452  struct generic_data *data = chip->model_data;
453 
454  value->value.enumerated.item[0] =
455  (data->ak4396_regs[0][AK4396_CONTROL_2] & AK4396_SLOW) != 0;
456  return 0;
457 }
458 
459 static int rolloff_put(struct snd_kcontrol *ctl,
460  struct snd_ctl_elem_value *value)
461 {
462  struct oxygen *chip = ctl->private_data;
463  struct generic_data *data = chip->model_data;
464  unsigned int i;
465  int changed;
466  u8 reg;
467 
468  mutex_lock(&chip->mutex);
469  reg = data->ak4396_regs[0][AK4396_CONTROL_2];
470  if (value->value.enumerated.item[0])
471  reg |= AK4396_SLOW;
472  else
473  reg &= ~AK4396_SLOW;
474  changed = reg != data->ak4396_regs[0][AK4396_CONTROL_2];
475  if (changed) {
476  for (i = 0; i < data->dacs; ++i)
477  ak4396_write(chip, i, AK4396_CONTROL_2, reg);
478  }
479  mutex_unlock(&chip->mutex);
480  return changed;
481 }
482 
483 static const struct snd_kcontrol_new rolloff_control = {
485  .name = "DAC Filter Playback Enum",
486  .info = rolloff_info,
487  .get = rolloff_get,
488  .put = rolloff_put,
489 };
490 
491 static int hpf_info(struct snd_kcontrol *ctl, struct snd_ctl_elem_info *info)
492 {
493  static const char *const names[2] = {
494  "None", "High-pass Filter"
495  };
496 
497  return snd_ctl_enum_info(info, 1, 2, names);
498 }
499 
500 static int hpf_get(struct snd_kcontrol *ctl, struct snd_ctl_elem_value *value)
501 {
502  struct oxygen *chip = ctl->private_data;
503  struct generic_data *data = chip->model_data;
504 
505  value->value.enumerated.item[0] =
506  (data->wm8785_regs[WM8785_R2] & WM8785_HPFR) != 0;
507  return 0;
508 }
509 
510 static int hpf_put(struct snd_kcontrol *ctl, struct snd_ctl_elem_value *value)
511 {
512  struct oxygen *chip = ctl->private_data;
513  struct generic_data *data = chip->model_data;
514  unsigned int reg;
515  int changed;
516 
517  mutex_lock(&chip->mutex);
518  reg = data->wm8785_regs[WM8785_R2] & ~(WM8785_HPFR | WM8785_HPFL);
519  if (value->value.enumerated.item[0])
520  reg |= WM8785_HPFR | WM8785_HPFL;
521  changed = reg != data->wm8785_regs[WM8785_R2];
522  if (changed)
523  wm8785_write(chip, WM8785_R2, reg);
524  mutex_unlock(&chip->mutex);
525  return changed;
526 }
527 
528 static const struct snd_kcontrol_new hpf_control = {
530  .name = "ADC Filter Capture Enum",
531  .info = hpf_info,
532  .get = hpf_get,
533  .put = hpf_put,
534 };
535 
536 static int meridian_dig_source_info(struct snd_kcontrol *ctl,
537  struct snd_ctl_elem_info *info)
538 {
539  static const char *const names[2] = { "On-board", "Extension" };
540 
541  return snd_ctl_enum_info(info, 1, 2, names);
542 }
543 
544 static int claro_dig_source_info(struct snd_kcontrol *ctl,
545  struct snd_ctl_elem_info *info)
546 {
547  static const char *const names[2] = { "Optical", "Coaxial" };
548 
549  return snd_ctl_enum_info(info, 1, 2, names);
550 }
551 
552 static int meridian_dig_source_get(struct snd_kcontrol *ctl,
553  struct snd_ctl_elem_value *value)
554 {
555  struct oxygen *chip = ctl->private_data;
556 
557  value->value.enumerated.item[0] =
558  !!(oxygen_read16(chip, OXYGEN_GPIO_DATA) &
560  return 0;
561 }
562 
563 static int claro_dig_source_get(struct snd_kcontrol *ctl,
564  struct snd_ctl_elem_value *value)
565 {
566  struct oxygen *chip = ctl->private_data;
567 
568  value->value.enumerated.item[0] =
569  !!(oxygen_read16(chip, OXYGEN_GPIO_DATA) &
571  return 0;
572 }
573 
574 static int meridian_dig_source_put(struct snd_kcontrol *ctl,
575  struct snd_ctl_elem_value *value)
576 {
577  struct oxygen *chip = ctl->private_data;
578  u16 old_reg, new_reg;
579  int changed;
580 
581  mutex_lock(&chip->mutex);
582  old_reg = oxygen_read16(chip, OXYGEN_GPIO_DATA);
583  new_reg = old_reg & ~GPIO_MERIDIAN_DIG_MASK;
584  if (value->value.enumerated.item[0] == 0)
585  new_reg |= GPIO_MERIDIAN_DIG_BOARD;
586  else
587  new_reg |= GPIO_MERIDIAN_DIG_EXT;
588  changed = new_reg != old_reg;
589  if (changed)
590  oxygen_write16(chip, OXYGEN_GPIO_DATA, new_reg);
591  mutex_unlock(&chip->mutex);
592  return changed;
593 }
594 
595 static int claro_dig_source_put(struct snd_kcontrol *ctl,
596  struct snd_ctl_elem_value *value)
597 {
598  struct oxygen *chip = ctl->private_data;
599  u16 old_reg, new_reg;
600  int changed;
601 
602  mutex_lock(&chip->mutex);
603  old_reg = oxygen_read16(chip, OXYGEN_GPIO_DATA);
604  new_reg = old_reg & ~GPIO_CLARO_DIG_COAX;
605  if (value->value.enumerated.item[0])
606  new_reg |= GPIO_CLARO_DIG_COAX;
607  changed = new_reg != old_reg;
608  if (changed)
609  oxygen_write16(chip, OXYGEN_GPIO_DATA, new_reg);
610  mutex_unlock(&chip->mutex);
611  return changed;
612 }
613 
614 static const struct snd_kcontrol_new meridian_dig_source_control = {
616  .name = "IEC958 Source Capture Enum",
617  .info = meridian_dig_source_info,
618  .get = meridian_dig_source_get,
619  .put = meridian_dig_source_put,
620 };
621 
622 static const struct snd_kcontrol_new claro_dig_source_control = {
624  .name = "IEC958 Source Capture Enum",
625  .info = claro_dig_source_info,
626  .get = claro_dig_source_get,
627  .put = claro_dig_source_put,
628 };
629 
630 static int generic_mixer_init(struct oxygen *chip)
631 {
632  return snd_ctl_add(chip->card, snd_ctl_new1(&rolloff_control, chip));
633 }
634 
635 static int generic_wm8785_mixer_init(struct oxygen *chip)
636 {
637  int err;
638 
639  err = generic_mixer_init(chip);
640  if (err < 0)
641  return err;
642  err = snd_ctl_add(chip->card, snd_ctl_new1(&hpf_control, chip));
643  if (err < 0)
644  return err;
645  return 0;
646 }
647 
648 static int meridian_mixer_init(struct oxygen *chip)
649 {
650  int err;
651 
652  err = generic_mixer_init(chip);
653  if (err < 0)
654  return err;
655  err = snd_ctl_add(chip->card,
656  snd_ctl_new1(&meridian_dig_source_control, chip));
657  if (err < 0)
658  return err;
659  return 0;
660 }
661 
662 static int claro_mixer_init(struct oxygen *chip)
663 {
664  int err;
665 
666  err = generic_wm8785_mixer_init(chip);
667  if (err < 0)
668  return err;
669  err = snd_ctl_add(chip->card,
670  snd_ctl_new1(&claro_dig_source_control, chip));
671  if (err < 0)
672  return err;
673  return 0;
674 }
675 
676 static int claro_halo_mixer_init(struct oxygen *chip)
677 {
678  int err;
679 
680  err = generic_mixer_init(chip);
681  if (err < 0)
682  return err;
683  err = snd_ctl_add(chip->card,
684  snd_ctl_new1(&claro_dig_source_control, chip));
685  if (err < 0)
686  return err;
687  return 0;
688 }
689 
690 static void dump_ak4396_registers(struct oxygen *chip,
691  struct snd_info_buffer *buffer)
692 {
693  struct generic_data *data = chip->model_data;
694  unsigned int dac, i;
695 
696  for (dac = 0; dac < data->dacs; ++dac) {
697  snd_iprintf(buffer, "\nAK4396 %u:", dac + 1);
698  for (i = 0; i < 5; ++i)
699  snd_iprintf(buffer, " %02x", data->ak4396_regs[dac][i]);
700  }
701  snd_iprintf(buffer, "\n");
702 }
703 
704 static void dump_wm8785_registers(struct oxygen *chip,
705  struct snd_info_buffer *buffer)
706 {
707  struct generic_data *data = chip->model_data;
708  unsigned int i;
709 
710  snd_iprintf(buffer, "\nWM8785:");
711  for (i = 0; i < 3; ++i)
712  snd_iprintf(buffer, " %03x", data->wm8785_regs[i]);
713  snd_iprintf(buffer, "\n");
714 }
715 
716 static void dump_oxygen_registers(struct oxygen *chip,
717  struct snd_info_buffer *buffer)
718 {
719  dump_ak4396_registers(chip, buffer);
720  dump_wm8785_registers(chip, buffer);
721 }
722 
723 static const DECLARE_TLV_DB_LINEAR(ak4396_db_scale, TLV_DB_GAIN_MUTE, 0);
724 
725 static const struct oxygen_model model_generic = {
726  .shortname = "C-Media CMI8788",
727  .longname = "C-Media Oxygen HD Audio",
728  .chip = "CMI8788",
729  .init = generic_init,
730  .mixer_init = generic_wm8785_mixer_init,
731  .cleanup = generic_cleanup,
732  .resume = generic_resume,
733  .set_dac_params = set_ak4396_params,
734  .set_adc_params = set_wm8785_params,
735  .update_dac_volume = update_ak4396_volume,
736  .update_dac_mute = update_ak4396_mute,
737  .dump_registers = dump_oxygen_registers,
738  .dac_tlv = ak4396_db_scale,
739  .model_data_size = sizeof(struct generic_data),
740  .device_config = PLAYBACK_0_TO_I2S |
747  .dac_channels_pcm = 8,
748  .dac_channels_mixer = 8,
749  .dac_volume_min = 0,
750  .dac_volume_max = 255,
751  .function_flags = OXYGEN_FUNCTION_SPI |
753  .dac_mclks = OXYGEN_MCLKS(256, 128, 128),
754  .adc_mclks = OXYGEN_MCLKS(256, 256, 128),
755  .dac_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
756  .adc_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
757 };
758 
759 static int __devinit get_oxygen_model(struct oxygen *chip,
760  const struct pci_device_id *id)
761 {
762  static const char *const names[] = {
763  [MODEL_MERIDIAN] = "AuzenTech X-Meridian",
764  [MODEL_MERIDIAN_2G] = "AuzenTech X-Meridian 2G",
765  [MODEL_CLARO] = "HT-Omega Claro",
766  [MODEL_CLARO_HALO] = "HT-Omega Claro halo",
767  [MODEL_FANTASIA] = "TempoTec HiFier Fantasia",
768  [MODEL_SERENADE] = "TempoTec HiFier Serenade",
769  [MODEL_HG2PCI] = "CMI8787-HG2PCI",
770  };
771 
772  chip->model = model_generic;
773  switch (id->driver_data) {
774  case MODEL_MERIDIAN:
775  case MODEL_MERIDIAN_2G:
776  chip->model.init = meridian_init;
777  chip->model.mixer_init = meridian_mixer_init;
778  chip->model.resume = meridian_resume;
779  chip->model.set_adc_params = set_ak5385_params;
780  chip->model.dump_registers = dump_ak4396_registers;
781  chip->model.device_config = PLAYBACK_0_TO_I2S |
785  if (id->driver_data == MODEL_MERIDIAN)
786  chip->model.device_config |= AC97_CD_INPUT;
787  break;
788  case MODEL_CLARO:
789  chip->model.init = claro_init;
790  chip->model.mixer_init = claro_mixer_init;
791  chip->model.cleanup = claro_cleanup;
792  chip->model.suspend = claro_suspend;
793  chip->model.resume = claro_resume;
794  break;
795  case MODEL_CLARO_HALO:
796  chip->model.init = claro_halo_init;
797  chip->model.mixer_init = claro_halo_mixer_init;
798  chip->model.cleanup = claro_cleanup;
799  chip->model.suspend = claro_suspend;
800  chip->model.resume = claro_resume;
801  chip->model.set_adc_params = set_ak5385_params;
802  chip->model.dump_registers = dump_ak4396_registers;
803  chip->model.device_config = PLAYBACK_0_TO_I2S |
807  break;
808  case MODEL_FANTASIA:
809  case MODEL_SERENADE:
810  case MODEL_2CH_OUTPUT:
811  case MODEL_HG2PCI:
812  chip->model.shortname = "C-Media CMI8787";
813  chip->model.chip = "CMI8787";
814  if (id->driver_data == MODEL_FANTASIA)
815  chip->model.init = fantasia_init;
816  else
817  chip->model.init = stereo_output_init;
818  chip->model.resume = stereo_resume;
819  chip->model.mixer_init = generic_mixer_init;
820  chip->model.set_adc_params = set_no_params;
821  chip->model.dump_registers = dump_ak4396_registers;
822  chip->model.device_config = PLAYBACK_0_TO_I2S |
824  if (id->driver_data == MODEL_FANTASIA) {
825  chip->model.device_config |= CAPTURE_0_FROM_I2S_1;
826  chip->model.adc_mclks = OXYGEN_MCLKS(256, 128, 128);
827  }
828  chip->model.dac_channels_pcm = 2;
829  chip->model.dac_channels_mixer = 2;
830  break;
831  case MODEL_XONAR_DG:
832  chip->model = model_xonar_dg;
833  chip->model.shortname = "Xonar DG";
834  break;
835  case MODEL_XONAR_DGX:
836  chip->model = model_xonar_dg;
837  chip->model.shortname = "Xonar DGX";
838  break;
839  }
840  if (id->driver_data == MODEL_MERIDIAN ||
842  id->driver_data == MODEL_CLARO_HALO) {
843  chip->model.misc_flags = OXYGEN_MISC_MIDI;
844  chip->model.device_config |= MIDI_OUTPUT | MIDI_INPUT;
845  }
846  if (id->driver_data < ARRAY_SIZE(names) && names[id->driver_data])
847  chip->model.shortname = names[id->driver_data];
848  return 0;
849 }
850 
851 static int __devinit generic_oxygen_probe(struct pci_dev *pci,
852  const struct pci_device_id *pci_id)
853 {
854  static int dev;
855  int err;
856 
857  if (dev >= SNDRV_CARDS)
858  return -ENODEV;
859  if (!enable[dev]) {
860  ++dev;
861  return -ENOENT;
862  }
863  err = oxygen_pci_probe(pci, index[dev], id[dev], THIS_MODULE,
864  oxygen_ids, get_oxygen_model);
865  if (err >= 0)
866  ++dev;
867  return err;
868 }
869 
870 static struct pci_driver oxygen_driver = {
871  .name = KBUILD_MODNAME,
872  .id_table = oxygen_ids,
873  .probe = generic_oxygen_probe,
874  .remove = __devexit_p(oxygen_pci_remove),
875 #ifdef CONFIG_PM_SLEEP
876  .driver = {
877  .pm = &oxygen_pci_pm,
878  },
879 #endif
880 };
881 
882 module_pci_driver(oxygen_driver);