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pinctrl-pxa168.c File Reference
#include <linux/device.h>
#include <linux/module.h>
#include <linux/io.h>
#include <linux/platform_device.h>
#include "pinctrl-pxa3xx.h"

Go to the source code of this file.

Macros

#define PXA168_DS_MASK   0x1800
 
#define PXA168_DS_SHIFT   11
 
#define PXA168_SLEEP_MASK   0x38
 
#define PXA168_SLEEP_SELECT   (1 << 9)
 
#define PXA168_SLEEP_DATA   (1 << 8)
 
#define PXA168_SLEEP_DIR   (1 << 7)
 
#define MFPR_168(a, r, f0, f1, f2, f3, f4, f5, f6, f7)
 
#define GRP_168(a, m, p)   { .name = a, .mux = PXA168_MUX_##m, .pins = p, .npins = ARRAY_SIZE(p), }
 

Enumerations

enum  pxa168_pin_list {
  PWR_SCL = 123, PWR_SDA, TDI, TMS,
  TCK, TDO, TRST, WAKEUP = 130
}
 
enum  pxa168_mux {
  PXA168_MUX_GPIO = 0, PXA168_MUX_DFIO, PXA168_MUX_NAND, PXA168_MUX_SMC,
  PXA168_MUX_SMC_CS0, PXA168_MUX_SMC_CS1, PXA168_MUX_SMC_INT, PXA168_MUX_SMC_RDY,
  PXA168_MUX_MMC1, PXA168_MUX_MMC2, PXA168_MUX_MMC2_CMD, PXA168_MUX_MMC2_CLK,
  PXA168_MUX_MMC3, PXA168_MUX_MMC3_CMD, PXA168_MUX_MMC3_CLK, PXA168_MUX_MMC4,
  PXA168_MUX_MSP, PXA168_MUX_MSP_DAT3, PXA168_MUX_MSP_INS, PXA168_MUX_I2C,
  PXA168_MUX_PWRI2C, PXA168_MUX_AC97, PXA168_MUX_AC97_SYSCLK, PXA168_MUX_PWM,
  PXA168_MUX_PWM1, PXA168_MUX_XD, PXA168_MUX_XP, PXA168_MUX_LCD,
  PXA168_MUX_CCIC, PXA168_MUX_CF, PXA168_MUX_CF_RDY, PXA168_MUX_CF_nINPACK,
  PXA168_MUX_CF_nWAIT, PXA168_MUX_KP_MKOUT, PXA168_MUX_KP_MKIN, PXA168_MUX_KP_DK,
  PXA168_MUX_ETH, PXA168_MUX_ETH_TX, PXA168_MUX_ETH_RX, PXA168_MUX_ONE_WIRE,
  PXA168_MUX_UART1, PXA168_MUX_UART1_TX, PXA168_MUX_UART1_CTS, PXA168_MUX_UART1_nRI,
  PXA168_MUX_UART1_DTR, PXA168_MUX_UART2, PXA168_MUX_UART2_TX, PXA168_MUX_UART3,
  PXA168_MUX_UART3_TX, PXA168_MUX_UART3_CTS, PXA168_MUX_SSP1, PXA168_MUX_SSP1_TX,
  PXA168_MUX_SSP2, PXA168_MUX_SSP2_TX, PXA168_MUX_SSP3, PXA168_MUX_SSP3_TX,
  PXA168_MUX_SSP4, PXA168_MUX_SSP4_TX, PXA168_MUX_SSP5, PXA168_MUX_SSP5_TX,
  PXA168_MUX_USB, PXA168_MUX_JTAG, PXA168_MUX_RESET, PXA168_MUX_WAKEUP,
  PXA168_MUX_EXT_32K_IN, PXA168_MUX_NONE = 0xffff
}
 

Functions

 core_initcall_sync (pxa168_pinmux_init)
 
 module_exit (pxa168_pinmux_exit)
 
 MODULE_AUTHOR ("Haojian Zhuang <[email protected]>")
 
 MODULE_DESCRIPTION ("PXA3xx pin control driver")
 
 MODULE_LICENSE ("GPL v2")
 

Variables

struct pxa3xx_mfp_pin pxa168_mfp []
 

Macro Definition Documentation

#define GRP_168 (   a,
  m,
  p 
)    { .name = a, .mux = PXA168_MUX_##m, .pins = p, .npins = ARRAY_SIZE(p), }

Definition at line 44 of file pinctrl-pxa168.c.

#define MFPR_168 (   a,
  r,
  f0,
  f1,
  f2,
  f3,
  f4,
  f5,
  f6,
  f7 
)
Value:
{ \
.name = #a, \
.pin = a, \
.mfpr = r, \
.func = { \
PXA168_MUX_##f0, \
PXA168_MUX_##f1, \
PXA168_MUX_##f2, \
PXA168_MUX_##f3, \
PXA168_MUX_##f4, \
PXA168_MUX_##f5, \
PXA168_MUX_##f6, \
PXA168_MUX_##f7, \
}, \
}

Definition at line 27 of file pinctrl-pxa168.c.

#define PXA168_DS_MASK   0x1800

Definition at line 20 of file pinctrl-pxa168.c.

#define PXA168_DS_SHIFT   11

Definition at line 21 of file pinctrl-pxa168.c.

#define PXA168_SLEEP_DATA   (1 << 8)

Definition at line 24 of file pinctrl-pxa168.c.

#define PXA168_SLEEP_DIR   (1 << 7)

Definition at line 25 of file pinctrl-pxa168.c.

#define PXA168_SLEEP_MASK   0x38

Definition at line 22 of file pinctrl-pxa168.c.

#define PXA168_SLEEP_SELECT   (1 << 9)

Definition at line 23 of file pinctrl-pxa168.c.

Enumeration Type Documentation

enum pxa168_mux
Enumerator:
PXA168_MUX_GPIO 
PXA168_MUX_DFIO 
PXA168_MUX_NAND 
PXA168_MUX_SMC 
PXA168_MUX_SMC_CS0 
PXA168_MUX_SMC_CS1 
PXA168_MUX_SMC_INT 
PXA168_MUX_SMC_RDY 
PXA168_MUX_MMC1 
PXA168_MUX_MMC2 
PXA168_MUX_MMC2_CMD 
PXA168_MUX_MMC2_CLK 
PXA168_MUX_MMC3 
PXA168_MUX_MMC3_CMD 
PXA168_MUX_MMC3_CLK 
PXA168_MUX_MMC4 
PXA168_MUX_MSP 
PXA168_MUX_MSP_DAT3 
PXA168_MUX_MSP_INS 
PXA168_MUX_I2C 
PXA168_MUX_PWRI2C 
PXA168_MUX_AC97 
PXA168_MUX_AC97_SYSCLK 
PXA168_MUX_PWM 
PXA168_MUX_PWM1 
PXA168_MUX_XD 
PXA168_MUX_XP 
PXA168_MUX_LCD 
PXA168_MUX_CCIC 
PXA168_MUX_CF 
PXA168_MUX_CF_RDY 
PXA168_MUX_CF_nINPACK 
PXA168_MUX_CF_nWAIT 
PXA168_MUX_KP_MKOUT 
PXA168_MUX_KP_MKIN 
PXA168_MUX_KP_DK 
PXA168_MUX_ETH 
PXA168_MUX_ETH_TX 
PXA168_MUX_ETH_RX 
PXA168_MUX_ONE_WIRE 
PXA168_MUX_UART1 
PXA168_MUX_UART1_TX 
PXA168_MUX_UART1_CTS 
PXA168_MUX_UART1_nRI 
PXA168_MUX_UART1_DTR 
PXA168_MUX_UART2 
PXA168_MUX_UART2_TX 
PXA168_MUX_UART3 
PXA168_MUX_UART3_TX 
PXA168_MUX_UART3_CTS 
PXA168_MUX_SSP1 
PXA168_MUX_SSP1_TX 
PXA168_MUX_SSP2 
PXA168_MUX_SSP2_TX 
PXA168_MUX_SSP3 
PXA168_MUX_SSP3_TX 
PXA168_MUX_SSP4 
PXA168_MUX_SSP4_TX 
PXA168_MUX_SSP5 
PXA168_MUX_SSP5_TX 
PXA168_MUX_USB 
PXA168_MUX_JTAG 
PXA168_MUX_RESET 
PXA168_MUX_WAKEUP 
PXA168_MUX_EXT_32K_IN 
PXA168_MUX_NONE 

Definition at line 60 of file pinctrl-pxa168.c.

enum pxa168_pin_list
Enumerator:
PWR_SCL 
PWR_SDA 
TDI 
TMS 
TCK 
TDO 
TRST 
WAKEUP 

Definition at line 48 of file pinctrl-pxa168.c.

Function Documentation

core_initcall_sync ( pxa168_pinmux_init  )
MODULE_AUTHOR ( "Haojian Zhuang <[email protected]>"  )
MODULE_DESCRIPTION ( "PXA3xx pin control driver"  )
module_exit ( pxa168_pinmux_exit  )
MODULE_LICENSE ( "GPL v2"  )

Variable Documentation

struct pxa3xx_mfp_pin pxa168_mfp[]

Definition at line 264 of file pinctrl-pxa168.c.

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