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Linux Kernel
3.7.1
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#include <linux/slab.h>#include <linux/module.h>#include <linux/of_platform.h>#include <linux/of_address.h>#include <linux/of_gpio.h>#include <linux/ioport.h>#include <linux/io.h>#include <linux/device.h>#include <linux/platform_device.h>#include "pinctrl-lantiq.h"#include <lantiq_soc.h>Go to the source code of this file.
Data Structures | |
| struct | pinctrl_xway_soc |
Macros | |
| #define | PINS 16 |
| #define | PORT3 3 |
| #define | PORT(x) (x / PINS) |
| #define | PORT_PIN(x) (x % PINS) |
| #define | MUX_ALT0 0x1 |
| #define | MUX_ALT1 0x2 |
| #define | REG_OFF 0x30 |
| #define | GPIO_BASE(p) (REG_OFF * PORT(p)) |
| #define | GPIO_OUT(p) GPIO_BASE(p) |
| #define | GPIO_IN(p) (GPIO_BASE(p) + 0x04) |
| #define | GPIO_DIR(p) (GPIO_BASE(p) + 0x08) |
| #define | GPIO_ALT0(p) (GPIO_BASE(p) + 0x0C) |
| #define | GPIO_ALT1(p) (GPIO_BASE(p) + 0x10) |
| #define | GPIO_OD(p) (GPIO_BASE(p) + 0x14) |
| #define | GPIO_PUDSEL(p) (GPIO_BASE(p) + 0x1c) |
| #define | GPIO_PUDEN(p) (GPIO_BASE(p) + 0x20) |
| #define | GPIO3_OD (GPIO_BASE(0) + 0x24) |
| #define | GPIO3_PUDSEL (GPIO_BASE(0) + 0x28) |
| #define | GPIO3_PUDEN (GPIO_BASE(0) + 0x2C) |
| #define | GPIO3_ALT1 (GPIO_BASE(PINS) + 0x24) |
| #define | gpio_getbit(m, r, p) (!!(ltq_r32(m + r) & BIT(p))) |
| #define | gpio_setbit(m, r, p) ltq_w32_mask(0, BIT(p), m + r) |
| #define | gpio_clearbit(m, r, p) ltq_w32_mask(BIT(p), 0, m + r) |
| #define | MFP_XWAY(a, f0, f1, f2, f3) |
| #define | GRP_MUX(a, m, p) { .name = a, .mux = XWAY_MUX_##m, .pins = p, .npins = ARRAY_SIZE(p), } |
| #define | FUNC_MUX(f, m) { .func = f, .mux = XWAY_MUX_##m, } |
| #define | XWAY_MAX_PIN 32 |
| #define | XR9_MAX_PIN 56 |
Enumerations | |
| enum | xway_mux { XWAY_MUX_GPIO = 0, XWAY_MUX_SPI, XWAY_MUX_ASC, XWAY_MUX_PCI, XWAY_MUX_CGU, XWAY_MUX_EBU, XWAY_MUX_JTAG, XWAY_MUX_EXIN, XWAY_MUX_TDM, XWAY_MUX_STP, XWAY_MUX_SIN, XWAY_MUX_GPT, XWAY_MUX_NMI, XWAY_MUX_MDIO, XWAY_MUX_MII, XWAY_MUX_EPHY, XWAY_MUX_DFE, XWAY_MUX_SDIO, XWAY_MUX_NONE = 0xffff } |
Functions | |
| MODULE_DEVICE_TABLE (of, xway_match) | |
| core_initcall_sync (pinmux_xway_init) | |
Variables | |
| struct pinconf_ops | xway_pinconf_ops |
Definition at line 79 of file pinctrl-xway.c.
Definition at line 57 of file pinctrl-xway.c.
| #define GPIO3_OD (GPIO_BASE(0) + 0x24) |
Definition at line 54 of file pinctrl-xway.c.
| #define GPIO3_PUDEN (GPIO_BASE(0) + 0x2C) |
Definition at line 56 of file pinctrl-xway.c.
| #define GPIO3_PUDSEL (GPIO_BASE(0) + 0x28) |
Definition at line 55 of file pinctrl-xway.c.
Definition at line 47 of file pinctrl-xway.c.
Definition at line 48 of file pinctrl-xway.c.
Definition at line 62 of file pinctrl-xway.c.
Definition at line 46 of file pinctrl-xway.c.
Definition at line 60 of file pinctrl-xway.c.
Definition at line 45 of file pinctrl-xway.c.
Definition at line 49 of file pinctrl-xway.c.
Definition at line 44 of file pinctrl-xway.c.
Definition at line 51 of file pinctrl-xway.c.
Definition at line 50 of file pinctrl-xway.c.
Definition at line 61 of file pinctrl-xway.c.
Definition at line 76 of file pinctrl-xway.c.
| #define MUX_ALT0 0x1 |
Definition at line 33 of file pinctrl-xway.c.
| #define MUX_ALT1 0x2 |
Definition at line 34 of file pinctrl-xway.c.
| #define PINS 16 |
Definition at line 27 of file pinctrl-xway.c.
Definition at line 29 of file pinctrl-xway.c.
| #define PORT3 3 |
Definition at line 28 of file pinctrl-xway.c.
Definition at line 30 of file pinctrl-xway.c.
| #define REG_OFF 0x30 |
Definition at line 40 of file pinctrl-xway.c.
| #define XR9_MAX_PIN 56 |
Definition at line 83 of file pinctrl-xway.c.
| #define XWAY_MAX_PIN 32 |
Definition at line 82 of file pinctrl-xway.c.
| enum xway_mux |
Definition at line 85 of file pinctrl-xway.c.
| core_initcall_sync | ( | pinmux_xway_init | ) |
| MODULE_DEVICE_TABLE | ( | of | , |
| xway_match | |||
| ) |
| struct pinconf_ops xway_pinconf_ops |
Definition at line 525 of file pinctrl-xway.c.
1.8.2