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portdrv_pci.c
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1 /*
2  * File: portdrv_pci.c
3  * Purpose: PCI Express Port Bus Driver
4  *
5  * Copyright (C) 2004 Intel
6  * Copyright (C) Tom Long Nguyen ([email protected])
7  */
8 
9 #include <linux/module.h>
10 #include <linux/pci.h>
11 #include <linux/kernel.h>
12 #include <linux/errno.h>
13 #include <linux/pm.h>
14 #include <linux/pm_runtime.h>
15 #include <linux/init.h>
16 #include <linux/pcieport_if.h>
17 #include <linux/aer.h>
18 #include <linux/dmi.h>
19 #include <linux/pci-aspm.h>
20 
21 #include "portdrv.h"
22 #include "aer/aerdrv.h"
23 
24 /*
25  * Version Information
26  */
27 #define DRIVER_VERSION "v1.0"
28 #define DRIVER_AUTHOR "[email protected]"
29 #define DRIVER_DESC "PCIe Port Bus Driver"
32 MODULE_LICENSE("GPL");
33 
34 /* If this switch is set, PCIe port native services should not be enabled. */
36 
37 /*
38  * If this switch is set, ACPI _OSC will be used to determine whether or not to
39  * enable PCIe port native services.
40  */
41 bool pcie_ports_auto = true;
42 
43 static int __init pcie_port_setup(char *str)
44 {
45  if (!strncmp(str, "compat", 6)) {
46  pcie_ports_disabled = true;
47  } else if (!strncmp(str, "native", 6)) {
48  pcie_ports_disabled = false;
49  pcie_ports_auto = false;
50  } else if (!strncmp(str, "auto", 4)) {
51  pcie_ports_disabled = false;
52  pcie_ports_auto = true;
53  }
54 
55  return 1;
56 }
57 __setup("pcie_ports=", pcie_port_setup);
58 
59 /* global data */
60 
66 {
67  pcie_capability_set_dword(dev, PCI_EXP_RTSTA, PCI_EXP_RTSTA_PME);
68 }
69 
70 static int pcie_portdrv_restore_config(struct pci_dev *dev)
71 {
72  int retval;
73 
74  retval = pci_enable_device(dev);
75  if (retval)
76  return retval;
77  pci_set_master(dev);
78  return 0;
79 }
80 
81 #ifdef CONFIG_PM
82 static int pcie_port_resume_noirq(struct device *dev)
83 {
84  struct pci_dev *pdev = to_pci_dev(dev);
85 
86  /*
87  * Some BIOSes forget to clear Root PME Status bits after system wakeup
88  * which breaks ACPI-based runtime wakeup on PCI Express, so clear those
89  * bits now just in case (shouldn't hurt).
90  */
91  if (pci_pcie_type(pdev) == PCI_EXP_TYPE_ROOT_PORT)
93  return 0;
94 }
95 
96 #ifdef CONFIG_PM_RUNTIME
97 struct d3cold_info {
98  bool no_d3cold;
99  unsigned int d3cold_delay;
100 };
101 
102 static int pci_dev_d3cold_info(struct pci_dev *pdev, void *data)
103 {
104  struct d3cold_info *info = data;
105 
106  info->d3cold_delay = max_t(unsigned int, pdev->d3cold_delay,
107  info->d3cold_delay);
108  if (pdev->no_d3cold)
109  info->no_d3cold = true;
110  return 0;
111 }
112 
113 static int pcie_port_runtime_suspend(struct device *dev)
114 {
115  struct pci_dev *pdev = to_pci_dev(dev);
116  struct d3cold_info d3cold_info = {
117  .no_d3cold = false,
118  .d3cold_delay = PCI_PM_D3_WAIT,
119  };
120 
121  /*
122  * If any subordinate device disable D3cold, we should not put
123  * the port into D3cold. The D3cold delay of port should be
124  * the max of that of all subordinate devices.
125  */
126  pci_walk_bus(pdev->subordinate, pci_dev_d3cold_info, &d3cold_info);
127  pdev->no_d3cold = d3cold_info.no_d3cold;
128  pdev->d3cold_delay = d3cold_info.d3cold_delay;
129  return 0;
130 }
131 
132 static int pcie_port_runtime_resume(struct device *dev)
133 {
134  return 0;
135 }
136 
137 static int pcie_port_runtime_idle(struct device *dev)
138 {
139  /* Delay for a short while to prevent too frequent suspend/resume */
140  pm_schedule_suspend(dev, 10);
141  return -EBUSY;
142 }
143 #else
144 #define pcie_port_runtime_suspend NULL
145 #define pcie_port_runtime_resume NULL
146 #define pcie_port_runtime_idle NULL
147 #endif
148 
149 static const struct dev_pm_ops pcie_portdrv_pm_ops = {
150  .suspend = pcie_port_device_suspend,
151  .resume = pcie_port_device_resume,
152  .freeze = pcie_port_device_suspend,
153  .thaw = pcie_port_device_resume,
154  .poweroff = pcie_port_device_suspend,
155  .restore = pcie_port_device_resume,
156  .resume_noirq = pcie_port_resume_noirq,
157  .runtime_suspend = pcie_port_runtime_suspend,
158  .runtime_resume = pcie_port_runtime_resume,
159  .runtime_idle = pcie_port_runtime_idle,
160 };
161 
162 #define PCIE_PORTDRV_PM_OPS (&pcie_portdrv_pm_ops)
163 
164 #else /* !PM */
165 
166 #define PCIE_PORTDRV_PM_OPS NULL
167 #endif /* !PM */
168 
169 /*
170  * PCIe port runtime suspend is broken for some chipsets, so use a
171  * black list to disable runtime PM for these chipsets.
172  */
173 static const struct pci_device_id port_runtime_pm_black_list[] = {
174  { /* end: all zeroes */ }
175 };
176 
177 /*
178  * pcie_portdrv_probe - Probe PCI-Express port devices
179  * @dev: PCI-Express port device being probed
180  *
181  * If detected invokes the pcie_port_device_register() method for
182  * this port device.
183  *
184  */
185 static int __devinit pcie_portdrv_probe(struct pci_dev *dev,
186  const struct pci_device_id *id)
187 {
188  int status;
189 
190  if (!pci_is_pcie(dev) ||
191  ((pci_pcie_type(dev) != PCI_EXP_TYPE_ROOT_PORT) &&
192  (pci_pcie_type(dev) != PCI_EXP_TYPE_UPSTREAM) &&
193  (pci_pcie_type(dev) != PCI_EXP_TYPE_DOWNSTREAM)))
194  return -ENODEV;
195 
196  if (!dev->irq && dev->pin) {
197  dev_warn(&dev->dev, "device [%04x:%04x] has invalid IRQ; "
198  "check vendor BIOS\n", dev->vendor, dev->device);
199  }
200  status = pcie_port_device_register(dev);
201  if (status)
202  return status;
203 
204  pci_save_state(dev);
205  /*
206  * D3cold may not work properly on some PCIe port, so disable
207  * it by default.
208  */
209  dev->d3cold_allowed = false;
210  if (!pci_match_id(port_runtime_pm_black_list, dev))
211  pm_runtime_put_noidle(&dev->dev);
212 
213  return 0;
214 }
215 
216 static void pcie_portdrv_remove(struct pci_dev *dev)
217 {
218  if (!pci_match_id(port_runtime_pm_black_list, dev))
219  pm_runtime_get_noresume(&dev->dev);
221  pci_disable_device(dev);
222 }
223 
224 static int error_detected_iter(struct device *device, void *data)
225 {
226  struct pcie_device *pcie_device;
228  struct aer_broadcast_data *result_data;
230 
231  result_data = (struct aer_broadcast_data *) data;
232 
233  if (device->bus == &pcie_port_bus_type && device->driver) {
234  driver = to_service_driver(device->driver);
235  if (!driver ||
236  !driver->err_handler ||
237  !driver->err_handler->error_detected)
238  return 0;
239 
240  pcie_device = to_pcie_device(device);
241 
242  /* Forward error detected message to service drivers */
243  status = driver->err_handler->error_detected(
244  pcie_device->port,
245  result_data->state);
246  result_data->result =
247  merge_result(result_data->result, status);
248  }
249 
250  return 0;
251 }
252 
253 static pci_ers_result_t pcie_portdrv_error_detected(struct pci_dev *dev,
255 {
257  int ret;
258 
259  /* can not fail */
260  ret = device_for_each_child(&dev->dev, &data, error_detected_iter);
261 
262  return data.result;
263 }
264 
265 static int mmio_enabled_iter(struct device *device, void *data)
266 {
267  struct pcie_device *pcie_device;
270 
271  result = (pci_ers_result_t *) data;
272 
273  if (device->bus == &pcie_port_bus_type && device->driver) {
274  driver = to_service_driver(device->driver);
275  if (driver &&
276  driver->err_handler &&
277  driver->err_handler->mmio_enabled) {
278  pcie_device = to_pcie_device(device);
279 
280  /* Forward error message to service drivers */
281  status = driver->err_handler->mmio_enabled(
282  pcie_device->port);
283  *result = merge_result(*result, status);
284  }
285  }
286 
287  return 0;
288 }
289 
290 static pci_ers_result_t pcie_portdrv_mmio_enabled(struct pci_dev *dev)
291 {
293  int retval;
294 
295  /* get true return value from &status */
296  retval = device_for_each_child(&dev->dev, &status, mmio_enabled_iter);
297  return status;
298 }
299 
300 static int slot_reset_iter(struct device *device, void *data)
301 {
302  struct pcie_device *pcie_device;
305 
306  result = (pci_ers_result_t *) data;
307 
308  if (device->bus == &pcie_port_bus_type && device->driver) {
309  driver = to_service_driver(device->driver);
310  if (driver &&
311  driver->err_handler &&
312  driver->err_handler->slot_reset) {
313  pcie_device = to_pcie_device(device);
314 
315  /* Forward error message to service drivers */
316  status = driver->err_handler->slot_reset(
317  pcie_device->port);
318  *result = merge_result(*result, status);
319  }
320  }
321 
322  return 0;
323 }
324 
325 static pci_ers_result_t pcie_portdrv_slot_reset(struct pci_dev *dev)
326 {
328  int retval;
329 
330  /* If fatal, restore cfg space for possible link reset at upstream */
331  if (dev->error_state == pci_channel_io_frozen) {
332  dev->state_saved = true;
333  pci_restore_state(dev);
334  pcie_portdrv_restore_config(dev);
336  }
337 
338  /* get true return value from &status */
339  retval = device_for_each_child(&dev->dev, &status, slot_reset_iter);
340 
341  return status;
342 }
343 
344 static int resume_iter(struct device *device, void *data)
345 {
346  struct pcie_device *pcie_device;
348 
349  if (device->bus == &pcie_port_bus_type && device->driver) {
350  driver = to_service_driver(device->driver);
351  if (driver &&
352  driver->err_handler &&
353  driver->err_handler->resume) {
354  pcie_device = to_pcie_device(device);
355 
356  /* Forward error message to service drivers */
357  driver->err_handler->resume(pcie_device->port);
358  }
359  }
360 
361  return 0;
362 }
363 
364 static void pcie_portdrv_err_resume(struct pci_dev *dev)
365 {
366  int retval;
367  /* nothing to do with error value, if it ever happens */
368  retval = device_for_each_child(&dev->dev, NULL, resume_iter);
369 }
370 
371 /*
372  * LINUX Device Driver Model
373  */
374 static const struct pci_device_id port_pci_ids[] = { {
375  /* handle any PCI-Express port */
376  PCI_DEVICE_CLASS(((PCI_CLASS_BRIDGE_PCI << 8) | 0x00), ~0),
377  }, { /* end: all zeroes */ }
378 };
379 MODULE_DEVICE_TABLE(pci, port_pci_ids);
380 
381 static const struct pci_error_handlers pcie_portdrv_err_handler = {
382  .error_detected = pcie_portdrv_error_detected,
383  .mmio_enabled = pcie_portdrv_mmio_enabled,
384  .slot_reset = pcie_portdrv_slot_reset,
385  .resume = pcie_portdrv_err_resume,
386 };
387 
388 static struct pci_driver pcie_portdriver = {
389  .name = "pcieport",
390  .id_table = &port_pci_ids[0],
391 
392  .probe = pcie_portdrv_probe,
393  .remove = pcie_portdrv_remove,
394 
395  .err_handler = &pcie_portdrv_err_handler,
396 
397  .driver.pm = PCIE_PORTDRV_PM_OPS,
398 };
399 
400 static int __init dmi_pcie_pme_disable_msi(const struct dmi_system_id *d)
401 {
402  pr_notice("%s detected: will not use MSI for PCIe PME signaling\n",
403  d->ident);
404  pcie_pme_disable_msi();
405  return 0;
406 }
407 
408 static struct dmi_system_id __initdata pcie_portdrv_dmi_table[] = {
409  /*
410  * Boxes that should not use MSI for PCIe PME signaling.
411  */
412  {
413  .callback = dmi_pcie_pme_disable_msi,
414  .ident = "MSI Wind U-100",
415  .matches = {
417  "MICRO-STAR INTERNATIONAL CO., LTD"),
418  DMI_MATCH(DMI_PRODUCT_NAME, "U-100"),
419  },
420  },
421  {}
422 };
423 
424 static int __init pcie_portdrv_init(void)
425 {
426  int retval;
427 
429  return pci_register_driver(&pcie_portdriver);
430 
431  dmi_check_system(pcie_portdrv_dmi_table);
432 
433  retval = pcie_port_bus_register();
434  if (retval) {
435  printk(KERN_WARNING "PCIE: bus_register error: %d\n", retval);
436  goto out;
437  }
438  retval = pci_register_driver(&pcie_portdriver);
439  if (retval)
441  out:
442  return retval;
443 }
444 
445 module_init(pcie_portdrv_init);