17 #include <linux/module.h>
18 #include <linux/slab.h>
30 #define AU1XPSC_I2S_DAIFMT \
31 (SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_LEFT_J | \
35 #define AU1XPSC_I2S_DIR \
36 (SND_SOC_DAIDIR_PLAYBACK | SND_SOC_DAIDIR_CAPTURE)
38 #define AU1XPSC_I2S_RATES \
39 SNDRV_PCM_RATE_8000_192000
41 #define AU1XPSC_I2S_FMTS \
42 (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE)
44 #define I2SSTAT_BUSY(stype) \
45 ((stype) == SNDRV_PCM_STREAM_PLAYBACK ? PSC_I2SSTAT_TB : PSC_I2SSTAT_RB)
46 #define I2SPCR_START(stype) \
47 ((stype) == SNDRV_PCM_STREAM_PLAYBACK ? PSC_I2SPCR_TS : PSC_I2SPCR_RS)
48 #define I2SPCR_STOP(stype) \
49 ((stype) == SNDRV_PCM_STREAM_PLAYBACK ? PSC_I2SPCR_TP : PSC_I2SPCR_RP)
50 #define I2SPCR_CLRFIFO(stype) \
51 ((stype) == SNDRV_PCM_STREAM_PLAYBACK ? PSC_I2SPCR_TC : PSC_I2SPCR_RC)
54 static int au1xpsc_i2s_set_fmt(
struct snd_soc_dai *cpu_dai,
126 cfgbits = au_readl(
I2S_CFG(pscdata));
132 pscdata->
cfg &= ~(0x1f << 4);
162 au_writel(0,
I2S_CFG(pscdata));
176 au_writel(0,
I2S_CFG(pscdata));
184 unsigned long tmo,
stat;
192 ret = au1xpsc_i2s_configure(pscdata);
218 unsigned long tmo,
stat;
231 au_writel(0,
I2S_CFG(pscdata));
248 ret = au1xpsc_i2s_start(pscdata, stype);
252 ret = au1xpsc_i2s_stop(pscdata, stype);
264 snd_soc_dai_set_dma_data(dai, substream, &pscdata->
dmaids[0]);
269 .startup = au1xpsc_i2s_startup,
270 .trigger = au1xpsc_i2s_trigger,
271 .hw_params = au1xpsc_i2s_hw_params,
272 .set_fmt = au1xpsc_i2s_set_fmt,
288 .ops = &au1xpsc_i2s_dai_ops,
309 resource_size(iores),
314 resource_size(iores));
351 platform_set_drvdata(pdev, wd);
371 static int au1xpsc_i2s_drvsuspend(
struct device *
dev)
386 static int au1xpsc_i2s_drvresume(
struct device *dev)
402 .
suspend = au1xpsc_i2s_drvsuspend,
403 .resume = au1xpsc_i2s_drvresume,
406 #define AU1XPSCI2S_PMOPS &au1xpsci2s_pmops
410 #define AU1XPSCI2S_PMOPS NULL
416 .name =
"au1xpsc_i2s",
420 .probe = au1xpsc_i2s_drvprobe,