pxa25x_udc.h File Reference

#include <linux/types.h>

Go to the source code of this file.

Data Structures
struct	pxa25x_ep
struct	pxa25x_request
struct	udc_stats
struct	udc_stats::ep0stats
struct	pxa25x_udc

Macros
#define	UFNRH_SIR   (1 << 7) /* SOF interrupt request */
#define	UFNRH_SIM   (1 << 6) /* SOF interrupt mask */
#define	UFNRH_IPE14   (1 << 5) /* ISO packet error, ep14 */
#define	UFNRH_IPE9   (1 << 4) /* ISO packet error, ep9 */
#define	UFNRH_IPE4   (1 << 3) /* ISO packet error, ep4 */
#define	UDCCFR   UDC_RES2 /* UDC Control Function Register */
#define	UDCCFR_AREN   (1 << 7) /* ACK response enable (now) */
#define	UDCCFR_ACM   (1 << 2) /* ACK control mode (wait for AREN) */
#define	UDCCFR_MB1   (0xff & ~(UDCCFR_AREN|UDCCFR_ACM))
#define	EP0_FIFO_SIZE   ((unsigned)16)
#define	BULK_FIFO_SIZE   ((unsigned)64)
#define	ISO_FIFO_SIZE   ((unsigned)256)
#define	INT_FIFO_SIZE   ((unsigned)8)
#define	PXA_UDC_NUM_ENDPOINTS   16
#define	start_watchdog(dev)   mod_timer(&dev->timer, jiffies + (HZ/200))
#define	DBG_NORMAL   1 /* error paths, device state transitions */
#define	DBG_VERBOSE   2 /* add some success path trace info */
#define	DBG_NOISY   3 /* ... even more: request level */
#define	DBG_VERY_NOISY   4 /* ... even more: packet level */
#define	DMSG(stuff...)   pr_debug("udc: " stuff)
#define	dump_udccr(x)   do{}while(0)
#define	dump_udccs0(x)   do{}while(0)
#define	dump_state(x)   do{}while(0)
#define	UDC_DEBUG   ((unsigned)0)
#define	DBG(lvl, stuff...)   do{if ((lvl) <= UDC_DEBUG) DMSG(stuff);}while(0)
#define	ERR(stuff...)   pr_err("udc: " stuff)
#define	WARNING(stuff...)   pr_warning("udc: " stuff)
#define	INFO(stuff...)   pr_info("udc: " stuff)

Enumerations
enum	ep0_state {   EP0_IDLE, EP0_IN_DATA_PHASE, EP0_OUT_DATA_PHASE, EP0_CONFIG,   EP0_STALL, STATE_DEV_DISABLED = 0, STATE_DEV_OPENED, STATE_DEV_UNCONNECTED,   STATE_DEV_CONNECTED, STATE_DEV_SETUP, STATE_DEV_UNBOUND, EP0_IDLE,   EP0_IN_DATA_PHASE, EP0_OUT_DATA_PHASE, EP0_END_XFER, EP0_STALL,   WAIT_FOR_SETUP, SETUP_STAGE, IN_DATA_STAGE, OUT_DATA_STAGE,   IN_STATUS_STAGE, OUT_STATUS_STAGE, STALL, WAIT_ACK_SET_CONF_INTERF,   EP0_IDLE, EP0_IN_DATA_PHASE, EP0_OUT_DATA_PHASE, EP0_END_XFER,   EP0_STALL }

Macro Definition Documentation

#define BULK_FIFO_SIZE   ((unsigned)64)

Definition at line 78 of file pxa25x_udc.h.

#define DBG	(		lvl,
			stuff...
	)		do{if ((lvl) <= UDC_DEBUG) DMSG(stuff);}while(0)

Definition at line 244 of file pxa25x_udc.h.

#define DBG_NOISY   3 /* ... even more: request level */

Definition at line 147 of file pxa25x_udc.h.

#define DBG_NORMAL   1 /* error paths, device state transitions */

Definition at line 145 of file pxa25x_udc.h.

#define DBG_VERBOSE   2 /* add some success path trace info */

Definition at line 146 of file pxa25x_udc.h.

#define DBG_VERY_NOISY   4 /* ... even more: packet level */

Definition at line 148 of file pxa25x_udc.h.

#define DMSG

(

stuff...

)

pr_debug("udc: " stuff)

Definition at line 150 of file pxa25x_udc.h.

#define dump_state

(

x

)

do{}while(0)

Definition at line 238 of file pxa25x_udc.h.

#define dump_udccr

(

x

)

do{}while(0)

Definition at line 236 of file pxa25x_udc.h.

#define dump_udccs0

(

x

)

do{}while(0)

Definition at line 237 of file pxa25x_udc.h.

#define EP0_FIFO_SIZE   ((unsigned)16)

Definition at line 77 of file pxa25x_udc.h.

#define ERR

(

stuff...

)

pr_err("udc: " stuff)

Definition at line 246 of file pxa25x_udc.h.

#define INFO

(

stuff...

)

pr_info("udc: " stuff)

Definition at line 248 of file pxa25x_udc.h.

#define INT_FIFO_SIZE   ((unsigned)8)

Definition at line 80 of file pxa25x_udc.h.

#define ISO_FIFO_SIZE   ((unsigned)256)

Definition at line 79 of file pxa25x_udc.h.

#define PXA_UDC_NUM_ENDPOINTS   16

Definition at line 96 of file pxa25x_udc.h.

#define start_watchdog

(

dev

)

mod_timer(&dev->timer, jiffies + (HZ/200))

Definition at line 115 of file pxa25x_udc.h.

#define UDC_DEBUG   ((unsigned)0)

Definition at line 240 of file pxa25x_udc.h.

#define UDCCFR   UDC_RES2 /* UDC Control Function Register */

Definition at line 29 of file pxa25x_udc.h.

#define UDCCFR_ACM   (1 << 2) /* ACK control mode (wait for AREN) */

Definition at line 31 of file pxa25x_udc.h.

#define UDCCFR_AREN   (1 << 7) /* ACK response enable (now) */

Definition at line 30 of file pxa25x_udc.h.

#define UDCCFR_MB1   (0xff & ~(UDCCFR_AREN|UDCCFR_ACM))

Definition at line 34 of file pxa25x_udc.h.

#define UFNRH_IPE14   (1 << 5) /* ISO packet error, ep14 */

Definition at line 24 of file pxa25x_udc.h.

#define UFNRH_IPE4   (1 << 3) /* ISO packet error, ep4 */

Definition at line 26 of file pxa25x_udc.h.

#define UFNRH_IPE9   (1 << 4) /* ISO packet error, ep9 */

Definition at line 25 of file pxa25x_udc.h.

#define UFNRH_SIM   (1 << 6) /* SOF interrupt mask */

Definition at line 23 of file pxa25x_udc.h.

#define UFNRH_SIR   (1 << 7) /* SOF interrupt request */

Definition at line 22 of file pxa25x_udc.h.

#define WARNING

(

stuff...

)

pr_warning("udc: " stuff)

Definition at line 247 of file pxa25x_udc.h.

Enumeration Type Documentation

enum ep0_state

Enumerator:

EP0_IDLE
EP0_IN_DATA_PHASE
EP0_OUT_DATA_PHASE
EP0_CONFIG
EP0_STALL
STATE_DEV_DISABLED
STATE_DEV_OPENED
STATE_DEV_UNCONNECTED
STATE_DEV_CONNECTED
STATE_DEV_SETUP
STATE_DEV_UNBOUND
EP0_IDLE
EP0_IN_DATA_PHASE
EP0_OUT_DATA_PHASE
EP0_END_XFER
EP0_STALL
WAIT_FOR_SETUP
SETUP_STAGE
IN_DATA_STAGE
OUT_DATA_STAGE
IN_STATUS_STAGE
OUT_STATUS_STAGE
STALL
WAIT_ACK_SET_CONF_INTERF
EP0_IDLE
EP0_IN_DATA_PHASE
EP0_OUT_DATA_PHASE
EP0_END_XFER
EP0_STALL

Definition at line 69 of file pxa25x_udc.h.