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#define | PCI_VENDOR_ID_S626 0x1131 |
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#define | PCI_DEVICE_ID_S626 0x7146 |
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#define | PCI_SUBVENDOR_ID_S626 0x6000 |
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#define | PCI_SUBDEVICE_ID_S626 0x0272 |
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#define | devpriv ((struct s626_private *)dev->private) |
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#define | diopriv ((struct dio_private *)s->private) |
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#define | encpriv ((struct enc_private *)(dev->subdevices+5)->private) |
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#define | INDXMASK(C) (1 << (((C) > 2) ? ((C) * 2 - 1) : ((C) * 2 + 4))) |
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#define | OVERMASK(C) (1 << (((C) > 2) ? ((C) * 2 + 5) : ((C) * 2 + 10))) |
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#define | EVBITS(C) { 0, OVERMASK(C), INDXMASK(C), OVERMASK(C) | INDXMASK(C) } |
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#define | MC_ENABLE(REGADRS, CTRLWORD) writel(((uint32_t)(CTRLWORD) << 16) | (uint32_t)(CTRLWORD), devpriv->base_addr+(REGADRS)) |
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#define | MC_DISABLE(REGADRS, CTRLWORD) writel((uint32_t)(CTRLWORD) << 16 , devpriv->base_addr+(REGADRS)) |
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#define | MC_TEST(REGADRS, CTRLWORD) ((readl(devpriv->base_addr+(REGADRS)) & CTRLWORD) != 0) |
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#define | WR7146(REGARDS, CTRLWORD) writel(CTRLWORD, devpriv->base_addr+(REGARDS)) |
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#define | RR7146(REGARDS) readl(devpriv->base_addr+(REGARDS)) |
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#define | BUGFIX_STREG(REGADRS) (REGADRS - 4) |
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#define | VECTPORT(VECTNUM) (P_TSL2 + ((VECTNUM) << 2)) |
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#define | SETVECT(VECTNUM, VECTVAL) WR7146(VECTPORT(VECTNUM), (VECTVAL)) |
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#define | I2C_B2(ATTR, VAL) (((ATTR) << 6) | ((VAL) << 24)) |
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#define | I2C_B1(ATTR, VAL) (((ATTR) << 4) | ((VAL) << 16)) |
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#define | I2C_B0(ATTR, VAL) (((ATTR) << 2) | ((VAL) << 8)) |
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#define | VECT0 (XSD2 | RSD3 | SIB_A2) |
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#define | MAX_SPEED 200000 /* in nanoseconds */ |
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#define | MIN_SPEED 2000000000 /* in nanoseconds */ |
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