sata_highbank.c File Reference

#include <linux/kernel.h>
#include <linux/gfp.h>
#include <linux/module.h>
#include <linux/init.h>
#include <linux/types.h>
#include <linux/err.h>
#include <linux/io.h>
#include <linux/spinlock.h>
#include <linux/device.h>
#include <linux/of_device.h>
#include <linux/of_address.h>
#include <linux/platform_device.h>
#include <linux/libata.h>
#include <linux/ahci_platform.h>
#include <linux/interrupt.h>
#include <linux/delay.h>
#include <linux/export.h>
#include "ahci.h"

Go to the source code of this file.

Data Structures
struct	phy_lane_info

Macros
#define	CPHY_MAP(dev, addr)   ((((dev) & 0x1f) << 7) | (((addr) >> 9) & 0x7f))
#define	CPHY_ADDR(addr)   (((addr) & 0x1ff) << 2)
#define	SERDES_CR_CTL   0x80a0
#define	SERDES_CR_ADDR   0x80a1
#define	SERDES_CR_DATA   0x80a2
#define	CR_BUSY   0x0001
#define	CR_START   0x0001
#define	CR_WR_RDN   0x0002
#define	CPHY_RX_INPUT_STS   0x2002
#define	CPHY_SATA_OVERRIDE   0x4000
#define	CPHY_OVERRIDE   0x2005
#define	SPHY_LANE   0x100
#define	SPHY_HALF_RATE   0x0001
#define	CPHY_SATA_DPLL_MODE   0x0700
#define	CPHY_SATA_DPLL_SHIFT   8
#define	CPHY_SATA_DPLL_RESET   (1 << 11)
#define	CPHY_PHY_COUNT   6
#define	CPHY_LANE_COUNT   4
#define	CPHY_PORT_COUNT   (CPHY_PHY_COUNT * CPHY_LANE_COUNT)

Functions
	MODULE_DEVICE_TABLE (of, ahci_of_match)
	SIMPLE_DEV_PM_OPS (ahci_highbank_pm_ops, ahci_highbank_suspend, ahci_highbank_resume)
	module_platform_driver (ahci_highbank_driver)
	MODULE_DESCRIPTION ("Calxeda Highbank AHCI SATA platform driver")
	MODULE_AUTHOR ("Mark Langsdorf <[email protected]>")
	MODULE_LICENSE ("GPL")
	MODULE_ALIAS ("sata:highbank")

Macro Definition Documentation

#define CPHY_ADDR

(

addr

)

(((addr) & 0x1ff) << 2)

Definition at line 39 of file sata_highbank.c.

#define CPHY_LANE_COUNT   4

Definition at line 55 of file sata_highbank.c.

#define CPHY_MAP	(		dev,
			addr
	)		((((dev) & 0x1f) << 7) | (((addr) >> 9) & 0x7f))

Definition at line 38 of file sata_highbank.c.

#define CPHY_OVERRIDE   0x2005

Definition at line 48 of file sata_highbank.c.

#define CPHY_PHY_COUNT   6

Definition at line 54 of file sata_highbank.c.

#define CPHY_PORT_COUNT   (CPHY_PHY_COUNT * CPHY_LANE_COUNT)

Definition at line 56 of file sata_highbank.c.

#define CPHY_RX_INPUT_STS   0x2002

Definition at line 46 of file sata_highbank.c.

#define CPHY_SATA_DPLL_MODE   0x0700

Definition at line 51 of file sata_highbank.c.

#define CPHY_SATA_DPLL_RESET   (1 << 11)

Definition at line 53 of file sata_highbank.c.

#define CPHY_SATA_DPLL_SHIFT   8

Definition at line 52 of file sata_highbank.c.

#define CPHY_SATA_OVERRIDE   0x4000

Definition at line 47 of file sata_highbank.c.

#define CR_BUSY   0x0001

Definition at line 43 of file sata_highbank.c.

#define CR_START   0x0001

Definition at line 44 of file sata_highbank.c.

#define CR_WR_RDN   0x0002

Definition at line 45 of file sata_highbank.c.

#define SERDES_CR_ADDR   0x80a1

Definition at line 41 of file sata_highbank.c.

#define SERDES_CR_CTL   0x80a0

Definition at line 40 of file sata_highbank.c.

#define SERDES_CR_DATA   0x80a2

Definition at line 42 of file sata_highbank.c.

#define SPHY_HALF_RATE   0x0001

Definition at line 50 of file sata_highbank.c.

#define SPHY_LANE   0x100

Definition at line 49 of file sata_highbank.c.

Function Documentation

MODULE_ALIAS

(

"sata:highbank"

)

MODULE_AUTHOR

(

"Mark Langsdorf <[email protected]>"

)

MODULE_DESCRIPTION

(

"Calxeda Highbank AHCI SATA platform driver"

)

MODULE_DEVICE_TABLE	(	of	,
		ahci_of_match
	)

MODULE_LICENSE

(

"GPL"

)

module_platform_driver

(

ahci_highbank_driver

)

SIMPLE_DEV_PM_OPS	(	ahci_highbank_pm_ops	,
		ahci_highbank_suspend	,
		ahci_highbank_resume
	)