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sh_sir.c File Reference
#include <linux/io.h>
#include <linux/interrupt.h>
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/slab.h>
#include <net/irda/wrapper.h>
#include <net/irda/irda_device.h>
#include <asm/clock.h>

Go to the source code of this file.

Data Structures

struct  sh_sir_self
 

Macros

#define DRIVER_NAME   "sh_sir"
 
#define RX_PHASE   (1 << 0)
 
#define TX_PHASE   (1 << 1)
 
#define TX_COMP_PHASE   (1 << 2) /* tx complete */
 
#define NONE_PHASE   (1 << 31)
 
#define IRIF_RINTCLR   0x0016 /* DMA rx interrupt source clear */
 
#define IRIF_TINTCLR   0x0018 /* DMA tx interrupt source clear */
 
#define IRIF_SIR0   0x0020 /* IrDA-SIR10 control */
 
#define IRIF_SIR1   0x0022 /* IrDA-SIR10 baudrate error correction */
 
#define IRIF_SIR2   0x0024 /* IrDA-SIR10 baudrate count */
 
#define IRIF_SIR3   0x0026 /* IrDA-SIR10 status */
 
#define IRIF_SIR_FRM   0x0028 /* Hardware frame processing set */
 
#define IRIF_SIR_EOF   0x002A /* EOF value */
 
#define IRIF_SIR_FLG   0x002C /* Flag clear */
 
#define IRIF_UART_STS2   0x002E /* UART status 2 */
 
#define IRIF_UART0   0x0030 /* UART control */
 
#define IRIF_UART1   0x0032 /* UART status */
 
#define IRIF_UART2   0x0034 /* UART mode */
 
#define IRIF_UART3   0x0036 /* UART transmit data */
 
#define IRIF_UART4   0x0038 /* UART receive data */
 
#define IRIF_UART5   0x003A /* UART interrupt mask */
 
#define IRIF_UART6   0x003C /* UART baud rate error correction */
 
#define IRIF_UART7   0x003E /* UART baud rate count set */
 
#define IRIF_CRC0   0x0040 /* CRC engine control */
 
#define IRIF_CRC1   0x0042 /* CRC engine input data */
 
#define IRIF_CRC2   0x0044 /* CRC engine calculation */
 
#define IRIF_CRC3   0x0046 /* CRC engine output data 1 */
 
#define IRIF_CRC4   0x0048 /* CRC engine output data 2 */
 
#define IRTPW   (1 << 1) /* transmit pulse width select */
 
#define IRERRC   (1 << 0) /* Clear receive pulse width error */
 
#define IRERR   (1 << 0) /* received pulse width Error */
 
#define EOFD   (1 << 9) /* EOF detection flag */
 
#define FRER   (1 << 8) /* Frame Error bit */
 
#define FRP   (1 << 0) /* Frame processing set */
 
#define IRSME   (1 << 6) /* Receive Sum Error flag */
 
#define IROVE   (1 << 5) /* Receive Overrun Error flag */
 
#define IRFRE   (1 << 4) /* Receive Framing Error flag */
 
#define IRPRE   (1 << 3) /* Receive Parity Error flag */
 
#define TBEC   (1 << 2) /* Transmit Data Clear */
 
#define RIE   (1 << 1) /* Receive Enable */
 
#define TIE   (1 << 0) /* Transmit Enable */
 
#define URSME   (1 << 6) /* Receive Sum Error Flag */
 
#define UROVE   (1 << 5) /* Receive Overrun Error Flag */
 
#define URFRE   (1 << 4) /* Receive Framing Error Flag */
 
#define URPRE   (1 << 3) /* Receive Parity Error Flag */
 
#define RBF   (1 << 2) /* Receive Buffer Full Flag */
 
#define TSBE   (1 << 1) /* Transmit Shift Buffer Empty Flag */
 
#define TBE   (1 << 0) /* Transmit Buffer Empty flag */
 
#define TBCOMP   (TSBE | TBE)
 
#define RSEIM   (1 << 6) /* Receive Sum Error Flag IRQ Mask */
 
#define RBFIM   (1 << 2) /* Receive Buffer Full Flag IRQ Mask */
 
#define TSBEIM   (1 << 1) /* Transmit Shift Buffer Empty Flag IRQ Mask */
 
#define TBEIM   (1 << 0) /* Transmit Buffer Empty Flag IRQ Mask */
 
#define RX_MASK   (RSEIM | RBFIM)
 
#define CRC_RST   (1 << 15) /* CRC Engine Reset */
 
#define CRC_CT_MASK   0x0FFF
 
#define SCLK_BASE   1843200 /* 1.8432MHz */
 
#define ERR_ROUNDING(a)   ((a + 5000) / 10000)
 

Functions

 module_platform_driver (sh_sir_driver)
 
 MODULE_AUTHOR ("Kuninori Morimoto <[email protected]>")
 
 MODULE_DESCRIPTION ("SuperH IrDA driver")
 
 MODULE_LICENSE ("GPL")
 

Macro Definition Documentation

#define CRC_CT_MASK   0x0FFF

Definition at line 97 of file sh_sir.c.

#define CRC_RST   (1 << 15) /* CRC Engine Reset */

Definition at line 96 of file sh_sir.c.

#define DRIVER_NAME   "sh_sir"

Definition at line 24 of file sh_sir.c.

#define EOFD   (1 << 9) /* EOF detection flag */

Definition at line 63 of file sh_sir.c.

#define ERR_ROUNDING (   a)    ((a + 5000) / 10000)

Definition at line 250 of file sh_sir.c.

#define FRER   (1 << 8) /* Frame Error bit */

Definition at line 64 of file sh_sir.c.

#define FRP   (1 << 0) /* Frame processing set */

Definition at line 65 of file sh_sir.c.

#define IRERR   (1 << 0) /* received pulse width Error */

Definition at line 60 of file sh_sir.c.

#define IRERRC   (1 << 0) /* Clear receive pulse width error */

Definition at line 57 of file sh_sir.c.

#define IRFRE   (1 << 4) /* Receive Framing Error flag */

Definition at line 70 of file sh_sir.c.

#define IRIF_CRC0   0x0040 /* CRC engine control */

Definition at line 49 of file sh_sir.c.

#define IRIF_CRC1   0x0042 /* CRC engine input data */

Definition at line 50 of file sh_sir.c.

#define IRIF_CRC2   0x0044 /* CRC engine calculation */

Definition at line 51 of file sh_sir.c.

#define IRIF_CRC3   0x0046 /* CRC engine output data 1 */

Definition at line 52 of file sh_sir.c.

#define IRIF_CRC4   0x0048 /* CRC engine output data 2 */

Definition at line 53 of file sh_sir.c.

#define IRIF_RINTCLR   0x0016 /* DMA rx interrupt source clear */

Definition at line 31 of file sh_sir.c.

#define IRIF_SIR0   0x0020 /* IrDA-SIR10 control */

Definition at line 33 of file sh_sir.c.

#define IRIF_SIR1   0x0022 /* IrDA-SIR10 baudrate error correction */

Definition at line 34 of file sh_sir.c.

#define IRIF_SIR2   0x0024 /* IrDA-SIR10 baudrate count */

Definition at line 35 of file sh_sir.c.

#define IRIF_SIR3   0x0026 /* IrDA-SIR10 status */

Definition at line 36 of file sh_sir.c.

#define IRIF_SIR_EOF   0x002A /* EOF value */

Definition at line 38 of file sh_sir.c.

#define IRIF_SIR_FLG   0x002C /* Flag clear */

Definition at line 39 of file sh_sir.c.

#define IRIF_SIR_FRM   0x0028 /* Hardware frame processing set */

Definition at line 37 of file sh_sir.c.

#define IRIF_TINTCLR   0x0018 /* DMA tx interrupt source clear */

Definition at line 32 of file sh_sir.c.

#define IRIF_UART0   0x0030 /* UART control */

Definition at line 41 of file sh_sir.c.

#define IRIF_UART1   0x0032 /* UART status */

Definition at line 42 of file sh_sir.c.

#define IRIF_UART2   0x0034 /* UART mode */

Definition at line 43 of file sh_sir.c.

#define IRIF_UART3   0x0036 /* UART transmit data */

Definition at line 44 of file sh_sir.c.

#define IRIF_UART4   0x0038 /* UART receive data */

Definition at line 45 of file sh_sir.c.

#define IRIF_UART5   0x003A /* UART interrupt mask */

Definition at line 46 of file sh_sir.c.

#define IRIF_UART6   0x003C /* UART baud rate error correction */

Definition at line 47 of file sh_sir.c.

#define IRIF_UART7   0x003E /* UART baud rate count set */

Definition at line 48 of file sh_sir.c.

#define IRIF_UART_STS2   0x002E /* UART status 2 */

Definition at line 40 of file sh_sir.c.

#define IROVE   (1 << 5) /* Receive Overrun Error flag */

Definition at line 69 of file sh_sir.c.

#define IRPRE   (1 << 3) /* Receive Parity Error flag */

Definition at line 71 of file sh_sir.c.

#define IRSME   (1 << 6) /* Receive Sum Error flag */

Definition at line 68 of file sh_sir.c.

#define IRTPW   (1 << 1) /* transmit pulse width select */

Definition at line 56 of file sh_sir.c.

#define NONE_PHASE   (1 << 31)

Definition at line 29 of file sh_sir.c.

#define RBF   (1 << 2) /* Receive Buffer Full Flag */

Definition at line 83 of file sh_sir.c.

#define RBFIM   (1 << 2) /* Receive Buffer Full Flag IRQ Mask */

Definition at line 90 of file sh_sir.c.

#define RIE   (1 << 1) /* Receive Enable */

Definition at line 75 of file sh_sir.c.

#define RSEIM   (1 << 6) /* Receive Sum Error Flag IRQ Mask */

Definition at line 89 of file sh_sir.c.

#define RX_MASK   (RSEIM | RBFIM)

Definition at line 93 of file sh_sir.c.

#define RX_PHASE   (1 << 0)

Definition at line 26 of file sh_sir.c.

#define SCLK_BASE   1843200 /* 1.8432MHz */

Definition at line 215 of file sh_sir.c.

#define TBCOMP   (TSBE | TBE)

Definition at line 86 of file sh_sir.c.

#define TBE   (1 << 0) /* Transmit Buffer Empty flag */

Definition at line 85 of file sh_sir.c.

#define TBEC   (1 << 2) /* Transmit Data Clear */

Definition at line 74 of file sh_sir.c.

#define TBEIM   (1 << 0) /* Transmit Buffer Empty Flag IRQ Mask */

Definition at line 92 of file sh_sir.c.

#define TIE   (1 << 0) /* Transmit Enable */

Definition at line 76 of file sh_sir.c.

#define TSBE   (1 << 1) /* Transmit Shift Buffer Empty Flag */

Definition at line 84 of file sh_sir.c.

#define TSBEIM   (1 << 1) /* Transmit Shift Buffer Empty Flag IRQ Mask */

Definition at line 91 of file sh_sir.c.

#define TX_COMP_PHASE   (1 << 2) /* tx complete */

Definition at line 28 of file sh_sir.c.

#define TX_PHASE   (1 << 1)

Definition at line 27 of file sh_sir.c.

#define URFRE   (1 << 4) /* Receive Framing Error Flag */

Definition at line 81 of file sh_sir.c.

#define UROVE   (1 << 5) /* Receive Overrun Error Flag */

Definition at line 80 of file sh_sir.c.

#define URPRE   (1 << 3) /* Receive Parity Error Flag */

Definition at line 82 of file sh_sir.c.

#define URSME   (1 << 6) /* Receive Sum Error Flag */

Definition at line 79 of file sh_sir.c.

Function Documentation

MODULE_AUTHOR ( "Kuninori Morimoto <[email protected]>"  )
MODULE_DESCRIPTION ( "SuperH IrDA driver )
MODULE_LICENSE ( "GPL"  )
module_platform_driver ( sh_sir_driver  )