struct dwc3 - representation of our controller : usb control request which is used for ep0 : trb which is used for the ctrl_req : bounce buffer for ep0 : used while precessing STD USB requests : dma address of ctrl_req : dma address of ep0_trb : dummy req used while handling STD USB requests : dma address of ep0_bounce : for synchronizing : pointer to our struct device : pointer to our xHCI child : a list of event buffers : device side representation of the peripheral controller : pointer to the gadget driver : base address for our registers : address space size : IRQ number : calculated number of event buffers : only used on revisions <1.83a for workaround : maximum speed requested (mainly for testing purposes) : revision register contents : mode of operation : pointer to USB2 PHY : pointer to USB3 PHY : true when we are selfpowered : set if we perform a three phase setup : true when we used bounce buffer : true when we expect a DATA IN transfer : true when StartConfig command has been issued : true when there's a Setup Packet in FIFO. Workaround : not all users might want fifo resizing, flag it : tells us it's ok to reconfigure our TxFIFO sizes. : wValue from Set Isochronous Delay request; : parameter from Set SEL request. : parameter from Set SEL request. : parameter from Set SEL request. : parameter from Set SEL request. : hold the next expected event : state of endpoint zero : link state : device speed (super, high, full, low) : points to start of memory which is used for this struct. : copy of hwparams registers : debugfs root folder pointer
Definition at line 649 of file core.h.