Data Fields
enum flush_reason	flush

struct msm_dmov_cmd	xfer

dma_addr_t	cmdptr_dmaaddr

dmov_box *	command_ptr

u32 *	command_ptr_ptr

dma_addr_t	mapped_cmd_ptr

wait_queue_head_t	wait

dma_addr_t	rbuffer

unsigned char *	buffer

struct dma_pool *	pool

struct work_struct	tty_work

Detailed Description

struct msm_hs_rx : Rx DMA request state : top level DMA command pointer structure : DMA view of second level command structure : third level DMA command pointer structure : second level DMA command list pointer : DMA view of the third level command structure : wait for DMA completion before shutdown : destination buffer for RX DMA : DMA view of buffer : dma pool out of which coherent rx buffer is allocated : private work-queue for tty flip buffer push task

This structure describes a single Rx DMA transaction. Rx DMA transactions use box mode DMA commands.

Definition at line 278 of file msm_serial_hs.c.