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tlb_uv.c
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1 /*
2  * SGI UltraViolet TLB flush routines.
3  *
4  * (c) 2008-2012 Cliff Wickman <[email protected]>, SGI.
5  *
6  * This code is released under the GNU General Public License version 2 or
7  * later.
8  */
9 #include <linux/seq_file.h>
10 #include <linux/proc_fs.h>
11 #include <linux/debugfs.h>
12 #include <linux/kernel.h>
13 #include <linux/slab.h>
14 #include <linux/delay.h>
15 
16 #include <asm/mmu_context.h>
17 #include <asm/uv/uv.h>
18 #include <asm/uv/uv_mmrs.h>
19 #include <asm/uv/uv_hub.h>
20 #include <asm/uv/uv_bau.h>
21 #include <asm/apic.h>
22 #include <asm/idle.h>
23 #include <asm/tsc.h>
24 #include <asm/irq_vectors.h>
25 #include <asm/timer.h>
26 
27 /* timeouts in nanoseconds (indexed by UVH_AGING_PRESCALE_SEL urgency7 30:28) */
28 static int timeout_base_ns[] = {
29  20,
30  160,
31  1280,
32  10240,
33  81920,
34  655360,
35  5242880,
36  167772160
37 };
38 
39 static int timeout_us;
40 static int nobau;
41 static int nobau_perm;
42 static cycles_t congested_cycles;
43 
44 /* tunables: */
45 static int max_concurr = MAX_BAU_CONCURRENT;
46 static int max_concurr_const = MAX_BAU_CONCURRENT;
47 static int plugged_delay = PLUGGED_DELAY;
48 static int plugsb4reset = PLUGSB4RESET;
49 static int giveup_limit = GIVEUP_LIMIT;
50 static int timeoutsb4reset = TIMEOUTSB4RESET;
51 static int ipi_reset_limit = IPI_RESET_LIMIT;
52 static int complete_threshold = COMPLETE_THRESHOLD;
53 static int congested_respns_us = CONGESTED_RESPONSE_US;
54 static int congested_reps = CONGESTED_REPS;
55 static int disabled_period = DISABLED_PERIOD;
56 
57 static struct tunables tunables[] = {
58  {&max_concurr, MAX_BAU_CONCURRENT}, /* must be [0] */
59  {&plugged_delay, PLUGGED_DELAY},
60  {&plugsb4reset, PLUGSB4RESET},
61  {&timeoutsb4reset, TIMEOUTSB4RESET},
62  {&ipi_reset_limit, IPI_RESET_LIMIT},
63  {&complete_threshold, COMPLETE_THRESHOLD},
64  {&congested_respns_us, CONGESTED_RESPONSE_US},
65  {&congested_reps, CONGESTED_REPS},
66  {&disabled_period, DISABLED_PERIOD},
67  {&giveup_limit, GIVEUP_LIMIT}
68 };
69 
70 static struct dentry *tunables_dir;
71 static struct dentry *tunables_file;
72 
73 /* these correspond to the statistics printed by ptc_seq_show() */
74 static char *stat_description[] = {
75  "sent: number of shootdown messages sent",
76  "stime: time spent sending messages",
77  "numuvhubs: number of hubs targeted with shootdown",
78  "numuvhubs16: number times 16 or more hubs targeted",
79  "numuvhubs8: number times 8 or more hubs targeted",
80  "numuvhubs4: number times 4 or more hubs targeted",
81  "numuvhubs2: number times 2 or more hubs targeted",
82  "numuvhubs1: number times 1 hub targeted",
83  "numcpus: number of cpus targeted with shootdown",
84  "dto: number of destination timeouts",
85  "retries: destination timeout retries sent",
86  "rok: : destination timeouts successfully retried",
87  "resetp: ipi-style resource resets for plugs",
88  "resett: ipi-style resource resets for timeouts",
89  "giveup: fall-backs to ipi-style shootdowns",
90  "sto: number of source timeouts",
91  "bz: number of stay-busy's",
92  "throt: number times spun in throttle",
93  "swack: image of UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE",
94  "recv: shootdown messages received",
95  "rtime: time spent processing messages",
96  "all: shootdown all-tlb messages",
97  "one: shootdown one-tlb messages",
98  "mult: interrupts that found multiple messages",
99  "none: interrupts that found no messages",
100  "retry: number of retry messages processed",
101  "canc: number messages canceled by retries",
102  "nocan: number retries that found nothing to cancel",
103  "reset: number of ipi-style reset requests processed",
104  "rcan: number messages canceled by reset requests",
105  "disable: number times use of the BAU was disabled",
106  "enable: number times use of the BAU was re-enabled"
107 };
108 
109 static int __init
110 setup_nobau(char *arg)
111 {
112  nobau = 1;
113  return 0;
114 }
115 early_param("nobau", setup_nobau);
116 
117 /* base pnode in this partition */
118 static int uv_base_pnode __read_mostly;
119 
120 static DEFINE_PER_CPU(struct ptc_stats, ptcstats);
121 static DEFINE_PER_CPU(struct bau_control, bau_control);
122 static DEFINE_PER_CPU(cpumask_var_t, uv_flush_tlb_mask);
123 
124 static void
125 set_bau_on(void)
126 {
127  int cpu;
128  struct bau_control *bcp;
129 
130  if (nobau_perm) {
131  pr_info("BAU not initialized; cannot be turned on\n");
132  return;
133  }
134  nobau = 0;
135  for_each_present_cpu(cpu) {
136  bcp = &per_cpu(bau_control, cpu);
137  bcp->nobau = 0;
138  }
139  pr_info("BAU turned on\n");
140  return;
141 }
142 
143 static void
144 set_bau_off(void)
145 {
146  int cpu;
147  struct bau_control *bcp;
148 
149  nobau = 1;
150  for_each_present_cpu(cpu) {
151  bcp = &per_cpu(bau_control, cpu);
152  bcp->nobau = 1;
153  }
154  pr_info("BAU turned off\n");
155  return;
156 }
157 
158 /*
159  * Determine the first node on a uvhub. 'Nodes' are used for kernel
160  * memory allocation.
161  */
162 static int __init uvhub_to_first_node(int uvhub)
163 {
164  int node, b;
165 
166  for_each_online_node(node) {
167  b = uv_node_to_blade_id(node);
168  if (uvhub == b)
169  return node;
170  }
171  return -1;
172 }
173 
174 /*
175  * Determine the apicid of the first cpu on a uvhub.
176  */
177 static int __init uvhub_to_first_apicid(int uvhub)
178 {
179  int cpu;
180 
182  if (uvhub == uv_cpu_to_blade_id(cpu))
183  return per_cpu(x86_cpu_to_apicid, cpu);
184  return -1;
185 }
186 
187 /*
188  * Free a software acknowledge hardware resource by clearing its Pending
189  * bit. This will return a reply to the sender.
190  * If the message has timed out, a reply has already been sent by the
191  * hardware but the resource has not been released. In that case our
192  * clear of the Timeout bit (as well) will free the resource. No reply will
193  * be sent (the hardware will only do one reply per message).
194  */
195 static void reply_to_message(struct msg_desc *mdp, struct bau_control *bcp,
196  int do_acknowledge)
197 {
198  unsigned long dw;
199  struct bau_pq_entry *msg;
200 
201  msg = mdp->msg;
202  if (!msg->canceled && do_acknowledge) {
203  dw = (msg->swack_vec << UV_SW_ACK_NPENDING) | msg->swack_vec;
204  write_mmr_sw_ack(dw);
205  }
206  msg->replied_to = 1;
207  msg->swack_vec = 0;
208 }
209 
210 /*
211  * Process the receipt of a RETRY message
212  */
213 static void bau_process_retry_msg(struct msg_desc *mdp,
214  struct bau_control *bcp)
215 {
216  int i;
217  int cancel_count = 0;
218  unsigned long msg_res;
219  unsigned long mmr = 0;
220  struct bau_pq_entry *msg = mdp->msg;
221  struct bau_pq_entry *msg2;
222  struct ptc_stats *stat = bcp->statp;
223 
224  stat->d_retries++;
225  /*
226  * cancel any message from msg+1 to the retry itself
227  */
228  for (msg2 = msg+1, i = 0; i < DEST_Q_SIZE; msg2++, i++) {
229  if (msg2 > mdp->queue_last)
230  msg2 = mdp->queue_first;
231  if (msg2 == msg)
232  break;
233 
234  /* same conditions for cancellation as do_reset */
235  if ((msg2->replied_to == 0) && (msg2->canceled == 0) &&
236  (msg2->swack_vec) && ((msg2->swack_vec &
237  msg->swack_vec) == 0) &&
238  (msg2->sending_cpu == msg->sending_cpu) &&
239  (msg2->msg_type != MSG_NOOP)) {
240  mmr = read_mmr_sw_ack();
241  msg_res = msg2->swack_vec;
242  /*
243  * This is a message retry; clear the resources held
244  * by the previous message only if they timed out.
245  * If it has not timed out we have an unexpected
246  * situation to report.
247  */
248  if (mmr & (msg_res << UV_SW_ACK_NPENDING)) {
249  unsigned long mr;
250  /*
251  * Is the resource timed out?
252  * Make everyone ignore the cancelled message.
253  */
254  msg2->canceled = 1;
255  stat->d_canceled++;
256  cancel_count++;
257  mr = (msg_res << UV_SW_ACK_NPENDING) | msg_res;
258  write_mmr_sw_ack(mr);
259  }
260  }
261  }
262  if (!cancel_count)
263  stat->d_nocanceled++;
264 }
265 
266 /*
267  * Do all the things a cpu should do for a TLB shootdown message.
268  * Other cpu's may come here at the same time for this message.
269  */
270 static void bau_process_message(struct msg_desc *mdp, struct bau_control *bcp,
271  int do_acknowledge)
272 {
273  short socket_ack_count = 0;
274  short *sp;
275  struct atomic_short *asp;
276  struct ptc_stats *stat = bcp->statp;
277  struct bau_pq_entry *msg = mdp->msg;
278  struct bau_control *smaster = bcp->socket_master;
279 
280  /*
281  * This must be a normal message, or retry of a normal message
282  */
283  if (msg->address == TLB_FLUSH_ALL) {
284  local_flush_tlb();
285  stat->d_alltlb++;
286  } else {
287  __flush_tlb_one(msg->address);
288  stat->d_onetlb++;
289  }
290  stat->d_requestee++;
291 
292  /*
293  * One cpu on each uvhub has the additional job on a RETRY
294  * of releasing the resource held by the message that is
295  * being retried. That message is identified by sending
296  * cpu number.
297  */
298  if (msg->msg_type == MSG_RETRY && bcp == bcp->uvhub_master)
299  bau_process_retry_msg(mdp, bcp);
300 
301  /*
302  * This is a swack message, so we have to reply to it.
303  * Count each responding cpu on the socket. This avoids
304  * pinging the count's cache line back and forth between
305  * the sockets.
306  */
307  sp = &smaster->socket_acknowledge_count[mdp->msg_slot];
308  asp = (struct atomic_short *)sp;
309  socket_ack_count = atom_asr(1, asp);
310  if (socket_ack_count == bcp->cpus_in_socket) {
311  int msg_ack_count;
312  /*
313  * Both sockets dump their completed count total into
314  * the message's count.
315  */
316  *sp = 0;
317  asp = (struct atomic_short *)&msg->acknowledge_count;
318  msg_ack_count = atom_asr(socket_ack_count, asp);
319 
320  if (msg_ack_count == bcp->cpus_in_uvhub) {
321  /*
322  * All cpus in uvhub saw it; reply
323  * (unless we are in the UV2 workaround)
324  */
325  reply_to_message(mdp, bcp, do_acknowledge);
326  }
327  }
328 
329  return;
330 }
331 
332 /*
333  * Determine the first cpu on a pnode.
334  */
335 static int pnode_to_first_cpu(int pnode, struct bau_control *smaster)
336 {
337  int cpu;
338  struct hub_and_pnode *hpp;
339 
340  for_each_present_cpu(cpu) {
341  hpp = &smaster->thp[cpu];
342  if (pnode == hpp->pnode)
343  return cpu;
344  }
345  return -1;
346 }
347 
348 /*
349  * Last resort when we get a large number of destination timeouts is
350  * to clear resources held by a given cpu.
351  * Do this with IPI so that all messages in the BAU message queue
352  * can be identified by their nonzero swack_vec field.
353  *
354  * This is entered for a single cpu on the uvhub.
355  * The sender want's this uvhub to free a specific message's
356  * swack resources.
357  */
358 static void do_reset(void *ptr)
359 {
360  int i;
361  struct bau_control *bcp = &per_cpu(bau_control, smp_processor_id());
362  struct reset_args *rap = (struct reset_args *)ptr;
363  struct bau_pq_entry *msg;
364  struct ptc_stats *stat = bcp->statp;
365 
366  stat->d_resets++;
367  /*
368  * We're looking for the given sender, and
369  * will free its swack resource.
370  * If all cpu's finally responded after the timeout, its
371  * message 'replied_to' was set.
372  */
373  for (msg = bcp->queue_first, i = 0; i < DEST_Q_SIZE; msg++, i++) {
374  unsigned long msg_res;
375  /* do_reset: same conditions for cancellation as
376  bau_process_retry_msg() */
377  if ((msg->replied_to == 0) &&
378  (msg->canceled == 0) &&
379  (msg->sending_cpu == rap->sender) &&
380  (msg->swack_vec) &&
381  (msg->msg_type != MSG_NOOP)) {
382  unsigned long mmr;
383  unsigned long mr;
384  /*
385  * make everyone else ignore this message
386  */
387  msg->canceled = 1;
388  /*
389  * only reset the resource if it is still pending
390  */
391  mmr = read_mmr_sw_ack();
392  msg_res = msg->swack_vec;
393  mr = (msg_res << UV_SW_ACK_NPENDING) | msg_res;
394  if (mmr & msg_res) {
395  stat->d_rcanceled++;
396  write_mmr_sw_ack(mr);
397  }
398  }
399  }
400  return;
401 }
402 
403 /*
404  * Use IPI to get all target uvhubs to release resources held by
405  * a given sending cpu number.
406  */
407 static void reset_with_ipi(struct pnmask *distribution, struct bau_control *bcp)
408 {
409  int pnode;
410  int apnode;
411  int maskbits;
412  int sender = bcp->cpu;
413  cpumask_t *mask = bcp->uvhub_master->cpumask;
414  struct bau_control *smaster = bcp->socket_master;
415  struct reset_args reset_args;
416 
418  cpus_clear(*mask);
419  /* find a single cpu for each uvhub in this distribution mask */
420  maskbits = sizeof(struct pnmask) * BITSPERBYTE;
421  /* each bit is a pnode relative to the partition base pnode */
422  for (pnode = 0; pnode < maskbits; pnode++) {
423  int cpu;
424  if (!bau_uvhub_isset(pnode, distribution))
425  continue;
426  apnode = pnode + bcp->partition_base_pnode;
427  cpu = pnode_to_first_cpu(apnode, smaster);
428  cpu_set(cpu, *mask);
429  }
430 
431  /* IPI all cpus; preemption is already disabled */
432  smp_call_function_many(mask, do_reset, (void *)&reset_args, 1);
433  return;
434 }
435 
436 static inline unsigned long cycles_2_us(unsigned long long cyc)
437 {
438  unsigned long long ns;
439  unsigned long us;
440  int cpu = smp_processor_id();
441 
442  ns = (cyc * per_cpu(cyc2ns, cpu)) >> CYC2NS_SCALE_FACTOR;
443  us = ns / 1000;
444  return us;
445 }
446 
447 /*
448  * wait for all cpus on this hub to finish their sends and go quiet
449  * leaves uvhub_quiesce set so that no new broadcasts are started by
450  * bau_flush_send_and_wait()
451  */
452 static inline void quiesce_local_uvhub(struct bau_control *hmaster)
453 {
454  atom_asr(1, (struct atomic_short *)&hmaster->uvhub_quiesce);
455 }
456 
457 /*
458  * mark this quiet-requestor as done
459  */
460 static inline void end_uvhub_quiesce(struct bau_control *hmaster)
461 {
462  atom_asr(-1, (struct atomic_short *)&hmaster->uvhub_quiesce);
463 }
464 
465 static unsigned long uv1_read_status(unsigned long mmr_offset, int right_shift)
466 {
467  unsigned long descriptor_status;
468 
469  descriptor_status = uv_read_local_mmr(mmr_offset);
470  descriptor_status >>= right_shift;
471  descriptor_status &= UV_ACT_STATUS_MASK;
472  return descriptor_status;
473 }
474 
475 /*
476  * Wait for completion of a broadcast software ack message
477  * return COMPLETE, RETRY(PLUGGED or TIMEOUT) or GIVEUP
478  */
479 static int uv1_wait_completion(struct bau_desc *bau_desc,
480  unsigned long mmr_offset, int right_shift,
481  struct bau_control *bcp, long try)
482 {
483  unsigned long descriptor_status;
484  cycles_t ttm;
485  struct ptc_stats *stat = bcp->statp;
486 
487  descriptor_status = uv1_read_status(mmr_offset, right_shift);
488  /* spin on the status MMR, waiting for it to go idle */
489  while ((descriptor_status != DS_IDLE)) {
490  /*
491  * Our software ack messages may be blocked because
492  * there are no swack resources available. As long
493  * as none of them has timed out hardware will NACK
494  * our message and its state will stay IDLE.
495  */
496  if (descriptor_status == DS_SOURCE_TIMEOUT) {
497  stat->s_stimeout++;
498  return FLUSH_GIVEUP;
499  } else if (descriptor_status == DS_DESTINATION_TIMEOUT) {
500  stat->s_dtimeout++;
501  ttm = get_cycles();
502 
503  /*
504  * Our retries may be blocked by all destination
505  * swack resources being consumed, and a timeout
506  * pending. In that case hardware returns the
507  * ERROR that looks like a destination timeout.
508  */
509  if (cycles_2_us(ttm - bcp->send_message) < timeout_us) {
510  bcp->conseccompletes = 0;
511  return FLUSH_RETRY_PLUGGED;
512  }
513 
514  bcp->conseccompletes = 0;
515  return FLUSH_RETRY_TIMEOUT;
516  } else {
517  /*
518  * descriptor_status is still BUSY
519  */
520  cpu_relax();
521  }
522  descriptor_status = uv1_read_status(mmr_offset, right_shift);
523  }
524  bcp->conseccompletes++;
525  return FLUSH_COMPLETE;
526 }
527 
528 /*
529  * UV2 could have an extra bit of status in the ACTIVATION_STATUS_2 register.
530  * But not currently used.
531  */
532 static unsigned long uv2_read_status(unsigned long offset, int rshft, int desc)
533 {
534  unsigned long descriptor_status;
535 
536  descriptor_status =
537  ((read_lmmr(offset) >> rshft) & UV_ACT_STATUS_MASK) << 1;
538  return descriptor_status;
539 }
540 
541 /*
542  * Return whether the status of the descriptor that is normally used for this
543  * cpu (the one indexed by its hub-relative cpu number) is busy.
544  * The status of the original 32 descriptors is always reflected in the 64
545  * bits of UVH_LB_BAU_SB_ACTIVATION_STATUS_0.
546  * The bit provided by the activation_status_2 register is irrelevant to
547  * the status if it is only being tested for busy or not busy.
548  */
549 int normal_busy(struct bau_control *bcp)
550 {
551  int cpu = bcp->uvhub_cpu;
552  int mmr_offset;
553  int right_shift;
554 
556  right_shift = cpu * UV_ACT_STATUS_SIZE;
557  return (((((read_lmmr(mmr_offset) >> right_shift) &
559 }
560 
561 /*
562  * Entered when a bau descriptor has gone into a permanent busy wait because
563  * of a hardware bug.
564  * Workaround the bug.
565  */
566 int handle_uv2_busy(struct bau_control *bcp)
567 {
568  struct ptc_stats *stat = bcp->statp;
569 
570  stat->s_uv2_wars++;
571  bcp->busy = 1;
572  return FLUSH_GIVEUP;
573 }
574 
575 static int uv2_wait_completion(struct bau_desc *bau_desc,
576  unsigned long mmr_offset, int right_shift,
577  struct bau_control *bcp, long try)
578 {
579  unsigned long descriptor_stat;
580  cycles_t ttm;
581  int desc = bcp->uvhub_cpu;
582  long busy_reps = 0;
583  struct ptc_stats *stat = bcp->statp;
584 
585  descriptor_stat = uv2_read_status(mmr_offset, right_shift, desc);
586 
587  /* spin on the status MMR, waiting for it to go idle */
588  while (descriptor_stat != UV2H_DESC_IDLE) {
589  if ((descriptor_stat == UV2H_DESC_SOURCE_TIMEOUT)) {
590  /*
591  * A h/w bug on the destination side may
592  * have prevented the message being marked
593  * pending, thus it doesn't get replied to
594  * and gets continually nacked until it times
595  * out with a SOURCE_TIMEOUT.
596  */
597  stat->s_stimeout++;
598  return FLUSH_GIVEUP;
599  } else if (descriptor_stat == UV2H_DESC_DEST_TIMEOUT) {
600  ttm = get_cycles();
601 
602  /*
603  * Our retries may be blocked by all destination
604  * swack resources being consumed, and a timeout
605  * pending. In that case hardware returns the
606  * ERROR that looks like a destination timeout.
607  * Without using the extended status we have to
608  * deduce from the short time that this was a
609  * strong nack.
610  */
611  if (cycles_2_us(ttm - bcp->send_message) < timeout_us) {
612  bcp->conseccompletes = 0;
613  stat->s_plugged++;
614  /* FLUSH_RETRY_PLUGGED causes hang on boot */
615  return FLUSH_GIVEUP;
616  }
617  stat->s_dtimeout++;
618  bcp->conseccompletes = 0;
619  /* FLUSH_RETRY_TIMEOUT causes hang on boot */
620  return FLUSH_GIVEUP;
621  } else {
622  busy_reps++;
623  if (busy_reps > 1000000) {
624  /* not to hammer on the clock */
625  busy_reps = 0;
626  ttm = get_cycles();
627  if ((ttm - bcp->send_message) >
628  bcp->timeout_interval)
629  return handle_uv2_busy(bcp);
630  }
631  /*
632  * descriptor_stat is still BUSY
633  */
634  cpu_relax();
635  }
636  descriptor_stat = uv2_read_status(mmr_offset, right_shift,
637  desc);
638  }
639  bcp->conseccompletes++;
640  return FLUSH_COMPLETE;
641 }
642 
643 /*
644  * There are 2 status registers; each and array[32] of 2 bits. Set up for
645  * which register to read and position in that register based on cpu in
646  * current hub.
647  */
648 static int wait_completion(struct bau_desc *bau_desc,
649  struct bau_control *bcp, long try)
650 {
651  int right_shift;
652  unsigned long mmr_offset;
653  int desc = bcp->uvhub_cpu;
654 
655  if (desc < UV_CPUS_PER_AS) {
657  right_shift = desc * UV_ACT_STATUS_SIZE;
658  } else {
660  right_shift = ((desc - UV_CPUS_PER_AS) * UV_ACT_STATUS_SIZE);
661  }
662 
663  if (bcp->uvhub_version == 1)
664  return uv1_wait_completion(bau_desc, mmr_offset, right_shift,
665  bcp, try);
666  else
667  return uv2_wait_completion(bau_desc, mmr_offset, right_shift,
668  bcp, try);
669 }
670 
671 static inline cycles_t sec_2_cycles(unsigned long sec)
672 {
673  unsigned long ns;
674  cycles_t cyc;
675 
676  ns = sec * 1000000000;
677  cyc = (ns << CYC2NS_SCALE_FACTOR)/(per_cpu(cyc2ns, smp_processor_id()));
678  return cyc;
679 }
680 
681 /*
682  * Our retries are blocked by all destination sw ack resources being
683  * in use, and a timeout is pending. In that case hardware immediately
684  * returns the ERROR that looks like a destination timeout.
685  */
686 static void destination_plugged(struct bau_desc *bau_desc,
687  struct bau_control *bcp,
688  struct bau_control *hmaster, struct ptc_stats *stat)
689 {
690  udelay(bcp->plugged_delay);
691  bcp->plugged_tries++;
692 
693  if (bcp->plugged_tries >= bcp->plugsb4reset) {
694  bcp->plugged_tries = 0;
695 
696  quiesce_local_uvhub(hmaster);
697 
698  spin_lock(&hmaster->queue_lock);
699  reset_with_ipi(&bau_desc->distribution, bcp);
700  spin_unlock(&hmaster->queue_lock);
701 
702  end_uvhub_quiesce(hmaster);
703 
704  bcp->ipi_attempts++;
705  stat->s_resets_plug++;
706  }
707 }
708 
709 static void destination_timeout(struct bau_desc *bau_desc,
710  struct bau_control *bcp, struct bau_control *hmaster,
711  struct ptc_stats *stat)
712 {
713  hmaster->max_concurr = 1;
714  bcp->timeout_tries++;
715  if (bcp->timeout_tries >= bcp->timeoutsb4reset) {
716  bcp->timeout_tries = 0;
717 
718  quiesce_local_uvhub(hmaster);
719 
720  spin_lock(&hmaster->queue_lock);
721  reset_with_ipi(&bau_desc->distribution, bcp);
722  spin_unlock(&hmaster->queue_lock);
723 
724  end_uvhub_quiesce(hmaster);
725 
726  bcp->ipi_attempts++;
727  stat->s_resets_timeout++;
728  }
729 }
730 
731 /*
732  * Stop all cpus on a uvhub from using the BAU for a period of time.
733  * This is reversed by check_enable.
734  */
735 static void disable_for_period(struct bau_control *bcp, struct ptc_stats *stat)
736 {
737  int tcpu;
738  struct bau_control *tbcp;
739  struct bau_control *hmaster;
740  cycles_t tm1;
741 
742  hmaster = bcp->uvhub_master;
743  spin_lock(&hmaster->disable_lock);
744  if (!bcp->baudisabled) {
745  stat->s_bau_disabled++;
746  tm1 = get_cycles();
747  for_each_present_cpu(tcpu) {
748  tbcp = &per_cpu(bau_control, tcpu);
749  if (tbcp->uvhub_master == hmaster) {
750  tbcp->baudisabled = 1;
751  tbcp->set_bau_on_time =
752  tm1 + bcp->disabled_period;
753  }
754  }
755  }
756  spin_unlock(&hmaster->disable_lock);
757 }
758 
759 static void count_max_concurr(int stat, struct bau_control *bcp,
760  struct bau_control *hmaster)
761 {
762  bcp->plugged_tries = 0;
763  bcp->timeout_tries = 0;
764  if (stat != FLUSH_COMPLETE)
765  return;
766  if (bcp->conseccompletes <= bcp->complete_threshold)
767  return;
768  if (hmaster->max_concurr >= hmaster->max_concurr_const)
769  return;
770  hmaster->max_concurr++;
771 }
772 
773 static void record_send_stats(cycles_t time1, cycles_t time2,
774  struct bau_control *bcp, struct ptc_stats *stat,
775  int completion_status, int try)
776 {
777  cycles_t elapsed;
778 
779  if (time2 > time1) {
780  elapsed = time2 - time1;
781  stat->s_time += elapsed;
782 
783  if ((completion_status == FLUSH_COMPLETE) && (try == 1)) {
784  bcp->period_requests++;
785  bcp->period_time += elapsed;
786  if ((elapsed > congested_cycles) &&
787  (bcp->period_requests > bcp->cong_reps) &&
788  ((bcp->period_time / bcp->period_requests) >
789  congested_cycles)) {
790  stat->s_congested++;
791  disable_for_period(bcp, stat);
792  }
793  }
794  } else
795  stat->s_requestor--;
796 
797  if (completion_status == FLUSH_COMPLETE && try > 1)
798  stat->s_retriesok++;
799  else if (completion_status == FLUSH_GIVEUP) {
800  stat->s_giveup++;
801  if (get_cycles() > bcp->period_end)
802  bcp->period_giveups = 0;
803  bcp->period_giveups++;
804  if (bcp->period_giveups == 1)
805  bcp->period_end = get_cycles() + bcp->disabled_period;
806  if (bcp->period_giveups > bcp->giveup_limit) {
807  disable_for_period(bcp, stat);
808  stat->s_giveuplimit++;
809  }
810  }
811 }
812 
813 /*
814  * Because of a uv1 hardware bug only a limited number of concurrent
815  * requests can be made.
816  */
817 static void uv1_throttle(struct bau_control *hmaster, struct ptc_stats *stat)
818 {
819  spinlock_t *lock = &hmaster->uvhub_lock;
820  atomic_t *v;
821 
822  v = &hmaster->active_descriptor_count;
823  if (!atomic_inc_unless_ge(lock, v, hmaster->max_concurr)) {
824  stat->s_throttles++;
825  do {
826  cpu_relax();
827  } while (!atomic_inc_unless_ge(lock, v, hmaster->max_concurr));
828  }
829 }
830 
831 /*
832  * Handle the completion status of a message send.
833  */
834 static void handle_cmplt(int completion_status, struct bau_desc *bau_desc,
835  struct bau_control *bcp, struct bau_control *hmaster,
836  struct ptc_stats *stat)
837 {
838  if (completion_status == FLUSH_RETRY_PLUGGED)
839  destination_plugged(bau_desc, bcp, hmaster, stat);
840  else if (completion_status == FLUSH_RETRY_TIMEOUT)
841  destination_timeout(bau_desc, bcp, hmaster, stat);
842 }
843 
844 /*
845  * Send a broadcast and wait for it to complete.
846  *
847  * The flush_mask contains the cpus the broadcast is to be sent to including
848  * cpus that are on the local uvhub.
849  *
850  * Returns 0 if all flushing represented in the mask was done.
851  * Returns 1 if it gives up entirely and the original cpu mask is to be
852  * returned to the kernel.
853  */
854 int uv_flush_send_and_wait(struct cpumask *flush_mask, struct bau_control *bcp,
855  struct bau_desc *bau_desc)
856 {
857  int seq_number = 0;
858  int completion_stat = 0;
859  int uv1 = 0;
860  long try = 0;
861  unsigned long index;
862  cycles_t time1;
863  cycles_t time2;
864  struct ptc_stats *stat = bcp->statp;
865  struct bau_control *hmaster = bcp->uvhub_master;
866  struct uv1_bau_msg_header *uv1_hdr = NULL;
867  struct uv2_bau_msg_header *uv2_hdr = NULL;
868 
869  if (bcp->uvhub_version == 1) {
870  uv1 = 1;
871  uv1_throttle(hmaster, stat);
872  }
873 
874  while (hmaster->uvhub_quiesce)
875  cpu_relax();
876 
877  time1 = get_cycles();
878  if (uv1)
879  uv1_hdr = &bau_desc->header.uv1_hdr;
880  else
881  uv2_hdr = &bau_desc->header.uv2_hdr;
882 
883  do {
884  if (try == 0) {
885  if (uv1)
886  uv1_hdr->msg_type = MSG_REGULAR;
887  else
888  uv2_hdr->msg_type = MSG_REGULAR;
889  seq_number = bcp->message_number++;
890  } else {
891  if (uv1)
892  uv1_hdr->msg_type = MSG_RETRY;
893  else
894  uv2_hdr->msg_type = MSG_RETRY;
895  stat->s_retry_messages++;
896  }
897 
898  if (uv1)
899  uv1_hdr->sequence = seq_number;
900  else
901  uv2_hdr->sequence = seq_number;
902  index = (1UL << AS_PUSH_SHIFT) | bcp->uvhub_cpu;
903  bcp->send_message = get_cycles();
904 
905  write_mmr_activation(index);
906 
907  try++;
908  completion_stat = wait_completion(bau_desc, bcp, try);
909 
910  handle_cmplt(completion_stat, bau_desc, bcp, hmaster, stat);
911 
912  if (bcp->ipi_attempts >= bcp->ipi_reset_limit) {
913  bcp->ipi_attempts = 0;
914  stat->s_overipilimit++;
915  completion_stat = FLUSH_GIVEUP;
916  break;
917  }
918  cpu_relax();
919  } while ((completion_stat == FLUSH_RETRY_PLUGGED) ||
920  (completion_stat == FLUSH_RETRY_TIMEOUT));
921 
922  time2 = get_cycles();
923 
924  count_max_concurr(completion_stat, bcp, hmaster);
925 
926  while (hmaster->uvhub_quiesce)
927  cpu_relax();
928 
930 
931  record_send_stats(time1, time2, bcp, stat, completion_stat, try);
932 
933  if (completion_stat == FLUSH_GIVEUP)
934  /* FLUSH_GIVEUP will fall back to using IPI's for tlb flush */
935  return 1;
936  return 0;
937 }
938 
939 /*
940  * The BAU is disabled for this uvhub. When the disabled time period has
941  * expired re-enable it.
942  * Return 0 if it is re-enabled for all cpus on this uvhub.
943  */
944 static int check_enable(struct bau_control *bcp, struct ptc_stats *stat)
945 {
946  int tcpu;
947  struct bau_control *tbcp;
948  struct bau_control *hmaster;
949 
950  hmaster = bcp->uvhub_master;
951  spin_lock(&hmaster->disable_lock);
952  if (bcp->baudisabled && (get_cycles() >= bcp->set_bau_on_time)) {
953  stat->s_bau_reenabled++;
954  for_each_present_cpu(tcpu) {
955  tbcp = &per_cpu(bau_control, tcpu);
956  if (tbcp->uvhub_master == hmaster) {
957  tbcp->baudisabled = 0;
958  tbcp->period_requests = 0;
959  tbcp->period_time = 0;
960  tbcp->period_giveups = 0;
961  }
962  }
963  spin_unlock(&hmaster->disable_lock);
964  return 0;
965  }
966  spin_unlock(&hmaster->disable_lock);
967  return -1;
968 }
969 
970 static void record_send_statistics(struct ptc_stats *stat, int locals, int hubs,
971  int remotes, struct bau_desc *bau_desc)
972 {
973  stat->s_requestor++;
974  stat->s_ntargcpu += remotes + locals;
975  stat->s_ntargremotes += remotes;
976  stat->s_ntarglocals += locals;
977 
978  /* uvhub statistics */
979  hubs = bau_uvhub_weight(&bau_desc->distribution);
980  if (locals) {
981  stat->s_ntarglocaluvhub++;
982  stat->s_ntargremoteuvhub += (hubs - 1);
983  } else
984  stat->s_ntargremoteuvhub += hubs;
985 
986  stat->s_ntarguvhub += hubs;
987 
988  if (hubs >= 16)
989  stat->s_ntarguvhub16++;
990  else if (hubs >= 8)
991  stat->s_ntarguvhub8++;
992  else if (hubs >= 4)
993  stat->s_ntarguvhub4++;
994  else if (hubs >= 2)
995  stat->s_ntarguvhub2++;
996  else
997  stat->s_ntarguvhub1++;
998 }
999 
1000 /*
1001  * Translate a cpu mask to the uvhub distribution mask in the BAU
1002  * activation descriptor.
1003  */
1004 static int set_distrib_bits(struct cpumask *flush_mask, struct bau_control *bcp,
1005  struct bau_desc *bau_desc, int *localsp, int *remotesp)
1006 {
1007  int cpu;
1008  int pnode;
1009  int cnt = 0;
1010  struct hub_and_pnode *hpp;
1011 
1012  for_each_cpu(cpu, flush_mask) {
1013  /*
1014  * The distribution vector is a bit map of pnodes, relative
1015  * to the partition base pnode (and the partition base nasid
1016  * in the header).
1017  * Translate cpu to pnode and hub using a local memory array.
1018  */
1019  hpp = &bcp->socket_master->thp[cpu];
1020  pnode = hpp->pnode - bcp->partition_base_pnode;
1021  bau_uvhub_set(pnode, &bau_desc->distribution);
1022  cnt++;
1023  if (hpp->uvhub == bcp->uvhub)
1024  (*localsp)++;
1025  else
1026  (*remotesp)++;
1027  }
1028  if (!cnt)
1029  return 1;
1030  return 0;
1031 }
1032 
1033 /*
1034  * globally purge translation cache of a virtual address or all TLB's
1035  * @cpumask: mask of all cpu's in which the address is to be removed
1036  * @mm: mm_struct containing virtual address range
1037  * @va: virtual address to be removed (or TLB_FLUSH_ALL for all TLB's on cpu)
1038  * @cpu: the current cpu
1039  *
1040  * This is the entry point for initiating any UV global TLB shootdown.
1041  *
1042  * Purges the translation caches of all specified processors of the given
1043  * virtual address, or purges all TLB's on specified processors.
1044  *
1045  * The caller has derived the cpumask from the mm_struct. This function
1046  * is called only if there are bits set in the mask. (e.g. flush_tlb_page())
1047  *
1048  * The cpumask is converted into a uvhubmask of the uvhubs containing
1049  * those cpus.
1050  *
1051  * Note that this function should be called with preemption disabled.
1052  *
1053  * Returns NULL if all remote flushing was done.
1054  * Returns pointer to cpumask if some remote flushing remains to be
1055  * done. The returned pointer is valid till preemption is re-enabled.
1056  */
1057 const struct cpumask *uv_flush_tlb_others(const struct cpumask *cpumask,
1058  struct mm_struct *mm, unsigned long start,
1059  unsigned end, unsigned int cpu)
1060 {
1061  int locals = 0;
1062  int remotes = 0;
1063  int hubs = 0;
1064  struct bau_desc *bau_desc;
1065  struct cpumask *flush_mask;
1066  struct ptc_stats *stat;
1067  struct bau_control *bcp;
1068  unsigned long descriptor_status;
1069  unsigned long status;
1070 
1071  bcp = &per_cpu(bau_control, cpu);
1072  stat = bcp->statp;
1073  stat->s_enters++;
1074 
1075  if (bcp->nobau)
1076  return cpumask;
1077 
1078  if (bcp->busy) {
1079  descriptor_status =
1081  status = ((descriptor_status >> (bcp->uvhub_cpu *
1083  if (status == UV2H_DESC_BUSY)
1084  return cpumask;
1085  bcp->busy = 0;
1086  }
1087 
1088  /* bau was disabled due to slow response */
1089  if (bcp->baudisabled) {
1090  if (check_enable(bcp, stat)) {
1091  stat->s_ipifordisabled++;
1092  return cpumask;
1093  }
1094  }
1095 
1096  /*
1097  * Each sending cpu has a per-cpu mask which it fills from the caller's
1098  * cpu mask. All cpus are converted to uvhubs and copied to the
1099  * activation descriptor.
1100  */
1101  flush_mask = (struct cpumask *)per_cpu(uv_flush_tlb_mask, cpu);
1102  /* don't actually do a shootdown of the local cpu */
1103  cpumask_andnot(flush_mask, cpumask, cpumask_of(cpu));
1104 
1105  if (cpu_isset(cpu, *cpumask))
1106  stat->s_ntargself++;
1107 
1108  bau_desc = bcp->descriptor_base;
1109  bau_desc += (ITEMS_PER_DESC * bcp->uvhub_cpu);
1110  bau_uvhubs_clear(&bau_desc->distribution, UV_DISTRIBUTION_SIZE);
1111  if (set_distrib_bits(flush_mask, bcp, bau_desc, &locals, &remotes))
1112  return NULL;
1113 
1114  record_send_statistics(stat, locals, hubs, remotes, bau_desc);
1115 
1116  bau_desc->payload.address = start;
1117  bau_desc->payload.sending_cpu = cpu;
1118  /*
1119  * uv_flush_send_and_wait returns 0 if all cpu's were messaged,
1120  * or 1 if it gave up and the original cpumask should be returned.
1121  */
1122  if (!uv_flush_send_and_wait(flush_mask, bcp, bau_desc))
1123  return NULL;
1124  else
1125  return cpumask;
1126 }
1127 
1128 /*
1129  * Search the message queue for any 'other' unprocessed message with the
1130  * same software acknowledge resource bit vector as the 'msg' message.
1131  */
1133  struct bau_control *bcp)
1134 {
1135  struct bau_pq_entry *msg_next = msg + 1;
1136  unsigned char swack_vec = msg->swack_vec;
1137 
1138  if (msg_next > bcp->queue_last)
1139  msg_next = bcp->queue_first;
1140  while (msg_next != msg) {
1141  if ((msg_next->canceled == 0) && (msg_next->replied_to == 0) &&
1142  (msg_next->swack_vec == swack_vec))
1143  return msg_next;
1144  msg_next++;
1145  if (msg_next > bcp->queue_last)
1146  msg_next = bcp->queue_first;
1147  }
1148  return NULL;
1149 }
1150 
1151 /*
1152  * UV2 needs to work around a bug in which an arriving message has not
1153  * set a bit in the UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE register.
1154  * Such a message must be ignored.
1155  */
1156 void process_uv2_message(struct msg_desc *mdp, struct bau_control *bcp)
1157 {
1158  unsigned long mmr_image;
1159  unsigned char swack_vec;
1160  struct bau_pq_entry *msg = mdp->msg;
1161  struct bau_pq_entry *other_msg;
1162 
1163  mmr_image = read_mmr_sw_ack();
1164  swack_vec = msg->swack_vec;
1165 
1166  if ((swack_vec & mmr_image) == 0) {
1167  /*
1168  * This message was assigned a swack resource, but no
1169  * reserved acknowlegment is pending.
1170  * The bug has prevented this message from setting the MMR.
1171  */
1172  /*
1173  * Some message has set the MMR 'pending' bit; it might have
1174  * been another message. Look for that message.
1175  */
1176  other_msg = find_another_by_swack(msg, bcp);
1177  if (other_msg) {
1178  /*
1179  * There is another. Process this one but do not
1180  * ack it.
1181  */
1182  bau_process_message(mdp, bcp, 0);
1183  /*
1184  * Let the natural processing of that other message
1185  * acknowledge it. Don't get the processing of sw_ack's
1186  * out of order.
1187  */
1188  return;
1189  }
1190  }
1191 
1192  /*
1193  * Either the MMR shows this one pending a reply or there is no
1194  * other message using this sw_ack, so it is safe to acknowledge it.
1195  */
1196  bau_process_message(mdp, bcp, 1);
1197 
1198  return;
1199 }
1200 
1201 /*
1202  * The BAU message interrupt comes here. (registered by set_intr_gate)
1203  * See entry_64.S
1204  *
1205  * We received a broadcast assist message.
1206  *
1207  * Interrupts are disabled; this interrupt could represent
1208  * the receipt of several messages.
1209  *
1210  * All cores/threads on this hub get this interrupt.
1211  * The last one to see it does the software ack.
1212  * (the resource will not be freed until noninterruptable cpus see this
1213  * interrupt; hardware may timeout the s/w ack and reply ERROR)
1214  */
1216 {
1217  int count = 0;
1218  cycles_t time_start;
1219  struct bau_pq_entry *msg;
1220  struct bau_control *bcp;
1221  struct ptc_stats *stat;
1222  struct msg_desc msgdesc;
1223 
1224  ack_APIC_irq();
1225  time_start = get_cycles();
1226 
1228  stat = bcp->statp;
1229 
1230  msgdesc.queue_first = bcp->queue_first;
1231  msgdesc.queue_last = bcp->queue_last;
1232 
1233  msg = bcp->bau_msg_head;
1234  while (msg->swack_vec) {
1235  count++;
1236 
1237  msgdesc.msg_slot = msg - msgdesc.queue_first;
1238  msgdesc.msg = msg;
1239  if (bcp->uvhub_version == 2)
1240  process_uv2_message(&msgdesc, bcp);
1241  else
1242  bau_process_message(&msgdesc, bcp, 1);
1243 
1244  msg++;
1245  if (msg > msgdesc.queue_last)
1246  msg = msgdesc.queue_first;
1247  bcp->bau_msg_head = msg;
1248  }
1249  stat->d_time += (get_cycles() - time_start);
1250  if (!count)
1251  stat->d_nomsg++;
1252  else if (count > 1)
1253  stat->d_multmsg++;
1254 }
1255 
1256 /*
1257  * Each target uvhub (i.e. a uvhub that has cpu's) needs to have
1258  * shootdown message timeouts enabled. The timeout does not cause
1259  * an interrupt, but causes an error message to be returned to
1260  * the sender.
1261  */
1262 static void __init enable_timeouts(void)
1263 {
1264  int uvhub;
1265  int nuvhubs;
1266  int pnode;
1267  unsigned long mmr_image;
1268 
1269  nuvhubs = uv_num_possible_blades();
1270 
1271  for (uvhub = 0; uvhub < nuvhubs; uvhub++) {
1272  if (!uv_blade_nr_possible_cpus(uvhub))
1273  continue;
1274 
1275  pnode = uv_blade_to_pnode(uvhub);
1276  mmr_image = read_mmr_misc_control(pnode);
1277  /*
1278  * Set the timeout period and then lock it in, in three
1279  * steps; captures and locks in the period.
1280  *
1281  * To program the period, the SOFT_ACK_MODE must be off.
1282  */
1283  mmr_image &= ~(1L << SOFTACK_MSHIFT);
1284  write_mmr_misc_control(pnode, mmr_image);
1285  /*
1286  * Set the 4-bit period.
1287  */
1288  mmr_image &= ~((unsigned long)0xf << SOFTACK_PSHIFT);
1289  mmr_image |= (SOFTACK_TIMEOUT_PERIOD << SOFTACK_PSHIFT);
1290  write_mmr_misc_control(pnode, mmr_image);
1291  /*
1292  * UV1:
1293  * Subsequent reversals of the timebase bit (3) cause an
1294  * immediate timeout of one or all INTD resources as
1295  * indicated in bits 2:0 (7 causes all of them to timeout).
1296  */
1297  mmr_image |= (1L << SOFTACK_MSHIFT);
1298  if (is_uv2_hub()) {
1299  /* hw bug workaround; do not use extended status */
1300  mmr_image &= ~(1L << UV2_EXT_SHFT);
1301  }
1302  write_mmr_misc_control(pnode, mmr_image);
1303  }
1304 }
1305 
1306 static void *ptc_seq_start(struct seq_file *file, loff_t *offset)
1307 {
1308  if (*offset < num_possible_cpus())
1309  return offset;
1310  return NULL;
1311 }
1312 
1313 static void *ptc_seq_next(struct seq_file *file, void *data, loff_t *offset)
1314 {
1315  (*offset)++;
1316  if (*offset < num_possible_cpus())
1317  return offset;
1318  return NULL;
1319 }
1320 
1321 static void ptc_seq_stop(struct seq_file *file, void *data)
1322 {
1323 }
1324 
1325 static inline unsigned long long usec_2_cycles(unsigned long microsec)
1326 {
1327  unsigned long ns;
1328  unsigned long long cyc;
1329 
1330  ns = microsec * 1000;
1331  cyc = (ns << CYC2NS_SCALE_FACTOR)/(per_cpu(cyc2ns, smp_processor_id()));
1332  return cyc;
1333 }
1334 
1335 /*
1336  * Display the statistics thru /proc/sgi_uv/ptc_statistics
1337  * 'data' points to the cpu number
1338  * Note: see the descriptions in stat_description[].
1339  */
1340 static int ptc_seq_show(struct seq_file *file, void *data)
1341 {
1342  struct ptc_stats *stat;
1343  struct bau_control *bcp;
1344  int cpu;
1345 
1346  cpu = *(loff_t *)data;
1347  if (!cpu) {
1348  seq_printf(file,
1349  "# cpu bauoff sent stime self locals remotes ncpus localhub ");
1350  seq_printf(file,
1351  "remotehub numuvhubs numuvhubs16 numuvhubs8 ");
1352  seq_printf(file,
1353  "numuvhubs4 numuvhubs2 numuvhubs1 dto snacks retries ");
1354  seq_printf(file,
1355  "rok resetp resett giveup sto bz throt disable ");
1356  seq_printf(file,
1357  "enable wars warshw warwaits enters ipidis plugged ");
1358  seq_printf(file,
1359  "ipiover glim cong swack recv rtime all one mult ");
1360  seq_printf(file,
1361  "none retry canc nocan reset rcan\n");
1362  }
1363  if (cpu < num_possible_cpus() && cpu_online(cpu)) {
1364  bcp = &per_cpu(bau_control, cpu);
1365  stat = bcp->statp;
1366  /* source side statistics */
1367  seq_printf(file,
1368  "cpu %d %d %ld %ld %ld %ld %ld %ld %ld %ld %ld %ld ",
1369  cpu, bcp->nobau, stat->s_requestor,
1370  cycles_2_us(stat->s_time),
1371  stat->s_ntargself, stat->s_ntarglocals,
1372  stat->s_ntargremotes, stat->s_ntargcpu,
1374  stat->s_ntarguvhub, stat->s_ntarguvhub16);
1375  seq_printf(file, "%ld %ld %ld %ld %ld %ld ",
1376  stat->s_ntarguvhub8, stat->s_ntarguvhub4,
1377  stat->s_ntarguvhub2, stat->s_ntarguvhub1,
1378  stat->s_dtimeout, stat->s_strongnacks);
1379  seq_printf(file, "%ld %ld %ld %ld %ld %ld %ld %ld ",
1380  stat->s_retry_messages, stat->s_retriesok,
1381  stat->s_resets_plug, stat->s_resets_timeout,
1382  stat->s_giveup, stat->s_stimeout,
1383  stat->s_busy, stat->s_throttles);
1384  seq_printf(file, "%ld %ld %ld %ld %ld %ld %ld %ld %ld %ld %ld ",
1385  stat->s_bau_disabled, stat->s_bau_reenabled,
1386  stat->s_uv2_wars, stat->s_uv2_wars_hw,
1387  stat->s_uv2_war_waits, stat->s_enters,
1388  stat->s_ipifordisabled, stat->s_plugged,
1389  stat->s_overipilimit, stat->s_giveuplimit,
1390  stat->s_congested);
1391 
1392  /* destination side statistics */
1393  seq_printf(file,
1394  "%lx %ld %ld %ld %ld %ld %ld %ld %ld %ld %ld %ld\n",
1395  read_gmmr_sw_ack(uv_cpu_to_pnode(cpu)),
1396  stat->d_requestee, cycles_2_us(stat->d_time),
1397  stat->d_alltlb, stat->d_onetlb, stat->d_multmsg,
1398  stat->d_nomsg, stat->d_retries, stat->d_canceled,
1399  stat->d_nocanceled, stat->d_resets,
1400  stat->d_rcanceled);
1401  }
1402  return 0;
1403 }
1404 
1405 /*
1406  * Display the tunables thru debugfs
1407  */
1408 static ssize_t tunables_read(struct file *file, char __user *userbuf,
1409  size_t count, loff_t *ppos)
1410 {
1411  char *buf;
1412  int ret;
1413 
1414  buf = kasprintf(GFP_KERNEL, "%s %s %s\n%d %d %d %d %d %d %d %d %d %d\n",
1415  "max_concur plugged_delay plugsb4reset timeoutsb4reset",
1416  "ipi_reset_limit complete_threshold congested_response_us",
1417  "congested_reps disabled_period giveup_limit",
1420  congested_respns_us, congested_reps, disabled_period,
1421  giveup_limit);
1422 
1423  if (!buf)
1424  return -ENOMEM;
1425 
1426  ret = simple_read_from_buffer(userbuf, count, ppos, buf, strlen(buf));
1427  kfree(buf);
1428  return ret;
1429 }
1430 
1431 /*
1432  * handle a write to /proc/sgi_uv/ptc_statistics
1433  * -1: reset the statistics
1434  * 0: display meaning of the statistics
1435  */
1436 static ssize_t ptc_proc_write(struct file *file, const char __user *user,
1437  size_t count, loff_t *data)
1438 {
1439  int cpu;
1440  int i;
1441  int elements;
1442  long input_arg;
1443  char optstr[64];
1444  struct ptc_stats *stat;
1445 
1446  if (count == 0 || count > sizeof(optstr))
1447  return -EINVAL;
1448  if (copy_from_user(optstr, user, count))
1449  return -EFAULT;
1450  optstr[count - 1] = '\0';
1451 
1452  if (!strcmp(optstr, "on")) {
1453  set_bau_on();
1454  return count;
1455  } else if (!strcmp(optstr, "off")) {
1456  set_bau_off();
1457  return count;
1458  }
1459 
1460  if (strict_strtol(optstr, 10, &input_arg) < 0) {
1461  printk(KERN_DEBUG "%s is invalid\n", optstr);
1462  return -EINVAL;
1463  }
1464 
1465  if (input_arg == 0) {
1466  elements = sizeof(stat_description)/sizeof(*stat_description);
1467  printk(KERN_DEBUG "# cpu: cpu number\n");
1468  printk(KERN_DEBUG "Sender statistics:\n");
1469  for (i = 0; i < elements; i++)
1470  printk(KERN_DEBUG "%s\n", stat_description[i]);
1471  } else if (input_arg == -1) {
1472  for_each_present_cpu(cpu) {
1473  stat = &per_cpu(ptcstats, cpu);
1474  memset(stat, 0, sizeof(struct ptc_stats));
1475  }
1476  }
1477 
1478  return count;
1479 }
1480 
1481 static int local_atoi(const char *name)
1482 {
1483  int val = 0;
1484 
1485  for (;; name++) {
1486  switch (*name) {
1487  case '0' ... '9':
1488  val = 10*val+(*name-'0');
1489  break;
1490  default:
1491  return val;
1492  }
1493  }
1494 }
1495 
1496 /*
1497  * Parse the values written to /sys/kernel/debug/sgi_uv/bau_tunables.
1498  * Zero values reset them to defaults.
1499  */
1500 static int parse_tunables_write(struct bau_control *bcp, char *instr,
1501  int count)
1502 {
1503  char *p;
1504  char *q;
1505  int cnt = 0;
1506  int val;
1507  int e = sizeof(tunables) / sizeof(*tunables);
1508 
1509  p = instr + strspn(instr, WHITESPACE);
1510  q = p;
1511  for (; *p; p = q + strspn(q, WHITESPACE)) {
1512  q = p + strcspn(p, WHITESPACE);
1513  cnt++;
1514  if (q == p)
1515  break;
1516  }
1517  if (cnt != e) {
1518  printk(KERN_INFO "bau tunable error: should be %d values\n", e);
1519  return -EINVAL;
1520  }
1521 
1522  p = instr + strspn(instr, WHITESPACE);
1523  q = p;
1524  for (cnt = 0; *p; p = q + strspn(q, WHITESPACE), cnt++) {
1525  q = p + strcspn(p, WHITESPACE);
1526  val = local_atoi(p);
1527  switch (cnt) {
1528  case 0:
1529  if (val == 0) {
1530  max_concurr = MAX_BAU_CONCURRENT;
1531  max_concurr_const = MAX_BAU_CONCURRENT;
1532  continue;
1533  }
1534  if (val < 1 || val > bcp->cpus_in_uvhub) {
1536  "Error: BAU max concurrent %d is invalid\n",
1537  val);
1538  return -EINVAL;
1539  }
1540  max_concurr = val;
1541  max_concurr_const = val;
1542  continue;
1543  default:
1544  if (val == 0)
1545  *tunables[cnt].tunp = tunables[cnt].deflt;
1546  else
1547  *tunables[cnt].tunp = val;
1548  continue;
1549  }
1550  if (q == p)
1551  break;
1552  }
1553  return 0;
1554 }
1555 
1556 /*
1557  * Handle a write to debugfs. (/sys/kernel/debug/sgi_uv/bau_tunables)
1558  */
1559 static ssize_t tunables_write(struct file *file, const char __user *user,
1560  size_t count, loff_t *data)
1561 {
1562  int cpu;
1563  int ret;
1564  char instr[100];
1565  struct bau_control *bcp;
1566 
1567  if (count == 0 || count > sizeof(instr)-1)
1568  return -EINVAL;
1569  if (copy_from_user(instr, user, count))
1570  return -EFAULT;
1571 
1572  instr[count] = '\0';
1573 
1574  cpu = get_cpu();
1575  bcp = &per_cpu(bau_control, cpu);
1576  ret = parse_tunables_write(bcp, instr, count);
1577  put_cpu();
1578  if (ret)
1579  return ret;
1580 
1581  for_each_present_cpu(cpu) {
1582  bcp = &per_cpu(bau_control, cpu);
1583  bcp->max_concurr = max_concurr;
1586  bcp->plugsb4reset = plugsb4reset;
1590  bcp->cong_response_us = congested_respns_us;
1591  bcp->cong_reps = congested_reps;
1592  bcp->disabled_period = sec_2_cycles(disabled_period);
1593  bcp->giveup_limit = giveup_limit;
1594  }
1595  return count;
1596 }
1597 
1598 static const struct seq_operations uv_ptc_seq_ops = {
1599  .start = ptc_seq_start,
1600  .next = ptc_seq_next,
1601  .stop = ptc_seq_stop,
1602  .show = ptc_seq_show
1603 };
1604 
1605 static int ptc_proc_open(struct inode *inode, struct file *file)
1606 {
1607  return seq_open(file, &uv_ptc_seq_ops);
1608 }
1609 
1610 static int tunables_open(struct inode *inode, struct file *file)
1611 {
1612  return 0;
1613 }
1614 
1615 static const struct file_operations proc_uv_ptc_operations = {
1616  .open = ptc_proc_open,
1617  .read = seq_read,
1618  .write = ptc_proc_write,
1619  .llseek = seq_lseek,
1620  .release = seq_release,
1621 };
1622 
1623 static const struct file_operations tunables_fops = {
1624  .open = tunables_open,
1625  .read = tunables_read,
1626  .write = tunables_write,
1627  .llseek = default_llseek,
1628 };
1629 
1630 static int __init uv_ptc_init(void)
1631 {
1632  struct proc_dir_entry *proc_uv_ptc;
1633 
1634  if (!is_uv_system())
1635  return 0;
1636 
1637  proc_uv_ptc = proc_create(UV_PTC_BASENAME, 0444, NULL,
1638  &proc_uv_ptc_operations);
1639  if (!proc_uv_ptc) {
1640  printk(KERN_ERR "unable to create %s proc entry\n",
1641  UV_PTC_BASENAME);
1642  return -EINVAL;
1643  }
1644 
1645  tunables_dir = debugfs_create_dir(UV_BAU_TUNABLES_DIR, NULL);
1646  if (!tunables_dir) {
1647  printk(KERN_ERR "unable to create debugfs directory %s\n",
1649  return -EINVAL;
1650  }
1651  tunables_file = debugfs_create_file(UV_BAU_TUNABLES_FILE, 0600,
1652  tunables_dir, NULL, &tunables_fops);
1653  if (!tunables_file) {
1654  printk(KERN_ERR "unable to create debugfs file %s\n",
1656  return -EINVAL;
1657  }
1658  return 0;
1659 }
1660 
1661 /*
1662  * Initialize the sending side's sending buffers.
1663  */
1664 static void activation_descriptor_init(int node, int pnode, int base_pnode)
1665 {
1666  int i;
1667  int cpu;
1668  int uv1 = 0;
1669  unsigned long gpa;
1670  unsigned long m;
1671  unsigned long n;
1672  size_t dsize;
1673  struct bau_desc *bau_desc;
1674  struct bau_desc *bd2;
1675  struct uv1_bau_msg_header *uv1_hdr;
1676  struct uv2_bau_msg_header *uv2_hdr;
1677  struct bau_control *bcp;
1678 
1679  /*
1680  * each bau_desc is 64 bytes; there are 8 (ITEMS_PER_DESC)
1681  * per cpu; and one per cpu on the uvhub (ADP_SZ)
1682  */
1683  dsize = sizeof(struct bau_desc) * ADP_SZ * ITEMS_PER_DESC;
1684  bau_desc = kmalloc_node(dsize, GFP_KERNEL, node);
1685  BUG_ON(!bau_desc);
1686 
1687  gpa = uv_gpa(bau_desc);
1688  n = uv_gpa_to_gnode(gpa);
1689  m = uv_gpa_to_offset(gpa);
1690  if (is_uv1_hub())
1691  uv1 = 1;
1692 
1693  /* the 14-bit pnode */
1694  write_mmr_descriptor_base(pnode, (n << UV_DESC_PSHIFT | m));
1695  /*
1696  * Initializing all 8 (ITEMS_PER_DESC) descriptors for each
1697  * cpu even though we only use the first one; one descriptor can
1698  * describe a broadcast to 256 uv hubs.
1699  */
1700  for (i = 0, bd2 = bau_desc; i < (ADP_SZ * ITEMS_PER_DESC); i++, bd2++) {
1701  memset(bd2, 0, sizeof(struct bau_desc));
1702  if (uv1) {
1703  uv1_hdr = &bd2->header.uv1_hdr;
1704  uv1_hdr->swack_flag = 1;
1705  /*
1706  * The base_dest_nasid set in the message header
1707  * is the nasid of the first uvhub in the partition.
1708  * The bit map will indicate destination pnode numbers
1709  * relative to that base. They may not be consecutive
1710  * if nasid striding is being used.
1711  */
1712  uv1_hdr->base_dest_nasid =
1713  UV_PNODE_TO_NASID(base_pnode);
1714  uv1_hdr->dest_subnodeid = UV_LB_SUBNODEID;
1715  uv1_hdr->command = UV_NET_ENDPOINT_INTD;
1716  uv1_hdr->int_both = 1;
1717  /*
1718  * all others need to be set to zero:
1719  * fairness chaining multilevel count replied_to
1720  */
1721  } else {
1722  /*
1723  * BIOS uses legacy mode, but UV2 hardware always
1724  * uses native mode for selective broadcasts.
1725  */
1726  uv2_hdr = &bd2->header.uv2_hdr;
1727  uv2_hdr->swack_flag = 1;
1728  uv2_hdr->base_dest_nasid =
1729  UV_PNODE_TO_NASID(base_pnode);
1730  uv2_hdr->dest_subnodeid = UV_LB_SUBNODEID;
1731  uv2_hdr->command = UV_NET_ENDPOINT_INTD;
1732  }
1733  }
1734  for_each_present_cpu(cpu) {
1735  if (pnode != uv_blade_to_pnode(uv_cpu_to_blade_id(cpu)))
1736  continue;
1737  bcp = &per_cpu(bau_control, cpu);
1738  bcp->descriptor_base = bau_desc;
1739  }
1740 }
1741 
1742 /*
1743  * initialize the destination side's receiving buffers
1744  * entered for each uvhub in the partition
1745  * - node is first node (kernel memory notion) on the uvhub
1746  * - pnode is the uvhub's physical identifier
1747  */
1748 static void pq_init(int node, int pnode)
1749 {
1750  int cpu;
1751  size_t plsize;
1752  char *cp;
1753  void *vp;
1754  unsigned long pn;
1755  unsigned long first;
1756  unsigned long pn_first;
1757  unsigned long last;
1758  struct bau_pq_entry *pqp;
1759  struct bau_control *bcp;
1760 
1761  plsize = (DEST_Q_SIZE + 1) * sizeof(struct bau_pq_entry);
1762  vp = kmalloc_node(plsize, GFP_KERNEL, node);
1763  pqp = (struct bau_pq_entry *)vp;
1764  BUG_ON(!pqp);
1765 
1766  cp = (char *)pqp + 31;
1767  pqp = (struct bau_pq_entry *)(((unsigned long)cp >> 5) << 5);
1768 
1769  for_each_present_cpu(cpu) {
1770  if (pnode != uv_cpu_to_pnode(cpu))
1771  continue;
1772  /* for every cpu on this pnode: */
1773  bcp = &per_cpu(bau_control, cpu);
1774  bcp->queue_first = pqp;
1775  bcp->bau_msg_head = pqp;
1776  bcp->queue_last = pqp + (DEST_Q_SIZE - 1);
1777  }
1778  /*
1779  * need the gnode of where the memory was really allocated
1780  */
1781  pn = uv_gpa_to_gnode(uv_gpa(pqp));
1782  first = uv_physnodeaddr(pqp);
1783  pn_first = ((unsigned long)pn << UV_PAYLOADQ_PNODE_SHIFT) | first;
1784  last = uv_physnodeaddr(pqp + (DEST_Q_SIZE - 1));
1785  write_mmr_payload_first(pnode, pn_first);
1786  write_mmr_payload_tail(pnode, first);
1787  write_mmr_payload_last(pnode, last);
1788  write_gmmr_sw_ack(pnode, 0xffffUL);
1789 
1790  /* in effect, all msg_type's are set to MSG_NOOP */
1791  memset(pqp, 0, sizeof(struct bau_pq_entry) * DEST_Q_SIZE);
1792 }
1793 
1794 /*
1795  * Initialization of each UV hub's structures
1796  */
1797 static void __init init_uvhub(int uvhub, int vector, int base_pnode)
1798 {
1799  int node;
1800  int pnode;
1801  unsigned long apicid;
1802 
1803  node = uvhub_to_first_node(uvhub);
1804  pnode = uv_blade_to_pnode(uvhub);
1805 
1806  activation_descriptor_init(node, pnode, base_pnode);
1807 
1808  pq_init(node, pnode);
1809  /*
1810  * The below initialization can't be in firmware because the
1811  * messaging IRQ will be determined by the OS.
1812  */
1813  apicid = uvhub_to_first_apicid(uvhub) | uv_apicid_hibits;
1814  write_mmr_data_config(pnode, ((apicid << 32) | vector));
1815 }
1816 
1817 /*
1818  * We will set BAU_MISC_CONTROL with a timeout period.
1819  * But the BIOS has set UVH_AGING_PRESCALE_SEL and UVH_TRANSACTION_TIMEOUT.
1820  * So the destination timeout period has to be calculated from them.
1821  */
1822 static int calculate_destination_timeout(void)
1823 {
1824  unsigned long mmr_image;
1825  int mult1;
1826  int mult2;
1827  int index;
1828  int base;
1829  int ret;
1830  unsigned long ts_ns;
1831 
1832  if (is_uv1_hub()) {
1834  mmr_image = uv_read_local_mmr(UVH_AGING_PRESCALE_SEL);
1835  index = (mmr_image >> BAU_URGENCY_7_SHIFT) & BAU_URGENCY_7_MASK;
1836  mmr_image = uv_read_local_mmr(UVH_TRANSACTION_TIMEOUT);
1837  mult2 = (mmr_image >> BAU_TRANS_SHIFT) & BAU_TRANS_MASK;
1838  ts_ns = timeout_base_ns[index];
1839  ts_ns *= (mult1 * mult2);
1840  ret = ts_ns / 1000;
1841  } else {
1842  /* 4 bits 0/1 for 10/80us base, 3 bits of multiplier */
1843  mmr_image = uv_read_local_mmr(UVH_LB_BAU_MISC_CONTROL);
1844  mmr_image = (mmr_image & UV_SA_MASK) >> UV_SA_SHFT;
1845  if (mmr_image & (1L << UV2_ACK_UNITS_SHFT))
1846  base = 80;
1847  else
1848  base = 10;
1849  mult1 = mmr_image & UV2_ACK_MASK;
1850  ret = mult1 * base;
1851  }
1852  return ret;
1853 }
1854 
1855 static void __init init_per_cpu_tunables(void)
1856 {
1857  int cpu;
1858  struct bau_control *bcp;
1859 
1860  for_each_present_cpu(cpu) {
1861  bcp = &per_cpu(bau_control, cpu);
1862  bcp->baudisabled = 0;
1863  if (nobau)
1864  bcp->nobau = 1;
1865  bcp->statp = &per_cpu(ptcstats, cpu);
1866  /* time interval to catch a hardware stay-busy bug */
1867  bcp->timeout_interval = usec_2_cycles(2*timeout_us);
1868  bcp->max_concurr = max_concurr;
1871  bcp->plugsb4reset = plugsb4reset;
1875  bcp->cong_response_us = congested_respns_us;
1876  bcp->cong_reps = congested_reps;
1877  bcp->disabled_period = sec_2_cycles(disabled_period);
1878  bcp->giveup_limit = giveup_limit;
1879  spin_lock_init(&bcp->queue_lock);
1880  spin_lock_init(&bcp->uvhub_lock);
1882  }
1883 }
1884 
1885 /*
1886  * Scan all cpus to collect blade and socket summaries.
1887  */
1888 static int __init get_cpu_topology(int base_pnode,
1889  struct uvhub_desc *uvhub_descs,
1890  unsigned char *uvhub_mask)
1891 {
1892  int cpu;
1893  int pnode;
1894  int uvhub;
1895  int socket;
1896  struct bau_control *bcp;
1897  struct uvhub_desc *bdp;
1898  struct socket_desc *sdp;
1899 
1900  for_each_present_cpu(cpu) {
1901  bcp = &per_cpu(bau_control, cpu);
1902 
1903  memset(bcp, 0, sizeof(struct bau_control));
1904 
1905  pnode = uv_cpu_hub_info(cpu)->pnode;
1906  if ((pnode - base_pnode) >= UV_DISTRIBUTION_SIZE) {
1908  "cpu %d pnode %d-%d beyond %d; BAU disabled\n",
1909  cpu, pnode, base_pnode, UV_DISTRIBUTION_SIZE);
1910  return 1;
1911  }
1912 
1913  bcp->osnode = cpu_to_node(cpu);
1914  bcp->partition_base_pnode = base_pnode;
1915 
1916  uvhub = uv_cpu_hub_info(cpu)->numa_blade_id;
1917  *(uvhub_mask + (uvhub/8)) |= (1 << (uvhub%8));
1918  bdp = &uvhub_descs[uvhub];
1919 
1920  bdp->num_cpus++;
1921  bdp->uvhub = uvhub;
1922  bdp->pnode = pnode;
1923 
1924  /* kludge: 'assuming' one node per socket, and assuming that
1925  disabling a socket just leaves a gap in node numbers */
1926  socket = bcp->osnode & 1;
1927  bdp->socket_mask |= (1 << socket);
1928  sdp = &bdp->socket[socket];
1929  sdp->cpu_number[sdp->num_cpus] = cpu;
1930  sdp->num_cpus++;
1931  if (sdp->num_cpus > MAX_CPUS_PER_SOCKET) {
1932  printk(KERN_EMERG "%d cpus per socket invalid\n",
1933  sdp->num_cpus);
1934  return 1;
1935  }
1936  }
1937  return 0;
1938 }
1939 
1940 /*
1941  * Each socket is to get a local array of pnodes/hubs.
1942  */
1943 static void make_per_cpu_thp(struct bau_control *smaster)
1944 {
1945  int cpu;
1946  size_t hpsz = sizeof(struct hub_and_pnode) * num_possible_cpus();
1947 
1948  smaster->thp = kmalloc_node(hpsz, GFP_KERNEL, smaster->osnode);
1949  memset(smaster->thp, 0, hpsz);
1950  for_each_present_cpu(cpu) {
1951  smaster->thp[cpu].pnode = uv_cpu_hub_info(cpu)->pnode;
1952  smaster->thp[cpu].uvhub = uv_cpu_hub_info(cpu)->numa_blade_id;
1953  }
1954 }
1955 
1956 /*
1957  * Each uvhub is to get a local cpumask.
1958  */
1959 static void make_per_hub_cpumask(struct bau_control *hmaster)
1960 {
1961  int sz = sizeof(cpumask_t);
1962 
1963  hmaster->cpumask = kzalloc_node(sz, GFP_KERNEL, hmaster->osnode);
1964 }
1965 
1966 /*
1967  * Initialize all the per_cpu information for the cpu's on a given socket,
1968  * given what has been gathered into the socket_desc struct.
1969  * And reports the chosen hub and socket masters back to the caller.
1970  */
1971 static int scan_sock(struct socket_desc *sdp, struct uvhub_desc *bdp,
1972  struct bau_control **smasterp,
1973  struct bau_control **hmasterp)
1974 {
1975  int i;
1976  int cpu;
1977  struct bau_control *bcp;
1978 
1979  for (i = 0; i < sdp->num_cpus; i++) {
1980  cpu = sdp->cpu_number[i];
1981  bcp = &per_cpu(bau_control, cpu);
1982  bcp->cpu = cpu;
1983  if (i == 0) {
1984  *smasterp = bcp;
1985  if (!(*hmasterp))
1986  *hmasterp = bcp;
1987  }
1988  bcp->cpus_in_uvhub = bdp->num_cpus;
1989  bcp->cpus_in_socket = sdp->num_cpus;
1990  bcp->socket_master = *smasterp;
1991  bcp->uvhub = bdp->uvhub;
1992  if (is_uv1_hub())
1993  bcp->uvhub_version = 1;
1994  else if (is_uv2_hub())
1995  bcp->uvhub_version = 2;
1996  else {
1997  printk(KERN_EMERG "uvhub version not 1 or 2\n");
1998  return 1;
1999  }
2000  bcp->uvhub_master = *hmasterp;
2001  bcp->uvhub_cpu = uv_cpu_hub_info(cpu)->blade_processor_id;
2002  if (bcp->uvhub_cpu >= MAX_CPUS_PER_UVHUB) {
2003  printk(KERN_EMERG "%d cpus per uvhub invalid\n",
2004  bcp->uvhub_cpu);
2005  return 1;
2006  }
2007  }
2008  return 0;
2009 }
2010 
2011 /*
2012  * Summarize the blade and socket topology into the per_cpu structures.
2013  */
2014 static int __init summarize_uvhub_sockets(int nuvhubs,
2015  struct uvhub_desc *uvhub_descs,
2016  unsigned char *uvhub_mask)
2017 {
2018  int socket;
2019  int uvhub;
2020  unsigned short socket_mask;
2021 
2022  for (uvhub = 0; uvhub < nuvhubs; uvhub++) {
2023  struct uvhub_desc *bdp;
2024  struct bau_control *smaster = NULL;
2025  struct bau_control *hmaster = NULL;
2026 
2027  if (!(*(uvhub_mask + (uvhub/8)) & (1 << (uvhub%8))))
2028  continue;
2029 
2030  bdp = &uvhub_descs[uvhub];
2031  socket_mask = bdp->socket_mask;
2032  socket = 0;
2033  while (socket_mask) {
2034  struct socket_desc *sdp;
2035  if ((socket_mask & 1)) {
2036  sdp = &bdp->socket[socket];
2037  if (scan_sock(sdp, bdp, &smaster, &hmaster))
2038  return 1;
2039  make_per_cpu_thp(smaster);
2040  }
2041  socket++;
2042  socket_mask = (socket_mask >> 1);
2043  }
2044  make_per_hub_cpumask(hmaster);
2045  }
2046  return 0;
2047 }
2048 
2049 /*
2050  * initialize the bau_control structure for each cpu
2051  */
2052 static int __init init_per_cpu(int nuvhubs, int base_part_pnode)
2053 {
2054  unsigned char *uvhub_mask;
2055  void *vp;
2056  struct uvhub_desc *uvhub_descs;
2057 
2058  timeout_us = calculate_destination_timeout();
2059 
2060  vp = kmalloc(nuvhubs * sizeof(struct uvhub_desc), GFP_KERNEL);
2061  uvhub_descs = (struct uvhub_desc *)vp;
2062  memset(uvhub_descs, 0, nuvhubs * sizeof(struct uvhub_desc));
2063  uvhub_mask = kzalloc((nuvhubs+7)/8, GFP_KERNEL);
2064 
2065  if (get_cpu_topology(base_part_pnode, uvhub_descs, uvhub_mask))
2066  goto fail;
2067 
2068  if (summarize_uvhub_sockets(nuvhubs, uvhub_descs, uvhub_mask))
2069  goto fail;
2070 
2071  kfree(uvhub_descs);
2072  kfree(uvhub_mask);
2073  init_per_cpu_tunables();
2074  return 0;
2075 
2076 fail:
2077  kfree(uvhub_descs);
2078  kfree(uvhub_mask);
2079  return 1;
2080 }
2081 
2082 /*
2083  * Initialization of BAU-related structures
2084  */
2085 static int __init uv_bau_init(void)
2086 {
2087  int uvhub;
2088  int pnode;
2089  int nuvhubs;
2090  int cur_cpu;
2091  int cpus;
2092  int vector;
2094 
2095  if (!is_uv_system())
2096  return 0;
2097 
2098  for_each_possible_cpu(cur_cpu) {
2099  mask = &per_cpu(uv_flush_tlb_mask, cur_cpu);
2100  zalloc_cpumask_var_node(mask, GFP_KERNEL, cpu_to_node(cur_cpu));
2101  }
2102 
2103  nuvhubs = uv_num_possible_blades();
2104  congested_cycles = usec_2_cycles(congested_respns_us);
2105 
2106  uv_base_pnode = 0x7fffffff;
2107  for (uvhub = 0; uvhub < nuvhubs; uvhub++) {
2108  cpus = uv_blade_nr_possible_cpus(uvhub);
2109  if (cpus && (uv_blade_to_pnode(uvhub) < uv_base_pnode))
2110  uv_base_pnode = uv_blade_to_pnode(uvhub);
2111  }
2112 
2113  enable_timeouts();
2114 
2115  if (init_per_cpu(nuvhubs, uv_base_pnode)) {
2116  set_bau_off();
2117  nobau_perm = 1;
2118  return 0;
2119  }
2120 
2121  vector = UV_BAU_MESSAGE;
2122  for_each_possible_blade(uvhub)
2123  if (uv_blade_nr_possible_cpus(uvhub))
2124  init_uvhub(uvhub, vector, uv_base_pnode);
2125 
2126  alloc_intr_gate(vector, uv_bau_message_intr1);
2127 
2128  for_each_possible_blade(uvhub) {
2129  if (uv_blade_nr_possible_cpus(uvhub)) {
2130  unsigned long val;
2131  unsigned long mmr;
2132  pnode = uv_blade_to_pnode(uvhub);
2133  /* INIT the bau */
2134  val = 1L << 63;
2135  write_gmmr_activation(pnode, val);
2136  mmr = 1; /* should be 1 to broadcast to both sockets */
2137  if (!is_uv1_hub())
2138  write_mmr_data_broadcast(pnode, mmr);
2139  }
2140  }
2141 
2142  return 0;
2143 }
2144 core_initcall(uv_bau_init);
2145 fs_initcall(uv_ptc_init);