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Linux Kernel
3.7.1
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#include <stdarg.h>#include <linux/types.h>#include <linux/errno.h>#include <linux/kernel.h>#include <linux/delay.h>#include <linux/adb.h>#include <linux/interrupt.h>#include <linux/init.h>#include <asm/macintosh.h>#include <asm/macints.h>#include <asm/mac_via.h>Go to the source code of this file.
Macros | |
| #define | RS 0x200 /* skip between registers */ |
| #define | B 0 /* B-side data */ |
| #define | A RS /* A-side data */ |
| #define | DIRB (2*RS) /* B-side direction (1=output) */ |
| #define | DIRA (3*RS) /* A-side direction (1=output) */ |
| #define | T1CL (4*RS) /* Timer 1 ctr/latch (low 8 bits) */ |
| #define | T1CH (5*RS) /* Timer 1 counter (high 8 bits) */ |
| #define | T1LL (6*RS) /* Timer 1 latch (low 8 bits) */ |
| #define | T1LH (7*RS) /* Timer 1 latch (high 8 bits) */ |
| #define | T2CL (8*RS) /* Timer 2 ctr/latch (low 8 bits) */ |
| #define | T2CH (9*RS) /* Timer 2 counter (high 8 bits) */ |
| #define | SR (10*RS) /* Shift register */ |
| #define | ACR (11*RS) /* Auxiliary control register */ |
| #define | PCR (12*RS) /* Peripheral control register */ |
| #define | IFR (13*RS) /* Interrupt flag register */ |
| #define | IER (14*RS) /* Interrupt enable register */ |
| #define | ANH (15*RS) /* A-side data, no handshake */ |
| #define | CTLR_IRQ 0x08 /* Controller rcv status (input) */ |
| #define | ST_MASK 0x30 /* mask for selecting ADB state bits */ |
| #define | SR_CTRL 0x1c /* Shift register control bits */ |
| #define | SR_EXT 0x0c /* Shift on external clock */ |
| #define | SR_OUT 0x10 /* Shift out if 1 */ |
| #define | IER_SET 0x80 /* set bits in IER */ |
| #define | IER_CLR 0 /* clear bits in IER */ |
| #define | SR_INT 0x04 /* Shift register full/empty */ |
| #define | ST_CMD 0x00 /* ADB state: command byte */ |
| #define | ST_EVEN 0x10 /* ADB state: even data byte */ |
| #define | ST_ODD 0x20 /* ADB state: odd data byte */ |
| #define | ST_IDLE 0x30 /* ADB state: idle, nothing to send */ |
Enumerations | |
| enum | macii_state { idle, sending, reading, read_done } |
Variables | |
| struct adb_driver | via_macii_driver |
Definition at line 43 of file via-macii.c.
Definition at line 53 of file via-macii.c.
Definition at line 42 of file via-macii.c.
| #define CTLR_IRQ 0x08 /* Controller rcv status (input) */ |
Definition at line 60 of file via-macii.c.
Definition at line 56 of file via-macii.c.
| #define IER_SET 0x80 /* set bits in IER */ |
Definition at line 69 of file via-macii.c.
Definition at line 55 of file via-macii.c.
Definition at line 54 of file via-macii.c.
| #define RS 0x200 /* skip between registers */ |
Definition at line 41 of file via-macii.c.
| #define SR (10*RS) /* Shift register */ |
Definition at line 52 of file via-macii.c.
| #define SR_CTRL 0x1c /* Shift register control bits */ |
Definition at line 64 of file via-macii.c.
| #define SR_EXT 0x0c /* Shift on external clock */ |
Definition at line 65 of file via-macii.c.
| #define SR_INT 0x04 /* Shift register full/empty */ |
Definition at line 71 of file via-macii.c.
| #define SR_OUT 0x10 /* Shift out if 1 */ |
Definition at line 66 of file via-macii.c.
| #define ST_CMD 0x00 /* ADB state: command byte */ |
Definition at line 74 of file via-macii.c.
| #define ST_EVEN 0x10 /* ADB state: even data byte */ |
Definition at line 75 of file via-macii.c.
| #define ST_IDLE 0x30 /* ADB state: idle, nothing to send */ |
Definition at line 77 of file via-macii.c.
| #define ST_MASK 0x30 /* mask for selecting ADB state bits */ |
Definition at line 61 of file via-macii.c.
| #define ST_ODD 0x20 /* ADB state: odd data byte */ |
Definition at line 76 of file via-macii.c.
| enum macii_state |
Definition at line 102 of file via-macii.c.
| struct adb_driver via_macii_driver |
Definition at line 92 of file via-macii.c.
1.8.2