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Linux Kernel
3.7.1
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All Data Structures Namespaces Files Functions Variables Typedefs Enumerations Enumerator Macros Groups Pages
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Linux Kernel
3.7.1
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#include <linux/module.h>#include <linux/types.h>#include <linux/net.h>#include <linux/in.h>#include <linux/if.h>#include <linux/slab.h>#include <linux/errno.h>#include <linux/bitops.h>#include <linux/random.h>#include <asm/io.h>#include <linux/interrupt.h>#include <linux/ioport.h>#include <linux/firmware.h>#include <linux/platform_device.h>#include <linux/netdevice.h>#include <linux/if_arp.h>#include <linux/etherdevice.h>#include <linux/skbuff.h>#include <net/ax25.h>#include <linux/kernel.h>#include <linux/proc_fs.h>#include <linux/seq_file.h>#include <net/net_namespace.h>#include <asm/uaccess.h>#include <linux/init.h>#include <linux/yam.h>Go to the source code of this file.
Data Structures | |
| struct | yam_port |
| struct | yam_mcs |
Macros | |
| #define | FIRMWARE_9600 "yam/9600.bin" |
| #define | FIRMWARE_1200 "yam/1200.bin" |
| #define | YAM_9600 1 |
| #define | YAM_1200 2 |
| #define | NR_PORTS 4 |
| #define | YAM_MAGIC 0xF10A7654 |
| #define | TX_OFF 0 |
| #define | TX_HEAD 1 |
| #define | TX_DATA 2 |
| #define | TX_CRC1 3 |
| #define | TX_CRC2 4 |
| #define | TX_TAIL 5 |
| #define | YAM_MAX_FRAME 1024 |
| #define | DEFAULT_BITRATE 9600 /* bps */ |
| #define | DEFAULT_HOLDD 10 /* sec */ |
| #define | DEFAULT_TXD 300 /* ms */ |
| #define | DEFAULT_TXTAIL 10 /* ms */ |
| #define | DEFAULT_SLOT 100 /* ms */ |
| #define | DEFAULT_PERS 64 /* 0->255 */ |
| #define | RBR(iobase) (iobase+0) |
| #define | THR(iobase) (iobase+0) |
| #define | IER(iobase) (iobase+1) |
| #define | IIR(iobase) (iobase+2) |
| #define | FCR(iobase) (iobase+2) |
| #define | LCR(iobase) (iobase+3) |
| #define | MCR(iobase) (iobase+4) |
| #define | LSR(iobase) (iobase+5) |
| #define | MSR(iobase) (iobase+6) |
| #define | SCR(iobase) (iobase+7) |
| #define | DLL(iobase) (iobase+0) |
| #define | DLM(iobase) (iobase+1) |
| #define | YAM_EXTENT 8 |
| #define | IIR_NOPEND 1 |
| #define | IIR_MSR 0 |
| #define | IIR_TX 2 |
| #define | IIR_RX 4 |
| #define | IIR_LSR 6 |
| #define | IIR_TIMEOUT 12 /* Fifo mode only */ |
| #define | IIR_MASK 0x0F |
| #define | IER_RX 1 /* enable rx interrupt */ |
| #define | IER_TX 2 /* enable tx interrupt */ |
| #define | IER_LSR 4 /* enable line status interrupts */ |
| #define | IER_MSR 8 /* enable modem status interrupts */ |
| #define | MCR_DTR 0x01 /* DTR output */ |
| #define | MCR_RTS 0x02 /* RTS output */ |
| #define | MCR_OUT1 0x04 /* OUT1 output (not accessible in RS232) */ |
| #define | MCR_OUT2 0x08 /* Master Interrupt enable (must be set on PCs) */ |
| #define | MCR_LOOP 0x10 /* Loopback enable */ |
| #define | MSR_DCTS 0x01 /* Delta CTS input */ |
| #define | MSR_DDSR 0x02 /* Delta DSR */ |
| #define | MSR_DRIN 0x04 /* Delta RI */ |
| #define | MSR_DDCD 0x08 /* Delta DCD */ |
| #define | MSR_CTS 0x10 /* CTS input */ |
| #define | MSR_DSR 0x20 /* DSR input */ |
| #define | MSR_RING 0x40 /* RI input */ |
| #define | MSR_DCD 0x80 /* DCD input */ |
| #define | LSR_RXC 0x01 |
| #define | LSR_OE 0x02 |
| #define | LSR_PE 0x04 |
| #define | LSR_FE 0x08 |
| #define | LSR_BREAK 0x10 |
| #define | LSR_THRE 0x20 |
| #define | LSR_TSRE 0x40 |
| #define | LCR_DLAB 0x80 |
| #define | LCR_BREAK 0x40 |
| #define | LCR_PZERO 0x28 |
| #define | LCR_PEVEN 0x18 |
| #define | LCR_PODD 0x08 |
| #define | LCR_STOP1 0x00 |
| #define | LCR_STOP2 0x04 |
| #define | LCR_BIT5 0x00 |
| #define | LCR_BIT6 0x02 |
| #define | LCR_BIT7 0x01 |
| #define | LCR_BIT8 0x03 |
| #define | TX_RDY MSR_DCTS /* transmitter ready to send */ |
| #define | RX_DCD MSR_DCD /* carrier detect */ |
| #define | RX_FLAG MSR_RING /* hdlc flag received */ |
| #define | FPGA_DONE MSR_DSR /* FPGA is configured */ |
| #define | PTT_ON (MCR_RTS|MCR_OUT2) /* activate PTT */ |
| #define | PTT_OFF (MCR_DTR|MCR_OUT2) /* release PTT */ |
| #define | ENABLE_RXINT IER_RX /* enable uart rx interrupt during rx */ |
| #define | ENABLE_TXINT IER_MSR /* enable uart ms interrupt during tx */ |
| #define | ENABLE_RTXINT (IER_RX|IER_MSR) /* full duplex operations */ |
Enumerations | |
| enum | uart { c_uart_unknown, c_uart_8250, c_uart_16450, c_uart_16550, c_uart_16550A, c_uart_unknown, c_uart_8250, c_uart_16450, c_uart_16550, c_uart_16550A, c_uart_unknown, c_uart_8250, c_uart_16450, c_uart_16550, c_uart_16550A } |
Functions | |
| MODULE_AUTHOR ("Frederic Rible F1OAT [email protected]") | |
| MODULE_DESCRIPTION ("Yam amateur radio modem driver") | |
| MODULE_LICENSE ("GPL") | |
| MODULE_FIRMWARE (FIRMWARE_1200) | |
| MODULE_FIRMWARE (FIRMWARE_9600) | |
| module_init (yam_init_driver) | |
| module_exit (yam_cleanup_driver) | |
| #define FPGA_DONE MSR_DSR /* FPGA is configured */ |
| #define MCR_OUT1 0x04 /* OUT1 output (not accessible in RS232) */ |
| #define MCR_OUT2 0x08 /* Master Interrupt enable (must be set on PCs) */ |
| enum uart |
| MODULE_AUTHOR | ( | "Frederic Rible F1OAT [email protected]" | ) |
| MODULE_DESCRIPTION | ( | "Yam amateur radio modem driver" | ) |
| module_exit | ( | yam_cleanup_driver | ) |
| MODULE_FIRMWARE | ( | FIRMWARE_1200 | ) |
| MODULE_FIRMWARE | ( | FIRMWARE_9600 | ) |
| module_init | ( | yam_init_driver | ) |
| MODULE_LICENSE | ( | "GPL" | ) |
1.8.2