LLVM API Documentation
00001 //===-------- LegalizeTypesGeneric.cpp - Generic type legalization --------===// 00002 // 00003 // The LLVM Compiler Infrastructure 00004 // 00005 // This file is distributed under the University of Illinois Open Source 00006 // License. See LICENSE.TXT for details. 00007 // 00008 //===----------------------------------------------------------------------===// 00009 // 00010 // This file implements generic type expansion and splitting for LegalizeTypes. 00011 // The routines here perform legalization when the details of the type (such as 00012 // whether it is an integer or a float) do not matter. 00013 // Expansion is the act of changing a computation in an illegal type to be a 00014 // computation in two identical registers of a smaller type. The Lo/Hi part 00015 // is required to be stored first in memory on little/big-endian machines. 00016 // Splitting is the act of changing a computation in an illegal type to be a 00017 // computation in two not necessarily identical registers of a smaller type. 00018 // There are no requirements on how the type is represented in memory. 00019 // 00020 //===----------------------------------------------------------------------===// 00021 00022 #include "LegalizeTypes.h" 00023 #include "llvm/IR/DataLayout.h" 00024 using namespace llvm; 00025 00026 #define DEBUG_TYPE "legalize-types" 00027 00028 //===----------------------------------------------------------------------===// 00029 // Generic Result Expansion. 00030 //===----------------------------------------------------------------------===// 00031 00032 // These routines assume that the Lo/Hi part is stored first in memory on 00033 // little/big-endian machines, followed by the Hi/Lo part. This means that 00034 // they cannot be used as is on vectors, for which Lo is always stored first. 00035 void DAGTypeLegalizer::ExpandRes_MERGE_VALUES(SDNode *N, unsigned ResNo, 00036 SDValue &Lo, SDValue &Hi) { 00037 SDValue Op = DisintegrateMERGE_VALUES(N, ResNo); 00038 GetExpandedOp(Op, Lo, Hi); 00039 } 00040 00041 void DAGTypeLegalizer::ExpandRes_BITCAST(SDNode *N, SDValue &Lo, SDValue &Hi) { 00042 EVT OutVT = N->getValueType(0); 00043 EVT NOutVT = TLI.getTypeToTransformTo(*DAG.getContext(), OutVT); 00044 SDValue InOp = N->getOperand(0); 00045 EVT InVT = InOp.getValueType(); 00046 SDLoc dl(N); 00047 00048 // Handle some special cases efficiently. 00049 switch (getTypeAction(InVT)) { 00050 case TargetLowering::TypeLegal: 00051 case TargetLowering::TypePromoteInteger: 00052 break; 00053 case TargetLowering::TypeSoftenFloat: 00054 // Convert the integer operand instead. 00055 SplitInteger(GetSoftenedFloat(InOp), Lo, Hi); 00056 Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo); 00057 Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi); 00058 return; 00059 case TargetLowering::TypeExpandInteger: 00060 case TargetLowering::TypeExpandFloat: 00061 // Convert the expanded pieces of the input. 00062 GetExpandedOp(InOp, Lo, Hi); 00063 if (TLI.hasBigEndianPartOrdering(InVT) != 00064 TLI.hasBigEndianPartOrdering(OutVT)) 00065 std::swap(Lo, Hi); 00066 Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo); 00067 Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi); 00068 return; 00069 case TargetLowering::TypeSplitVector: 00070 GetSplitVector(InOp, Lo, Hi); 00071 if (TLI.hasBigEndianPartOrdering(OutVT)) 00072 std::swap(Lo, Hi); 00073 Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo); 00074 Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi); 00075 return; 00076 case TargetLowering::TypeScalarizeVector: 00077 // Convert the element instead. 00078 SplitInteger(BitConvertToInteger(GetScalarizedVector(InOp)), Lo, Hi); 00079 Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo); 00080 Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi); 00081 return; 00082 case TargetLowering::TypeWidenVector: { 00083 assert(!(InVT.getVectorNumElements() & 1) && "Unsupported BITCAST"); 00084 InOp = GetWidenedVector(InOp); 00085 EVT LoVT, HiVT; 00086 std::tie(LoVT, HiVT) = DAG.GetSplitDestVTs(InVT); 00087 std::tie(Lo, Hi) = DAG.SplitVector(InOp, dl, LoVT, HiVT); 00088 if (TLI.hasBigEndianPartOrdering(OutVT)) 00089 std::swap(Lo, Hi); 00090 Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo); 00091 Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi); 00092 return; 00093 } 00094 } 00095 00096 if (InVT.isVector() && OutVT.isInteger()) { 00097 // Handle cases like i64 = BITCAST v1i64 on x86, where the operand 00098 // is legal but the result is not. 00099 unsigned NumElems = 2; 00100 EVT ElemVT = NOutVT; 00101 EVT NVT = EVT::getVectorVT(*DAG.getContext(), ElemVT, NumElems); 00102 00103 // If <ElemVT * N> is not a legal type, try <ElemVT/2 * (N*2)>. 00104 while (!isTypeLegal(NVT)) { 00105 unsigned NewSizeInBits = ElemVT.getSizeInBits() / 2; 00106 // If the element size is smaller than byte, bail. 00107 if (NewSizeInBits < 8) 00108 break; 00109 NumElems *= 2; 00110 ElemVT = EVT::getIntegerVT(*DAG.getContext(), NewSizeInBits); 00111 NVT = EVT::getVectorVT(*DAG.getContext(), ElemVT, NumElems); 00112 } 00113 00114 if (isTypeLegal(NVT)) { 00115 SDValue CastInOp = DAG.getNode(ISD::BITCAST, dl, NVT, InOp); 00116 00117 SmallVector<SDValue, 8> Vals; 00118 for (unsigned i = 0; i < NumElems; ++i) 00119 Vals.push_back(DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, ElemVT, 00120 CastInOp, DAG.getConstant(i, 00121 TLI.getVectorIdxTy()))); 00122 00123 // Build Lo, Hi pair by pairing extracted elements if needed. 00124 unsigned Slot = 0; 00125 for (unsigned e = Vals.size(); e - Slot > 2; Slot += 2, e += 1) { 00126 // Each iteration will BUILD_PAIR two nodes and append the result until 00127 // there are only two nodes left, i.e. Lo and Hi. 00128 SDValue LHS = Vals[Slot]; 00129 SDValue RHS = Vals[Slot + 1]; 00130 00131 if (TLI.isBigEndian()) 00132 std::swap(LHS, RHS); 00133 00134 Vals.push_back(DAG.getNode(ISD::BUILD_PAIR, dl, 00135 EVT::getIntegerVT( 00136 *DAG.getContext(), 00137 LHS.getValueType().getSizeInBits() << 1), 00138 LHS, RHS)); 00139 } 00140 Lo = Vals[Slot++]; 00141 Hi = Vals[Slot++]; 00142 00143 if (TLI.isBigEndian()) 00144 std::swap(Lo, Hi); 00145 00146 return; 00147 } 00148 } 00149 00150 // Lower the bit-convert to a store/load from the stack. 00151 assert(NOutVT.isByteSized() && "Expanded type not byte sized!"); 00152 00153 // Create the stack frame object. Make sure it is aligned for both 00154 // the source and expanded destination types. 00155 unsigned Alignment = 00156 TLI.getDataLayout()->getPrefTypeAlignment(NOutVT. 00157 getTypeForEVT(*DAG.getContext())); 00158 SDValue StackPtr = DAG.CreateStackTemporary(InVT, Alignment); 00159 int SPFI = cast<FrameIndexSDNode>(StackPtr.getNode())->getIndex(); 00160 MachinePointerInfo PtrInfo = MachinePointerInfo::getFixedStack(SPFI); 00161 00162 // Emit a store to the stack slot. 00163 SDValue Store = DAG.getStore(DAG.getEntryNode(), dl, InOp, StackPtr, PtrInfo, 00164 false, false, 0); 00165 00166 // Load the first half from the stack slot. 00167 Lo = DAG.getLoad(NOutVT, dl, Store, StackPtr, PtrInfo, 00168 false, false, false, 0); 00169 00170 // Increment the pointer to the other half. 00171 unsigned IncrementSize = NOutVT.getSizeInBits() / 8; 00172 StackPtr = DAG.getNode(ISD::ADD, dl, StackPtr.getValueType(), StackPtr, 00173 DAG.getConstant(IncrementSize, 00174 StackPtr.getValueType())); 00175 00176 // Load the second half from the stack slot. 00177 Hi = DAG.getLoad(NOutVT, dl, Store, StackPtr, 00178 PtrInfo.getWithOffset(IncrementSize), false, 00179 false, false, MinAlign(Alignment, IncrementSize)); 00180 00181 // Handle endianness of the load. 00182 if (TLI.hasBigEndianPartOrdering(OutVT)) 00183 std::swap(Lo, Hi); 00184 } 00185 00186 void DAGTypeLegalizer::ExpandRes_BUILD_PAIR(SDNode *N, SDValue &Lo, 00187 SDValue &Hi) { 00188 // Return the operands. 00189 Lo = N->getOperand(0); 00190 Hi = N->getOperand(1); 00191 } 00192 00193 void DAGTypeLegalizer::ExpandRes_EXTRACT_ELEMENT(SDNode *N, SDValue &Lo, 00194 SDValue &Hi) { 00195 GetExpandedOp(N->getOperand(0), Lo, Hi); 00196 SDValue Part = cast<ConstantSDNode>(N->getOperand(1))->getZExtValue() ? 00197 Hi : Lo; 00198 00199 assert(Part.getValueType() == N->getValueType(0) && 00200 "Type twice as big as expanded type not itself expanded!"); 00201 00202 GetPairElements(Part, Lo, Hi); 00203 } 00204 00205 void DAGTypeLegalizer::ExpandRes_EXTRACT_VECTOR_ELT(SDNode *N, SDValue &Lo, 00206 SDValue &Hi) { 00207 SDValue OldVec = N->getOperand(0); 00208 unsigned OldElts = OldVec.getValueType().getVectorNumElements(); 00209 EVT OldEltVT = OldVec.getValueType().getVectorElementType(); 00210 SDLoc dl(N); 00211 00212 // Convert to a vector of the expanded element type, for example 00213 // <3 x i64> -> <6 x i32>. 00214 EVT OldVT = N->getValueType(0); 00215 EVT NewVT = TLI.getTypeToTransformTo(*DAG.getContext(), OldVT); 00216 00217 if (OldVT != OldEltVT) { 00218 // The result of EXTRACT_VECTOR_ELT may be larger than the element type of 00219 // the input vector. If so, extend the elements of the input vector to the 00220 // same bitwidth as the result before expanding. 00221 assert(OldEltVT.bitsLT(OldVT) && "Result type smaller then element type!"); 00222 EVT NVecVT = EVT::getVectorVT(*DAG.getContext(), OldVT, OldElts); 00223 OldVec = DAG.getNode(ISD::ANY_EXTEND, dl, NVecVT, N->getOperand(0)); 00224 } 00225 00226 SDValue NewVec = DAG.getNode(ISD::BITCAST, dl, 00227 EVT::getVectorVT(*DAG.getContext(), 00228 NewVT, 2*OldElts), 00229 OldVec); 00230 00231 // Extract the elements at 2 * Idx and 2 * Idx + 1 from the new vector. 00232 SDValue Idx = N->getOperand(1); 00233 00234 Idx = DAG.getNode(ISD::ADD, dl, Idx.getValueType(), Idx, Idx); 00235 Lo = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, NewVT, NewVec, Idx); 00236 00237 Idx = DAG.getNode(ISD::ADD, dl, Idx.getValueType(), Idx, 00238 DAG.getConstant(1, Idx.getValueType())); 00239 Hi = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, NewVT, NewVec, Idx); 00240 00241 if (TLI.isBigEndian()) 00242 std::swap(Lo, Hi); 00243 } 00244 00245 void DAGTypeLegalizer::ExpandRes_NormalLoad(SDNode *N, SDValue &Lo, 00246 SDValue &Hi) { 00247 assert(ISD::isNormalLoad(N) && "This routine only for normal loads!"); 00248 SDLoc dl(N); 00249 00250 LoadSDNode *LD = cast<LoadSDNode>(N); 00251 EVT ValueVT = LD->getValueType(0); 00252 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), ValueVT); 00253 SDValue Chain = LD->getChain(); 00254 SDValue Ptr = LD->getBasePtr(); 00255 unsigned Alignment = LD->getAlignment(); 00256 bool isVolatile = LD->isVolatile(); 00257 bool isNonTemporal = LD->isNonTemporal(); 00258 bool isInvariant = LD->isInvariant(); 00259 AAMDNodes AAInfo = LD->getAAInfo(); 00260 00261 assert(NVT.isByteSized() && "Expanded type not byte sized!"); 00262 00263 Lo = DAG.getLoad(NVT, dl, Chain, Ptr, LD->getPointerInfo(), 00264 isVolatile, isNonTemporal, isInvariant, Alignment, 00265 AAInfo); 00266 00267 // Increment the pointer to the other half. 00268 unsigned IncrementSize = NVT.getSizeInBits() / 8; 00269 Ptr = DAG.getNode(ISD::ADD, dl, Ptr.getValueType(), Ptr, 00270 DAG.getConstant(IncrementSize, Ptr.getValueType())); 00271 Hi = DAG.getLoad(NVT, dl, Chain, Ptr, 00272 LD->getPointerInfo().getWithOffset(IncrementSize), 00273 isVolatile, isNonTemporal, isInvariant, 00274 MinAlign(Alignment, IncrementSize), AAInfo); 00275 00276 // Build a factor node to remember that this load is independent of the 00277 // other one. 00278 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, Lo.getValue(1), 00279 Hi.getValue(1)); 00280 00281 // Handle endianness of the load. 00282 if (TLI.hasBigEndianPartOrdering(ValueVT)) 00283 std::swap(Lo, Hi); 00284 00285 // Modified the chain - switch anything that used the old chain to use 00286 // the new one. 00287 ReplaceValueWith(SDValue(N, 1), Chain); 00288 } 00289 00290 void DAGTypeLegalizer::ExpandRes_VAARG(SDNode *N, SDValue &Lo, SDValue &Hi) { 00291 EVT OVT = N->getValueType(0); 00292 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), OVT); 00293 SDValue Chain = N->getOperand(0); 00294 SDValue Ptr = N->getOperand(1); 00295 SDLoc dl(N); 00296 const unsigned Align = N->getConstantOperandVal(3); 00297 00298 Lo = DAG.getVAArg(NVT, dl, Chain, Ptr, N->getOperand(2), Align); 00299 Hi = DAG.getVAArg(NVT, dl, Lo.getValue(1), Ptr, N->getOperand(2), 0); 00300 00301 // Handle endianness of the load. 00302 if (TLI.hasBigEndianPartOrdering(OVT)) 00303 std::swap(Lo, Hi); 00304 00305 // Modified the chain - switch anything that used the old chain to use 00306 // the new one. 00307 ReplaceValueWith(SDValue(N, 1), Hi.getValue(1)); 00308 } 00309 00310 00311 //===--------------------------------------------------------------------===// 00312 // Generic Operand Expansion. 00313 //===--------------------------------------------------------------------===// 00314 00315 void DAGTypeLegalizer::IntegerToVector(SDValue Op, unsigned NumElements, 00316 SmallVectorImpl<SDValue> &Ops, 00317 EVT EltVT) { 00318 assert(Op.getValueType().isInteger()); 00319 SDLoc DL(Op); 00320 SDValue Parts[2]; 00321 00322 if (NumElements > 1) { 00323 NumElements >>= 1; 00324 SplitInteger(Op, Parts[0], Parts[1]); 00325 if (TLI.isBigEndian()) 00326 std::swap(Parts[0], Parts[1]); 00327 IntegerToVector(Parts[0], NumElements, Ops, EltVT); 00328 IntegerToVector(Parts[1], NumElements, Ops, EltVT); 00329 } else { 00330 Ops.push_back(DAG.getNode(ISD::BITCAST, DL, EltVT, Op)); 00331 } 00332 } 00333 00334 SDValue DAGTypeLegalizer::ExpandOp_BITCAST(SDNode *N) { 00335 SDLoc dl(N); 00336 if (N->getValueType(0).isVector()) { 00337 // An illegal expanding type is being converted to a legal vector type. 00338 // Make a two element vector out of the expanded parts and convert that 00339 // instead, but only if the new vector type is legal (otherwise there 00340 // is no point, and it might create expansion loops). For example, on 00341 // x86 this turns v1i64 = BITCAST i64 into v1i64 = BITCAST v2i32. 00342 // 00343 // FIXME: I'm not sure why we are first trying to split the input into 00344 // a 2 element vector, so I'm leaving it here to maintain the current 00345 // behavior. 00346 unsigned NumElts = 2; 00347 EVT OVT = N->getOperand(0).getValueType(); 00348 EVT NVT = EVT::getVectorVT(*DAG.getContext(), 00349 TLI.getTypeToTransformTo(*DAG.getContext(), OVT), 00350 NumElts); 00351 if (!isTypeLegal(NVT)) { 00352 // If we can't find a legal type by splitting the integer in half, 00353 // then we can use the node's value type. 00354 NumElts = N->getValueType(0).getVectorNumElements(); 00355 NVT = N->getValueType(0); 00356 } 00357 00358 SmallVector<SDValue, 8> Ops; 00359 IntegerToVector(N->getOperand(0), NumElts, Ops, NVT.getVectorElementType()); 00360 00361 SDValue Vec = DAG.getNode(ISD::BUILD_VECTOR, dl, NVT, 00362 makeArrayRef(Ops.data(), NumElts)); 00363 return DAG.getNode(ISD::BITCAST, dl, N->getValueType(0), Vec); 00364 } 00365 00366 // Otherwise, store to a temporary and load out again as the new type. 00367 return CreateStackStoreLoad(N->getOperand(0), N->getValueType(0)); 00368 } 00369 00370 SDValue DAGTypeLegalizer::ExpandOp_BUILD_VECTOR(SDNode *N) { 00371 // The vector type is legal but the element type needs expansion. 00372 EVT VecVT = N->getValueType(0); 00373 unsigned NumElts = VecVT.getVectorNumElements(); 00374 EVT OldVT = N->getOperand(0).getValueType(); 00375 EVT NewVT = TLI.getTypeToTransformTo(*DAG.getContext(), OldVT); 00376 SDLoc dl(N); 00377 00378 assert(OldVT == VecVT.getVectorElementType() && 00379 "BUILD_VECTOR operand type doesn't match vector element type!"); 00380 00381 // Build a vector of twice the length out of the expanded elements. 00382 // For example <3 x i64> -> <6 x i32>. 00383 std::vector<SDValue> NewElts; 00384 NewElts.reserve(NumElts*2); 00385 00386 for (unsigned i = 0; i < NumElts; ++i) { 00387 SDValue Lo, Hi; 00388 GetExpandedOp(N->getOperand(i), Lo, Hi); 00389 if (TLI.isBigEndian()) 00390 std::swap(Lo, Hi); 00391 NewElts.push_back(Lo); 00392 NewElts.push_back(Hi); 00393 } 00394 00395 SDValue NewVec = DAG.getNode(ISD::BUILD_VECTOR, dl, 00396 EVT::getVectorVT(*DAG.getContext(), 00397 NewVT, NewElts.size()), 00398 NewElts); 00399 00400 // Convert the new vector to the old vector type. 00401 return DAG.getNode(ISD::BITCAST, dl, VecVT, NewVec); 00402 } 00403 00404 SDValue DAGTypeLegalizer::ExpandOp_EXTRACT_ELEMENT(SDNode *N) { 00405 SDValue Lo, Hi; 00406 GetExpandedOp(N->getOperand(0), Lo, Hi); 00407 return cast<ConstantSDNode>(N->getOperand(1))->getZExtValue() ? Hi : Lo; 00408 } 00409 00410 SDValue DAGTypeLegalizer::ExpandOp_INSERT_VECTOR_ELT(SDNode *N) { 00411 // The vector type is legal but the element type needs expansion. 00412 EVT VecVT = N->getValueType(0); 00413 unsigned NumElts = VecVT.getVectorNumElements(); 00414 SDLoc dl(N); 00415 00416 SDValue Val = N->getOperand(1); 00417 EVT OldEVT = Val.getValueType(); 00418 EVT NewEVT = TLI.getTypeToTransformTo(*DAG.getContext(), OldEVT); 00419 00420 assert(OldEVT == VecVT.getVectorElementType() && 00421 "Inserted element type doesn't match vector element type!"); 00422 00423 // Bitconvert to a vector of twice the length with elements of the expanded 00424 // type, insert the expanded vector elements, and then convert back. 00425 EVT NewVecVT = EVT::getVectorVT(*DAG.getContext(), NewEVT, NumElts*2); 00426 SDValue NewVec = DAG.getNode(ISD::BITCAST, dl, 00427 NewVecVT, N->getOperand(0)); 00428 00429 SDValue Lo, Hi; 00430 GetExpandedOp(Val, Lo, Hi); 00431 if (TLI.isBigEndian()) 00432 std::swap(Lo, Hi); 00433 00434 SDValue Idx = N->getOperand(2); 00435 Idx = DAG.getNode(ISD::ADD, dl, Idx.getValueType(), Idx, Idx); 00436 NewVec = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, NewVecVT, NewVec, Lo, Idx); 00437 Idx = DAG.getNode(ISD::ADD, dl, 00438 Idx.getValueType(), Idx, 00439 DAG.getConstant(1, Idx.getValueType())); 00440 NewVec = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, NewVecVT, NewVec, Hi, Idx); 00441 00442 // Convert the new vector to the old vector type. 00443 return DAG.getNode(ISD::BITCAST, dl, VecVT, NewVec); 00444 } 00445 00446 SDValue DAGTypeLegalizer::ExpandOp_SCALAR_TO_VECTOR(SDNode *N) { 00447 SDLoc dl(N); 00448 EVT VT = N->getValueType(0); 00449 assert(VT.getVectorElementType() == N->getOperand(0).getValueType() && 00450 "SCALAR_TO_VECTOR operand type doesn't match vector element type!"); 00451 unsigned NumElts = VT.getVectorNumElements(); 00452 SmallVector<SDValue, 16> Ops(NumElts); 00453 Ops[0] = N->getOperand(0); 00454 SDValue UndefVal = DAG.getUNDEF(Ops[0].getValueType()); 00455 for (unsigned i = 1; i < NumElts; ++i) 00456 Ops[i] = UndefVal; 00457 return DAG.getNode(ISD::BUILD_VECTOR, dl, VT, Ops); 00458 } 00459 00460 SDValue DAGTypeLegalizer::ExpandOp_NormalStore(SDNode *N, unsigned OpNo) { 00461 assert(ISD::isNormalStore(N) && "This routine only for normal stores!"); 00462 assert(OpNo == 1 && "Can only expand the stored value so far"); 00463 SDLoc dl(N); 00464 00465 StoreSDNode *St = cast<StoreSDNode>(N); 00466 EVT ValueVT = St->getValue().getValueType(); 00467 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), ValueVT); 00468 SDValue Chain = St->getChain(); 00469 SDValue Ptr = St->getBasePtr(); 00470 unsigned Alignment = St->getAlignment(); 00471 bool isVolatile = St->isVolatile(); 00472 bool isNonTemporal = St->isNonTemporal(); 00473 AAMDNodes AAInfo = St->getAAInfo(); 00474 00475 assert(NVT.isByteSized() && "Expanded type not byte sized!"); 00476 unsigned IncrementSize = NVT.getSizeInBits() / 8; 00477 00478 SDValue Lo, Hi; 00479 GetExpandedOp(St->getValue(), Lo, Hi); 00480 00481 if (TLI.hasBigEndianPartOrdering(ValueVT)) 00482 std::swap(Lo, Hi); 00483 00484 Lo = DAG.getStore(Chain, dl, Lo, Ptr, St->getPointerInfo(), 00485 isVolatile, isNonTemporal, Alignment, AAInfo); 00486 00487 Ptr = DAG.getNode(ISD::ADD, dl, Ptr.getValueType(), Ptr, 00488 DAG.getConstant(IncrementSize, Ptr.getValueType())); 00489 Hi = DAG.getStore(Chain, dl, Hi, Ptr, 00490 St->getPointerInfo().getWithOffset(IncrementSize), 00491 isVolatile, isNonTemporal, 00492 MinAlign(Alignment, IncrementSize), AAInfo); 00493 00494 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, Lo, Hi); 00495 } 00496 00497 00498 //===--------------------------------------------------------------------===// 00499 // Generic Result Splitting. 00500 //===--------------------------------------------------------------------===// 00501 00502 // Be careful to make no assumptions about which of Lo/Hi is stored first in 00503 // memory (for vectors it is always Lo first followed by Hi in the following 00504 // bytes; for integers and floats it is Lo first if and only if the machine is 00505 // little-endian). 00506 00507 void DAGTypeLegalizer::SplitRes_MERGE_VALUES(SDNode *N, unsigned ResNo, 00508 SDValue &Lo, SDValue &Hi) { 00509 SDValue Op = DisintegrateMERGE_VALUES(N, ResNo); 00510 GetSplitOp(Op, Lo, Hi); 00511 } 00512 00513 void DAGTypeLegalizer::SplitRes_SELECT(SDNode *N, SDValue &Lo, 00514 SDValue &Hi) { 00515 SDValue LL, LH, RL, RH, CL, CH; 00516 SDLoc dl(N); 00517 GetSplitOp(N->getOperand(1), LL, LH); 00518 GetSplitOp(N->getOperand(2), RL, RH); 00519 00520 SDValue Cond = N->getOperand(0); 00521 CL = CH = Cond; 00522 if (Cond.getValueType().isVector()) { 00523 // Check if there are already splitted versions of the vector available and 00524 // use those instead of splitting the mask operand again. 00525 if (getTypeAction(Cond.getValueType()) == TargetLowering::TypeSplitVector) 00526 GetSplitVector(Cond, CL, CH); 00527 else 00528 std::tie(CL, CH) = DAG.SplitVector(Cond, dl); 00529 } 00530 00531 Lo = DAG.getNode(N->getOpcode(), dl, LL.getValueType(), CL, LL, RL); 00532 Hi = DAG.getNode(N->getOpcode(), dl, LH.getValueType(), CH, LH, RH); 00533 } 00534 00535 void DAGTypeLegalizer::SplitRes_SELECT_CC(SDNode *N, SDValue &Lo, 00536 SDValue &Hi) { 00537 SDValue LL, LH, RL, RH; 00538 SDLoc dl(N); 00539 GetSplitOp(N->getOperand(2), LL, LH); 00540 GetSplitOp(N->getOperand(3), RL, RH); 00541 00542 Lo = DAG.getNode(ISD::SELECT_CC, dl, LL.getValueType(), N->getOperand(0), 00543 N->getOperand(1), LL, RL, N->getOperand(4)); 00544 Hi = DAG.getNode(ISD::SELECT_CC, dl, LH.getValueType(), N->getOperand(0), 00545 N->getOperand(1), LH, RH, N->getOperand(4)); 00546 } 00547 00548 void DAGTypeLegalizer::SplitRes_UNDEF(SDNode *N, SDValue &Lo, SDValue &Hi) { 00549 EVT LoVT, HiVT; 00550 std::tie(LoVT, HiVT) = DAG.GetSplitDestVTs(N->getValueType(0)); 00551 Lo = DAG.getUNDEF(LoVT); 00552 Hi = DAG.getUNDEF(HiVT); 00553 }