#include <SelectionDAGNodes.h>
Detailed Description
SDNode - Represents one node in the SelectionDAG.
Definition at line 344 of file SelectionDAGNodes.h.
Member Typedef Documentation
| typedef SDUse* llvm::SDNode::op_iterator |
Definition at line 613 of file SelectionDAGNodes.h.
| typedef const EVT* llvm::SDNode::value_iterator |
Definition at line 681 of file SelectionDAGNodes.h.
Constructor & Destructor Documentation
| llvm::SDNode::SDNode | ( | unsigned | Opc, |
| unsigned | Order, | ||
| const DebugLoc | dl, | ||
| SDVTList | VTs, | ||
| ArrayRef< SDValue > | Ops | ||
| ) | [inline, protected] |
Definition at line 757 of file SelectionDAGNodes.h.
References llvm::checkForCycles(), and llvm::ArrayRef< T >::size().
| llvm::SDNode::SDNode | ( | unsigned | Opc, |
| unsigned | Order, | ||
| const DebugLoc | dl, | ||
| SDVTList | VTs | ||
| ) | [inline, protected] |
This constructor adds no operands itself; operands can be set later with InitOperands.
Definition at line 774 of file SelectionDAGNodes.h.
Member Function Documentation
| void llvm::SDNode::addUse | ( | SDUse & | U | ) | [inline] |
addUse - This method should only be used by the SDUse class.
Definition at line 749 of file SelectionDAGNodes.h.
| void SDNode::DropOperands | ( | ) | [protected] |
DropOperands - Release the operands and set this node to have zero operands.
Definition at line 5335 of file SelectionDAG.cpp.
References I, op_begin(), and op_end().
Referenced by llvm::HandleSDNode::~HandleSDNode().
| void SDNode::dump | ( | ) | const |
dump - Dump this node, for debugging.
Definition at line 340 of file SelectionDAGDumper.cpp.
Referenced by llvm::SDValue::dump(), llvm::ScheduleDAGSDNodes::dumpNode(), DumpNodes(), llvm::AMDGPUTargetLowering::LowerOperation(), llvm::DAGTypeLegalizer::run(), llvm::SelectionDAGISel::SelectCodeCommon(), and tryLowerToSLI().
| void SDNode::dump | ( | const SelectionDAG * | G | ) | const |
dump - Dump this node, for debugging. The given SelectionDAG allows target-specific nodes to be printed in human-readable form.
Definition at line 341 of file SelectionDAGDumper.cpp.
References llvm::dbgs(), and print().
| void SDNode::dumpr | ( | ) | const |
dumpr - Dump (recursively) this node and its use-def subgraph.
Definition at line 604 of file SelectionDAGDumper.cpp.
References llvm::dbgs(), and DumpNodesr().
Referenced by llvm::SDValue::dumpr().
| void SDNode::dumpr | ( | const SelectionDAG * | G | ) | const |
dumpr - Dump (recursively) this node and its use-def subgraph. The given SelectionDAG allows target-specific nodes to be printed in human-readable form.
Definition at line 609 of file SelectionDAGDumper.cpp.
References llvm::dbgs(), and DumpNodesr().
| void SDNode::dumprFull | ( | const SelectionDAG * | G = nullptr | ) | const |
dumprFull - printrFull to dbgs(). The given SelectionDAG allows target-specific nodes to be printed in human-readable form. Unlike dumpr, this will print the whole DAG, including children that appear multiple times.
Definition at line 650 of file SelectionDAGDumper.cpp.
References dumprWithDepth().
Referenced by llvm::SelectionDAG::AssignTopologicalOrder(), and checkForCyclesHelper().
| void SDNode::dumprWithDepth | ( | const SelectionDAG * | G = nullptr, |
| unsigned | depth = 100 |
||
| ) | const |
dumprWithDepth - printrWithDepth to dbgs(). The given SelectionDAG allows target-specific nodes to be printed in human-readable form. Unlike dumpr, this will print children that appear multiple times wherever they are used.
Definition at line 646 of file SelectionDAGDumper.cpp.
References llvm::dbgs(), and printrWithDepth().
Referenced by dumprFull().
| uint64_t SDNode::getConstantOperandVal | ( | unsigned | Num | ) | const |
getConstantOperandVal - Helper method returns the integer value of a ConstantSDNode operand.
Definition at line 6416 of file SelectionDAG.cpp.
Referenced by findEXTRHalf(), llvm::SDValue::getConstantOperandVal(), llvm::AArch64TargetLowering::isDesirableToCommuteWithShift(), lowerMSASplatImm(), PerformBrCondCombine(), PerformCMOVCombine(), and PerformSETCCCombine().
| const DebugLoc llvm::SDNode::getDebugLoc | ( | ) | const [inline] |
getDebugLoc - Return the source location info.
Definition at line 479 of file SelectionDAGNodes.h.
Referenced by llvm::SDValue::getDebugLoc(), and llvm::SDLoc::getDebugLoc().
| const SDNode* llvm::SDNode::getGluedMachineNode | ( | ) | const [inline] |
Definition at line 634 of file SelectionDAGNodes.h.
References getGluedNode(), isMachineOpcode(), and N.
| SDNode* llvm::SDNode::getGluedNode | ( | ) | const [inline] |
getGluedNode - If this node has a glue operand, return the node to which the glue operand points. Otherwise return NULL.
Definition at line 625 of file SelectionDAGNodes.h.
References llvm::SDValue::getNode(), getNumOperands(), getOperand(), getValueType(), and llvm::MVT::Glue.
Referenced by llvm::ScheduleDAGSDNodes::RegDefIter::Advance(), canClobberPhysRegDefs(), llvm::ScheduleDAGSDNodes::computeLatency(), llvm::ScheduleDAGSDNodes::dumpNode(), llvm::ScheduleDAGSDNodes::EmitSchedule(), getGluedMachineNode(), llvm::ScheduleDAGSDNodes::getGraphNodeLabel(), isOperandOf(), llvm::ResourcePriorityQueue::isResourceAvailable(), and llvm::ResourcePriorityQueue::reserveResources().
| SDNode* llvm::SDNode::getGluedUser | ( | ) | const [inline] |
getGluedUser - If this node has a glue value with a user, return the user (there is at most one). Otherwise return NULL.
Definition at line 650 of file SelectionDAGNodes.h.
References llvm::MVT::Glue, use_begin(), and use_end().
Referenced by AddCombineTo64bitMLAL(), and findGluedUser().
| bool llvm::SDNode::getHasDebugValue | ( | ) | const [inline] |
getHasDebugValue - get this bit.
Definition at line 443 of file SelectionDAGNodes.h.
Referenced by ProcessSDDbgValues(), and llvm::SelectionDAG::TransferDbgValues().
| const char * SDNode::getIndexedModeName | ( | ISD::MemIndexedMode | AM | ) | [static] |
Definition at line 330 of file SelectionDAGDumper.cpp.
References llvm::ISD::POST_DEC, llvm::ISD::POST_INC, llvm::ISD::PRE_DEC, and llvm::ISD::PRE_INC.
| unsigned llvm::SDNode::getIROrder | ( | ) | const [inline] |
getIROrder - Return the node ordering.
Definition at line 472 of file SelectionDAGNodes.h.
Referenced by llvm::SDLoc::getIROrder(), PerformADDCombineWithOperands(), and ProcessSourceNode().
| unsigned llvm::SDNode::getMachineOpcode | ( | ) | const [inline] |
getMachineOpcode - This may only be called if isMachineOpcode returns true. It returns the MachineInstr opcode value that the node's opcode corresponds to.
Definition at line 437 of file SelectionDAGNodes.h.
References isMachineOpcode().
Referenced by llvm::SIInstrInfo::areLoadsFromSameBasePtr(), llvm::ARMBaseInstrInfo::areLoadsFromSameBasePtr(), canClobberPhysRegDefs(), canClobberReachingPhysRegUse(), CheckForPhysRegDependency(), llvm::ScheduleDAGSDNodes::computeLatency(), llvm::ScheduleDAGSDNodes::computeOperandLatency(), FindCallSeqStart(), FoldOperand(), GetCostForDef(), llvm::TargetInstrInfo::getInstrLatency(), llvm::SDValue::getMachineOpcode(), llvm::ARMBaseInstrInfo::getOperandLatency(), llvm::TargetInstrInfo::getOperandLatency(), getOperationName(), getPhysicalRegisterVT(), llvm::ARMTargetLowering::getSchedulingPreference(), getUsefulBitsForUse(), isBitfieldExtractOp(), IsChainDependent(), llvm::ResourcePriorityQueue::isResourceAvailable(), llvm::ScheduleDAGSDNodes::newSUnit(), nodesHaveSameOperandValue(), PerformANDCombine(), performBitcastCombine(), llvm::SITargetLowering::PostISelFolding(), llvm::ResourcePriorityQueue::reserveResources(), and llvm::ARMBaseInstrInfo::shouldScheduleLoadsNear().
| int llvm::SDNode::getNodeId | ( | ) | const [inline] |
getNodeId - Return the unique node id.
Definition at line 465 of file SelectionDAGNodes.h.
Referenced by llvm::SelectionDAG::AssignTopologicalOrder(), findNonImmUse(), llvm::ScheduleDAGSDNodes::getCustomGraphFeatures(), insertDAGNode(), InsertDAGNode(), isLoadIncOrDecStore(), llvm::DAGTypeLegalizer::run(), and WalkChainUsers().
| unsigned llvm::SDNode::getNumOperands | ( | ) | const [inline] |
getNumOperands - Return the number of values used by this operation.
Definition at line 602 of file SelectionDAGNodes.h.
Referenced by AddCombineTo64bitMLAL(), AddCombineToVPADDL(), AddGlue(), llvm::ISD::allOperandsUndef(), llvm::SelectionDAG::AssignTopologicalOrder(), BUILD_VECTORtoBlendMask(), checkForCyclesHelper(), CheckForMaskedLoad(), CloneNodeWithValues(), CombineBaseUpdate(), ConvertSelectToConcatVector(), countOperands(), DumpNodes(), DumpNodesr(), llvm::SDNodeIterator::end(), ExpandBVWithShuffles(), FindCallSeqStart(), findNonImmUse(), llvm::SelectionDAG::FoldConstantArithmetic(), llvm::PPC::get_VSPLTI_elt(), getGluedNode(), getInputChainForNode(), getNodeRegMask(), llvm::SDValue::getNumOperands(), getNumOperandsNoGlue(), getReadPerformanceCounter(), getReadTimeStampCounter(), llvm::BuildVectorSDNode::getSplatValue(), getTargetShuffleMask(), getTargetVShiftByConstNode(), HandleMergeInputChains(), hasPredecessorHelper(), llvm::ISD::isBuildVectorAllOnes(), llvm::ISD::isBuildVectorAllZeros(), llvm::ISD::isBuildVectorOfConstantSDNodes(), IsChainDependent(), llvm::BuildVectorSDNode::isConstant(), isConstantOrUndefBUILD_VECTOR(), llvm::BuildVectorSDNode::isConstantSplat(), isExtendedBUILD_VECTOR(), isNodeChanged(), llvm::SDValue::isOperandOf(), llvm::ISD::isScalarToVector(), isSplatVector(), lowerDSPIntr(), llvm::SparcTargetLowering::LowerF128Op(), llvm::HexagonTargetLowering::LowerINLINEASM(), MoveBelowOrigChain(), performANDCombine(), PerformANDCombine(), PerformBUILD_VECTORCombine(), llvm::SITargetLowering::PerformDAGCombine(), performNEONPostLDSTCombine(), PerformSELECTCombine(), performSRACombine(), PerformSTORECombine(), print(), printrWithDepthHelper(), llvm::ResourcePriorityQueue::rawRegPressureDelta(), replaceInChain(), ReplaceINTRINSIC_W_CHAIN(), ReplaceLoadVector(), llvm::DAGTypeLegalizer::run(), llvm::ResourcePriorityQueue::scheduledNode(), llvm::SelectionDAGISel::SelectCodeCommon(), tryToFoldExtendOfConstant(), llvm::SelectionDAG::UnrollVectorOp(), llvm::SelectionDAG::UpdateNodeOperands(), VerifySDNode(), and WillBeConstantPoolLoad().
| unsigned llvm::SDNode::getNumValues | ( | ) | const [inline] |
getNumValues - Return the number of values defined/returned by this operator.
Definition at line 660 of file SelectionDAGNodes.h.
Referenced by AddCombineTo64bitMLAL(), AddGlue(), BURRSort(), canChangeToInt(), canClobberPhysRegDefs(), llvm::InstrEmitter::CountResults(), doNotCSE(), findGlueUse(), llvm::ARMTargetLowering::getSchedulingPreference(), llvm::SelectionDAGBuilder::getValueImpl(), hasAnyUseOfValue(), hasNUsesOfValue(), llvm::SelectionDAGISel::IsLegalToFold(), LowerExtendedLoad(), llvm::R600TargetLowering::LowerOperation(), llvm::SITargetLowering::LowerOperation(), llvm::MipsTargetLowering::LowerOperationWrapper(), llvm::DAGTypeLegalizer::NoteDeletion(), PerformCMOVCombine(), print_types(), llvm::ResourcePriorityQueue::rawRegPressureDelta(), RemoveUnusedGlue(), llvm::SelectionDAG::ReplaceAllUsesOfValueWith(), llvm::SelectionDAG::ReplaceAllUsesWith(), llvm::DAGTypeLegalizer::run(), llvm::ResourcePriorityQueue::scheduledNode(), llvm::SelectionDAGISel::SelectCodeCommon(), llvm::TargetLowering::TargetLoweringOpt::ShrinkDemandedOp(), llvm::SelectionDAG::UnrollVectorOp(), and VerifySDNode().
| unsigned llvm::SDNode::getOpcode | ( | ) | const [inline] |
getOpcode - Return the SelectionDAG opcode value for this node. For pre-isel nodes (those for which isMachineOpcode returns false), these are the opcode values in the ISD and <target>ISD namespaces. For post-isel opcodes, see getMachineOpcode.
Definition at line 407 of file SelectionDAGNodes.h.
Referenced by AddCombineTo64bitMLAL(), AddCombineToVPADDL(), AddNodeIDCustom(), AddNodeIDNode(), adjustForFNeg(), adjustForLTGFR(), adjustForSubtraction(), llvm::SelectionDAG::AssignTopologicalOrder(), canEnableCoalescing(), canFoldInAddressingMode(), CanFoldXORWithAllOnes(), CheckAndImm(), CheckForMaskedLoad(), CheckForPhysRegDependency(), checkHighLaneIndex(), CheckOpcode(), CheckOrImm(), checkValueWidth(), llvm::BinaryWithFlagsSDNode::classof(), llvm::AddrSpaceCastSDNode::classof(), llvm::MemSDNode::classof(), llvm::AtomicSDNode::classof(), llvm::MemIntrinsicSDNode::classof(), llvm::ShuffleVectorSDNode::classof(), llvm::ConstantSDNode::classof(), llvm::ConstantFPSDNode::classof(), llvm::GlobalAddressSDNode::classof(), llvm::FrameIndexSDNode::classof(), llvm::JumpTableSDNode::classof(), llvm::ConstantPoolSDNode::classof(), llvm::TargetIndexSDNode::classof(), llvm::BasicBlockSDNode::classof(), llvm::BuildVectorSDNode::classof(), llvm::SrcValueSDNode::classof(), llvm::MDNodeSDNode::classof(), llvm::RegisterSDNode::classof(), llvm::RegisterMaskSDNode::classof(), llvm::BlockAddressSDNode::classof(), llvm::EHLabelSDNode::classof(), llvm::ExternalSymbolSDNode::classof(), llvm::CondCodeSDNode::classof(), llvm::CvtRndSatSDNode::classof(), llvm::VTSDNode::classof(), llvm::LSBaseSDNode::classof(), llvm::LoadSDNode::classof(), llvm::StoreSDNode::classof(), CloneNodeWithValues(), CombineBaseUpdate(), combineSelectAndUse(), combineShuffleToAddSub(), CombineVLDDUP(), combineX86ShuffleChain(), llvm::ScheduleDAGSDNodes::computeLatency(), llvm::ScheduleDAGSDNodes::computeOperandLatency(), ConvertSelectToConcatVector(), doNotCSE(), EltsFromConsecutiveLoads(), Expand64BitShift(), ExpandHorizontalBinOp(), ExtendUsesToFormExtLoad(), FindCallSeqStart(), findConsecutiveLoad(), findMUL_LOHI(), GenerateTBL(), getARMIndexedAddressParts(), llvm::MemSDNode::getBasePtr(), GetCostForDef(), getIndexedAddressParts(), getIntrinsicID(), llvm::SelectionDAG::getNode(), llvm::LSBaseSDNode::getOffset(), llvm::SDValue::getOpcode(), getOperationName(), llvm::ARMTargetLowering::getPostIndexedAddressParts(), llvm::BuildVectorSDNode::getSplatValue(), getT2IndexedAddressParts(), getTargetShuffleMask(), getTargetVShiftByConstNode(), HandleMergeInputChains(), hasNonFlagsUse(), hasOnlyLiveInOpers(), hasOnlyLiveOutUses(), isAddSubSExt(), isAddSubZExt(), isBitfieldExtractOp(), isBitfieldExtractOpFromAnd(), isBitfieldExtractOpFromShr(), isBitfieldInsertOpFromOr(), isBitwiseInverse(), llvm::ISD::isBuildVectorAllOnes(), llvm::ISD::isBuildVectorAllZeros(), llvm::ISD::isBuildVectorOfConstantSDNodes(), IsChainDependent(), llvm::AtomicSDNode::isCompareAndSwap(), isConditionalZeroOrAllOnes(), isConsecutiveLS(), isConstantOrUndef(), llvm::AArch64TargetLowering::isDesirableToCommuteWithShift(), isExtendedBUILD_VECTOR(), llvm::TargetLowering::isGAPlusOffset(), isHorizontalBinOp(), isInt32Immediate(), isInt64Immediate(), isIntS16Immediate(), isOpcWithIntImmediate(), llvm::ScheduleDAGSDNodes::isPassiveNode(), isScalarLoadToVector(), llvm::ISD::isScalarToVector(), isSeveralBitsExtractOpFromShr(), isSignExtended(), isTruncateOf(), isVectorAllOnes(), isX86LogicalCmp(), isZeroExtended(), llvm::SparcTargetLowering::LowerCall_64(), LowerEXTRACT_VECTOR_ELT_SSE4(), llvm::HexagonTargetLowering::LowerINLINEASM(), LowerMUL_LOHI(), LowerShift(), LowerVECTOR_SHUFFLE(), LowerVECTOR_SHUFFLEv8i8(), llvm::LSBaseSDNode::LSBaseSDNode(), BaseIndexOffset::match(), OptimizeConditionalInDecrement(), PerformADDCombineWithOperands(), performAddSubLongCombine(), performANDCombine(), PerformANDCombine(), PerformARMBUILD_VECTORCombine(), performBitcastCombine(), PerformBUILD_VECTORCombine(), performConcatVectorsCombine(), performCONDCombine(), llvm::R600TargetLowering::PerformDAGCombine(), llvm::MipsSETargetLowering::PerformDAGCombine(), llvm::SITargetLowering::PerformDAGCombine(), llvm::AMDGPUTargetLowering::PerformDAGCombine(), llvm::AArch64TargetLowering::PerformDAGCombine(), llvm::SystemZTargetLowering::PerformDAGCombine(), llvm::MipsTargetLowering::PerformDAGCombine(), llvm::ARMTargetLowering::PerformDAGCombine(), llvm::PPCTargetLowering::PerformDAGCombine(), performDivRemCombine(), performExtendCombine(), PerformExtendCombine(), PerformEXTRACT_VECTOR_ELTCombine(), PerformFMinFMaxCombine(), PerformFORCombine(), performIntegerAbsCombine(), performIntToFpCombine(), PerformMulCombine(), performNEONPostLDSTCombine(), performORCombine(), PerformOrCombine(), performPostLD1Combine(), PerformSELECTCombine(), performSetccAddFolding(), PerformShiftCombine(), PerformShuffleCombine(), performSRACombine(), PerformSTORECombine(), PerformVCVTCombine(), PerformVDIVCombine(), performVectorCompareAndMaskUnaryOpCombine(), performVSELECTCombine(), performXORCombine(), replaceInChain(), llvm::R600TargetLowering::ReplaceNodeResults(), llvm::XCoreTargetLowering::ReplaceNodeResults(), llvm::AMDGPUTargetLowering::ReplaceNodeResults(), llvm::SparcTargetLowering::ReplaceNodeResults(), llvm::ARMTargetLowering::ReplaceNodeResults(), llvm::PPCTargetLowering::ReplaceNodeResults(), resetVRegCycle(), selectCCOpsAreFMaxCompatible(), llvm::SelectionDAGISel::SelectCodeCommon(), selectMADD(), selectMSUB(), shouldUseLA(), llvm::TargetLowering::SimplifyDemandedBits(), SkipExtensionForVMULL(), SplitVSETCC(), TransformVSELECTtoBlendVECTOR_SHUFFLE(), tryCombineToEXTR(), TryMULWIDECombine(), tryToFoldExtendOfConstant(), llvm::SelectionDAG::UnrollVectorOp(), useDivRem(), useSinCos(), VerifySDNode(), WalkChainUsers(), WidenMaskArithmetic(), and WillBeConstantPoolLoad().
| const SDValue& llvm::SDNode::getOperand | ( | unsigned | Num | ) | const [inline] |
Definition at line 608 of file SelectionDAGNodes.h.
Referenced by AddCombineTo64bitMLAL(), AddCombineToVPADDL(), AddGlue(), adjustForLTGFR(), adjustForSubtraction(), llvm::ISD::allOperandsUndef(), llvm::SIInstrInfo::areLoadsFromSameBasePtr(), llvm::ARMBaseInstrInfo::areLoadsFromSameBasePtr(), BUILD_VECTORtoBlendMask(), llvm::TargetLowering::BuildSDIV(), llvm::TargetLowering::BuildUDIV(), canFoldInAddressingMode(), CanFoldXORWithAllOnes(), ChangeVSETULTtoVSETULE(), CheckAndImm(), checkForCyclesHelper(), CheckForMaskedLoad(), CheckForPhysRegDependency(), checkHighLaneIndex(), CheckOrImm(), checkValueWidth(), CloneNodeWithValues(), CMPEQCombine(), CombineBaseUpdate(), llvm::AMDGPUTargetLowering::CombineMinMax(), combineSelectAndUseCommutative(), combineShuffleToAddSub(), CombineVLDDUP(), Compact8x32ShuffleNode(), llvm::AArch64TargetLowering::computeKnownBitsForTargetNode(), llvm::ARMTargetLowering::computeKnownBitsForTargetNode(), llvm::ScheduleDAGSDNodes::computeOperandLatency(), ConvertSelectToConcatVector(), countOperands(), DumpNodes(), DumpNodesr(), llvm::ARMTargetLowering::EmitInstrWithCustomInserter(), Expand64BitShift(), ExpandBITCAST(), ExpandBVWithShuffles(), llvm::TargetLowering::expandFP_TO_SINT(), llvm::TargetLowering::expandMUL(), ExtendUsesToFormExtLoad(), FindCallSeqStart(), findChainOperand(), findEXTRHalf(), findNonImmUse(), llvm::SelectionDAG::FoldConstantArithmetic(), FoldOperand(), llvm::PPC::get_VSPLTI_elt(), getARMIndexedAddressParts(), llvm::MemSDNode::getBasePtr(), llvm::AtomicSDNode::getBasePtr(), llvm::LoadSDNode::getBasePtr(), llvm::StoreSDNode::getBasePtr(), getBuildPairElt(), llvm::MemSDNode::getChain(), llvm::SelectionDAG::getCommutedVectorShuffle(), GetCostForDef(), getCTPOP16BitCounts(), llvm::DOTGraphTraits< SelectionDAG * >::getEdgeAttributes(), llvm::DOTGraphTraits< SelectionDAG * >::getEdgeTarget(), getExtractVEXTRACTImmediate(), getGluedNode(), getIndexedAddressParts(), getInputChainForNode(), getINSERTPS(), getInsertVINSERTImmediate(), getIntrinsicID(), llvm::SelectionDAG::getNode(), getNodeRegMask(), getNumOperandsNoGlue(), llvm::LSBaseSDNode::getOffset(), llvm::LoadSDNode::getOffset(), llvm::StoreSDNode::getOffset(), llvm::SDValue::getOperand(), llvm::ARMBaseInstrInfo::getOperandLatency(), getOperationName(), getReadPerformanceCounter(), getReadTimeStampCounter(), getShuffleScalarElt(), llvm::BuildVectorSDNode::getSplatValue(), getT2IndexedAddressParts(), getTargetShuffleMask(), getTargetVShiftByConstNode(), getUnderlyingExtractedFromVec(), getUsefulBitsForUse(), llvm::AtomicSDNode::getVal(), llvm::StoreSDNode::getValue(), llvm::SelectionDAG::getVectorShuffle(), HandleMergeInputChains(), hasNormalLoadOperand(), hasOnlyLiveInOpers(), hasOnlyLiveOutUses(), hasPredecessorHelper(), isAddSubSExt(), isAddSubZExt(), isAllConstantBuildVector(), llvm::PPC::isAllNegativeZeroVector(), isBitfieldExtractOp(), isBitfieldExtractOpFromAnd(), isBitfieldExtractOpFromShr(), isBitfieldInsertOpFromOr(), isBitwiseInverse(), llvm::ISD::isBuildVectorAllOnes(), llvm::ISD::isBuildVectorAllZeros(), llvm::ISD::isBuildVectorOfConstantSDNodes(), IsChainDependent(), isConditionalZeroOrAllOnes(), llvm::SelectionDAG::isConsecutiveLoad(), isConsecutiveLS(), llvm::BuildVectorSDNode::isConstant(), isConstantOrUndefBUILD_VECTOR(), llvm::BuildVectorSDNode::isConstantSplat(), llvm::AArch64TargetLowering::isDesirableToCommuteWithShift(), isExtendedBUILD_VECTOR(), llvm::TargetLowering::isGAPlusOffset(), isHorizontalBinOp(), isLoadIncOrDecStore(), isNodeChanged(), isOpcWithIntImmediate(), llvm::SDValue::isOperandOf(), isScalarLoadToVector(), llvm::ISD::isScalarToVector(), isSetCCOrZExtSetCC(), isSeveralBitsExtractOpFromShr(), isSplatVector(), isTruncateOf(), isVectorAllOnes(), isVectorShiftLeft(), isVectorShiftRight(), isVEXTRACTIndex(), isVINSERTIndex(), isZeroShuffle(), LowerATOMIC_STORE(), LowerAVXExtend(), LowerBITCAST(), LowerBuildVectorv4x32(), lowerCTPOP32BitElements(), LowerCTTZ(), lowerDSPIntr(), llvm::HexagonTargetLowering::LowerINLINEASM(), LowerINSERT_SUBVECTOR(), LowerLOAD_SUB(), lowerMSABinaryBitImmIntr(), lowerMSABitClear(), lowerMSABitClearImm(), lowerMSACopyIntr(), lowerMSALoadIntr(), lowerMSASplatZExt(), lowerMSAStoreIntr(), LowerShift(), llvm::MSP430TargetLowering::LowerShifts(), LowerSIGN_EXTEND(), LowerSIGN_EXTEND_AVX512(), LowerVAARG(), LowerVECTOR_SHUFFLE_128v4(), LowerVECTOR_SHUFFLE_256(), lowerVECTOR_SHUFFLE_ILVEV(), lowerVECTOR_SHUFFLE_ILVL(), lowerVECTOR_SHUFFLE_ILVOD(), lowerVECTOR_SHUFFLE_ILVR(), lowerVECTOR_SHUFFLE_PCKEV(), lowerVECTOR_SHUFFLE_PCKOD(), lowerVECTOR_SHUFFLE_SHF(), lowerVECTOR_SHUFFLE_VSHF(), LowerVECTOR_SHUFFLEtoBlend(), LowerVECTOR_SHUFFLEv16i16(), LowerVECTOR_SHUFFLEv16i8(), LowerVECTOR_SHUFFLEv32i8(), LowerVECTOR_SHUFFLEv8i16(), LowerVectorAllZeroTest(), LowerXALUO(), LowerZERO_EXTEND_AVX512(), BaseIndexOffset::match(), matchAddSub(), NarrowVectorLoadToElement(), nodesHaveSameOperandValue(), OptimizeConditionalInDecrement(), partitionShuffleOfConcats(), PerformADCCombine(), performADDCombine(), PerformADDCombine(), PerformAddCombine(), performAddSubLongCombine(), performANDCombine(), PerformANDCombine(), PerformAndCombine(), PerformARMBUILD_VECTORCombine(), PerformBFICombine(), performBitcastCombine(), performBRCONDCombine(), PerformBrCondCombine(), PerformBTCombine(), PerformBUILD_VECTORCombine(), llvm::ARMTargetLowering::PerformCMOVCombine(), PerformCMOVCombine(), performConcatVectorsCombine(), performCONDCombine(), llvm::R600TargetLowering::PerformDAGCombine(), llvm::SITargetLowering::PerformDAGCombine(), llvm::AMDGPUTargetLowering::PerformDAGCombine(), llvm::AArch64TargetLowering::PerformDAGCombine(), llvm::SystemZTargetLowering::PerformDAGCombine(), llvm::ARMTargetLowering::PerformDAGCombine(), llvm::PPCTargetLowering::PerformDAGCombine(), performDivRemCombine(), performDSPShiftCombine(), performExtendCombine(), PerformExtendCombine(), PerformEXTRACT_VECTOR_ELTCombine(), PerformFADDCombine(), PerformFANDCombine(), PerformFANDNCombine(), PerformFMACombine(), PerformFMinFMaxCombine(), PerformFORCombine(), PerformFSUBCombine(), PerformInsertEltCombine(), PerformINSERTPSCombine(), performIntegerAbsCombine(), PerformINTRINSIC_WO_CHAINCombine(), performIntrinsicCombine(), PerformIntrinsicCombine(), performIntToFpCombine(), PerformISDSETCCCombine(), performMULCombine(), performMulCombine(), PerformMULCombine(), PerformMulCombine(), performNEONPostLDSTCombine(), performORCombine(), PerformORCombine(), PerformOrCombine(), performPostLD1Combine(), PerformSELECT_CCCombine(), performSELECTCombine(), performSelectCombine(), PerformSELECTCombine(), performSetccAddFolding(), performSETCCCombine(), PerformSETCCCombine(), PerformShiftCombine(), performShiftToAllZeros(), PerformSHLCombine(), PerformShuffleCombine(), PerformShuffleCombine256(), PerformSIGN_EXTEND_INREGCombine(), PerformSINT_TO_FPCombine(), performSRACombine(), PerformSTORECombine(), PerformSUBCombine(), PerformSubCombine(), PerformVCVTCombine(), PerformVDIVCombine(), PerformVDUPLANECombine(), PerformVECTOR_SHUFFLECombine(), performVectorCompareAndMaskUnaryOpCombine(), PerformVMOVDRRCombine(), PerformVMOVRRDCombine(), PerformVMULCombine(), performVSELECTCombine(), performVSelectCombine(), PerformVZEXT_MOVLCombine(), performVZEXTCombine(), performXORCombine(), PerformZExtCombine(), print(), printrWithDepthHelper(), PromoteSplat(), llvm::ResourcePriorityQueue::rawRegPressureDelta(), ReplaceATOMIC_LOAD(), ReplaceBITCASTResults(), replaceInChain(), ReplaceINTRINSIC_W_CHAIN(), ReplaceLoadVector(), llvm::R600TargetLowering::ReplaceNodeResults(), llvm::SparcTargetLowering::ReplaceNodeResults(), llvm::PPCTargetLowering::ReplaceNodeResults(), ReplaceREADCYCLECOUNTER(), RewriteAsNarrowerShuffle(), llvm::DAGTypeLegalizer::run(), llvm::ResourcePriorityQueue::scheduledNode(), selectCCOpsAreFMaxCompatible(), llvm::SelectionDAGISel::SelectCodeCommon(), selectMADD(), selectMSUB(), llvm::TargetLowering::TargetLoweringOpt::ShrinkDemandedOp(), llvm::TargetLowering::SimplifyDemandedBits(), llvm::TargetLowering::SimplifySetCC(), SkipExtensionForVMULL(), llvm::SelectionDAG::SplitVectorOperand(), SplitVSETCC(), TransformVSELECTtoBlendVECTOR_SHUFFLE(), tryCombineCRC32(), tryCombineFixedPointConvert(), tryCombineLongOpWithDup(), tryCombineShiftImm(), tryCombineToBSL(), tryCombineToEXTR(), tryLowerToSLI(), TryMULWIDECombine(), tryToFoldExtendOfConstant(), llvm::SelectionDAG::UnrollVectorOp(), llvm::SelectionDAG::UpdateNodeOperands(), useDivRem(), useSinCos(), ValueHasExactlyOneBitSet(), VerifySDNode(), WidenMaskArithmetic(), WillBeConstantPoolLoad(), and XFormVExtractWithShuffleIntoLoad().
| std::string SDNode::getOperationName | ( | const SelectionDAG * | G = nullptr | ) | const |
getOperationName - Return the opcode of this operation for printing.
Definition at line 33 of file SelectionDAGDumper.cpp.
References llvm::ISD::ADD, llvm::ISD::ADDC, llvm::ISD::ADDE, llvm::ISD::ADDRSPACECAST, llvm::ISD::ADJUST_TRAMPOLINE, llvm::ISD::AND, llvm::ISD::ANY_EXTEND, llvm::ISD::ANY_EXTEND_VECTOR_INREG, llvm::ISD::AssertSext, llvm::ISD::AssertZext, llvm::ISD::ATOMIC_CMP_SWAP, llvm::ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS, llvm::ISD::ATOMIC_FENCE, llvm::ISD::ATOMIC_LOAD, llvm::ISD::ATOMIC_LOAD_ADD, llvm::ISD::ATOMIC_LOAD_AND, llvm::ISD::ATOMIC_LOAD_MAX, llvm::ISD::ATOMIC_LOAD_MIN, llvm::ISD::ATOMIC_LOAD_NAND, llvm::ISD::ATOMIC_LOAD_OR, llvm::ISD::ATOMIC_LOAD_SUB, llvm::ISD::ATOMIC_LOAD_UMAX, llvm::ISD::ATOMIC_LOAD_UMIN, llvm::ISD::ATOMIC_LOAD_XOR, llvm::ISD::ATOMIC_STORE, llvm::ISD::ATOMIC_SWAP, llvm::ISD::BasicBlock, llvm::ISD::BITCAST, llvm::ISD::BlockAddress, llvm::ISD::BR, llvm::ISD::BR_CC, llvm::ISD::BR_JT, llvm::ISD::BRCOND, llvm::ISD::BRIND, llvm::ISD::BSWAP, llvm::ISD::BUILD_PAIR, llvm::ISD::BUILD_VECTOR, llvm::ISD::BUILTIN_OP_END, llvm::ISD::CALLSEQ_END, llvm::ISD::CALLSEQ_START, llvm::ISD::CARRY_FALSE, llvm::ISD::CONCAT_VECTORS, llvm::ISD::CONDCODE, llvm::ISD::Constant, llvm::ISD::ConstantFP, llvm::ISD::ConstantPool, llvm::ISD::CONVERT_RNDSAT, llvm::ISD::CopyFromReg, llvm::ISD::CopyToReg, llvm::ISD::CTLZ, llvm::ISD::CTLZ_ZERO_UNDEF, llvm::ISD::CTPOP, llvm::ISD::CTTZ, llvm::ISD::CTTZ_ZERO_UNDEF, llvm::ISD::CVT_FF, llvm::ISD::CVT_FS, llvm::ISD::CVT_FU, llvm::ISD::CVT_SF, llvm::ISD::CVT_SS, llvm::ISD::CVT_SU, llvm::ISD::CVT_UF, llvm::ISD::CVT_US, llvm::ISD::CVT_UU, llvm::ISD::DEBUGTRAP, llvm::ISD::DELETED_NODE, llvm::ISD::DYNAMIC_STACKALLOC, llvm::ISD::EH_LABEL, llvm::ISD::EH_RETURN, llvm::ISD::EH_SJLJ_LONGJMP, llvm::ISD::EH_SJLJ_SETJMP, llvm::ISD::EntryToken, llvm::ISD::ExternalSymbol, llvm::ISD::EXTRACT_ELEMENT, llvm::ISD::EXTRACT_SUBVECTOR, llvm::ISD::EXTRACT_VECTOR_ELT, llvm::ISD::FABS, llvm::ISD::FADD, llvm::ISD::FCEIL, llvm::ISD::FCOPYSIGN, llvm::ISD::FCOS, llvm::ISD::FDIV, llvm::ISD::FEXP, llvm::ISD::FEXP2, llvm::ISD::FFLOOR, llvm::ISD::FGETSIGN, llvm::ISD::FLOG, llvm::ISD::FLOG10, llvm::ISD::FLOG2, llvm::ISD::FLT_ROUNDS_, llvm::ISD::FMA, llvm::ISD::FMUL, llvm::ISD::FNEARBYINT, llvm::ISD::FNEG, llvm::ISD::FP16_TO_FP, llvm::ISD::FP_EXTEND, llvm::ISD::FP_ROUND, llvm::ISD::FP_ROUND_INREG, llvm::ISD::FP_TO_FP16, llvm::ISD::FP_TO_SINT, llvm::ISD::FP_TO_UINT, llvm::ISD::FPOW, llvm::ISD::FPOWI, llvm::ISD::FRAME_TO_ARGS_OFFSET, llvm::ISD::FRAMEADDR, llvm::ISD::FrameIndex, llvm::ISD::FREM, llvm::ISD::FRINT, llvm::ISD::FROUND, llvm::ISD::FSIN, llvm::ISD::FSINCOS, llvm::ISD::FSQRT, llvm::ISD::FSUB, llvm::ISD::FTRUNC, llvm::TargetSubtargetInfo::getInstrInfo(), llvm::TargetMachine::getIntrinsicInfo(), getMachineOpcode(), llvm::Intrinsic::getName(), getOpcode(), getOperand(), llvm::SelectionDAG::getSubtarget(), llvm::SelectionDAG::getTarget(), llvm::SelectionDAG::getTargetLoweringInfo(), llvm::TargetLowering::getTargetNodeName(), llvm::ISD::GLOBAL_OFFSET_TABLE, llvm::ISD::GlobalAddress, llvm::ISD::GlobalTLSAddress, llvm::ISD::HANDLENODE, llvm::ISD::INIT_TRAMPOLINE, llvm::ISD::INLINEASM, llvm::ISD::INSERT_SUBVECTOR, llvm::ISD::INSERT_VECTOR_ELT, llvm::ISD::INTRINSIC_VOID, llvm::ISD::INTRINSIC_W_CHAIN, llvm::ISD::INTRINSIC_WO_CHAIN, isMachineOpcode(), llvm::ISD::JumpTable, llvm::ISD::LIFETIME_END, llvm::ISD::LIFETIME_START, llvm_unreachable, llvm::ISD::LOAD, llvm::ISD::MDNODE_SDNODE, llvm::ISD::MERGE_VALUES, llvm::ISD::MUL, llvm::ISD::MULHS, llvm::ISD::MULHU, Name, llvm::ISD::OR, llvm::ISD::PCMARKER, llvm::ISD::PREFETCH, llvm::ISD::READ_REGISTER, llvm::ISD::READCYCLECOUNTER, llvm::ISD::Register, llvm::ISD::RegisterMask, llvm::ISD::RETURNADDR, llvm::ISD::ROTL, llvm::ISD::ROTR, llvm::ISD::SADDO, llvm::ISD::SCALAR_TO_VECTOR, llvm::ISD::SDIV, llvm::ISD::SDIVREM, llvm::ISD::SELECT, llvm::ISD::SELECT_CC, llvm::ISD::SETCC, llvm::ISD::SETEQ, llvm::ISD::SETFALSE, llvm::ISD::SETFALSE2, llvm::ISD::SETGE, llvm::ISD::SETGT, llvm::ISD::SETLE, llvm::ISD::SETLT, llvm::ISD::SETNE, llvm::ISD::SETO, llvm::ISD::SETOEQ, llvm::ISD::SETOGE, llvm::ISD::SETOGT, llvm::ISD::SETOLE, llvm::ISD::SETOLT, llvm::ISD::SETONE, llvm::ISD::SETTRUE, llvm::ISD::SETTRUE2, llvm::ISD::SETUEQ, llvm::ISD::SETUGE, llvm::ISD::SETUGT, llvm::ISD::SETULE, llvm::ISD::SETULT, llvm::ISD::SETUNE, llvm::ISD::SETUO, llvm::ISD::SHL, llvm::ISD::SHL_PARTS, llvm::ISD::SIGN_EXTEND, llvm::ISD::SIGN_EXTEND_INREG, llvm::ISD::SIGN_EXTEND_VECTOR_INREG, llvm::ISD::SINT_TO_FP, llvm::ISD::SMUL_LOHI, llvm::ISD::SMULO, llvm::ISD::SRA, llvm::ISD::SRA_PARTS, llvm::ISD::SRCVALUE, llvm::ISD::SREM, llvm::ISD::SRL, llvm::ISD::SRL_PARTS, llvm::ISD::SSUBO, llvm::ISD::STACKRESTORE, llvm::ISD::STACKSAVE, llvm::ISD::STORE, llvm::ISD::SUB, llvm::ISD::SUBC, llvm::ISD::SUBE, llvm::ISD::TargetBlockAddress, llvm::ISD::TargetConstant, llvm::ISD::TargetConstantFP, llvm::ISD::TargetConstantPool, llvm::ISD::TargetExternalSymbol, llvm::ISD::TargetFrameIndex, llvm::ISD::TargetGlobalAddress, llvm::ISD::TargetGlobalTLSAddress, llvm::ISD::TargetIndex, llvm::ISD::TargetJumpTable, TII, llvm::ISD::TokenFactor, llvm::ISD::TRAP, llvm::ISD::TRUNCATE, llvm::ISD::UADDO, llvm::ISD::UDIV, llvm::ISD::UDIVREM, llvm::ISD::UINT_TO_FP, llvm::ISD::UMUL_LOHI, llvm::ISD::UMULO, llvm::ISD::UNDEF, llvm::ISD::UREM, llvm::ISD::USUBO, llvm::utostr(), llvm::ISD::VAARG, llvm::ISD::VACOPY, llvm::ISD::VAEND, llvm::ISD::VALUETYPE, llvm::ISD::VASTART, llvm::ISD::VECTOR_SHUFFLE, llvm::ISD::VSELECT, llvm::ISD::WRITE_REGISTER, llvm::ISD::XOR, llvm::ISD::ZERO_EXTEND, and llvm::ISD::ZERO_EXTEND_VECTOR_INREG.
Referenced by llvm::DOTGraphTraits< SelectionDAG * >::getSimpleNodeLabel(), and print_types().
| static SDVTList llvm::SDNode::getSDVTList | ( | EVT | VT | ) | [inline, static, protected] |
Definition at line 752 of file SelectionDAGNodes.h.
References llvm::MipsISD::Ret.
| MVT llvm::SDNode::getSimpleValueType | ( | unsigned | ResNo | ) | const [inline] |
Return the type of a specified result as a simple type.
Definition at line 671 of file SelectionDAGNodes.h.
References llvm::EVT::getSimpleVT(), and getValueType().
Referenced by llvm::ScheduleDAGSDNodes::RegDefIter::Advance(), Compact8x32ShuffleNode(), llvm::SelectionDAG::getCommutedVectorShuffle(), getINSERTPS(), getInsertVINSERTImmediate(), getShuffleAlignrImmediate(), getShufflePSHUFHWImmediate(), getShufflePSHUFLWImmediate(), getShuffleSHUFImmediate(), getShuffleVPERM2X128Immediate(), isDivRemLibcallAvailable(), isSinCosLibcallAvailable(), isVectorShift(), isVectorShiftLeft(), isVectorShiftRight(), isVEXTRACTIndex(), isVINSERTIndex(), LowerADDC_ADDE_SUBC_SUBE(), LowerAVXExtend(), LowerINSERT_SUBVECTOR(), LowerSIGN_EXTEND(), LowerSIGN_EXTEND_AVX512(), LowerVECTOR_SHUFFLE_128v4(), LowerVECTOR_SHUFFLE_256(), LowerVECTOR_SHUFFLEtoBlend(), LowerVECTOR_SHUFFLEv32i8(), LowerZERO_EXTEND_AVX512(), NarrowVectorLoadToElement(), performAddSubLongCombine(), PerformINSERTPSCombine(), PerformSETCCCombine(), PerformVCVTCombine(), PerformVDIVCombine(), PromoteSplat(), llvm::ResourcePriorityQueue::rawRegPressureDelta(), RewriteAsNarrowerShuffle(), llvm::ResourcePriorityQueue::scheduledNode(), TransformVSELECTtoBlendVECTOR_SHUFFLE(), and tryCombineShiftImm().
| unsigned llvm::SDNode::getValueSizeInBits | ( | unsigned | ResNo | ) | const [inline] |
getValueSizeInBits - Returns MVT::getSizeInBits(getValueType(ResNo)).
Definition at line 677 of file SelectionDAGNodes.h.
References llvm::EVT::getSizeInBits(), and getValueType().
| EVT llvm::SDNode::getValueType | ( | unsigned | ResNo | ) | const [inline] |
getValueType - Return the type of a specified result.
Definition at line 664 of file SelectionDAGNodes.h.
Referenced by AddCombineTo64bitMLAL(), AddCombineToVPADDL(), AddGlue(), AddNodeIDCustom(), adjustForSubtraction(), llvm::SITargetLowering::analyzeImmediate(), llvm::TargetLowering::BuildSDIV(), llvm::TargetLowering::BuildUDIV(), canClobberPhysRegDefs(), canFoldInAddressingMode(), CanFoldXORWithAllOnes(), ChangeVSETULTtoVSETULE(), CheckForPhysRegDependency(), CMPEQCombine(), CombineBaseUpdate(), llvm::AMDGPUTargetLowering::CombineMinMax(), combineSelectAndUse(), combineShuffleToAddSub(), CombineVLDDUP(), ConvertSelectToConcatVector(), llvm::InstrEmitter::CountResults(), createLoadLR(), doNotCSE(), Expand64BitShift(), ExpandBITCAST(), ExpandBVWithShuffles(), llvm::TargetLowering::expandFP_TO_SINT(), llvm::TargetLowering::expandMUL(), ExpandUnalignedLoad(), ExtendUsesToFormExtLoad(), llvm::SelectionDAG::FoldConstantArithmetic(), FoldOperand(), llvm::SelectionDAG::FoldSetCC(), getAArch64XALUOOp(), getARMIndexedAddressParts(), getCTPOP16BitCounts(), getGluedNode(), llvm::ShuffleVectorSDNode::getMask(), llvm::ShuffleVectorSDNode::getMaskElt(), getPhysicalRegisterVT(), llvm::ARMTargetLowering::getSchedulingPreference(), getSimpleValueType(), llvm::ShuffleVectorSDNode::getSplatIndex(), getT2IndexedAddressParts(), GetTLSADDR(), getValueSizeInBits(), llvm::SDValue::getValueType(), hasNormalLoadOperand(), isAllConstantBuildVector(), isBitfieldExtractOp(), isBitfieldExtractOpFromAnd(), isBitfieldExtractOpFromShr(), isBitfieldInsertOpFromOr(), llvm::ISD::isBuildVectorAllOnes(), llvm::ISD::isBuildVectorAllZeros(), isConditionalZeroOrAllOnes(), llvm::SelectionDAG::isConsecutiveLoad(), llvm::BuildVectorSDNode::isConstantSplat(), isConstantSplatVector(), llvm::TargetLowering::isConstFalseVal(), isConstOrConstSplat(), llvm::TargetLowering::isConstTrueVal(), llvm::AArch64TargetLowering::isDesirableToCommuteWithShift(), isExtendedBUILD_VECTOR(), isHorizontalBinOp(), isInt32Immediate(), isInt64Immediate(), isIntS16Immediate(), llvm::SelectionDAGISel::IsLegalToFold(), isSeveralBitsExtractOpFromShr(), isShuffleHigh128VectorInsertLow(), isShuffleLow128VectorInsertHigh(), llvm::ShuffleVectorSDNode::isSplat(), llvm::PPC::isSplatShuffleMask(), isTruncateOf(), isVMerge(), llvm::PPC::isVSLDOIShuffleMask(), isZeroShuffle(), LowerADDC_ADDE_SUBC_SUBE(), LowerCMP_SWAP(), LowerCTPOP(), lowerCTPOP16BitElements(), lowerCTPOP32BitElements(), LowerCTTZ(), lowerDSPIntr(), LowerDYNAMIC_STACKALLOC(), LowerEXTRACT_VECTOR_ELT_SSE4(), LowerINTRINSIC_W_CHAIN(), LowerLOAD_SUB(), lowerMSABinaryBitImmIntr(), lowerMSABitClear(), lowerMSABitClearImm(), lowerMSACopyIntr(), lowerMSALoadIntr(), lowerMSASplatImm(), lowerMSASplatZExt(), lowerMSAStoreIntr(), LowerShift(), LowerToTLSExecModel(), LowerToTLSLocalDynamicModel(), LowerVAARG(), LowerXALUO(), matchAddSub(), partitionShuffleOfConcats(), PerformADCCombine(), performADDCombine(), PerformAddCombine(), performADDECombine(), performANDCombine(), PerformANDCombine(), PerformAndCombine(), PerformARMBUILD_VECTORCombine(), PerformBFICombine(), performBitcastCombine(), PerformBUILD_VECTORCombine(), llvm::ARMTargetLowering::PerformCMOVCombine(), PerformCMOVCombine(), performConcatVectorsCombine(), performCONDCombine(), llvm::R600TargetLowering::PerformDAGCombine(), llvm::SITargetLowering::PerformDAGCombine(), llvm::AMDGPUTargetLowering::PerformDAGCombine(), llvm::SystemZTargetLowering::PerformDAGCombine(), llvm::PPCTargetLowering::PerformDAGCombine(), performDivRemCombine(), performExtendCombine(), PerformExtendCombine(), PerformEXTRACT_VECTOR_ELTCombine(), PerformFADDCombine(), PerformFMACombine(), PerformFMinFMaxCombine(), PerformFSUBCombine(), PerformInsertEltCombine(), performIntegerAbsCombine(), performIntrinsicCombine(), PerformIntrinsicCombine(), performIntToFpCombine(), PerformISDSETCCCombine(), PerformLOADCombine(), performMULCombine(), performMulCombine(), PerformMULCombine(), PerformMulCombine(), performNEONPostLDSTCombine(), performORCombine(), PerformORCombine(), PerformOrCombine(), performPostLD1Combine(), PerformSELECT_CCCombine(), performSelectCombine(), PerformSELECTCombine(), performSetccAddFolding(), performSETCCCombine(), PerformSExtCombine(), PerformShiftCombine(), performShiftToAllZeros(), performSHLCombine(), PerformShuffleCombine(), PerformShuffleCombine256(), PerformSIGN_EXTEND_INREGCombine(), PerformSINT_TO_FPCombine(), performSRACombine(), performSRLCombine(), PerformSubCombine(), performSUBECombine(), PerformVCVTCombine(), PerformVDIVCombine(), PerformVDUPLANECombine(), PerformVECTOR_SHUFFLECombine(), performVectorCompareAndMaskUnaryOpCombine(), PerformVMOVDRRCombine(), PerformVMOVRRDCombine(), PerformVMULCombine(), performVSELECTCombine(), performVSelectCombine(), PerformVZEXT_MOVLCombine(), performVZEXTCombine(), performXORCombine(), PerformXORCombine(), PerformZExtCombine(), print_types(), RemoveUnusedGlue(), llvm::SelectionDAG::ReplaceAllUsesWith(), ReplaceBITCASTResults(), ReplaceINTRINSIC_W_CHAIN(), ReplaceLoadVector(), llvm::R600TargetLowering::ReplaceNodeResults(), llvm::SparcTargetLowering::ReplaceNodeResults(), llvm::PPCTargetLowering::ReplaceNodeResults(), resolveBuildVector(), llvm::DAGTypeLegalizer::run(), llvm::PPCTargetLowering::SelectAddressRegImm(), llvm::SelectionDAGISel::SelectCodeCommon(), llvm::TargetLowering::SimplifySetCC(), SkipExtensionForVMULL(), SplitVSETCC(), tryCombineFixedPointConvert(), tryCombineLongOpWithDup(), tryCombineShiftImm(), tryCombineToBSL(), tryCombineToEXTR(), tryLowerToSLI(), TryMULWIDECombine(), tryToFoldExtendOfConstant(), llvm::SelectionDAG::UnrollVectorOp(), VerifySDNode(), WidenMaskArithmetic(), and XFormVExtractWithShuffleIntoLoad().
| SDVTList llvm::SDNode::getVTList | ( | ) | const [inline] |
Definition at line 618 of file SelectionDAGNodes.h.
References llvm::X.
Referenced by AddNodeIDNode(), LowerINTRINSIC_W_CHAIN(), LowerXALUO(), performANDCombine(), PerformBrCondCombine(), PerformCMOVCombine(), llvm::R600TargetLowering::PerformDAGCombine(), PerformSETCCCombine(), and performSRACombine().
| bool SDNode::hasAnyUseOfValue | ( | unsigned | Value | ) | const |
hasAnyUseOfValue - Return true if there are any use of the indicated value. This method ignores uses of other values defined by this operation.
Definition at line 6306 of file SelectionDAG.cpp.
References getNumValues(), use_begin(), and use_end().
Referenced by llvm::SITargetLowering::AdjustInstrPostInstrSelection(), llvm::ARMTargetLowering::AdjustInstrPostInstrSelection(), llvm::ScheduleDAGSDNodes::RegDefIter::Advance(), canClobberPhysRegDefs(), checkBoolTestSetCCCombine(), EltsFromConsecutiveLoads(), performDivRemCombine(), PerformShuffleCombine256(), RemoveUnusedGlue(), llvm::SelectionDAG::ReplaceAllUsesWith(), and llvm::SDValue::use_empty().
| bool SDNode::hasNUsesOfValue | ( | unsigned | NUses, |
| unsigned | Value | ||
| ) | const |
hasNUsesOfValue - Return true if there are exactly NUSES uses of the indicated value. This method ignores uses of other values defined by this operation.
Definition at line 6287 of file SelectionDAG.cpp.
References getNumValues(), use_begin(), and use_end().
Referenced by getAArch64Cmp(), llvm::SDValue::hasOneUse(), isLoadIncOrDecStore(), performBRCONDCombine(), llvm::PPCTargetLowering::PerformDAGCombine(), PerformShuffleCombine256(), PerformSTORECombine(), and XFormVExtractWithShuffleIntoLoad().
| bool llvm::SDNode::hasOneUse | ( | ) | const [inline] |
hasOneUse - Return true if there is exactly one use of this node.
Definition at line 454 of file SelectionDAGNodes.h.
References use_begin(), use_empty(), and use_end().
Referenced by canChangeToInt(), combineSelectAndUseCommutative(), combineShuffleToAddSub(), llvm::SelectionDAG::dump(), DumpNodes(), hasNonFlagsUse(), isAddSubSExt(), isAddSubZExt(), isBSwapHWordElement(), isHorizontalBinOp(), LowerVectorAllZeroTest(), PerformADDCombineWithOperands(), PerformARMBUILD_VECTORCombine(), llvm::PPCTargetLowering::PerformDAGCombine(), PerformEXTRACT_VECTOR_ELTCombine(), PerformMulCombine(), PerformSTORECombine(), PerformSUBCombine(), PerformSubCombine(), PerformVMOVRRDCombine(), shouldUseLA(), llvm::TargetLowering::TargetLoweringOpt::ShrinkDemandedOp(), llvm::TargetLowering::SimplifyDemandedBits(), and llvm::TargetLowering::SimplifySetCC().
| bool SDNode::hasPredecessor | ( | const SDNode * | N | ) | const |
hasPredecessor - Return true if N is a predecessor of this node. N is either an operand of this node, or can be reached by recursively traversing up the operands. NOTE: This is an expensive method. Use it carefully.
Definition at line 6382 of file SelectionDAG.cpp.
References hasPredecessorHelper().
Referenced by isPredecessorOf().
| bool SDNode::hasPredecessorHelper | ( | const SDNode * | N, |
| SmallPtrSetImpl< const SDNode * > & | Visited, | ||
| SmallVectorImpl< const SDNode * > & | Worklist | ||
| ) | const |
hasPredecesorHelper - Return true if N is a predecessor of this node. N is either an operand of this node, or can be reached by recursively traversing up the operands. In this helper the Visited and worklist sets are held externally to cache predecessors over multiple invocations. If you want to test for multiple predecessors this method is preferable to multiple calls to hasPredecessor. Be sure to clear Visited and Worklist if the DAG changes. NOTE: This is still very expensive. Use carefully.
Definition at line 6389 of file SelectionDAG.cpp.
References llvm::SmallPtrSetImpl< PtrType >::count(), llvm::SmallVectorBase::empty(), llvm::SmallPtrSetImplBase::empty(), llvm::SDValue::getNode(), getNumOperands(), getOperand(), llvm::SmallPtrSetImpl< PtrType >::insert(), llvm::SmallVectorImpl< T >::pop_back_val(), and llvm::SmallVectorTemplateBase< T, isPodLike< T >::value >::push_back().
Referenced by hasPredecessor().
| void llvm::SDNode::InitOperands | ( | SDUse * | Ops, |
| const SDValue & | Op0 | ||
| ) | [inline, protected] |
InitOperands - Initialize the operands list of this with 1 operand.
Definition at line 781 of file SelectionDAGNodes.h.
References llvm::checkForCycles().
Referenced by llvm::AtomicSDNode::AtomicSDNode(), llvm::BinarySDNode::BinarySDNode(), llvm::SelectionDAG::getMachineNode(), llvm::HandleSDNode::HandleSDNode(), llvm::LSBaseSDNode::LSBaseSDNode(), llvm::SelectionDAG::MorphNodeTo(), llvm::ShuffleVectorSDNode::ShuffleVectorSDNode(), llvm::TernarySDNode::TernarySDNode(), and llvm::UnarySDNode::UnarySDNode().
| void llvm::SDNode::InitOperands | ( | SDUse * | Ops, |
| const SDValue & | Op0, | ||
| const SDValue & | Op1 | ||
| ) | [inline, protected] |
InitOperands - Initialize the operands list of this with 2 operands.
Definition at line 790 of file SelectionDAGNodes.h.
References llvm::checkForCycles().
| void llvm::SDNode::InitOperands | ( | SDUse * | Ops, |
| const SDValue & | Op0, | ||
| const SDValue & | Op1, | ||
| const SDValue & | Op2 | ||
| ) | [inline, protected] |
InitOperands - Initialize the operands list of this with 3 operands.
Definition at line 801 of file SelectionDAGNodes.h.
References llvm::checkForCycles().
| void llvm::SDNode::InitOperands | ( | SDUse * | Ops, |
| const SDValue & | Op0, | ||
| const SDValue & | Op1, | ||
| const SDValue & | Op2, | ||
| const SDValue & | Op3 | ||
| ) | [inline, protected] |
InitOperands - Initialize the operands list of this with 4 operands.
Definition at line 815 of file SelectionDAGNodes.h.
References llvm::checkForCycles().
| void llvm::SDNode::InitOperands | ( | SDUse * | Ops, |
| const SDValue * | Vals, | ||
| unsigned | N | ||
| ) | [inline, protected] |
InitOperands - Initialize the operands list of this with N operands.
Definition at line 831 of file SelectionDAGNodes.h.
References llvm::checkForCycles().
| bool llvm::SDNode::isMachineOpcode | ( | ) | const [inline] |
isMachineOpcode - Test if this node has a post-isel opcode, directly corresponding to a MachineInstr opcode.
Definition at line 432 of file SelectionDAGNodes.h.
Referenced by llvm::SIInstrInfo::areLoadsFromSameBasePtr(), llvm::ARMBaseInstrInfo::areLoadsFromSameBasePtr(), CheckForPhysRegDependency(), llvm::MachineSDNode::classof(), llvm::ScheduleDAGSDNodes::computeLatency(), llvm::ScheduleDAGSDNodes::computeOperandLatency(), llvm::InstrEmitter::EmitNode(), FindCallSeqStart(), GetCostForDef(), getGluedMachineNode(), llvm::TargetInstrInfo::getInstrLatency(), getMachineOpcode(), llvm::ARMBaseInstrInfo::getOperandLatency(), llvm::TargetInstrInfo::getOperandLatency(), getOperationName(), llvm::ARMTargetLowering::getSchedulingPreference(), getUsefulBitsForUse(), isBitfieldExtractOp(), IsChainDependent(), llvm::SDValue::isMachineOpcode(), llvm::ResourcePriorityQueue::isResourceAvailable(), llvm::ScheduleDAGSDNodes::newSUnit(), PerformANDCombine(), performBitcastCombine(), llvm::ResourcePriorityQueue::rawRegPressureDelta(), llvm::ResourcePriorityQueue::regPressureDelta(), llvm::ResourcePriorityQueue::reserveResources(), llvm::ResourcePriorityQueue::scheduledNode(), llvm::SelectionDAGISel::SelectCodeCommon(), and WalkChainUsers().
| bool llvm::SDNode::isMemIntrinsic | ( | ) | const [inline] |
Test if this node is a memory intrinsic (with valid pointer information). INTRINSIC_W_CHAIN and INTRINSIC_VOID nodes are sometimes created for non-memory intrinsics (with chains) that are not really instances of MemSDNode. For such nodes, we need some extra state to determine the proper classof relationship.
Definition at line 425 of file SelectionDAGNodes.h.
References llvm::ISD::INTRINSIC_VOID, llvm::ISD::INTRINSIC_W_CHAIN, and SubclassData.
Referenced by llvm::MemSDNode::classof(), and llvm::MemIntrinsicSDNode::classof().
| bool SDNode::isOnlyUserOf | ( | SDNode * | N | ) | const |
isOnlyUserOf - Return true if this node is the only use of N.
Definition at line 6319 of file SelectionDAG.cpp.
References I, use_begin(), and use_end().
Referenced by combineRedundantDWordShuffle(), and combineX86ShufflesRecursively().
| bool SDNode::isOperandOf | ( | SDNode * | N | ) | const |
isOperandOf - Return true if this node is an operand of N.
Definition at line 6341 of file SelectionDAG.cpp.
References llvm::SDUse::getNode().
| bool llvm::SDNode::isPredecessorOf | ( | const SDNode * | N | ) | const [inline] |
isPredecessorOf - Return true if this node is a predecessor of N. NOTE: Implemented on top of hasPredecessor and every bit as expensive. Use carefully.
Definition at line 577 of file SelectionDAGNodes.h.
References hasPredecessor().
Referenced by CombineBaseUpdate(), llvm::PPCTargetLowering::getPreIndexedAddressParts(), performNEONPostLDSTCombine(), and performPostLD1Combine().
| bool llvm::SDNode::isTargetMemoryOpcode | ( | ) | const [inline] |
isTargetMemoryOpcode - Test if this node has a target-specific memory-referencing opcode (in the <target>ISD namespace and greater than FIRST_TARGET_MEMORY_OPCODE).
Definition at line 416 of file SelectionDAGNodes.h.
References llvm::ISD::FIRST_TARGET_MEMORY_OPCODE.
Referenced by AddNodeIDCustom(), llvm::MemSDNode::classof(), llvm::MemIntrinsicSDNode::classof(), and llvm::SDValue::isTargetMemoryOpcode().
| bool llvm::SDNode::isTargetOpcode | ( | ) | const [inline] |
isTargetOpcode - Test if this node has a target-specific opcode (in the <target>ISD namespace).
Definition at line 411 of file SelectionDAGNodes.h.
References llvm::ISD::BUILTIN_OP_END.
Referenced by llvm::SDValue::isTargetOpcode().
| op_iterator llvm::SDNode::op_begin | ( | ) | const [inline] |
Definition at line 614 of file SelectionDAGNodes.h.
Referenced by DropOperands(), ExtractSubVector(), llvm::SelectionDAG::getNode(), LowerINTRINSIC_WO_CHAIN(), llvm::SelectionDAG::MorphNodeTo(), ops(), llvm::R600TargetLowering::PerformDAGCombine(), llvm::SelectionDAG::RemoveDeadNodes(), and VerifySDNode().
| op_iterator llvm::SDNode::op_end | ( | ) | const [inline] |
Definition at line 615 of file SelectionDAGNodes.h.
Referenced by DropOperands(), llvm::SelectionDAG::getNode(), LowerINTRINSIC_WO_CHAIN(), llvm::SelectionDAG::MorphNodeTo(), ops(), llvm::R600TargetLowering::PerformDAGCombine(), llvm::SelectionDAG::RemoveDeadNodes(), and VerifySDNode().
| ArrayRef<SDUse> llvm::SDNode::ops | ( | ) | const [inline] |
Definition at line 616 of file SelectionDAGNodes.h.
References llvm::makeArrayRef(), op_begin(), and op_end().
Referenced by AddNodeIDNode(), and findConsecutiveLoad().
| void SDNode::print | ( | raw_ostream & | OS, |
| const SelectionDAG * | G = nullptr |
||
| ) | const |
Definition at line 655 of file SelectionDAGDumper.cpp.
References llvm::SDValue::getNode(), getNumOperands(), getOperand(), print_details(), print_types(), and llvm::NVPTX::PTXCvtMode::RN.
Referenced by dump(), and printrWithDepthHelper().
| void SDNode::print_details | ( | raw_ostream & | OS, |
| const SelectionDAG * | G | ||
| ) | const |
Definition at line 359 of file SelectionDAGDumper.cpp.
References llvm::APFloat::IEEEdouble, and llvm::APFloat::IEEEsingle.
Referenced by llvm::DOTGraphTraits< SelectionDAG * >::getSimpleNodeLabel(), print(), and printr().
| void SDNode::print_types | ( | raw_ostream & | OS, |
| const SelectionDAG * | G | ||
| ) | const |
Definition at line 346 of file SelectionDAGDumper.cpp.
References llvm::EVT::getEVTString(), getNumValues(), getOperationName(), getValueType(), and llvm::MVT::Other.
| void SDNode::printr | ( | raw_ostream & | OS, |
| const SelectionDAG * | G = nullptr |
||
| ) | const |
Definition at line 562 of file SelectionDAGDumper.cpp.
References print_details(), and print_types().
Referenced by DumpNodesr().
| void SDNode::printrFull | ( | raw_ostream & | O, |
| const SelectionDAG * | G = nullptr |
||
| ) | const |
printrFull - Print a SelectionDAG node and all children down to the leaves. The given SelectionDAG allows target-specific nodes to be printed in human-readable form. Unlike printr, this will print the whole DAG, including children that appear multiple times.
Definition at line 641 of file SelectionDAGDumper.cpp.
References printrWithDepth().
| void SDNode::printrWithDepth | ( | raw_ostream & | O, |
| const SelectionDAG * | G = nullptr, |
||
| unsigned | depth = 100 |
||
| ) | const |
printrWithDepth - Print a SelectionDAG node and children up to depth "depth." The given SelectionDAG allows target-specific nodes to be printed in human-readable form. Unlike printr, this will print children that appear multiple times wherever they are used.
Definition at line 636 of file SelectionDAGDumper.cpp.
References printrWithDepthHelper().
Referenced by dumprWithDepth(), llvm::MipsSETargetLowering::PerformDAGCombine(), and printrFull().
| void SDNode::Profile | ( | FoldingSetNodeID & | ID | ) | const |
Profile - Gather unique data for the node.
Definition at line 6251 of file SelectionDAG.cpp.
References AddNodeIDNode().
| void llvm::SDNode::setDebugLoc | ( | const DebugLoc | dl | ) | [inline] |
setDebugLoc - Set source location info. Try to avoid this, putting it in the constructor is preferable.
Definition at line 483 of file SelectionDAGNodes.h.
| void llvm::SDNode::setHasDebugValue | ( | bool | b | ) | [inline] |
setHasDebugValue - set this bit.
Definition at line 446 of file SelectionDAGNodes.h.
Referenced by llvm::SelectionDAG::AddDbgValue().
| void llvm::SDNode::setIROrder | ( | unsigned | Order | ) | [inline] |
setIROrder - Set the node ordering.
Definition at line 476 of file SelectionDAGNodes.h.
Referenced by llvm::NVPTXTargetLowering::LowerFormalArguments().
| void llvm::SDNode::setNodeId | ( | int | Id | ) | [inline] |
setNodeId - Set unique node id.
Definition at line 468 of file SelectionDAGNodes.h.
References llvm::tgtok::Id.
Referenced by llvm::SelectionDAG::AssignTopologicalOrder(), insertDAGNode(), InsertDAGNode(), llvm::DAGTypeLegalizer::run(), llvm::SelectionDAGISel::SelectCodeCommon(), and llvm::SelectionDAG::SelectNodeTo().
| use_iterator llvm::SDNode::use_begin | ( | ) | const [inline] |
use_begin/use_end - Provide iteration support to walk over all uses of an SDNode.
Definition at line 544 of file SelectionDAGNodes.h.
Referenced by adjustForLTGFR(), llvm::SelectionDAG::AssignTopologicalOrder(), CMPEQCombine(), CombineBaseUpdate(), CombineVLDDUP(), ExtendUsesToFormExtLoad(), findConsecutiveLoad(), findGlueUse(), findUser(), getGluedUser(), hasAnyUseOfValue(), hasNonFlagsUse(), HasNoSignedComparisonUses(), hasNUsesOfValue(), hasOneUse(), isLoadIncOrDecStore(), isOnlyUserOf(), LowerEXTRACT_VECTOR_ELT_SSE4(), llvm::AMDGPUTargetLowering::LowerGlobalAddress(), MayFoldIntoStore(), PerformADDCombineWithOperands(), PerformARMBUILD_VECTORCombine(), llvm::PPCTargetLowering::PerformDAGCombine(), PerformEXTRACT_VECTOR_ELTCombine(), PerformMulCombine(), performNEONPostLDSTCombine(), performPostLD1Combine(), PerformSELECTCombine(), llvm::SelectionDAG::ReplaceAllUsesOfValuesWith(), llvm::SelectionDAG::ReplaceAllUsesOfValueWith(), llvm::SelectionDAG::ReplaceAllUsesWith(), llvm::DAGTypeLegalizer::run(), use_size(), useDivRem(), uses(), usesAllNormalStores(), useSinCos(), and WalkChainUsers().
| bool llvm::SDNode::use_empty | ( | ) | const [inline] |
use_empty - Return true if there are no uses of this node.
Definition at line 450 of file SelectionDAGNodes.h.
Referenced by llvm::SelectionDAG::AssignTopologicalOrder(), hasOneUse(), llvm::SelectionDAG::Legalize(), LowerUMULO_SMULO(), llvm::SelectionDAG::MorphNodeTo(), llvm::SelectionDAG::RemoveDeadNodes(), and llvm::SelectionDAGISel::SelectCodeCommon().
| static use_iterator llvm::SDNode::use_end | ( | ) | [inline, static] |
Definition at line 548 of file SelectionDAGNodes.h.
Referenced by adjustForLTGFR(), llvm::SelectionDAG::AssignTopologicalOrder(), CMPEQCombine(), CombineBaseUpdate(), CombineVLDDUP(), ExtendUsesToFormExtLoad(), findConsecutiveLoad(), findGlueUse(), findUser(), getGluedUser(), hasAnyUseOfValue(), hasNonFlagsUse(), HasNoSignedComparisonUses(), hasNUsesOfValue(), hasOneUse(), isLoadIncOrDecStore(), isOnlyUserOf(), llvm::AMDGPUTargetLowering::LowerGlobalAddress(), PerformADDCombineWithOperands(), llvm::PPCTargetLowering::PerformDAGCombine(), PerformEXTRACT_VECTOR_ELTCombine(), performNEONPostLDSTCombine(), performPostLD1Combine(), PerformSELECTCombine(), llvm::SelectionDAG::ReplaceAllUsesOfValuesWith(), llvm::SelectionDAG::ReplaceAllUsesOfValueWith(), llvm::SelectionDAG::ReplaceAllUsesWith(), llvm::DAGTypeLegalizer::run(), use_size(), useDivRem(), uses(), useSinCos(), and WalkChainUsers().
| size_t llvm::SDNode::use_size | ( | ) | const [inline] |
use_size - Return the number of uses of this node. This method takes time proportional to the number of uses.
Definition at line 461 of file SelectionDAGNodes.h.
References use_begin(), and use_end().
| iterator_range<use_iterator> llvm::SDNode::uses | ( | ) | [inline] |
Definition at line 550 of file SelectionDAGNodes.h.
References use_begin(), and use_end().
Referenced by getUsefulBits().
| iterator_range<use_iterator> llvm::SDNode::uses | ( | ) | const [inline] |
Definition at line 553 of file SelectionDAGNodes.h.
References use_begin(), and use_end().
| value_iterator llvm::SDNode::value_begin | ( | ) | const [inline] |
Definition at line 682 of file SelectionDAGNodes.h.
Referenced by lowerDSPIntr().
| value_iterator llvm::SDNode::value_end | ( | ) | const [inline] |
Definition at line 683 of file SelectionDAGNodes.h.
Referenced by lowerDSPIntr().
Friends And Related Function Documentation
friend struct ilist_traits< SDNode > [friend] |
Definition at line 396 of file SelectionDAGNodes.h.
friend class SelectionDAG [friend] |
Reimplemented in llvm::MachineSDNode, llvm::StoreSDNode, llvm::LoadSDNode, llvm::VTSDNode, llvm::CvtRndSatSDNode, llvm::CondCodeSDNode, llvm::ExternalSymbolSDNode, llvm::EHLabelSDNode, llvm::BlockAddressSDNode, llvm::RegisterMaskSDNode, llvm::RegisterSDNode, llvm::MDNodeSDNode, llvm::SrcValueSDNode, llvm::BasicBlockSDNode, llvm::TargetIndexSDNode, llvm::ConstantPoolSDNode, llvm::JumpTableSDNode, llvm::FrameIndexSDNode, llvm::GlobalAddressSDNode, llvm::ConstantFPSDNode, llvm::ConstantSDNode, and llvm::ShuffleVectorSDNode.
Definition at line 395 of file SelectionDAGNodes.h.
Member Data Documentation
uint16_t llvm::SDNode::SubclassData [protected] |
SubclassData - This member is defined by this class, but is not used for anything. Subclasses can use it to hold whatever state they find useful. This field is initialized to zero by the ctor.
Definition at line 362 of file SelectionDAGNodes.h.
Referenced by llvm::LSBaseSDNode::getAddressingMode(), llvm::LoadSDNode::getExtensionType(), llvm::MemSDNode::getOrdering(), llvm::BinaryWithFlagsSDNode::getRawSubclassData(), llvm::MemSDNode::getRawSubclassData(), llvm::MemSDNode::getSynchScope(), llvm::BinaryWithFlagsSDNode::hasNoSignedWrap(), llvm::BinaryWithFlagsSDNode::hasNoUnsignedWrap(), llvm::BinaryWithFlagsSDNode::isExact(), llvm::MemSDNode::isInvariant(), isMemIntrinsic(), llvm::MemSDNode::isNonTemporal(), llvm::ConstantSDNode::isOpaque(), llvm::StoreSDNode::isTruncatingStore(), llvm::MemSDNode::isVolatile(), llvm::LSBaseSDNode::LSBaseSDNode(), llvm::MemIntrinsicSDNode::MemIntrinsicSDNode(), llvm::MemSDNode::MemSDNode(), llvm::BinaryWithFlagsSDNode::setHasNoSignedWrap(), llvm::BinaryWithFlagsSDNode::setHasNoUnsignedWrap(), and llvm::BinaryWithFlagsSDNode::setIsExact().
The documentation for this class was generated from the following files:
1.7.6.1