LLVM API Documentation
00001 //===-- Thumb1InstrInfo.h - Thumb-1 Instruction Information -----*- C++ -*-===// 00002 // 00003 // The LLVM Compiler Infrastructure 00004 // 00005 // This file is distributed under the University of Illinois Open Source 00006 // License. See LICENSE.TXT for details. 00007 // 00008 //===----------------------------------------------------------------------===// 00009 // 00010 // This file contains the Thumb-1 implementation of the TargetInstrInfo class. 00011 // 00012 //===----------------------------------------------------------------------===// 00013 00014 #ifndef LLVM_LIB_TARGET_ARM_THUMB1INSTRINFO_H 00015 #define LLVM_LIB_TARGET_ARM_THUMB1INSTRINFO_H 00016 00017 #include "ARMBaseInstrInfo.h" 00018 #include "Thumb1RegisterInfo.h" 00019 00020 namespace llvm { 00021 class ARMSubtarget; 00022 00023 class Thumb1InstrInfo : public ARMBaseInstrInfo { 00024 Thumb1RegisterInfo RI; 00025 public: 00026 explicit Thumb1InstrInfo(const ARMSubtarget &STI); 00027 00028 /// getNoopForMachoTarget - Return the noop instruction to use for a noop. 00029 void getNoopForMachoTarget(MCInst &NopInst) const override; 00030 00031 // Return the non-pre/post incrementing version of 'Opc'. Return 0 00032 // if there is not such an opcode. 00033 unsigned getUnindexedOpcode(unsigned Opc) const override; 00034 00035 /// getRegisterInfo - TargetInstrInfo is a superset of MRegister info. As 00036 /// such, whenever a client has an instance of instruction info, it should 00037 /// always be able to get register info as well (through this method). 00038 /// 00039 const Thumb1RegisterInfo &getRegisterInfo() const override { return RI; } 00040 00041 void copyPhysReg(MachineBasicBlock &MBB, 00042 MachineBasicBlock::iterator I, DebugLoc DL, 00043 unsigned DestReg, unsigned SrcReg, 00044 bool KillSrc) const override; 00045 void storeRegToStackSlot(MachineBasicBlock &MBB, 00046 MachineBasicBlock::iterator MBBI, 00047 unsigned SrcReg, bool isKill, int FrameIndex, 00048 const TargetRegisterClass *RC, 00049 const TargetRegisterInfo *TRI) const override; 00050 00051 void loadRegFromStackSlot(MachineBasicBlock &MBB, 00052 MachineBasicBlock::iterator MBBI, 00053 unsigned DestReg, int FrameIndex, 00054 const TargetRegisterClass *RC, 00055 const TargetRegisterInfo *TRI) const override; 00056 00057 private: 00058 void expandLoadStackGuard(MachineBasicBlock::iterator MI, 00059 Reloc::Model RM) const override; 00060 }; 00061 } 00062 00063 #endif