LLVM API Documentation
#include <Thumb1RegisterInfo.h>
Definition at line 25 of file Thumb1RegisterInfo.h.
Definition at line 41 of file Thumb1RegisterInfo.cpp.
void Thumb1RegisterInfo::eliminateFrameIndex | ( | MachineBasicBlock::iterator | II, |
int | SPAdj, | ||
unsigned | FIOperandNum, | ||
RegScavenger * | RS = nullptr |
||
) | const [override] |
Reimplemented from llvm::ARMBaseRegisterInfo.
Definition at line 557 of file Thumb1RegisterInfo.cpp.
References llvm::AddDefaultPred(), llvm::ARMBaseRegisterInfo::BasePtr, llvm::MachineOperand::ChangeToImmediate(), llvm::MachineOperand::ChangeToRegister(), llvm::MachineRegisterInfo::createVirtualRegister(), emitLoadConstPool(), llvm::emitThumbRegPlusImmediate(), emitThumbRegPlusImmInReg(), llvm::MachineInstr::findFirstPredOperandIdx(), llvm::ISD::FrameIndex, llvm::MachineInstr::getDebugLoc(), llvm::MachineFunction::getFrameInfo(), llvm::TargetSubtargetInfo::getFrameLowering(), llvm::ARMFunctionInfo::getFramePtrSpillOffset(), llvm::ARMBaseRegisterInfo::getFrameRegister(), llvm::MachineOperand::getIndex(), llvm::MachineFunction::getInfo(), llvm::TargetSubtargetInfo::getInstrInfo(), llvm::MachineFrameInfo::getObjectOffset(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::MachineInstr::getParent(), llvm::MachineBasicBlock::getParent(), llvm::MachineOperand::getReg(), llvm::MachineFunction::getRegInfo(), llvm::MachineFrameInfo::getStackSize(), llvm::MachineFunction::getSubtarget(), llvm::TargetMachine::getSubtargetImpl(), llvm::MachineFunction::getTarget(), llvm::ARMBaseRegisterInfo::hasBasePointer(), llvm::TargetFrameLowering::hasFP(), llvm::TargetFrameLowering::hasReservedCallFrame(), llvm::MachineFrameInfo::hasVarSizedObjects(), llvm::MachineInstr::isDebugValue(), llvm::MachineInstr::isPredicable(), llvm::RegScavenger::isScavengingFrameIndex(), llvm::ARMFunctionInfo::isThumbFunction(), llvm_unreachable, llvm::MachineInstr::mayLoad(), llvm::MachineInstr::mayStore(), llvm::AArch64CC::MI, removeOperands(), rewriteFrameIndex(), llvm::MachineInstr::setDesc(), and TII.
void Thumb1RegisterInfo::emitLoadConstPool | ( | MachineBasicBlock & | MBB, |
MachineBasicBlock::iterator & | MBBI, | ||
DebugLoc | dl, | ||
unsigned | DestReg, | ||
unsigned | SubIdx, | ||
int | Val, | ||
ARMCC::CondCodes | Pred = ARMCC::AL , |
||
unsigned | PredReg = 0 , |
||
unsigned | MIFlags = MachineInstr::NoFlags |
||
) | const [override, virtual] |
emitLoadConstPool - Emits a load from constpool to materialize the specified immediate.
Reimplemented from llvm::ARMBaseRegisterInfo.
Definition at line 62 of file Thumb1RegisterInfo.cpp.
References llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addReg(), llvm::BuildMI(), llvm::CallingConv::C, llvm::MCInstrInfo::get(), llvm::ConstantInt::get(), llvm::MachineFunction::getConstantPool(), llvm::MachineConstantPool::getConstantPoolIndex(), llvm::Function::getContext(), llvm::getDefRegState(), llvm::MachineFunction::getFunction(), llvm::TargetSubtargetInfo::getInstrInfo(), llvm::Type::getInt32Ty(), llvm::MachineBasicBlock::getParent(), llvm::MachineFunction::getSubtarget(), llvm::MachineInstrBuilder::setMIFlags(), and TII.
Referenced by eliminateFrameIndex().
const TargetRegisterClass * Thumb1RegisterInfo::getLargestLegalSuperClass | ( | const TargetRegisterClass * | RC | ) | const [override] |
Reimplemented from llvm::ARMBaseRegisterInfo.
Definition at line 46 of file Thumb1RegisterInfo.cpp.
const TargetRegisterClass * Thumb1RegisterInfo::getPointerRegClass | ( | const MachineFunction & | MF, |
unsigned | Kind = 0 |
||
) | const [override] |
Reimplemented from llvm::ARMBaseRegisterInfo.
Definition at line 54 of file Thumb1RegisterInfo.cpp.
void Thumb1RegisterInfo::resolveFrameIndex | ( | MachineInstr & | MI, |
unsigned | BaseReg, | ||
int64_t | Offset | ||
) | const [override] |
Reimplemented from llvm::ARMBaseRegisterInfo.
Definition at line 485 of file Thumb1RegisterInfo.cpp.
References llvm::TargetSubtargetInfo::getInstrInfo(), llvm::MachineInstr::getNumOperands(), llvm::MachineInstr::getOperand(), llvm::MachineInstr::getParent(), llvm::MachineBasicBlock::getParent(), llvm::TargetMachine::getSubtargetImpl(), llvm::MachineFunction::getTarget(), llvm::MachineOperand::isFI(), rewriteFrameIndex(), and TII.
bool Thumb1RegisterInfo::rewriteFrameIndex | ( | MachineBasicBlock::iterator | II, |
unsigned | FrameRegIdx, | ||
unsigned | FrameReg, | ||
int & | Offset, | ||
const ARMBaseInstrInfo & | TII | ||
) | const |
Definition at line 344 of file Thumb1RegisterInfo.cpp.
References llvm::AddDefaultPred(), llvm::AddDefaultT1CC(), llvm::ARMII::AddrModeMask, llvm::ARMII::AddrModeT1_s, llvm::ARMCC::AL, calcNumMI(), llvm::MachineOperand::ChangeToImmediate(), llvm::MachineOperand::ChangeToRegister(), convertToNonSPOpcode(), emitThumbConstant(), llvm::emitThumbRegPlusImmediate(), llvm::MachineBasicBlock::erase(), llvm::MachineInstr::getDebugLoc(), llvm::MachineInstr::getDesc(), llvm::MachineOperand::getImm(), llvm::getInstrPredicate(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::MachineInstr::getParent(), llvm::MachineBasicBlock::getParent(), llvm::MachineOperand::getReg(), llvm_unreachable, llvm::AArch64CC::MI, llvm::MachineInstr::RemoveOperand(), removeOperands(), llvm::MachineInstr::setDesc(), and llvm::MCInstrDesc::TSFlags.
Referenced by eliminateFrameIndex(), and resolveFrameIndex().
bool Thumb1RegisterInfo::saveScavengerRegister | ( | MachineBasicBlock & | MBB, |
MachineBasicBlock::iterator | I, | ||
MachineBasicBlock::iterator & | UseMI, | ||
const TargetRegisterClass * | RC, | ||
unsigned | Reg | ||
) | const [override] |
saveScavengerRegister - Spill the register so it can be used by the register scavenger. Return true.
Definition at line 508 of file Thumb1RegisterInfo.cpp.
References llvm::AddDefaultPred(), llvm::MachineInstrBuilder::addReg(), llvm::BuildMI(), llvm::MachineOperand::clobbersPhysReg(), llvm::RegState::Define, llvm::MCInstrInfo::get(), llvm::TargetSubtargetInfo::getInstrInfo(), llvm::MachineBasicBlock::getParent(), llvm::MachineOperand::getReg(), llvm::MachineFunction::getSubtarget(), llvm::MachineOperand::isReg(), llvm::MachineOperand::isRegMask(), llvm::MachineOperand::isUndef(), llvm::TargetRegisterInfo::isVirtualRegister(), llvm::RegState::Kill, and TII.