llvm::VLIWResourceModel Class Reference

#include <HexagonMachineScheduler.h>

List of all members.

Public Member Functions
	VLIWResourceModel (const TargetMachine &TM, const TargetSchedModel *SM)
	~VLIWResourceModel ()
void	resetPacketState ()
void	resetDFA ()
void	reset ()
bool	isResourceAvailable (SUnit *SU)
bool	reserveResources (SUnit *SU)
	Keep track of available resources.
unsigned	getTotalPackets () const

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Detailed Description

Definition at line 41 of file HexagonMachineScheduler.h.

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Constructor & Destructor Documentation

llvm::VLIWResourceModel::VLIWResourceModel	(	const TargetMachine &	TM,
		const TargetSchedModel *	SM
	)		[inline]

Definition at line 57 of file HexagonMachineScheduler.h.

References llvm::TargetInstrInfo::CreateTargetScheduleState(), llvm::TargetSubtargetInfo::getInstrInfo(), and llvm::TargetMachine::getSubtargetImpl().

llvm::VLIWResourceModel::~VLIWResourceModel

(

)

[inline]

Definition at line 72 of file HexagonMachineScheduler.h.

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Member Function Documentation

unsigned llvm::VLIWResourceModel::getTotalPackets

(

)

const [inline]

Definition at line 91 of file HexagonMachineScheduler.h.

bool VLIWResourceModel::isResourceAvailable

(

SUnit *

SU

)

Check if scheduling of this SU is possible in the current packet. It is _not_ precise (statefull), it is more like another heuristic. Many corner cases are figured empirically.

Definition at line 43 of file HexagonMachineScheduler.cpp.

References llvm::DFAPacketizer::canReserveResources(), llvm::TargetOpcode::COPY, llvm::TargetOpcode::EXTRACT_SUBREG, llvm::SUnit::getInstr(), llvm::MachineInstr::getOpcode(), I, llvm::TargetOpcode::IMPLICIT_DEF, llvm::TargetOpcode::INLINEASM, llvm::TargetOpcode::INSERT_SUBREG, llvm::TargetOpcode::REG_SEQUENCE, and llvm::TargetOpcode::SUBREG_TO_REG.

Referenced by reserveResources().

bool VLIWResourceModel::reserveResources

(

SUnit *

SU

)

Keep track of available resources.

Definition at line 83 of file HexagonMachineScheduler.cpp.

References llvm::TargetOpcode::CFI_INSTRUCTION, llvm::DFAPacketizer::clearResources(), llvm::TargetOpcode::COPY, llvm::dbgs(), DEBUG, llvm::dump(), llvm::TargetOpcode::EH_LABEL, llvm::TargetOpcode::EXTRACT_SUBREG, llvm::SUnit::getInstr(), llvm::TargetSchedModel::getIssueWidth(), llvm::MachineInstr::getOpcode(), llvm::TargetOpcode::IMPLICIT_DEF, llvm::TargetOpcode::INLINEASM, llvm::TargetOpcode::INSERT_SUBREG, isResourceAvailable(), llvm::TargetOpcode::KILL, llvm::TargetOpcode::REG_SEQUENCE, llvm::DFAPacketizer::reserveResources(), and llvm::TargetOpcode::SUBREG_TO_REG.

void llvm::VLIWResourceModel::reset

(

)

[inline]

Definition at line 84 of file HexagonMachineScheduler.h.

void llvm::VLIWResourceModel::resetDFA

(

)

[inline]

Definition at line 80 of file HexagonMachineScheduler.h.

void llvm::VLIWResourceModel::resetPacketState

(

)

[inline]

Definition at line 76 of file HexagonMachineScheduler.h.

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The documentation for this class was generated from the following files:

• HexagonMachineScheduler.h
• HexagonMachineScheduler.cpp