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Linux Kernel
3.7.1
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All Data Structures Namespaces Files Functions Variables Typedefs Enumerations Enumerator Macros Groups Pages
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Linux Kernel
3.7.1
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#include <linux/module.h>#include <linux/moduleparam.h>#include <linux/kernel.h>#include <linux/compiler.h>#include <linux/netdevice.h>#include <linux/etherdevice.h>#include <linux/init.h>#include <linux/interrupt.h>#include <linux/pci.h>#include <linux/dma-mapping.h>#include <linux/delay.h>#include <linux/ethtool.h>#include <linux/gfp.h>#include <linux/mii.h>#include <linux/if_vlan.h>#include <linux/crc32.h>#include <linux/in.h>#include <linux/ip.h>#include <linux/tcp.h>#include <linux/udp.h>#include <linux/cache.h>#include <asm/io.h>#include <asm/irq.h>#include <asm/uaccess.h>Go to the source code of this file.
Data Structures | |
| struct | cp_desc |
| struct | cp_dma_stats |
| struct | cp_extra_stats |
| struct | cp_private |
Macros | |
| #define | pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
| #define | DRV_NAME "8139cp" |
| #define | DRV_VERSION "1.3" |
| #define | DRV_RELDATE "Mar 22, 2004" |
| #define | CP_DEF_MSG_ENABLE |
| #define | CP_NUM_STATS 14 /* struct cp_dma_stats, plus one */ |
| #define | CP_STATS_SIZE 64 /* size in bytes of DMA stats block */ |
| #define | CP_REGS_SIZE (0xff + 1) |
| #define | CP_REGS_VER 1 /* version 1 */ |
| #define | CP_RX_RING_SIZE 64 |
| #define | CP_TX_RING_SIZE 64 |
| #define | CP_RING_BYTES |
| #define | NEXT_TX(N) (((N) + 1) & (CP_TX_RING_SIZE - 1)) |
| #define | NEXT_RX(N) (((N) + 1) & (CP_RX_RING_SIZE - 1)) |
| #define | TX_BUFFS_AVAIL(CP) |
| #define | PKT_BUF_SZ 1536 /* Size of each temporary Rx buffer.*/ |
| #define | CP_INTERNAL_PHY 32 |
| #define | RX_FIFO_THRESH 5 /* Rx buffer level before first PCI xfer. */ |
| #define | RX_DMA_BURST 4 /* Maximum PCI burst, '4' is 256 */ |
| #define | TX_DMA_BURST 6 /* Maximum PCI burst, '6' is 1024 */ |
| #define | TX_EARLY_THRESH 256 /* Early Tx threshold, in bytes */ |
| #define | TX_TIMEOUT (6*HZ) |
| #define | CP_MIN_MTU 60 /* TODO: allow lower, but pad */ |
| #define | CP_MAX_MTU 4096 |
| #define | cpr8(reg) readb(cp->regs + (reg)) |
| #define | cpr16(reg) readw(cp->regs + (reg)) |
| #define | cpr32(reg) readl(cp->regs + (reg)) |
| #define | cpw8(reg, val) writeb((val), cp->regs + (reg)) |
| #define | cpw16(reg, val) writew((val), cp->regs + (reg)) |
| #define | cpw32(reg, val) writel((val), cp->regs + (reg)) |
| #define | cpw8_f(reg, val) |
| #define | cpw16_f(reg, val) |
| #define | cpw32_f(reg, val) |
| #define | EE_SHIFT_CLK 0x04 /* EEPROM shift clock. */ |
| #define | EE_CS 0x08 /* EEPROM chip select. */ |
| #define | EE_DATA_WRITE 0x02 /* EEPROM chip data in. */ |
| #define | EE_WRITE_0 0x00 |
| #define | EE_WRITE_1 0x02 |
| #define | EE_DATA_READ 0x01 /* EEPROM chip data out. */ |
| #define | EE_ENB (0x80 | EE_CS) |
| #define | eeprom_delay() readb(ee_addr) |
| #define | EE_EXTEND_CMD (4) |
| #define | EE_WRITE_CMD (5) |
| #define | EE_READ_CMD (6) |
| #define | EE_ERASE_CMD (7) |
| #define | EE_EWDS_ADDR (0) |
| #define | EE_WRAL_ADDR (1) |
| #define | EE_ERAL_ADDR (2) |
| #define | EE_EWEN_ADDR (3) |
| #define | CP_EEPROM_MAGIC PCI_DEVICE_ID_REALTEK_8139 |
Enumerations | |
| enum | { MAC0 = 0x00, MAR0 = 0x08, StatsAddr = 0x10, TxRingAddr = 0x20, HiTxRingAddr = 0x28, Cmd = 0x37, IntrMask = 0x3C, IntrStatus = 0x3E, TxConfig = 0x40, ChipVersion = 0x43, RxConfig = 0x44, RxMissed = 0x4C, Cfg9346 = 0x50, Config1 = 0x52, Config3 = 0x59, Config4 = 0x5A, MultiIntr = 0x5C, BasicModeCtrl = 0x62, BasicModeStatus = 0x64, NWayAdvert = 0x66, NWayLPAR = 0x68, NWayExpansion = 0x6A, Config5 = 0xD8, TxPoll = 0xD9, RxMaxSize = 0xDA, CpCmd = 0xE0, IntrMitigate = 0xE2, RxRingAddr = 0xE4, TxThresh = 0xEC, OldRxBufAddr = 0x30, OldTSD0 = 0x10, DescOwn = (1 << 31), RingEnd = (1 << 30), FirstFrag = (1 << 29), LastFrag = (1 << 28), LargeSend = (1 << 27), MSSShift = 16, MSSMask = 0xfff, TxError = (1 << 23), RxError = (1 << 20), IPCS = (1 << 18), UDPCS = (1 << 17), TCPCS = (1 << 16), TxVlanTag = (1 << 17), RxVlanTagged = (1 << 16), IPFail = (1 << 15), UDPFail = (1 << 14), TCPFail = (1 << 13), NormalTxPoll = (1 << 6), PID1 = (1 << 17), PID0 = (1 << 16), RxProtoTCP = 1, RxProtoUDP = 2, RxProtoIP = 3, TxFIFOUnder = (1 << 25), TxOWC = (1 << 22), TxLinkFail = (1 << 21), TxMaxCol = (1 << 20), TxColCntShift = 16, TxColCntMask = 0x01 | 0x02 | 0x04 | 0x08, RxErrFrame = (1 << 27), RxMcast = (1 << 26), RxErrCRC = (1 << 18), RxErrRunt = (1 << 19), RxErrLong = (1 << 21), RxErrFIFO = (1 << 22), DumpStats = (1 << 3), RxCfgFIFOShift = 13, RxCfgDMAShift = 8, AcceptErr = 0x20, AcceptRunt = 0x10, AcceptBroadcast = 0x08, AcceptMulticast = 0x04, AcceptMyPhys = 0x02, AcceptAllPhys = 0x01, PciErr = (1 << 15), TimerIntr = (1 << 14), LenChg = (1 << 13), SWInt = (1 << 8), TxEmpty = (1 << 7), RxFIFOOvr = (1 << 6), LinkChg = (1 << 5), RxEmpty = (1 << 4), TxErr = (1 << 3), TxOK = (1 << 2), RxErr = (1 << 1), RxOK = (1 << 0), IntrResvd = (1 << 10), IntrAll, CmdReset = (1 << 4), RxOn = (1 << 3), TxOn = (1 << 2), RxVlanOn = (1 << 6), RxChkSum = (1 << 5), PCIDAC = (1 << 4), PCIMulRW = (1 << 3), CpRxOn = (1 << 1), CpTxOn = (1 << 0), Cfg9346_Lock = 0x00, Cfg9346_Unlock = 0xC0, IFG = (1 << 25) | (1 << 24), TxDMAShift = 8, TxThreshMask = 0x3f, TxThreshMax = 2048, DriverLoaded = (1 << 5), LWACT = (1 << 4), PMEnable = (1 << 0), PARMEnable = (1 << 6), MagicPacket = (1 << 5), LinkUp = (1 << 4), LWPTN = (1 << 1), LWPME = (1 << 4), BWF = (1 << 6), MWF = (1 << 5), UWF = (1 << 4), LANWake = (1 << 1), PMEStatus = (1 << 0), cp_norx_intr_mask = PciErr | LinkChg | TxOK | TxErr | TxEmpty, cp_rx_intr_mask = RxOK | RxErr | RxEmpty | RxFIFOOvr, cp_intr_mask = cp_rx_intr_mask | cp_norx_intr_mask } |
Functions | |
| MODULE_AUTHOR ("Jeff Garzik <[email protected]>") | |
| MODULE_DESCRIPTION ("RealTek RTL-8139C+ series 10/100 PCI Ethernet driver") | |
| MODULE_VERSION (DRV_VERSION) | |
| MODULE_LICENSE ("GPL") | |
| module_param (debug, int, 0) | |
| MODULE_PARM_DESC (debug,"8139cp: bitmapped message enable number") | |
| module_param (multicast_filter_limit, int, 0) | |
| MODULE_PARM_DESC (multicast_filter_limit,"8139cp: maximum number of filtered multicast addresses") | |
| MODULE_DEVICE_TABLE (pci, cp_pci_tbl) | |
| module_init (cp_init) | |
| module_exit (cp_exit) | |
Variables | |
| struct cp_dma_stats | __packed |
| #define CP_DEF_MSG_ENABLE |
| #define CP_EEPROM_MAGIC PCI_DEVICE_ID_REALTEK_8139 |
| #define CP_NUM_STATS 14 /* struct cp_dma_stats, plus one */ |
| #define CP_RING_BYTES |
| #define NEXT_RX | ( | N | ) | (((N) + 1) & (CP_RX_RING_SIZE - 1)) |
| #define NEXT_TX | ( | N | ) | (((N) + 1) & (CP_TX_RING_SIZE - 1)) |
| #define PKT_BUF_SZ 1536 /* Size of each temporary Rx buffer.*/ |
| #define TX_BUFFS_AVAIL | ( | CP | ) |
| anonymous enum |
| MODULE_AUTHOR | ( | "Jeff Garzik <[email protected]>" | ) |
| MODULE_DESCRIPTION | ( | "RealTek RTL-8139C+ series 10/100 PCI Ethernet driver" | ) |
| MODULE_DEVICE_TABLE | ( | pci | , |
| cp_pci_tbl | |||
| ) |
| module_exit | ( | cp_exit | ) |
| module_init | ( | cp_init | ) |
| MODULE_LICENSE | ( | "GPL" | ) |
| module_param | ( | multicast_filter_limit | , |
| int | , | ||
| 0 | |||
| ) |
| MODULE_PARM_DESC | ( | debug | , |
| "8139cp: bitmapped message enable number" | |||
| ) |
| MODULE_PARM_DESC | ( | multicast_filter_limit | , |
| "8139cp: maximum number of filtered multicast addresses" | |||
| ) |
| MODULE_VERSION | ( | DRV_VERSION | ) |
| const char str[ETH_GSTRING_LEN] |
1.8.2