11 #include <linux/types.h>
13 #include <linux/device.h>
15 #include <linux/slab.h>
19 #include <linux/module.h>
25 #define DRV_NAME "ad2s1210"
27 #define AD2S1210_DEF_CONTROL 0x7E
29 #define AD2S1210_MSB_IS_HIGH 0x80
30 #define AD2S1210_MSB_IS_LOW 0x7F
31 #define AD2S1210_PHASE_LOCK_RANGE_44 0x20
32 #define AD2S1210_ENABLE_HYSTERESIS 0x10
33 #define AD2S1210_SET_ENRES1 0x08
34 #define AD2S1210_SET_ENRES0 0x04
35 #define AD2S1210_SET_RES1 0x02
36 #define AD2S1210_SET_RES0 0x01
38 #define AD2S1210_SET_ENRESOLUTION (AD2S1210_SET_ENRES1 | \
40 #define AD2S1210_SET_RESOLUTION (AD2S1210_SET_RES1 | AD2S1210_SET_RES0)
42 #define AD2S1210_REG_POSITION 0x80
43 #define AD2S1210_REG_VELOCITY 0x82
44 #define AD2S1210_REG_LOS_THRD 0x88
45 #define AD2S1210_REG_DOS_OVR_THRD 0x89
46 #define AD2S1210_REG_DOS_MIS_THRD 0x8A
47 #define AD2S1210_REG_DOS_RST_MAX_THRD 0x8B
48 #define AD2S1210_REG_DOS_RST_MIN_THRD 0x8C
49 #define AD2S1210_REG_LOT_HIGH_THRD 0x8D
50 #define AD2S1210_REG_LOT_LOW_THRD 0x8E
51 #define AD2S1210_REG_EXCIT_FREQ 0x91
52 #define AD2S1210_REG_CONTROL 0x92
53 #define AD2S1210_REG_SOFT_RESET 0xF0
54 #define AD2S1210_REG_FAULT 0xFF
57 #define AD2S1210_SAA 3
58 #define AD2S1210_PN (AD2S1210_SAA + AD2S1210_RES)
60 #define AD2S1210_MIN_CLKIN 6144000
61 #define AD2S1210_MAX_CLKIN 10240000
62 #define AD2S1210_MIN_EXCIT 2000
63 #define AD2S1210_MAX_EXCIT 20000
64 #define AD2S1210_MIN_FCW 0x4
65 #define AD2S1210_MAX_FCW 0x50
68 #define AD2S1210_DEF_CLKIN 8192000
70 #define AD2S1210_DEF_TCK (1000000000/AD2S1210_DEF_CLKIN)
71 #define AD2S1210_DEF_EXCIT 10000
80 static const unsigned int ad2s1210_resolution_value[] = { 10, 12, 14, 16 };
96 static const int ad2s1210_mode_vals[4][2] = {
116 ret = spi_write(st->
sdev, st->tx, 1);
137 spi_message_init(&
msg);
138 spi_message_add_tail(&xfer, &
msg);
150 int ad2s1210_update_frequency_control_word(
struct ad2s1210_state *st)
157 pr_err(
"ad2s1210: FCW out of range\n");
165 return ad2s1210_config_write(st, fcw);
168 static unsigned char ad2s1210_read_resolution_pin(
struct ad2s1210_state *st)
170 return ad2s1210_resolution_value[
175 static const int ad2s1210_res_pins[4][2] = {
176 { 0, 0 }, {0, 1}, {1, 0}, {1, 1}
179 static inline void ad2s1210_set_resolution_pin(
struct ad2s1210_state *st)
182 ad2s1210_res_pins[(st->
resolution - 10)/2][0]);
184 ad2s1210_res_pins[(st->
resolution - 10)/2][1]);
195 return ad2s1210_config_write(st, 0x0);
207 ret = ad2s1210_soft_reset(st);
210 return ret < 0 ? ret : len;
234 pr_err(
"ad2s1210: fclkin out of range\n");
241 ret = ad2s1210_update_frequency_control_word(st);
244 ret = ad2s1210_soft_reset(st);
248 return ret < 0 ? ret : len;
261 const char *buf,
size_t len)
271 pr_err(
"ad2s1210: excitation frequency out of range\n");
276 ret = ad2s1210_update_frequency_control_word(st);
279 ret = ad2s1210_soft_reset(st);
283 return ret < 0 ? ret : len;
295 return ret < 0 ? ret :
sprintf(buf,
"0x%x\n", ret);
300 const char *buf,
size_t len)
316 ret = ad2s1210_config_write(st, data);
325 pr_err(
"ad2s1210: write control register fail\n");
330 if (st->
pdata->gpioin) {
331 data = ad2s1210_read_resolution_pin(st);
333 pr_warning(
"ad2s1210: resolution settings not match\n");
335 ad2s1210_set_resolution_pin(st);
354 const char *buf,
size_t len)
362 if (ret || udata < 10 || udata > 16) {
363 pr_err(
"ad2s1210: resolution out of range\n");
372 data |= (udata - 10) >> 1;
376 ret = ad2s1210_config_write(st, data & AD2S1210_MSB_IS_LOW);
383 if (data & AD2S1210_MSB_IS_HIGH) {
385 pr_err(
"ad2s1210: setting resolution fail\n");
390 if (st->
pdata->gpioin) {
391 data = ad2s1210_read_resolution_pin(st);
393 pr_warning(
"ad2s1210: resolution settings not match\n");
395 ad2s1210_set_resolution_pin(st);
413 return ret ? ret :
sprintf(buf,
"0x%x\n", ret);
437 return ret < 0 ? ret : len;
449 ret = ad2s1210_config_read(st, iattr->
address);
452 return ret < 0 ? ret :
sprintf(buf,
"%d\n", ret);
467 ret = ad2s1210_config_write(st, iattr->
address);
470 ret = ad2s1210_config_write(st, data & AD2S1210_MSB_IS_LOW);
473 return ret < 0 ? ret : len;
476 static int ad2s1210_read_raw(
struct iio_dev *indio_dev,
493 switch (chan->
type) {
495 ad2s1210_set_mode(
MOD_POS, st);
498 ad2s1210_set_mode(
MOD_VEL, st);
506 ret = spi_read(st->
sdev, st->rx, 2);
510 switch (chan->
type) {
519 negative = st->rx[0] & 0x80;
543 NULL, ad2s1210_store_softreset, 0);
545 ad2s1210_show_fclkin, ad2s1210_store_fclkin, 0);
547 ad2s1210_show_fexcit, ad2s1210_store_fexcit, 0);
549 ad2s1210_show_control, ad2s1210_store_control, 0);
551 ad2s1210_show_resolution, ad2s1210_store_resolution, 0);
553 ad2s1210_show_fault, ad2s1210_clear_fault, 0);
556 ad2s1210_show_reg, ad2s1210_store_reg,
559 ad2s1210_show_reg, ad2s1210_store_reg,
562 ad2s1210_show_reg, ad2s1210_store_reg,
565 ad2s1210_show_reg, ad2s1210_store_reg,
568 ad2s1210_show_reg, ad2s1210_store_reg,
571 ad2s1210_show_reg, ad2s1210_store_reg,
574 ad2s1210_show_reg, ad2s1210_store_reg,
592 static struct attribute *ad2s1210_attributes[] = {
593 &iio_dev_attr_reset.dev_attr.attr,
594 &iio_dev_attr_fclkin.dev_attr.attr,
595 &iio_dev_attr_fexcit.dev_attr.attr,
596 &iio_dev_attr_control.dev_attr.attr,
597 &iio_dev_attr_bits.dev_attr.attr,
598 &iio_dev_attr_fault.dev_attr.attr,
599 &iio_dev_attr_los_thrd.dev_attr.attr,
600 &iio_dev_attr_dos_ovr_thrd.dev_attr.attr,
601 &iio_dev_attr_dos_mis_thrd.dev_attr.attr,
602 &iio_dev_attr_dos_rst_max_thrd.dev_attr.attr,
603 &iio_dev_attr_dos_rst_min_thrd.dev_attr.attr,
604 &iio_dev_attr_lot_high_thrd.dev_attr.attr,
605 &iio_dev_attr_lot_low_thrd.dev_attr.attr,
610 .attrs = ad2s1210_attributes,
619 if (st->
pdata->gpioin)
620 st->
resolution = ad2s1210_read_resolution_pin(st);
622 ad2s1210_set_resolution_pin(st);
629 ret = ad2s1210_config_write(st, data);
636 if (ret & AD2S1210_MSB_IS_HIGH) {
641 ret = ad2s1210_update_frequency_control_word(st);
644 ret = ad2s1210_soft_reset(st);
650 static const struct iio_info ad2s1210_info = {
651 .read_raw = &ad2s1210_read_raw,
652 .attrs = &ad2s1210_attribute_group,
659 struct gpio ad2s1210_gpios[] = {
673 struct gpio ad2s1210_gpios[] = {
690 if (spi->
dev.platform_data ==
NULL)
694 if (indio_dev ==
NULL) {
698 st = iio_priv(indio_dev);
700 ret = ad2s1210_setup_gpios(st);
704 spi_set_drvdata(spi, indio_dev);
713 indio_dev->
dev.parent = &spi->
dev;
714 indio_dev->
info = &ad2s1210_info;
716 indio_dev->
channels = ad2s1210_channels;
722 goto error_free_gpios;
727 ad2s1210_initial(st);
732 ad2s1210_free_gpios(st);
741 struct iio_dev *indio_dev = spi_get_drvdata(spi);
744 ad2s1210_free_gpios(iio_priv(indio_dev));
761 .probe = ad2s1210_probe,
763 .id_table = ad2s1210_id,